[people/ms/u-boot.git] / include / configs / xilinx_zynqmp.h

/*
 * Configuration for Xilinx ZynqMP
 * (C) Copyright 2014 - 2015 Xilinx, Inc.
 * Michal Simek <michal.simek@xilinx.com>
 *
 * Based on Configuration for Versatile Express
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __XILINX_ZYNQMP_H
#define __XILINX_ZYNQMP_H

#define CONFIG_REMAKE_ELF

/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */

#define CONFIG_SYS_NO_FLASH

/* Generic Interrupt Controller Definitions */
#define CONFIG_GICV2
#define GICD_BASE	0xF9010000
#define GICC_BASE	0xF9020000

#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_MEMTEST_SCRATCH	0xfffc0000

#ifndef CONFIG_NR_DRAM_BANKS
# define CONFIG_NR_DRAM_BANKS		2
#endif
#define CONFIG_SYS_MEMTEST_START	0
#define CONFIG_SYS_MEMTEST_END		1000

/* Have release address at the end of 256MB for now */
#define CPU_RELEASE_ADDR	0xFFFFFF0

#define CONFIG_SYS_INIT_SP_ADDR		CONFIG_SYS_TEXT_BASE

/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if !defined(COUNTER_FREQUENCY)
# define COUNTER_FREQUENCY		100000000
#endif

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x2000000)

/* Serial setup */
#define CONFIG_ARM_DCC
#define CONFIG_CPU_ARMV8
#define CONFIG_ZYNQ_SERIAL

#define CONFIG_CONS_INDEX		0
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE \
	{ 4800, 9600, 19200, 38400, 57600, 115200 }

/* Command line configuration */
#define CONFIG_CMD_ENV
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#ifndef CONFIG_SPL_BUILD
# define CONFIG_ISO_PARTITION
#endif
#define CONFIG_MP

/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_MAY_FAIL
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_PXE
#define CONFIG_BOOTP_SUBNETMASK

/* Diff from config_distro_defaults.h */
#define CONFIG_SUPPORT_RAW_INITRD
#if !defined(CONFIG_SPL_BUILD)
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#endif
#define CONFIG_AUTO_COMPLETE

/* PXE */
#define CONFIG_CMD_PXE
#define CONFIG_MENU

#if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SUPPORT_EMMC_BOOT
# define CONFIG_SDHCI
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
#  define CONFIG_ZYNQ_SDHCI_MAX_FREQ	200000000
# endif
#endif

#if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQMP_USB)
# define CONFIG_FAT_WRITE
#endif

#ifdef CONFIG_NAND_ARASAN
# define CONFIG_CMD_NAND_LOCK_UNLOCK
# define CONFIG_SYS_MAX_NAND_DEVICE	1
# define CONFIG_SYS_NAND_SELF_INIT
# define CONFIG_SYS_NAND_ONFI_DETECTION
# define CONFIG_MTD_DEVICE
#endif

/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR		0x8000000

#if defined(CONFIG_ZYNQMP_USB)
#define CONFIG_USB_MAX_CONTROLLER_COUNT         2
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
#define CONFIG_USB_XHCI_ZYNQMP

#define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT	300
#define CONFIG_USB_FUNCTION_DFU
#define CONFIG_DFU_RAM
#define CONFIG_USB_CABLE_CHECK
#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
#define CONFIG_THOR_RESET_OFF
#define DFU_ALT_INFO_RAM \
	"dfu_ram_info=" \
	"setenv dfu_alt_info " \
	"Image ram $kernel_addr $kernel_size\\\\;" \
	"system.dtb ram $fdt_addr $fdt_size\0" \
	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

#define DFU_ALT_INFO  \
		DFU_ALT_INFO_RAM
#endif

#if !defined(DFU_ALT_INFO)
# define DFU_ALT_INFO
#endif

#define CONFIG_BOARD_LATE_INIT

/* Do not preserve environment */
#define CONFIG_ENV_IS_NOWHERE		1
#define CONFIG_ENV_SIZE			0x1000

/* Monitor Command Prompt */
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE		2048
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS		64

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_NET_MULTI
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHY_MARVELL
# define CONFIG_PHY_NATSEMI
# define CONFIG_PHY_TI
# define CONFIG_PHY_GIGE
# define CONFIG_PHY_VITESSE
# define CONFIG_PHY_REALTEK
# define PHY_ANEG_TIMEOUT       20000
#endif

/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQMP_EEPROM
# define CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			(64 * 1024)
#endif

#ifdef CONFIG_SATA_CEVA
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_SCSI
#endif

#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

#define CONFIG_CMD_UNZIP

#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_CLOCKS

#define ENV_MEM_LAYOUT_SETTINGS \
	"fdt_high=10000000\0" \
	"initrd_high=10000000\0" \
	"fdt_addr_r=0x40000000\0" \
	"pxefile_addr_r=0x10000000\0" \
	"kernel_addr_r=0x18000000\0" \
	"scriptaddr=0x02000000\0" \
	"ramdisk_addr_r=0x02100000\0" \

#if defined(CONFIG_ZYNQ_SDHCI)
# define BOOT_TARGET_DEVICES_MMC(func)	func(MMC, mmc, 0) func(MMC, mmc, 1)
#else
# define BOOT_TARGET_DEVICES_MMC(func)
#endif

#if defined(CONFIG_SATA_CEVA)
# define BOOT_TARGET_DEVICES_SCSI(func)	func(SCSI, scsi, 0)
#else
# define BOOT_TARGET_DEVICES_SCSI(func)
#endif

#if defined(CONFIG_ZYNQMP_USB)
# define BOOT_TARGET_DEVICES_USB(func)	func(USB, usb, 0) func(USB, usb, 1)
#else
# define BOOT_TARGET_DEVICES_USB(func)
#endif

#define BOOT_TARGET_DEVICES(func) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	BOOT_TARGET_DEVICES_SCSI(func) \
	func(PXE, pxe, na) \
	func(DHCP, dhcp, na)

#include <config_distro_bootcmd.h>

/* Initial environment variables */
#ifndef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
	ENV_MEM_LAYOUT_SETTINGS \
	BOOTENV \
	DFU_ALT_INFO
#endif

/* SPL can't handle all huge variables - define just DFU */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
#undef CONFIG_EXTRA_ENV_SETTINGS
# define CONFIG_EXTRA_ENV_SETTINGS \
	"dfu_alt_info_ram=uboot.bin ram 0x8000000 0x1000000;" \
			  "atf-uboot.ub ram 0x10000000 0x1000000;" \
			  "Image ram 0x80000 0x3f80000;" \
			  "system.dtb ram 0x4000000 0x100000\0" \
	"dfu_bufsiz=0x1000\0"
#endif

#define CONFIG_SPL_TEXT_BASE		0xfffc0000
#define CONFIG_SPL_STACK		0xfffffffc
#define CONFIG_SPL_MAX_SIZE		0x40000

/* Just random location in OCM */
#define CONFIG_SPL_BSS_START_ADDR	0x0
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000

#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_RAM_DEVICE

#define CONFIG_SPL_OS_BOOT
/* u-boot is like dtb */
#define CONFIG_SPL_FS_LOAD_ARGS_NAME	"u-boot.bin"
#define CONFIG_SYS_SPL_ARGS_ADDR	0x8000000

/* ATF is my kernel image */
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME	"atf.ub"

/* FIT load address for RAM boot */
#define CONFIG_SPL_LOAD_FIT_ADDRESS	0x10000000

/* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI
# define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0 /* unused */
# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0 /* unused */
# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0 /* unused */
# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
#endif

#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
# undef CONFIG_CMD_BOOTD
# define CONFIG_SPL_ENV_SUPPORT
# define CONFIG_SPL_HASH_SUPPORT
# define CONFIG_ENV_MAX_ENTRIES	10

# define CONFIG_SYS_SPL_MALLOC_START	0x20000000
# define CONFIG_SYS_SPL_MALLOC_SIZE	0x10000000

#ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE
# error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used"
#endif
#endif

#endif /* __XILINX_ZYNQMP_H */
Commit	Line	Data
84c7204b MS	1	/*
	2	* Configuration for Xilinx ZynqMP
	3	* (C) Copyright 2014 - 2015 Xilinx, Inc.
	4	* Michal Simek <michal.simek@xilinx.com>
	5	*
	6	* Based on Configuration for Versatile Express
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#ifndef __XILINX_ZYNQMP_H
	12	#define __XILINX_ZYNQMP_H
	13
	14	#define CONFIG_REMAKE_ELF
	15
	16	/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
	17
	18	#define CONFIG_SYS_NO_FLASH
	19
84c7204b MS	20	/* Generic Interrupt Controller Definitions */
	21	#define CONFIG_GICV2
	22	#define GICD_BASE 0xF9010000
	23	#define GICC_BASE 0xF9020000
	24
d759512f MS	25	#define CONFIG_SYS_ALT_MEMTEST
	26	#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
	27
8d59d7f6 MS	28	#ifndef CONFIG_NR_DRAM_BANKS
	29	# define CONFIG_NR_DRAM_BANKS 2
	30	#endif
	31	#define CONFIG_SYS_MEMTEST_START 0
	32	#define CONFIG_SYS_MEMTEST_END 1000
84c7204b MS	33
	34	/* Have release address at the end of 256MB for now */
	35	#define CPU_RELEASE_ADDR 0xFFFFFF0
	36
8fbf678b	37	#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
84c7204b	38
84c7204b	39	/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
713b6164 MS	40	#if !defined(COUNTER_FREQUENCY)
	41	# define COUNTER_FREQUENCY 100000000
	42	#endif
84c7204b MS	43
84c7204b MS	44	/* Size of malloc() pool */
16fa00a7	45	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x2000000)
84c7204b MS	46
84c7204b MS	47	/* Serial setup */
636ac181 MS	48	#define CONFIG_ARM_DCC
	49	#define CONFIG_CPU_ARMV8
	50	#define CONFIG_ZYNQ_SERIAL
84c7204b MS	51
	52	#define CONFIG_CONS_INDEX 0
	53	#define CONFIG_BAUDRATE 115200
	54	#define CONFIG_SYS_BAUDRATE_TABLE \
	55	{ 4800, 9600, 19200, 38400, 57600, 115200 }
	56
	57	/* Command line configuration */
	58	#define CONFIG_CMD_ENV
84c7204b	59	#define CONFIG_DOS_PARTITION
07654ba1	60	#define CONFIG_EFI_PARTITION
e6a9ed04 MS	61	#ifndef CONFIG_SPL_BUILD
	62	# define CONFIG_ISO_PARTITION
	63	#endif
5cb24200	64	#define CONFIG_MP
84c7204b	65
cb7ea820 MS	66	/* BOOTP options */
	67	#define CONFIG_BOOTP_BOOTFILESIZE
	68	#define CONFIG_BOOTP_BOOTPATH
	69	#define CONFIG_BOOTP_GATEWAY
	70	#define CONFIG_BOOTP_HOSTNAME
	71	#define CONFIG_BOOTP_MAY_FAIL
a1207de0 MS	72	#define CONFIG_BOOTP_DNS
	73	#define CONFIG_BOOTP_PXE
	74	#define CONFIG_BOOTP_SUBNETMASK
a1207de0 MS	75
	76	/* Diff from config_distro_defaults.h */
	77	#define CONFIG_SUPPORT_RAW_INITRD
d58fc12e	78	#if !defined(CONFIG_SPL_BUILD)
a1207de0	79	#define CONFIG_ENV_VARS_UBOOT_CONFIG
d58fc12e	80	#endif
a1207de0 MS	81	#define CONFIG_AUTO_COMPLETE
	82
	83	/* PXE */
	84	#define CONFIG_CMD_PXE
	85	#define CONFIG_MENU
cb7ea820	86
ce0335f2	87	#if defined(CONFIG_ZYNQ_SDHCI)
84c7204b MS	88	# define CONFIG_MMC
84c7204b MS	89	# define CONFIG_GENERIC_MMC
926782cd	90	# define CONFIG_SUPPORT_EMMC_BOOT
84c7204b	91	# define CONFIG_SDHCI
f3bd7280 MS	92	# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
	93	# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
	94	# endif
46f68e68 MS	95	#endif
	96
	97	#if defined(CONFIG_ZYNQ_SDHCI) \|\| defined(CONFIG_ZYNQMP_USB)
84c7204b	98	# define CONFIG_FAT_WRITE
84c7204b MS	99	#endif
84c7204b MS	100
78cb965a	101	#ifdef CONFIG_NAND_ARASAN
78cb965a SDPP	102	# define CONFIG_CMD_NAND_LOCK_UNLOCK
	103	# define CONFIG_SYS_MAX_NAND_DEVICE 1
	104	# define CONFIG_SYS_NAND_SELF_INIT
	105	# define CONFIG_SYS_NAND_ONFI_DETECTION
	106	# define CONFIG_MTD_DEVICE
	107	#endif
	108
84c7204b MS	109	/* Miscellaneous configurable options */
	110	#define CONFIG_SYS_LOAD_ADDR 0x8000000
	111
16fa00a7	112	#if defined(CONFIG_ZYNQMP_USB)
275bd6d1	113	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
0f676767	114	#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
0f676767 SDPP	115	#define CONFIG_USB_XHCI_ZYNQMP
0f676767 SDPP	116
16fa00a7 SDPP	117	#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
	118	#define DFU_DEFAULT_POLL_TIMEOUT 300
	119	#define CONFIG_USB_FUNCTION_DFU
	120	#define CONFIG_DFU_RAM
16fa00a7	121	#define CONFIG_USB_CABLE_CHECK
16fa00a7 SDPP	122	#define CONFIG_CMD_THOR_DOWNLOAD
	123	#define CONFIG_USB_FUNCTION_THOR
	124	#define CONFIG_THOR_RESET_OFF
	125	#define DFU_ALT_INFO_RAM \
	126	"dfu_ram_info=" \
0e43140b	127	"setenv dfu_alt_info " \
1b19daf4 SDPP	128	"Image ram $kernel_addr $kernel_size\\\\;" \
1b19daf4 SDPP	129	"system.dtb ram $fdt_addr $fdt_size\0" \
16fa00a7 SDPP	130	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	131	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
	132
	133	#define DFU_ALT_INFO \
	134	DFU_ALT_INFO_RAM
	135	#endif
	136
	137	#if !defined(DFU_ALT_INFO)
	138	# define DFU_ALT_INFO
	139	#endif
	140
84c7204b MS	141	#define CONFIG_BOARD_LATE_INIT
	142
	143	/* Do not preserve environment */
	144	#define CONFIG_ENV_IS_NOWHERE 1
	145	#define CONFIG_ENV_SIZE 0x1000
	146
	147	/* Monitor Command Prompt */
	148	/* Console I/O Buffer Size */
	149	#define CONFIG_SYS_CBSIZE 2048
84c7204b MS	150	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
84c7204b MS	151	sizeof(CONFIG_SYS_PROMPT) + 16)
84c7204b MS	152	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	153	#define CONFIG_SYS_LONGHELP
	154	#define CONFIG_CMDLINE_EDITING
	155	#define CONFIG_SYS_MAXARGS 64
	156
cb7ea820	157	/* Ethernet driver */
596e5782	158	#if defined(CONFIG_ZYNQ_GEM)
cb7ea820	159	# define CONFIG_NET_MULTI
cb7ea820 MS	160	# define CONFIG_MII
cb7ea820 MS	161	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
cb7ea820	162	# define CONFIG_PHY_MARVELL
f96fe2c0	163	# define CONFIG_PHY_NATSEMI
bf146325	164	# define CONFIG_PHY_TI
c4c96f2b	165	# define CONFIG_PHY_GIGE
a1a6af82 MS	166	# define CONFIG_PHY_VITESSE
a1a6af82 MS	167	# define CONFIG_PHY_REALTEK
e2928f32	168	# define PHY_ANEG_TIMEOUT 20000
cb7ea820 MS	169	#endif
cb7ea820 MS	170
2594e03c SDPP	171	/* I2C */
2594e03c SDPP	172	#if defined(CONFIG_SYS_I2C_ZYNQ)
2594e03c SDPP	173	# define CONFIG_SYS_I2C
	174	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
	175	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
	176	#endif
	177
2594e03c SDPP	178	/* EEPROM */
	179	#ifdef CONFIG_ZYNQMP_EEPROM
	180	# define CONFIG_CMD_EEPROM
	181	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	182	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	183	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	184	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	185	# define CONFIG_SYS_EEPROM_SIZE (64 * 1024)
	186	#endif
	187
0d169b8c	188	#ifdef CONFIG_SATA_CEVA
6fe6f135 MS	189	#define CONFIG_LIBATA
	190	#define CONFIG_SCSI_AHCI
	191	#define CONFIG_SCSI_AHCI_PLAT
679b994a	192	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
6fe6f135 MS	193	#define CONFIG_SYS_SCSI_MAX_LUN 1
	194	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	195	CONFIG_SYS_SCSI_MAX_LUN)
c649e3c9	196	#define CONFIG_SCSI
6fe6f135 MS	197	#endif
6fe6f135 MS	198
84c7204b MS	199	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
84c7204b MS	200
84c7204b MS	201	#define CONFIG_CMD_UNZIP
	202
	203	#define CONFIG_BOARD_EARLY_INIT_R
	204	#define CONFIG_CLOCKS
	205
b72894f1 MS	206	#define ENV_MEM_LAYOUT_SETTINGS \
	207	"fdt_high=10000000\0" \
	208	"initrd_high=10000000\0" \
	209	"fdt_addr_r=0x40000000\0" \
	210	"pxefile_addr_r=0x10000000\0" \
	211	"kernel_addr_r=0x18000000\0" \
	212	"scriptaddr=0x02000000\0" \
	213	"ramdisk_addr_r=0x02100000\0" \
	214
	215	#if defined(CONFIG_ZYNQ_SDHCI)
	216	# define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
	217	#else
	218	# define BOOT_TARGET_DEVICES_MMC(func)
	219	#endif
	220
	221	#if defined(CONFIG_SATA_CEVA)
	222	# define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
	223	#else
	224	# define BOOT_TARGET_DEVICES_SCSI(func)
	225	#endif
	226
	227	#if defined(CONFIG_ZYNQMP_USB)
	228	# define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1)
	229	#else
	230	# define BOOT_TARGET_DEVICES_USB(func)
	231	#endif
	232
	233	#define BOOT_TARGET_DEVICES(func) \
	234	BOOT_TARGET_DEVICES_MMC(func) \
	235	BOOT_TARGET_DEVICES_USB(func) \
	236	BOOT_TARGET_DEVICES_SCSI(func) \
	237	func(PXE, pxe, na) \
	238	func(DHCP, dhcp, na)
	239
	240	#include <config_distro_bootcmd.h>
	241
	242	/* Initial environment variables */
	243	#ifndef CONFIG_EXTRA_ENV_SETTINGS
	244	#define CONFIG_EXTRA_ENV_SETTINGS \
	245	ENV_MEM_LAYOUT_SETTINGS \
	246	BOOTENV \
	247	DFU_ALT_INFO
	248	#endif
	249
d58fc12e MS	250	/* SPL can't handle all huge variables - define just DFU */
	251	#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
	252	#undef CONFIG_EXTRA_ENV_SETTINGS
	253	# define CONFIG_EXTRA_ENV_SETTINGS \
	254	"dfu_alt_info_ram=uboot.bin ram 0x8000000 0x1000000;" \
	255	"atf-uboot.ub ram 0x10000000 0x1000000;" \
	256	"Image ram 0x80000 0x3f80000;" \
	257	"system.dtb ram 0x4000000 0x100000\0" \
	258	"dfu_bufsiz=0x1000\0"
	259	#endif
	260
e6a9ed04	261	#define CONFIG_SPL_TEXT_BASE 0xfffc0000
8fbf678b	262	#define CONFIG_SPL_STACK 0xfffffffc
d58fc12e	263	#define CONFIG_SPL_MAX_SIZE 0x40000
e6a9ed04 MS	264
e6a9ed04 MS	265	/* Just random location in OCM */
8ed31f36 MS	266	#define CONFIG_SPL_BSS_START_ADDR 0x0
8ed31f36 MS	267	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
e6a9ed04 MS	268
e6a9ed04 MS	269	#define CONFIG_SPL_FRAMEWORK
e6a9ed04 MS	270	#define CONFIG_SPL_BOARD_INIT
	271	#define CONFIG_SPL_RAM_DEVICE
	272
	273	#define CONFIG_SPL_OS_BOOT
	274	/* u-boot is like dtb */
	275	#define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin"
	276	#define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000
	277
	278	/* ATF is my kernel image */
	279	#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf.ub"
	280
	281	/* FIT load address for RAM boot */
	282	#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
	283
	284	/* MMC support */
	285	#ifdef CONFIG_ZYNQ_SDHCI
e6a9ed04 MS	286	# define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
	287	# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */
	288	# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */
	289	# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */
e6a9ed04 MS	290	# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
	291	#endif
	292
d58fc12e MS	293	#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
	294	# undef CONFIG_CMD_BOOTD
	295	# define CONFIG_SPL_ENV_SUPPORT
	296	# define CONFIG_SPL_HASH_SUPPORT
	297	# define CONFIG_ENV_MAX_ENTRIES 10
	298
	299	# define CONFIG_SYS_SPL_MALLOC_START 0x20000000
	300	# define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000000
	301
	302	#ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE
	303	# error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used"
	304	#endif
	305	#endif
	306
84c7204b	307	#endif /* __XILINX_ZYNQMP_H */