[people/ms/u-boot.git] / include / configs / zynq-common.h

/*
 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
 * (C) Copyright 2013 - 2018 Xilinx, Inc.
 *
 * Common configuration options for all Zynq boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ZYNQ_COMMON_H
#define __CONFIG_ZYNQ_COMMON_H

/* CPU clock */
#ifndef CONFIG_CPU_FREQ_HZ
# define CONFIG_CPU_FREQ_HZ	800000000
#endif

/* Cache options */
#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
# define CONFIG_SYS_L2_PL310
# define CONFIG_SYS_PL310_BASE		0xf8f02000
#endif

#define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
#define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)

/* Serial drivers */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE  \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

#define CONFIG_ARM_DCC

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_BOOTP_BOOTPATH
# define CONFIG_BOOTP_GATEWAY
# define CONFIG_BOOTP_HOSTNAME
# define CONFIG_BOOTP_MAY_FAIL
#endif

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
#endif

/* QSPI */
#ifdef CONFIG_ZYNQ_QSPI
# define CONFIG_SF_DEFAULT_SPEED	30000000
# define CONFIG_SPI_FLASH_ISSI
#endif

/* NOR */
#ifdef CONFIG_MTD_NOR_FLASH
# define CONFIG_SYS_FLASH_BASE		0xE2000000
# define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
# define CONFIG_SYS_MAX_FLASH_BANKS	1
# define CONFIG_SYS_MAX_FLASH_SECT	512
# define CONFIG_SYS_FLASH_ERASE_TOUT	1000
# define CONFIG_SYS_FLASH_WRITE_TOUT	5000
# define CONFIG_FLASH_SHOW_PROGRESS	10
# define CONFIG_SYS_FLASH_CFI
# undef CONFIG_SYS_FLASH_EMPTY_INFO
# define CONFIG_FLASH_CFI_DRIVER
# undef CONFIG_SYS_FLASH_PROTECTION
# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#endif

#ifdef CONFIG_NAND_ZYNQ
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_MTD_DEVICE
#endif

/* MMC */
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
#endif

#ifdef CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI

# define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
# define DFU_DEFAULT_POLL_TIMEOUT	300
# define CONFIG_USB_CABLE_CHECK
# define CONFIG_THOR_RESET_OFF
# define DFU_ALT_INFO_RAM \
	"dfu_ram_info=" \
	"set dfu_alt_info " \
	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	"${ramdisk_image} ram 0x2000000 0x600000\0" \
	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

# if defined(CONFIG_MMC_SDHCI_ZYNQ)
#  define DFU_ALT_INFO_MMC \
	"dfu_mmc_info=" \
	"set dfu_alt_info " \
	"${kernel_image} fat 0 1\\\\;" \
	"${devicetree_image} fat 0 1\\\\;" \
	"${ramdisk_image} fat 0 1\0" \
	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"

#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_MMC
# else
#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM
# endif
#endif

#if !defined(DFU_ALT_INFO)
# define DFU_ALT_INFO
#endif

#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
#define CONFIG_SYS_I2C_ZYNQ
#endif

/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQ_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
#endif

/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE			(128 << 10)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Environment */
#ifndef CONFIG_ENV_IS_NOWHERE
# define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
# define CONFIG_ENV_OFFSET		0xE0000
#endif

/* enable preboot to be loaded before CONFIG_BOOTDELAY */
#define CONFIG_PREBOOT

/* Boot configuration */
#define CONFIG_SYS_LOAD_ADDR		0 /* default? */

/* Distro boot enablement */

#ifdef CONFIG_SPL_BUILD
#define BOOTENV
#else
#include <config_distro_defaults.h>

#ifdef CONFIG_CMD_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#endif

#ifdef CONFIG_CMD_USB
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif

#if defined(CONFIG_CMD_PXE)
#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
#else
#define BOOT_TARGET_DEVICES_PXE(func)
#endif

#if defined(CONFIG_CMD_DHCP)
#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
#else
#define BOOT_TARGET_DEVICES_DHCP(func)
#endif

#define BOOT_TARGET_DEVICES(func) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	BOOT_TARGET_DEVICES_PXE(func) \
	BOOT_TARGET_DEVICES_DHCP(func)

#include <config_distro_bootcmd.h>
#endif /* CONFIG_SPL_BUILD */

/* Default environment */
#ifndef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"fit_image=fit.itb\0"		\
	"load_addr=0x2000000\0"		\
	"fit_size=0x800000\0"		\
	"flash_off=0x100000\0"		\
	"nor_flash_off=0xE2100000\0"	\
	"fdt_high=0x20000000\0"		\
	"initrd_high=0x20000000\0"	\
	"loadbootenv_addr=0x2000000\0" \
	"fdt_addr_r=0x1f00000\0"        \
	"pxefile_addr_r=0x2000000\0"    \
	"kernel_addr_r=0x2000000\0"     \
	"scriptaddr=0x3000000\0"        \
	"ramdisk_addr_r=0x3100000\0"    \
	"bootenv=uEnv.txt\0" \
	"bootenv_dev=mmc\0" \
	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
		"env import -t ${loadbootenv_addr} $filesize\0" \
	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
	"setbootenv=if env run bootenv_existence_test; then " \
			"if env run loadbootenv; then " \
				"env run importbootenv; " \
			"fi; " \
		"fi; \0" \
	"sd_loadbootenv=set bootenv_dev mmc && " \
			"run setbootenv \0" \
	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
	"preboot=if test $modeboot = sdboot; then " \
			"run sd_loadbootenv; " \
			"echo Checking if uenvcmd is set ...; " \
			"if test -n $uenvcmd; then " \
				"echo Running uenvcmd ...; " \
				"run uenvcmd; " \
			"fi; " \
		"fi; \0" \
	"norboot=echo Copying FIT from NOR flash to RAM... && " \
		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
		"bootm ${load_addr}\0" \
	"sdboot=echo Copying FIT from SD to RAM... && " \
		"load mmc 0 ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"jtagboot=echo TFTPing FIT to RAM... && " \
		"tftpboot ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"usbboot=if usb start; then " \
			"echo Copying FIT from USB to RAM... && " \
			"load usb 0 ${load_addr} ${fit_image} && " \
			"bootm ${load_addr}; fi\0" \
		DFU_ALT_INFO \
		BOOTENV
#endif

/* Miscellaneous configurable options */

#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
#define CONFIG_SYS_MAXARGS		32 /* max number of command args */

#ifndef CONFIG_NR_DRAM_BANKS
# define CONFIG_NR_DRAM_BANKS		1
#endif

#define CONFIG_SYS_MEMTEST_START	0
#define CONFIG_SYS_MEMTEST_END		0x1000

#define CONFIG_SYS_MALLOC_LEN		0x1400000

#define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)

/* Enable the PL to be downloaded */
#define CONFIG_FPGA_ZYNQPL

/* FIT support */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */

/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

/* Boot FreeBSD/vxWorks from an ELF image */
#define CONFIG_SYS_MMC_MAX_DEVICE	1

#define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"

/* Commands */

/* SPL part */

/* MMC support */
#ifdef CONFIG_MMC_SDHCI_ZYNQ
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
#endif

/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
#endif

/* Address in RAM where the parameters must be copied by SPL. */
#define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000

#define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"

/* Not using MMC raw mode - just for compilation purpose */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0

/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
#define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
					CONFIG_SYS_SPI_ARGS_SIZE)
#endif

/* for booting directly linux */

/* SP location before relocation, must use scratch RAM */
#define CONFIG_SPL_TEXT_BASE	0x0

/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
#define CONFIG_SPL_MAX_SIZE	0x30000

/* On the top of OCM space */
#define CONFIG_SYS_SPL_MALLOC_START	CONFIG_SPL_STACK_R_ADDR
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000000

/*
 * SPL stack position - and stack goes down
 * 0xfffffe00 is used for putting wfi loop.
 * Set it up as limit for now.
 */
#define CONFIG_SPL_STACK	0xfffffe00

/* BSS setup */
#define CONFIG_SPL_BSS_START_ADDR	0x100000
#define CONFIG_SPL_BSS_MAX_SIZE		0x100000

#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE

#endif /* __CONFIG_ZYNQ_COMMON_H */
Commit	Line	Data
f22651cf MS	1	/*
f22651cf MS	2	* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3e1b61de	3	* (C) Copyright 2013 - 2018 Xilinx, Inc.
06fe8dae JT	4	*
06fe8dae JT	5	* Common configuration options for all Zynq boards.
f22651cf	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
f22651cf MS	8	*/
f22651cf MS	9
06fe8dae JT	10	#ifndef __CONFIG_ZYNQ_COMMON_H
06fe8dae JT	11	#define __CONFIG_ZYNQ_COMMON_H
f22651cf	12
f22651cf	13	/* CPU clock */
53e49f74 JT	14	#ifndef CONFIG_CPU_FREQ_HZ
	15	# define CONFIG_CPU_FREQ_HZ 800000000
	16	#endif
f22651cf	17
8cfac504	18	/* Cache options */
8cfac504 JT	19	#define CONFIG_SYS_L2CACHE_OFF
	20	#ifndef CONFIG_SYS_L2CACHE_OFF
	21	# define CONFIG_SYS_L2_PL310
	22	# define CONFIG_SYS_PL310_BASE 0xf8f02000
	23	#endif
	24
a2ec7fb9 MS	25	#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
	26	#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
	27	#define CONFIG_SYS_TIMER_COUNTS_DOWN
	28	#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
	29
53e49f74	30	/* Serial drivers */
f22651cf MS	31	/* The following table includes the supported baudrates */
	32	#define CONFIG_SYS_BAUDRATE_TABLE \
	33	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
	34
636ac181	35	#define CONFIG_ARM_DCC
53e49f74	36
f22651cf	37	/* Ethernet driver */
596e5782	38	#if defined(CONFIG_ZYNQ_GEM)
88fcfb1c JT	39	# define CONFIG_MII
88fcfb1c JT	40	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
dd1c351f MS	41	# define CONFIG_BOOTP_BOOTPATH
	42	# define CONFIG_BOOTP_GATEWAY
	43	# define CONFIG_BOOTP_HOSTNAME
	44	# define CONFIG_BOOTP_MAY_FAIL
88fcfb1c	45	#endif
f22651cf	46
53e49f74 JT	47	/* SPI */
53e49f74 JT	48	#ifdef CONFIG_ZYNQ_SPI
53e49f74 JT	49	#endif
53e49f74 JT	50
a241d4ec JT	51	/* QSPI */
	52	#ifdef CONFIG_ZYNQ_QSPI
	53	# define CONFIG_SF_DEFAULT_SPEED 30000000
232a8e4e	54	# define CONFIG_SPI_FLASH_ISSI
a241d4ec JT	55	#endif
a241d4ec JT	56
fe5eddbf	57	/* NOR */
e856bdcf	58	#ifdef CONFIG_MTD_NOR_FLASH
fe5eddbf JT	59	# define CONFIG_SYS_FLASH_BASE 0xE2000000
	60	# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
	61	# define CONFIG_SYS_MAX_FLASH_BANKS 1
	62	# define CONFIG_SYS_MAX_FLASH_SECT 512
	63	# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	64	# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
	65	# define CONFIG_FLASH_SHOW_PROGRESS 10
	66	# define CONFIG_SYS_FLASH_CFI
	67	# undef CONFIG_SYS_FLASH_EMPTY_INFO
	68	# define CONFIG_FLASH_CFI_DRIVER
	69	# undef CONFIG_SYS_FLASH_PROTECTION
	70	# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	71	#endif
	72
ba8adb26	73	#ifdef CONFIG_NAND_ZYNQ
ba8adb26 SDPP	74	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	75	#define CONFIG_SYS_NAND_ONFI_DETECTION
	76	#define CONFIG_MTD_DEVICE
	77	#endif
	78
293eb33f	79	/* MMC */
08aa0334	80	#if defined(CONFIG_MMC_SDHCI_ZYNQ)
f3bd7280	81	# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
293eb33f MS	82	#endif
293eb33f MS	83
2cdc778b	84	#ifdef CONFIG_USB_EHCI_ZYNQ
c6024c8e	85	# define CONFIG_EHCI_IS_TDI
87f3dbdf	86
87f3dbdf SDPP	87	# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
87f3dbdf SDPP	88	# define DFU_DEFAULT_POLL_TIMEOUT 300
87f3dbdf	89	# define CONFIG_USB_CABLE_CHECK
1e8d3830	90	# define CONFIG_THOR_RESET_OFF
87f3dbdf SDPP	91	# define DFU_ALT_INFO_RAM \
	92	"dfu_ram_info=" \
	93	"set dfu_alt_info " \
	94	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	95	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	96	"${ramdisk_image} ram 0x2000000 0x600000\0" \
c4fa5114 SDPP	97	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
c4fa5114 SDPP	98	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
87f3dbdf	99
08aa0334	100	# if defined(CONFIG_MMC_SDHCI_ZYNQ)
87f3dbdf SDPP	101	# define DFU_ALT_INFO_MMC \
	102	"dfu_mmc_info=" \
	103	"set dfu_alt_info " \
	104	"${kernel_image} fat 0 1\\\\;" \
	105	"${devicetree_image} fat 0 1\\\\;" \
	106	"${ramdisk_image} fat 0 1\0" \
c4fa5114 SDPP	107	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	108	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
	109
87f3dbdf SDPP	110	# define DFU_ALT_INFO \
	111	DFU_ALT_INFO_RAM \
	112	DFU_ALT_INFO_MMC
	113	# else
	114	# define DFU_ALT_INFO \
	115	DFU_ALT_INFO_RAM
	116	# endif
	117	#endif
	118
	119	#if !defined(DFU_ALT_INFO)
	120	# define DFU_ALT_INFO
c6024c8e SDPP	121	#endif
c6024c8e SDPP	122
1c3f2c72	123	#if defined(CONFIG_ZYNQ_I2C0) \|\| defined(CONFIG_ZYNQ_I2C1)
18948632	124	#define CONFIG_SYS_I2C_ZYNQ
1c3f2c72 SDPP	125	#endif
1c3f2c72 SDPP	126
8934f784	127	/* I2C */
18948632	128	#if defined(CONFIG_SYS_I2C_ZYNQ)
0bdffe71	129	# define CONFIG_SYS_I2C
0bdffe71	130	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
18948632	131	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
8934f784 MS	132	#endif
8934f784 MS	133
65da1efd JT	134	/* EEPROM */
65da1efd JT	135	#ifdef CONFIG_ZYNQ_EEPROM
65da1efd JT	136	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	137	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	138	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	139	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	140	# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
	141	#endif
	142
18eee22f JT	143	/* Total Size of Environment Sector */
	144	#define CONFIG_ENV_SIZE (128 << 10)
	145
b660ca13 JT	146	/* Allow to overwrite serial and ethaddr */
	147	#define CONFIG_ENV_OVERWRITE
	148
f22651cf	149	/* Environment */
ed53e4d6	150	#ifndef CONFIG_ENV_IS_NOWHERE
ed53e4d6 JT	151	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
ed53e4d6 JT	152	# define CONFIG_ENV_OFFSET 0xE0000
ed53e4d6	153	#endif
e83f61a6	154
4d1ed9c7 MS	155	/* enable preboot to be loaded before CONFIG_BOOTDELAY */
	156	#define CONFIG_PREBOOT
	157
61d8eeb0	158	/* Boot configuration */
61d8eeb0 AG	159	#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
	160
	161	/* Distro boot enablement */
	162
	163	#ifdef CONFIG_SPL_BUILD
	164	#define BOOTENV
	165	#else
	166	#include <config_distro_defaults.h>
	167
	168	#ifdef CONFIG_CMD_MMC
	169	#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
	170	#else
	171	#define BOOT_TARGET_DEVICES_MMC(func)
	172	#endif
	173
	174	#ifdef CONFIG_CMD_USB
	175	#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
	176	#else
	177	#define BOOT_TARGET_DEVICES_USB(func)
	178	#endif
	179
	180	#if defined(CONFIG_CMD_PXE)
	181	#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
	182	#else
	183	#define BOOT_TARGET_DEVICES_PXE(func)
	184	#endif
	185
	186	#if defined(CONFIG_CMD_DHCP)
	187	#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
	188	#else
	189	#define BOOT_TARGET_DEVICES_DHCP(func)
	190	#endif
	191
	192	#define BOOT_TARGET_DEVICES(func) \
	193	BOOT_TARGET_DEVICES_MMC(func) \
	194	BOOT_TARGET_DEVICES_USB(func) \
	195	BOOT_TARGET_DEVICES_PXE(func) \
	196	BOOT_TARGET_DEVICES_DHCP(func)
	197
	198	#include <config_distro_bootcmd.h>
	199	#endif /* CONFIG_SPL_BUILD */
	200
e83f61a6	201	/* Default environment */
b7b3efe7	202	#ifndef CONFIG_EXTRA_ENV_SETTINGS
e83f61a6 JT	203	#define CONFIG_EXTRA_ENV_SETTINGS \
	204	"fit_image=fit.itb\0" \
	205	"load_addr=0x2000000\0" \
	206	"fit_size=0x800000\0" \
	207	"flash_off=0x100000\0" \
	208	"nor_flash_off=0xE2100000\0" \
	209	"fdt_high=0x20000000\0" \
	210	"initrd_high=0x20000000\0" \
4d1ed9c7	211	"loadbootenv_addr=0x2000000\0" \
61d8eeb0 AG	212	"fdt_addr_r=0x1f00000\0" \
	213	"pxefile_addr_r=0x2000000\0" \
	214	"kernel_addr_r=0x2000000\0" \
	215	"scriptaddr=0x3000000\0" \
	216	"ramdisk_addr_r=0x3100000\0" \
4d1ed9c7 MS	217	"bootenv=uEnv.txt\0" \
	218	"bootenv_dev=mmc\0" \
	219	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
	220	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
	221	"env import -t ${loadbootenv_addr} $filesize\0" \
	222	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
	223	"setbootenv=if env run bootenv_existence_test; then " \
	224	"if env run loadbootenv; then " \
	225	"env run importbootenv; " \
	226	"fi; " \
	227	"fi; \0" \
	228	"sd_loadbootenv=set bootenv_dev mmc && " \
	229	"run setbootenv \0" \
	230	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
	231	"preboot=if test $modeboot = sdboot; then " \
	232	"run sd_loadbootenv; " \
	233	"echo Checking if uenvcmd is set ...; " \
	234	"if test -n $uenvcmd; then " \
	235	"echo Running uenvcmd ...; " \
	236	"run uenvcmd; " \
	237	"fi; " \
	238	"fi; \0" \
e83f61a6 JT	239	"norboot=echo Copying FIT from NOR flash to RAM... && " \
	240	"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
	241	"bootm ${load_addr}\0" \
	242	"sdboot=echo Copying FIT from SD to RAM... && " \
e9d69c1c	243	"load mmc 0 ${load_addr} ${fit_image} && " \
e83f61a6 JT	244	"bootm ${load_addr}\0" \
e83f61a6 JT	245	"jtagboot=echo TFTPing FIT to RAM... && " \
dfa94058	246	"tftpboot ${load_addr} ${fit_image} && " \
c6024c8e SDPP	247	"bootm ${load_addr}\0" \
	248	"usbboot=if usb start; then " \
	249	"echo Copying FIT from USB to RAM... && " \
e9d69c1c	250	"load usb 0 ${load_addr} ${fit_image} && " \
39bc1a8c	251	"bootm ${load_addr}; fi\0" \
61d8eeb0 AG	252	DFU_ALT_INFO \
61d8eeb0 AG	253	BOOTENV
b7b3efe7	254	#endif
c6024c8e	255
36e0e197	256	/* Miscellaneous configurable options */
36e0e197 JT	257
	258	#define CONFIG_CMDLINE_EDITING
	259	#define CONFIG_AUTO_COMPLETE
	260	#define CONFIG_SYS_LONGHELP
6c3e61de	261	#define CONFIG_CLOCKS
841426ad	262	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
f22651cf	263
758f29d0 MS	264	#ifndef CONFIG_NR_DRAM_BANKS
	265	# define CONFIG_NR_DRAM_BANKS 1
	266	#endif
7cd04192	267
c1584e2a MS	268	#define CONFIG_SYS_MEMTEST_START 0
c1584e2a MS	269	#define CONFIG_SYS_MEMTEST_END 0x1000
7cd04192	270
599807fc	271	#define CONFIG_SYS_MALLOC_LEN 0x1400000
c1584e2a MS	272
	273	#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
	274	#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
7cd04192 JT	275	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	276	CONFIG_SYS_INIT_RAM_SIZE - \
	277	GENERATED_GBL_DATA_SIZE)
53e49f74 JT	278
53e49f74 JT	279	/* Enable the PL to be downloaded */
53e49f74	280	#define CONFIG_FPGA_ZYNQPL
53e49f74	281
53e49f74	282	/* FIT support */
21d29f7f	283	#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
f22651cf	284
ae9f4899	285	/* Extend size of kernel image for uncompression */
3d456eec	286	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
ae9f4899	287
09ed635b	288	/* Boot FreeBSD/vxWorks from an ELF image */
d82d63cc	289	#define CONFIG_SYS_MMC_MAX_DEVICE 1
09ed635b	290
0107f240	291	#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
38716189	292
f22651cf	293	/* Commands */
f22651cf	294
d7e269cf	295	/* SPL part */
d7e269cf	296
d7e269cf	297	/* MMC support */
08aa0334	298	#ifdef CONFIG_MMC_SDHCI_ZYNQ
e2ccdf89	299	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
7f307d93	300	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
0dfbcf02 MY	301	#endif
	302
	303	/* Disable dcache for SPL just for sure */
	304	#ifdef CONFIG_SPL_BUILD
	305	#define CONFIG_SYS_DCACHE_OFF
d7e269cf MS	306	#endif
	307
	308	/* Address in RAM where the parameters must be copied by SPL. */
	309	#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
	310
205b4f33 GG	311	#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
205b4f33 GG	312	#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
d7e269cf MS	313
	314	/* Not using MMC raw mode - just for compilation purpose */
	315	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
	316	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
	317	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
	318
	319	/* qspi mode is working fine */
	320	#ifdef CONFIG_ZYNQ_QSPI
d7e269cf	321	#define CONFIG_SPL_SPI_LOAD
d7e269cf	322	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
8e0e01d3 SDPP	323	#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
	324	#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
	325	#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
	326	CONFIG_SYS_SPI_ARGS_SIZE)
d7e269cf MS	327	#endif
	328
	329	/* for booting directly linux */
d7e269cf MS	330
	331	/* SP location before relocation, must use scratch RAM */
	332	#define CONFIG_SPL_TEXT_BASE 0x0
	333
	334	/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
	335	#define CONFIG_SPL_MAX_SIZE 0x30000
	336
d7e269cf	337	/* On the top of OCM space */
52b36fd1 MS	338	#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
52b36fd1 MS	339	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
d7e269cf	340
83b6464d MS	341	/*
	342	* SPL stack position - and stack goes down
	343	* 0xfffffe00 is used for putting wfi loop.
	344	* Set it up as limit for now.
	345	*/
	346	#define CONFIG_SPL_STACK 0xfffffe00
	347
d7e269cf MS	348	/* BSS setup */
	349	#define CONFIG_SPL_BSS_START_ADDR 0x100000
	350	#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
	351
	352	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
f22651cf	353
06fe8dae	354	#endif /* __CONFIG_ZYNQ_COMMON_H */