[people/ms/u-boot.git] / include / configs / zynq-common.h

/*
 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
 * (C) Copyright 2013 Xilinx, Inc.
 *
 * Common configuration options for all Zynq boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ZYNQ_COMMON_H
#define __CONFIG_ZYNQ_COMMON_H

/* CPU clock */
#ifndef CONFIG_CPU_FREQ_HZ
# define CONFIG_CPU_FREQ_HZ	800000000
#endif

/* Cache options */
#define CONFIG_CMD_CACHE
#define CONFIG_SYS_CACHELINE_SIZE	32

#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
# define CONFIG_SYS_L2_PL310
# define CONFIG_SYS_PL310_BASE		0xf8f02000
#endif

#define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
#define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)

/* Serial drivers */
#define CONFIG_BAUDRATE		115200
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE  \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

/* DCC driver */
#if defined(CONFIG_ZYNQ_DCC)
# define CONFIG_ARM_DCC
#else
# define CONFIG_ZYNQ_SERIAL
#endif

#define CONFIG_ZYNQ_GPIO
#define CONFIG_CMD_GPIO

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
# define CONFIG_ZYNQ_GEM
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHYLIB
# define CONFIG_PHY_MARVELL
# define CONFIG_BOOTP_SERVERIP
# define CONFIG_BOOTP_BOOTPATH
# define CONFIG_BOOTP_GATEWAY
# define CONFIG_BOOTP_HOSTNAME
# define CONFIG_BOOTP_MAY_FAIL
# if !defined(CONFIG_ZYNQ_GEM_EMIO0)
#  define CONFIG_ZYNQ_GEM_EMIO0	0
# endif
# if !defined(CONFIG_ZYNQ_GEM_EMIO1)
#  define CONFIG_ZYNQ_GEM_EMIO1	0
# endif
#endif

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_SPI_FLASH_SST
# define CONFIG_CMD_SF
#endif

/* QSPI */
#ifdef CONFIG_ZYNQ_QSPI
# define CONFIG_SF_DEFAULT_SPEED	30000000
# define CONFIG_SPI_FLASH_ISSI
# define CONFIG_SPI_FLASH_SPANSION
# define CONFIG_SPI_FLASH_STMICRO
# define CONFIG_SPI_FLASH_WINBOND
# define CONFIG_SPI_FLASH_BAR
# define CONFIG_CMD_SF
#endif

/* NOR */
#ifndef CONFIG_SYS_NO_FLASH
# define CONFIG_SYS_FLASH_BASE		0xE2000000
# define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
# define CONFIG_SYS_MAX_FLASH_BANKS	1
# define CONFIG_SYS_MAX_FLASH_SECT	512
# define CONFIG_SYS_FLASH_ERASE_TOUT	1000
# define CONFIG_SYS_FLASH_WRITE_TOUT	5000
# define CONFIG_FLASH_SHOW_PROGRESS	10
# define CONFIG_SYS_FLASH_CFI
# undef CONFIG_SYS_FLASH_EMPTY_INFO
# define CONFIG_FLASH_CFI_DRIVER
# undef CONFIG_SYS_FLASH_PROTECTION
# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#endif

/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI
# define CONFIG_ZYNQ_SDHCI
# define CONFIG_CMD_MMC
#endif

#ifdef CONFIG_ZYNQ_USB
# define CONFIG_USB_EHCI
# define CONFIG_CMD_USB
# define CONFIG_USB_STORAGE
# define CONFIG_USB_EHCI_ZYNQ
# define CONFIG_USB_ULPI_VIEWPORT
# define CONFIG_USB_ULPI
# define CONFIG_EHCI_IS_TDI
# define CONFIG_USB_MAX_CONTROLLER_COUNT	2

# define CONFIG_CI_UDC           /* ChipIdea CI13xxx UDC */
# define CONFIG_USB_GADGET
# define CONFIG_USB_GADGET_DUALSPEED
# define CONFIG_USB_GADGET_DOWNLOAD
# define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
# define DFU_DEFAULT_POLL_TIMEOUT	300
# define CONFIG_USB_FUNCTION_DFU
# define CONFIG_DFU_RAM
# define CONFIG_USB_GADGET_VBUS_DRAW	2
# define CONFIG_G_DNL_VENDOR_NUM	0x03FD
# define CONFIG_G_DNL_PRODUCT_NUM	0x0300
# define CONFIG_G_DNL_MANUFACTURER	"Xilinx"
# define CONFIG_USB_GADGET
# define CONFIG_USB_CABLE_CHECK
# define CONFIG_CMD_DFU
# define CONFIG_CMD_THOR_DOWNLOAD
# define CONFIG_USB_FUNCTION_THOR
# define DFU_ALT_INFO_RAM \
	"dfu_ram_info=" \
	"set dfu_alt_info " \
	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	"${ramdisk_image} ram 0x2000000 0x600000\0" \
	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

# if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
#  define CONFIG_DFU_MMC
#  define DFU_ALT_INFO_MMC \
	"dfu_mmc_info=" \
	"set dfu_alt_info " \
	"${kernel_image} fat 0 1\\\\;" \
	"${devicetree_image} fat 0 1\\\\;" \
	"${ramdisk_image} fat 0 1\0" \
	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"

#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_MMC
# else
#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM
# endif
#endif

#if !defined(DFU_ALT_INFO)
# define DFU_ALT_INFO
#endif

#if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
# define CONFIG_SUPPORT_VFAT
# define CONFIG_CMD_FAT
# define CONFIG_CMD_EXT2
# define CONFIG_FAT_WRITE
# define CONFIG_DOS_PARTITION
# define CONFIG_CMD_EXT4
# define CONFIG_CMD_EXT4_WRITE
# define CONFIG_CMD_FS_GENERIC
#endif

#define CONFIG_SYS_I2C_ZYNQ
/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_CMD_I2C
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQ_EEPROM
# define CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
#endif

/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE			(128 << 10)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Environment */
#ifndef CONFIG_ENV_IS_NOWHERE
# ifndef CONFIG_SYS_NO_FLASH
#  define CONFIG_ENV_IS_IN_FLASH
# elif defined(CONFIG_SYS_NO_FLASH)
#  define CONFIG_ENV_IS_NOWHERE
# endif

# define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
# define CONFIG_ENV_OFFSET		0xE0000
#endif

/* Default environment */
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"fit_image=fit.itb\0"		\
	"load_addr=0x2000000\0"		\
	"fit_size=0x800000\0"		\
	"flash_off=0x100000\0"		\
	"nor_flash_off=0xE2100000\0"	\
	"fdt_high=0x20000000\0"		\
	"initrd_high=0x20000000\0"	\
	"norboot=echo Copying FIT from NOR flash to RAM... && " \
		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
		"bootm ${load_addr}\0" \
	"sdboot=echo Copying FIT from SD to RAM... && " \
		"load mmc 0 ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"jtagboot=echo TFTPing FIT to RAM... && " \
		"tftpboot ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"usbboot=if usb start; then " \
			"echo Copying FIT from USB to RAM... && " \
			"load usb 0 ${load_addr} ${fit_image} && " \
			"bootm ${load_addr}\0" \
		"fi\0" \
		DFU_ALT_INFO

#define CONFIG_BOOTCOMMAND		"run $modeboot"
#define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
#define CONFIG_SYS_LOAD_ADDR		0 /* default? */

/* Miscellaneous configurable options */
#define CONFIG_SYS_HUSH_PARSER

#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
#define CONFIG_CMD_CLK
#define CONFIG_SYS_MAXARGS		32 /* max number of command args */
#define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

/* Physical Memory map */
#define CONFIG_SYS_TEXT_BASE		0x4000000

#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)

#define CONFIG_SYS_MALLOC_LEN		0x1400000
#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)

/* Enable the PL to be downloaded */
#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_ZYNQPL
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_FPGA_LOADP
#define CONFIG_CMD_FPGA_LOADBP
#define CONFIG_CMD_FPGA_LOADFS

/* Open Firmware flat tree */
#define CONFIG_OF_LIBFDT

/* FIT support */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */

/* FDT support */
#define CONFIG_DISPLAY_BOARDINFO_LATE

/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

/* Boot FreeBSD/vxWorks from an ELF image */
#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
# define CONFIG_API
# define CONFIG_SYS_MMC_MAX_DEVICE	1
#endif

#define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"

/* Commands */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_TFTPPUT

/* SPL part */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT

#define CONFIG_SPL_LDSCRIPT	"arch/arm/mach-zynq/u-boot-spl.lds"

/* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI0
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
#endif

/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
#undef CONFIG_FPGA
#endif

/* Address in RAM where the parameters must be copied by SPL. */
#define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000

#define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"

/* Not using MMC raw mode - just for compilation purpose */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0

/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
#define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
					CONFIG_SYS_SPI_ARGS_SIZE)
#endif

/* for booting directly linux */
#define CONFIG_SPL_OS_BOOT

/* SP location before relocation, must use scratch RAM */
#define CONFIG_SPL_TEXT_BASE	0x0

/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
#define CONFIG_SPL_MAX_SIZE	0x30000

/* The highest 64k OCM address */
#define OCM_HIGH_ADDR	0xffff0000

/* Just define any reasonable size */
#define CONFIG_SPL_STACK_SIZE	0x1000

/* SPL stack position - and stack goes down */
#define CONFIG_SPL_STACK	(OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)

/* On the top of OCM space */
#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_STACK + \
					 GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x1000

/* BSS setup */
#define CONFIG_SPL_BSS_START_ADDR	0x100000
#define CONFIG_SPL_BSS_MAX_SIZE		0x100000

#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE


#endif /* __CONFIG_ZYNQ_COMMON_H */
Commit	Line	Data
f22651cf MS	1	/*
f22651cf MS	2	* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
06fe8dae JT	3	* (C) Copyright 2013 Xilinx, Inc.
	4	*
	5	* Common configuration options for all Zynq boards.
f22651cf	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
f22651cf MS	8	*/
f22651cf MS	9
06fe8dae JT	10	#ifndef __CONFIG_ZYNQ_COMMON_H
06fe8dae JT	11	#define __CONFIG_ZYNQ_COMMON_H
f22651cf	12
f22651cf	13	/* CPU clock */
53e49f74 JT	14	#ifndef CONFIG_CPU_FREQ_HZ
	15	# define CONFIG_CPU_FREQ_HZ 800000000
	16	#endif
f22651cf	17
8cfac504 JT	18	/* Cache options */
	19	#define CONFIG_CMD_CACHE
	20	#define CONFIG_SYS_CACHELINE_SIZE 32
	21
	22	#define CONFIG_SYS_L2CACHE_OFF
	23	#ifndef CONFIG_SYS_L2CACHE_OFF
	24	# define CONFIG_SYS_L2_PL310
	25	# define CONFIG_SYS_PL310_BASE 0xf8f02000
	26	#endif
	27
a2ec7fb9 MS	28	#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
	29	#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
	30	#define CONFIG_SYS_TIMER_COUNTS_DOWN
	31	#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
	32
53e49f74 JT	33	/* Serial drivers */
53e49f74 JT	34	#define CONFIG_BAUDRATE 115200
f22651cf MS	35	/* The following table includes the supported baudrates */
	36	#define CONFIG_SYS_BAUDRATE_TABLE \
	37	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
	38
53e49f74 JT	39	/* DCC driver */
	40	#if defined(CONFIG_ZYNQ_DCC)
	41	# define CONFIG_ARM_DCC
bf834950 MS	42	#else
bf834950 MS	43	# define CONFIG_ZYNQ_SERIAL
53e49f74 JT	44	#endif
53e49f74 JT	45
caacb33f MS	46	#define CONFIG_ZYNQ_GPIO
	47	#define CONFIG_CMD_GPIO
	48
f22651cf	49	/* Ethernet driver */
88fcfb1c	50	#if defined(CONFIG_ZYNQ_GEM0) \|\| defined(CONFIG_ZYNQ_GEM1)
88fcfb1c JT	51	# define CONFIG_ZYNQ_GEM
	52	# define CONFIG_MII
	53	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
	54	# define CONFIG_PHYLIB
	55	# define CONFIG_PHY_MARVELL
dd1c351f MS	56	# define CONFIG_BOOTP_SERVERIP
	57	# define CONFIG_BOOTP_BOOTPATH
	58	# define CONFIG_BOOTP_GATEWAY
	59	# define CONFIG_BOOTP_HOSTNAME
	60	# define CONFIG_BOOTP_MAY_FAIL
f20b37f3 SDPP	61	# if !defined(CONFIG_ZYNQ_GEM_EMIO0)
	62	# define CONFIG_ZYNQ_GEM_EMIO0 0
	63	# endif
	64	# if !defined(CONFIG_ZYNQ_GEM_EMIO1)
	65	# define CONFIG_ZYNQ_GEM_EMIO1 0
	66	# endif
88fcfb1c	67	#endif
f22651cf	68
53e49f74 JT	69	/* SPI */
53e49f74 JT	70	#ifdef CONFIG_ZYNQ_SPI
53e49f74 JT	71	# define CONFIG_SPI_FLASH_SST
	72	# define CONFIG_CMD_SF
	73	#endif
	74
a241d4ec JT	75	/* QSPI */
	76	#ifdef CONFIG_ZYNQ_QSPI
	77	# define CONFIG_SF_DEFAULT_SPEED 30000000
232a8e4e	78	# define CONFIG_SPI_FLASH_ISSI
a241d4ec JT	79	# define CONFIG_SPI_FLASH_SPANSION
	80	# define CONFIG_SPI_FLASH_STMICRO
	81	# define CONFIG_SPI_FLASH_WINBOND
9a762091	82	# define CONFIG_SPI_FLASH_BAR
a241d4ec JT	83	# define CONFIG_CMD_SF
	84	#endif
	85
fe5eddbf JT	86	/* NOR */
	87	#ifndef CONFIG_SYS_NO_FLASH
	88	# define CONFIG_SYS_FLASH_BASE 0xE2000000
	89	# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
	90	# define CONFIG_SYS_MAX_FLASH_BANKS 1
	91	# define CONFIG_SYS_MAX_FLASH_SECT 512
	92	# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	93	# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
	94	# define CONFIG_FLASH_SHOW_PROGRESS 10
	95	# define CONFIG_SYS_FLASH_CFI
	96	# undef CONFIG_SYS_FLASH_EMPTY_INFO
	97	# define CONFIG_FLASH_CFI_DRIVER
	98	# undef CONFIG_SYS_FLASH_PROTECTION
	99	# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	100	#endif
	101
293eb33f MS	102	/* MMC */
	103	#if defined(CONFIG_ZYNQ_SDHCI0) \|\| defined(CONFIG_ZYNQ_SDHCI1)
	104	# define CONFIG_MMC
	105	# define CONFIG_GENERIC_MMC
	106	# define CONFIG_SDHCI
	107	# define CONFIG_ZYNQ_SDHCI
	108	# define CONFIG_CMD_MMC
293eb33f MS	109	#endif
293eb33f MS	110
c6024c8e SDPP	111	#ifdef CONFIG_ZYNQ_USB
	112	# define CONFIG_USB_EHCI
	113	# define CONFIG_CMD_USB
	114	# define CONFIG_USB_STORAGE
c6024c8e SDPP	115	# define CONFIG_USB_EHCI_ZYNQ
	116	# define CONFIG_USB_ULPI_VIEWPORT
	117	# define CONFIG_USB_ULPI
	118	# define CONFIG_EHCI_IS_TDI
	119	# define CONFIG_USB_MAX_CONTROLLER_COUNT 2
87f3dbdf SDPP	120
	121	# define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */
	122	# define CONFIG_USB_GADGET
	123	# define CONFIG_USB_GADGET_DUALSPEED
01acd6ab	124	# define CONFIG_USB_GADGET_DOWNLOAD
87f3dbdf SDPP	125	# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
87f3dbdf SDPP	126	# define DFU_DEFAULT_POLL_TIMEOUT 300
01acd6ab	127	# define CONFIG_USB_FUNCTION_DFU
87f3dbdf SDPP	128	# define CONFIG_DFU_RAM
	129	# define CONFIG_USB_GADGET_VBUS_DRAW 2
	130	# define CONFIG_G_DNL_VENDOR_NUM 0x03FD
	131	# define CONFIG_G_DNL_PRODUCT_NUM 0x0300
	132	# define CONFIG_G_DNL_MANUFACTURER "Xilinx"
	133	# define CONFIG_USB_GADGET
	134	# define CONFIG_USB_CABLE_CHECK
	135	# define CONFIG_CMD_DFU
c4fa5114	136	# define CONFIG_CMD_THOR_DOWNLOAD
01acd6ab	137	# define CONFIG_USB_FUNCTION_THOR
87f3dbdf SDPP	138	# define DFU_ALT_INFO_RAM \
	139	"dfu_ram_info=" \
	140	"set dfu_alt_info " \
	141	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	142	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	143	"${ramdisk_image} ram 0x2000000 0x600000\0" \
c4fa5114 SDPP	144	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
c4fa5114 SDPP	145	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
87f3dbdf SDPP	146
	147	# if defined(CONFIG_ZYNQ_SDHCI0) \|\| defined(CONFIG_ZYNQ_SDHCI1)
	148	# define CONFIG_DFU_MMC
	149	# define DFU_ALT_INFO_MMC \
	150	"dfu_mmc_info=" \
	151	"set dfu_alt_info " \
	152	"${kernel_image} fat 0 1\\\\;" \
	153	"${devicetree_image} fat 0 1\\\\;" \
	154	"${ramdisk_image} fat 0 1\0" \
c4fa5114 SDPP	155	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	156	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
	157
87f3dbdf SDPP	158	# define DFU_ALT_INFO \
	159	DFU_ALT_INFO_RAM \
	160	DFU_ALT_INFO_MMC
	161	# else
	162	# define DFU_ALT_INFO \
	163	DFU_ALT_INFO_RAM
	164	# endif
	165	#endif
	166
	167	#if !defined(DFU_ALT_INFO)
	168	# define DFU_ALT_INFO
c6024c8e SDPP	169	#endif
c6024c8e SDPP	170
47b35a51	171	#if defined(CONFIG_ZYNQ_SDHCI) \|\| defined(CONFIG_ZYNQ_USB)
293eb33f	172	# define CONFIG_SUPPORT_VFAT
47b35a51	173	# define CONFIG_CMD_FAT
293eb33f	174	# define CONFIG_CMD_EXT2
47b35a51	175	# define CONFIG_FAT_WRITE
293eb33f	176	# define CONFIG_DOS_PARTITION
2e38a906 SDPP	177	# define CONFIG_CMD_EXT4
2e38a906 SDPP	178	# define CONFIG_CMD_EXT4_WRITE
e9d69c1c	179	# define CONFIG_CMD_FS_GENERIC
293eb33f MS	180	#endif
293eb33f MS	181
18948632	182	#define CONFIG_SYS_I2C_ZYNQ
8934f784	183	/* I2C */
18948632	184	#if defined(CONFIG_SYS_I2C_ZYNQ)
8934f784	185	# define CONFIG_CMD_I2C
0bdffe71	186	# define CONFIG_SYS_I2C
0bdffe71	187	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
18948632	188	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
8934f784 MS	189	#endif
8934f784 MS	190
65da1efd JT	191	/* EEPROM */
	192	#ifdef CONFIG_ZYNQ_EEPROM
	193	# define CONFIG_CMD_EEPROM
	194	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	195	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	196	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	197	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	198	# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
	199	#endif
	200
18eee22f JT	201	/* Total Size of Environment Sector */
	202	#define CONFIG_ENV_SIZE (128 << 10)
	203
b660ca13 JT	204	/* Allow to overwrite serial and ethaddr */
	205	#define CONFIG_ENV_OVERWRITE
	206
f22651cf	207	/* Environment */
ed53e4d6 JT	208	#ifndef CONFIG_ENV_IS_NOWHERE
	209	# ifndef CONFIG_SYS_NO_FLASH
	210	# define CONFIG_ENV_IS_IN_FLASH
	211	# elif defined(CONFIG_SYS_NO_FLASH)
	212	# define CONFIG_ENV_IS_NOWHERE
	213	# endif
	214
	215	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
	216	# define CONFIG_ENV_OFFSET 0xE0000
ed53e4d6	217	#endif
e83f61a6 JT	218
	219	/* Default environment */
	220	#define CONFIG_EXTRA_ENV_SETTINGS \
	221	"fit_image=fit.itb\0" \
	222	"load_addr=0x2000000\0" \
	223	"fit_size=0x800000\0" \
	224	"flash_off=0x100000\0" \
	225	"nor_flash_off=0xE2100000\0" \
	226	"fdt_high=0x20000000\0" \
	227	"initrd_high=0x20000000\0" \
	228	"norboot=echo Copying FIT from NOR flash to RAM... && " \
	229	"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
	230	"bootm ${load_addr}\0" \
	231	"sdboot=echo Copying FIT from SD to RAM... && " \
e9d69c1c	232	"load mmc 0 ${load_addr} ${fit_image} && " \
e83f61a6 JT	233	"bootm ${load_addr}\0" \
e83f61a6 JT	234	"jtagboot=echo TFTPing FIT to RAM... && " \
dfa94058	235	"tftpboot ${load_addr} ${fit_image} && " \
c6024c8e SDPP	236	"bootm ${load_addr}\0" \
	237	"usbboot=if usb start; then " \
	238	"echo Copying FIT from USB to RAM... && " \
e9d69c1c	239	"load usb 0 ${load_addr} ${fit_image} && " \
c6024c8e	240	"bootm ${load_addr}\0" \
87f3dbdf SDPP	241	"fi\0" \
87f3dbdf SDPP	242	DFU_ALT_INFO
c6024c8e	243
e83f61a6 JT	244	#define CONFIG_BOOTCOMMAND "run $modeboot"
	245	#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
	246	#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
f22651cf	247
36e0e197	248	/* Miscellaneous configurable options */
36e0e197 JT	249	#define CONFIG_SYS_HUSH_PARSER
	250
	251	#define CONFIG_CMDLINE_EDITING
	252	#define CONFIG_AUTO_COMPLETE
b3de9249	253	#define CONFIG_BOARD_LATE_INIT
5a82d53c	254	#define CONFIG_DISPLAY_BOARDINFO
36e0e197	255	#define CONFIG_SYS_LONGHELP
6c3e61de	256	#define CONFIG_CLOCKS
d6c9bbaa	257	#define CONFIG_CMD_CLK
841426ad	258	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
36e0e197 JT	259	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
36e0e197 JT	260	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
f22651cf MS	261	sizeof(CONFIG_SYS_PROMPT) + 16)
f22651cf MS	262
7cd04192	263	/* Physical Memory map */
0f5c2156	264	#define CONFIG_SYS_TEXT_BASE 0x4000000
f22651cf	265
7cd04192 JT	266	#define CONFIG_NR_DRAM_BANKS 1
7cd04192 JT	267	#define CONFIG_SYS_SDRAM_BASE 0
7cd04192 JT	268
	269	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	270	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
	271
599807fc	272	#define CONFIG_SYS_MALLOC_LEN 0x1400000
7cd04192 JT	273	#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
	274	#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
	275	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	276	CONFIG_SYS_INIT_RAM_SIZE - \
	277	GENERATED_GBL_DATA_SIZE)
53e49f74 JT	278
	279	/* Enable the PL to be downloaded */
	280	#define CONFIG_FPGA
	281	#define CONFIG_FPGA_XILINX
	282	#define CONFIG_FPGA_ZYNQPL
64e809af	283	#define CONFIG_CMD_FPGA_LOADMK
26ea9ce5 MS	284	#define CONFIG_CMD_FPGA_LOADP
26ea9ce5 MS	285	#define CONFIG_CMD_FPGA_LOADBP
1a897668	286	#define CONFIG_CMD_FPGA_LOADFS
53e49f74 JT	287
	288	/* Open Firmware flat tree */
	289	#define CONFIG_OF_LIBFDT
	290
	291	/* FIT support */
21d29f7f	292	#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
f22651cf	293
f8f36c5d	294	/* FDT support */
f8f36c5d JT	295	#define CONFIG_DISPLAY_BOARDINFO_LATE
f8f36c5d JT	296
ae9f4899	297	/* Extend size of kernel image for uncompression */
3d456eec	298	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
ae9f4899	299
09ed635b JT	300	/* Boot FreeBSD/vxWorks from an ELF image */
	301	#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
	302	# define CONFIG_API
09ed635b JT	303	# define CONFIG_SYS_MMC_MAX_DEVICE 1
	304	#endif
	305
0107f240	306	#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
38716189	307
f22651cf	308	/* Commands */
f22651cf MS	309	#define CONFIG_CMD_PING
	310	#define CONFIG_CMD_DHCP
	311	#define CONFIG_CMD_MII
427b2d4e	312	#define CONFIG_CMD_TFTPPUT
f22651cf	313
d7e269cf	314	/* SPL part */
d7e269cf MS	315	#define CONFIG_CMD_SPL
	316	#define CONFIG_SPL_FRAMEWORK
	317	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	318	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	319	#define CONFIG_SPL_SERIAL_SUPPORT
1540fb72	320	#define CONFIG_SPL_BOARD_INIT
d7e269cf	321
0107f240	322	#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
d7e269cf	323
d7e269cf MS	324	/* MMC support */
	325	#ifdef CONFIG_ZYNQ_SDHCI0
	326	#define CONFIG_SPL_MMC_SUPPORT
	327	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	328	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
e2ccdf89	329	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
d7e269cf MS	330	#define CONFIG_SPL_LIBDISK_SUPPORT
d7e269cf MS	331	#define CONFIG_SPL_FAT_SUPPORT
98b532b4	332	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
0dfbcf02 MY	333	#endif
	334
	335	/* Disable dcache for SPL just for sure */
	336	#ifdef CONFIG_SPL_BUILD
	337	#define CONFIG_SYS_DCACHE_OFF
	338	#undef CONFIG_FPGA
d7e269cf MS	339	#endif
	340
	341	/* Address in RAM where the parameters must be copied by SPL. */
	342	#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
	343
205b4f33 GG	344	#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
205b4f33 GG	345	#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
d7e269cf MS	346
	347	/* Not using MMC raw mode - just for compilation purpose */
	348	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
	349	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
	350	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
	351
	352	/* qspi mode is working fine */
	353	#ifdef CONFIG_ZYNQ_QSPI
	354	#define CONFIG_SPL_SPI_SUPPORT
	355	#define CONFIG_SPL_SPI_LOAD
	356	#define CONFIG_SPL_SPI_FLASH_SUPPORT
d7e269cf	357	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
8e0e01d3 SDPP	358	#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
	359	#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
	360	#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
	361	CONFIG_SYS_SPI_ARGS_SIZE)
d7e269cf MS	362	#endif
	363
	364	/* for booting directly linux */
	365	#define CONFIG_SPL_OS_BOOT
	366
	367	/* SP location before relocation, must use scratch RAM */
	368	#define CONFIG_SPL_TEXT_BASE 0x0
	369
	370	/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
	371	#define CONFIG_SPL_MAX_SIZE 0x30000
	372
	373	/* The highest 64k OCM address */
	374	#define OCM_HIGH_ADDR 0xffff0000
	375
	376	/* Just define any reasonable size */
	377	#define CONFIG_SPL_STACK_SIZE 0x1000
	378
	379	/* SPL stack position - and stack goes down */
	380	#define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
	381
	382	/* On the top of OCM space */
	383	#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
	384	GENERATED_GBL_DATA_SIZE)
	385	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
	386
	387	/* BSS setup */
	388	#define CONFIG_SPL_BSS_START_ADDR 0x100000
	389	#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
	390
	391	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
f22651cf	392
2b257216	393
06fe8dae	394	#endif /* __CONFIG_ZYNQ_COMMON_H */