]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
arm: ls1043ardb: Add NAND secure boot target
authorRuchika Gupta <ruchika.gupta@nxp.com>
Mon, 17 Apr 2017 12:37:18 +0000 (18:07 +0530)
committerYork Sun <york.sun@nxp.com>
Mon, 17 Apr 2017 16:03:30 +0000 (09:03 -0700)
Add NAND secure boot target for ls1043ardb.

- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size as
  header is appended to u-boot image. So header will also be copied
  from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
  from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
  also defined.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/include/asm/fsl_secure_boot.h
board/freescale/ls1043ardb/MAINTAINERS
configs/ls1043ardb_nand_SECURE_BOOT_defconfig [new file with mode: 0644]
include/config_fsl_chain_trust.h
include/configs/ls1043a_common.h
include/configs/ls1043ardb.h

index 1ca5f42ed61749861aeadae3af0424f5f01c5a8d..1fd09f205ae4dfb37bfca3b0eb6b8c231af4b053 100644 (file)
@@ -70,7 +70,7 @@
 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
  * Non-XIP Memory (Nand/SD)*/
 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
-       defined(CONFIG_SD_BOOT)
+       defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
 #define CONFIG_BOOTSCRIPT_COPY_RAM
 #endif
 /* The address needs to be modified according to NOR, NAND, SD and
 #define CONFIG_BS_ADDR_DEVICE          0x00000940
 #define CONFIG_BS_HDR_SIZE             0x00000010
 #define CONFIG_BS_SIZE                 0x00000008
+#elif defined(CONFIG_NAND_BOOT)
+#define CONFIG_BS_HDR_ADDR_DEVICE      0x00800000
+#define CONFIG_BS_ADDR_DEVICE          0x00802000
+#define CONFIG_BS_HDR_SIZE             0x00002000
+#define CONFIG_BS_SIZE                 0x00001000
 #elif defined(CONFIG_QSPI_BOOT)
 #ifdef CONFIG_ARCH_LS1046A
 #define CONFIG_BS_HDR_ADDR_DEVICE      0x40780000
index 8b69892bbbc05c34f8bc33b75a1014afd878f708..87aa006455c3e2bb01038431cf58de13c723cff0 100644 (file)
@@ -13,3 +13,4 @@ M:    Ruchika Gupta <ruchika.gupta@nxp.com>
 S:     Maintained
 F:     configs/ls1043ardb_SECURE_BOOT_defconfig
 F:     configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+F:     configs/ls1043ardb_nand_SECURE_BOOT_defconfig
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
new file mode 100644 (file)
index 0000000..66c89fa
--- /dev/null
@@ -0,0 +1,57 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_NAND_BOOT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
index eb45e9851f0d767dd2e5b8e3e11626ba4e665254..40d323e0044c4c8fd4cc21bbcac85e1fdcfa175f 100644 (file)
        "setenv bs_size " __stringify(CONFIG_BS_SIZE)";"
 
 /* For secure boot flow, default environment used will be used */
-#if defined(CONFIG_SYS_RAMBOOT)
-#if defined(CONFIG_RAMBOOT_NAND)
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_NAND_BOOT) || \
+       defined(CONFIG_SD_BOOT)
+#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_NAND_BOOT)
 #define CONFIG_BS_COPY_CMD \
        "nand read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \
        "nand read $bs_ram $bs_device $bs_size ;"
-#endif /* CONFIG_RAMBOOT_NAND */
 #elif defined(CONFIG_SD_BOOT)
 #define CONFIG_BS_COPY_CMD \
        "mmc read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \
        "mmc read $bs_ram $bs_device $bs_size ;"
-#else /* CONFIG_SD_BOOT */
+#endif
+#else
 #define CONFIG_BS_COPY_CMD \
        "cp.b $bs_hdr_device $bs_hdr_ram  $bs_hdr_size ;" \
        "cp.b $bs_device $bs_ram  $bs_size ;"
index c63c5e3403ad1787e80a1e3ce312f65d4e02c91a..7b1d9bbbed548080f40ed9c992c1f04b90378371 100644 (file)
 #define CONFIG_SPL_BSS_START_ADDR      0x80100000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
-#define CONFIG_SYS_MONITOR_LEN         0xa0000
+
+#ifdef CONFIG_SECURE_BOOT
+#define CONFIG_U_BOOT_HDR_SIZE                         (16 << 10)
+#endif /* ifdef CONFIG_SECURE_BOOT */
+
+#ifdef CONFIG_U_BOOT_HDR_SIZE
+/*
+ * HDR would be appended at end of image and copied to DDR along
+ * with U-Boot image. Here u-boot max. size is 512K. So if binary
+ * size increases then increase this size in case of secure boot as
+ * it uses raw u-boot image instead of fit image.
+ */
+#define CONFIG_SYS_MONITOR_LEN         (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
+#else
+#define CONFIG_SYS_MONITOR_LEN         0x100000
+#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
+
 #endif
 
 /* IFC */
index ea929d1da014a048a5645ac2d435b5b532e7edde..5e570cd5e8d70ef23133d9efee09c7d808661b53 100644 (file)
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SPL_PAD_TO              0x20000         /* block aligned */
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    CONFIG_SPL_PAD_TO
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    (640 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE    (1024 << 10)
 #endif
 
 /*