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Commit | Line | Data |
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a7aad9aa | 1 | /* Target-dependent code for the HP PA-RISC architecture. |
cda5a58a | 2 | |
1d506c26 | 3 | Copyright (C) 1986-2024 Free Software Foundation, Inc. |
c906108c SS |
4 | |
5 | Contributed by the Center for Software Science at the | |
6 | University of Utah (pa-gdb-bugs@cs.utah.edu). | |
7 | ||
c5aa993b | 8 | This file is part of GDB. |
c906108c | 9 | |
c5aa993b JM |
10 | This program is free software; you can redistribute it and/or modify |
11 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 12 | the Free Software Foundation; either version 3 of the License, or |
c5aa993b | 13 | (at your option) any later version. |
c906108c | 14 | |
c5aa993b JM |
15 | This program is distributed in the hope that it will be useful, |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
c906108c | 19 | |
c5aa993b | 20 | You should have received a copy of the GNU General Public License |
a9762ec7 | 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c906108c | 22 | |
c906108c | 23 | #include "bfd.h" |
ec452525 | 24 | #include "extract-store-integer.h" |
c906108c | 25 | #include "inferior.h" |
4e052eda | 26 | #include "regcache.h" |
e5d66720 | 27 | #include "completer.h" |
59623e27 | 28 | #include "osabi.h" |
343af405 | 29 | #include "arch-utils.h" |
1777feb0 | 30 | /* For argument passing to the inferior. */ |
c906108c | 31 | #include "symtab.h" |
fde2cceb | 32 | #include "dis-asm.h" |
26d08f08 AC |
33 | #include "trad-frame.h" |
34 | #include "frame-unwind.h" | |
35 | #include "frame-base.h" | |
c906108c | 36 | |
c906108c | 37 | #include "gdbcore.h" |
5b9707eb | 38 | #include "cli/cli-cmds.h" |
e6bb342a | 39 | #include "gdbtypes.h" |
c906108c | 40 | #include "objfiles.h" |
3ff7cf9e | 41 | #include "hppa-tdep.h" |
325fac50 | 42 | #include <algorithm> |
c906108c | 43 | |
491144b5 | 44 | static bool hppa_debug = false; |
369aa520 | 45 | |
60383d10 | 46 | /* Some local constants. */ |
3ff7cf9e JB |
47 | static const int hppa32_num_regs = 128; |
48 | static const int hppa64_num_regs = 96; | |
49 | ||
61a12cfa JK |
50 | /* We use the objfile->obj_private pointer for two things: |
51 | * 1. An unwind table; | |
52 | * | |
53 | * 2. A pointer to any associated shared library object. | |
54 | * | |
55 | * #defines are used to help refer to these objects. | |
56 | */ | |
57 | ||
58 | /* Info about the unwind table associated with an object file. | |
59 | * This is hung off of the "objfile->obj_private" pointer, and | |
60 | * is allocated in the objfile's psymbol obstack. This allows | |
61 | * us to have unique unwind info for each executable and shared | |
62 | * library that we are debugging. | |
63 | */ | |
64 | struct hppa_unwind_info | |
65 | { | |
66 | struct unwind_table_entry *table; /* Pointer to unwind info */ | |
67 | struct unwind_table_entry *cache; /* Pointer to last entry we found */ | |
68 | int last; /* Index of last entry */ | |
69 | }; | |
70 | ||
71 | struct hppa_objfile_private | |
72 | { | |
abed5aa8 | 73 | struct hppa_unwind_info *unwind_info = nullptr; /* a pointer */ |
7b323785 | 74 | solib *so_info = nullptr; /* a pointer */ |
abed5aa8 | 75 | CORE_ADDR dp = 0; |
61a12cfa | 76 | |
abed5aa8 TT |
77 | int dummy_call_sequence_reg = 0; |
78 | CORE_ADDR dummy_call_sequence_addr = 0; | |
61a12cfa JK |
79 | }; |
80 | ||
7c46b9fb RC |
81 | /* hppa-specific object data -- unwind and solib info. |
82 | TODO/maybe: think about splitting this into two parts; the unwind data is | |
83 | common to all hppa targets, but is only used in this file; we can register | |
84 | that separately and make this static. The solib data is probably hpux- | |
85 | specific, so we can create a separate extern objfile_data that is registered | |
86 | by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */ | |
08b8a139 TT |
87 | static const registry<objfile>::key<hppa_objfile_private> |
88 | hppa_objfile_priv_data; | |
7c46b9fb | 89 | |
405feb71 | 90 | /* Get at various relevant fields of an instruction word. */ |
e2ac8128 JB |
91 | #define MASK_5 0x1f |
92 | #define MASK_11 0x7ff | |
93 | #define MASK_14 0x3fff | |
94 | #define MASK_21 0x1fffff | |
95 | ||
e2ac8128 JB |
96 | /* Sizes (in bytes) of the native unwind entries. */ |
97 | #define UNWIND_ENTRY_SIZE 16 | |
98 | #define STUB_UNWIND_ENTRY_SIZE 8 | |
99 | ||
c906108c | 100 | /* Routines to extract various sized constants out of hppa |
1777feb0 | 101 | instructions. */ |
c906108c SS |
102 | |
103 | /* This assumes that no garbage lies outside of the lower bits of | |
1777feb0 | 104 | value. */ |
c906108c | 105 | |
63807e1d | 106 | static int |
abc485a1 | 107 | hppa_sign_extend (unsigned val, unsigned bits) |
c906108c | 108 | { |
66c6502d | 109 | return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val); |
c906108c SS |
110 | } |
111 | ||
1777feb0 | 112 | /* For many immediate values the sign bit is the low bit! */ |
c906108c | 113 | |
63807e1d | 114 | static int |
abc485a1 | 115 | hppa_low_hppa_sign_extend (unsigned val, unsigned bits) |
c906108c | 116 | { |
66c6502d | 117 | return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1); |
c906108c SS |
118 | } |
119 | ||
e2ac8128 | 120 | /* Extract the bits at positions between FROM and TO, using HP's numbering |
1777feb0 | 121 | (MSB = 0). */ |
e2ac8128 | 122 | |
abc485a1 RC |
123 | int |
124 | hppa_get_field (unsigned word, int from, int to) | |
e2ac8128 JB |
125 | { |
126 | return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1)); | |
127 | } | |
128 | ||
1777feb0 | 129 | /* Extract the immediate field from a ld{bhw}s instruction. */ |
c906108c | 130 | |
abc485a1 RC |
131 | int |
132 | hppa_extract_5_load (unsigned word) | |
c906108c | 133 | { |
abc485a1 | 134 | return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5); |
c906108c SS |
135 | } |
136 | ||
1777feb0 | 137 | /* Extract the immediate field from a break instruction. */ |
c906108c | 138 | |
abc485a1 RC |
139 | unsigned |
140 | hppa_extract_5r_store (unsigned word) | |
c906108c SS |
141 | { |
142 | return (word & MASK_5); | |
143 | } | |
144 | ||
1777feb0 | 145 | /* Extract the immediate field from a {sr}sm instruction. */ |
c906108c | 146 | |
abc485a1 RC |
147 | unsigned |
148 | hppa_extract_5R_store (unsigned word) | |
c906108c SS |
149 | { |
150 | return (word >> 16 & MASK_5); | |
151 | } | |
152 | ||
1777feb0 | 153 | /* Extract a 14 bit immediate field. */ |
c906108c | 154 | |
abc485a1 RC |
155 | int |
156 | hppa_extract_14 (unsigned word) | |
c906108c | 157 | { |
abc485a1 | 158 | return hppa_low_hppa_sign_extend (word & MASK_14, 14); |
c906108c SS |
159 | } |
160 | ||
1777feb0 | 161 | /* Extract a 21 bit constant. */ |
c906108c | 162 | |
abc485a1 RC |
163 | int |
164 | hppa_extract_21 (unsigned word) | |
c906108c SS |
165 | { |
166 | int val; | |
167 | ||
168 | word &= MASK_21; | |
169 | word <<= 11; | |
abc485a1 | 170 | val = hppa_get_field (word, 20, 20); |
c906108c | 171 | val <<= 11; |
abc485a1 | 172 | val |= hppa_get_field (word, 9, 19); |
c906108c | 173 | val <<= 2; |
abc485a1 | 174 | val |= hppa_get_field (word, 5, 6); |
c906108c | 175 | val <<= 5; |
abc485a1 | 176 | val |= hppa_get_field (word, 0, 4); |
c906108c | 177 | val <<= 2; |
abc485a1 RC |
178 | val |= hppa_get_field (word, 7, 8); |
179 | return hppa_sign_extend (val, 21) << 11; | |
c906108c SS |
180 | } |
181 | ||
c906108c | 182 | /* extract a 17 bit constant from branch instructions, returning the |
1777feb0 | 183 | 19 bit signed value. */ |
c906108c | 184 | |
abc485a1 RC |
185 | int |
186 | hppa_extract_17 (unsigned word) | |
c906108c | 187 | { |
abc485a1 RC |
188 | return hppa_sign_extend (hppa_get_field (word, 19, 28) | |
189 | hppa_get_field (word, 29, 29) << 10 | | |
190 | hppa_get_field (word, 11, 15) << 11 | | |
c906108c SS |
191 | (word & 0x1) << 16, 17) << 2; |
192 | } | |
3388d7ff RC |
193 | |
194 | CORE_ADDR | |
195 | hppa_symbol_address(const char *sym) | |
196 | { | |
3b7344d5 | 197 | struct bound_minimal_symbol minsym; |
3388d7ff RC |
198 | |
199 | minsym = lookup_minimal_symbol (sym, NULL, NULL); | |
3b7344d5 | 200 | if (minsym.minsym) |
4aeddc50 | 201 | return minsym.value_address (); |
3388d7ff RC |
202 | else |
203 | return (CORE_ADDR)-1; | |
204 | } | |
77d18ded | 205 | |
c906108c SS |
206 | \f |
207 | ||
208 | /* Compare the start address for two unwind entries returning 1 if | |
209 | the first address is larger than the second, -1 if the second is | |
210 | larger than the first, and zero if they are equal. */ | |
211 | ||
212 | static int | |
fba45db2 | 213 | compare_unwind_entries (const void *arg1, const void *arg2) |
c906108c | 214 | { |
9a3c8263 SM |
215 | const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1; |
216 | const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2; | |
c906108c SS |
217 | |
218 | if (a->region_start > b->region_start) | |
219 | return 1; | |
220 | else if (a->region_start < b->region_start) | |
221 | return -1; | |
222 | else | |
223 | return 0; | |
224 | } | |
225 | ||
53a5351d | 226 | static void |
fdd72f95 | 227 | record_text_segment_lowaddr (bfd *abfd, asection *section, void *data) |
53a5351d | 228 | { |
fdd72f95 | 229 | if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY)) |
53a5351d | 230 | == (SEC_ALLOC | SEC_LOAD | SEC_READONLY)) |
fdd72f95 RC |
231 | { |
232 | bfd_vma value = section->vma - section->filepos; | |
233 | CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data; | |
234 | ||
235 | if (value < *low_text_segment_address) | |
dda83cd7 | 236 | *low_text_segment_address = value; |
fdd72f95 | 237 | } |
53a5351d JM |
238 | } |
239 | ||
c906108c | 240 | static void |
fba45db2 | 241 | internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table, |
1777feb0 | 242 | asection *section, unsigned int entries, |
241fd515 | 243 | size_t size, CORE_ADDR text_offset) |
c906108c SS |
244 | { |
245 | /* We will read the unwind entries into temporary memory, then | |
246 | fill in the actual unwind table. */ | |
fdd72f95 | 247 | |
c906108c SS |
248 | if (size > 0) |
249 | { | |
08feed99 | 250 | struct gdbarch *gdbarch = objfile->arch (); |
08106042 | 251 | hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch); |
c906108c SS |
252 | unsigned long tmp; |
253 | unsigned i; | |
224c3ddb | 254 | char *buf = (char *) alloca (size); |
fdd72f95 | 255 | CORE_ADDR low_text_segment_address; |
c906108c | 256 | |
fdd72f95 | 257 | /* For ELF targets, then unwinds are supposed to |
1777feb0 | 258 | be segment relative offsets instead of absolute addresses. |
c2c6d25f JM |
259 | |
260 | Note that when loading a shared library (text_offset != 0) the | |
261 | unwinds are already relative to the text_offset that will be | |
262 | passed in. */ | |
345bd07c | 263 | if (tdep->is_elf && text_offset == 0) |
53a5351d | 264 | { |
dda83cd7 | 265 | low_text_segment_address = -1; |
fdd72f95 | 266 | |
98badbfd | 267 | bfd_map_over_sections (objfile->obfd.get (), |
fdd72f95 RC |
268 | record_text_segment_lowaddr, |
269 | &low_text_segment_address); | |
53a5351d | 270 | |
fdd72f95 | 271 | text_offset = low_text_segment_address; |
53a5351d | 272 | } |
345bd07c | 273 | else if (tdep->solib_get_text_base) |
dda83cd7 | 274 | { |
345bd07c | 275 | text_offset = tdep->solib_get_text_base (objfile); |
acf86d54 | 276 | } |
53a5351d | 277 | |
98badbfd | 278 | bfd_get_section_contents (objfile->obfd.get (), section, buf, 0, size); |
c906108c SS |
279 | |
280 | /* Now internalize the information being careful to handle host/target | |
dda83cd7 | 281 | endian issues. */ |
c906108c SS |
282 | for (i = 0; i < entries; i++) |
283 | { | |
284 | table[i].region_start = bfd_get_32 (objfile->obfd, | |
c5aa993b | 285 | (bfd_byte *) buf); |
c906108c SS |
286 | table[i].region_start += text_offset; |
287 | buf += 4; | |
c5aa993b | 288 | table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf); |
c906108c SS |
289 | table[i].region_end += text_offset; |
290 | buf += 4; | |
c5aa993b | 291 | tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf); |
c906108c SS |
292 | buf += 4; |
293 | table[i].Cannot_unwind = (tmp >> 31) & 0x1; | |
294 | table[i].Millicode = (tmp >> 30) & 0x1; | |
295 | table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1; | |
296 | table[i].Region_description = (tmp >> 27) & 0x3; | |
6fcecea0 | 297 | table[i].reserved = (tmp >> 26) & 0x1; |
c906108c SS |
298 | table[i].Entry_SR = (tmp >> 25) & 0x1; |
299 | table[i].Entry_FR = (tmp >> 21) & 0xf; | |
300 | table[i].Entry_GR = (tmp >> 16) & 0x1f; | |
301 | table[i].Args_stored = (tmp >> 15) & 0x1; | |
302 | table[i].Variable_Frame = (tmp >> 14) & 0x1; | |
303 | table[i].Separate_Package_Body = (tmp >> 13) & 0x1; | |
304 | table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1; | |
305 | table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1; | |
306 | table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1; | |
6fcecea0 | 307 | table[i].sr4export = (tmp >> 9) & 0x1; |
c906108c SS |
308 | table[i].cxx_info = (tmp >> 8) & 0x1; |
309 | table[i].cxx_try_catch = (tmp >> 7) & 0x1; | |
310 | table[i].sched_entry_seq = (tmp >> 6) & 0x1; | |
6fcecea0 | 311 | table[i].reserved1 = (tmp >> 5) & 0x1; |
c906108c SS |
312 | table[i].Save_SP = (tmp >> 4) & 0x1; |
313 | table[i].Save_RP = (tmp >> 3) & 0x1; | |
314 | table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1; | |
6fcecea0 | 315 | table[i].save_r19 = (tmp >> 1) & 0x1; |
c906108c | 316 | table[i].Cleanup_defined = tmp & 0x1; |
c5aa993b | 317 | tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf); |
c906108c SS |
318 | buf += 4; |
319 | table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1; | |
320 | table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1; | |
321 | table[i].Large_frame = (tmp >> 29) & 0x1; | |
6fcecea0 RC |
322 | table[i].alloca_frame = (tmp >> 28) & 0x1; |
323 | table[i].reserved2 = (tmp >> 27) & 0x1; | |
c906108c SS |
324 | table[i].Total_frame_size = tmp & 0x7ffffff; |
325 | ||
1777feb0 | 326 | /* Stub unwinds are handled elsewhere. */ |
c906108c SS |
327 | table[i].stub_unwind.stub_type = 0; |
328 | table[i].stub_unwind.padding = 0; | |
329 | } | |
330 | } | |
331 | } | |
332 | ||
333 | /* Read in the backtrace information stored in the `$UNWIND_START$' section of | |
334 | the object file. This info is used mainly by find_unwind_entry() to find | |
335 | out the stack frame size and frame pointer used by procedures. We put | |
336 | everything on the psymbol obstack in the objfile so that it automatically | |
337 | gets freed when the objfile is destroyed. */ | |
338 | ||
339 | static void | |
fba45db2 | 340 | read_unwind_info (struct objfile *objfile) |
c906108c | 341 | { |
d4f3574e | 342 | asection *unwind_sec, *stub_unwind_sec; |
241fd515 | 343 | size_t unwind_size, stub_unwind_size, total_size; |
d4f3574e | 344 | unsigned index, unwind_entries; |
c906108c SS |
345 | unsigned stub_entries, total_entries; |
346 | CORE_ADDR text_offset; | |
7c46b9fb RC |
347 | struct hppa_unwind_info *ui; |
348 | struct hppa_objfile_private *obj_private; | |
c906108c | 349 | |
b3b3bada | 350 | text_offset = objfile->text_section_offset (); |
7c46b9fb RC |
351 | ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack, |
352 | sizeof (struct hppa_unwind_info)); | |
c906108c SS |
353 | |
354 | ui->table = NULL; | |
355 | ui->cache = NULL; | |
356 | ui->last = -1; | |
357 | ||
d4f3574e SS |
358 | /* For reasons unknown the HP PA64 tools generate multiple unwinder |
359 | sections in a single executable. So we just iterate over every | |
85102364 | 360 | section in the BFD looking for unwinder sections instead of trying |
1777feb0 | 361 | to do a lookup with bfd_get_section_by_name. |
c906108c | 362 | |
d4f3574e SS |
363 | First determine the total size of the unwind tables so that we |
364 | can allocate memory in a nice big hunk. */ | |
365 | total_entries = 0; | |
366 | for (unwind_sec = objfile->obfd->sections; | |
367 | unwind_sec; | |
368 | unwind_sec = unwind_sec->next) | |
c906108c | 369 | { |
d4f3574e SS |
370 | if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0 |
371 | || strcmp (unwind_sec->name, ".PARISC.unwind") == 0) | |
372 | { | |
fd361982 | 373 | unwind_size = bfd_section_size (unwind_sec); |
d4f3574e | 374 | unwind_entries = unwind_size / UNWIND_ENTRY_SIZE; |
c906108c | 375 | |
d4f3574e SS |
376 | total_entries += unwind_entries; |
377 | } | |
c906108c SS |
378 | } |
379 | ||
d4f3574e | 380 | /* Now compute the size of the stub unwinds. Note the ELF tools do not |
043f5962 | 381 | use stub unwinds at the current time. */ |
98badbfd TT |
382 | stub_unwind_sec = bfd_get_section_by_name (objfile->obfd.get (), |
383 | "$UNWIND_END$"); | |
d4f3574e | 384 | |
c906108c SS |
385 | if (stub_unwind_sec) |
386 | { | |
fd361982 | 387 | stub_unwind_size = bfd_section_size (stub_unwind_sec); |
c906108c SS |
388 | stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE; |
389 | } | |
390 | else | |
391 | { | |
392 | stub_unwind_size = 0; | |
393 | stub_entries = 0; | |
394 | } | |
395 | ||
396 | /* Compute total number of unwind entries and their total size. */ | |
d4f3574e | 397 | total_entries += stub_entries; |
c906108c SS |
398 | total_size = total_entries * sizeof (struct unwind_table_entry); |
399 | ||
400 | /* Allocate memory for the unwind table. */ | |
401 | ui->table = (struct unwind_table_entry *) | |
8b92e4d5 | 402 | obstack_alloc (&objfile->objfile_obstack, total_size); |
c5aa993b | 403 | ui->last = total_entries - 1; |
c906108c | 404 | |
d4f3574e SS |
405 | /* Now read in each unwind section and internalize the standard unwind |
406 | entries. */ | |
c906108c | 407 | index = 0; |
d4f3574e SS |
408 | for (unwind_sec = objfile->obfd->sections; |
409 | unwind_sec; | |
410 | unwind_sec = unwind_sec->next) | |
411 | { | |
412 | if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0 | |
413 | || strcmp (unwind_sec->name, ".PARISC.unwind") == 0) | |
414 | { | |
fd361982 | 415 | unwind_size = bfd_section_size (unwind_sec); |
d4f3574e SS |
416 | unwind_entries = unwind_size / UNWIND_ENTRY_SIZE; |
417 | ||
418 | internalize_unwinds (objfile, &ui->table[index], unwind_sec, | |
419 | unwind_entries, unwind_size, text_offset); | |
420 | index += unwind_entries; | |
421 | } | |
422 | } | |
423 | ||
424 | /* Now read in and internalize the stub unwind entries. */ | |
c906108c SS |
425 | if (stub_unwind_size > 0) |
426 | { | |
427 | unsigned int i; | |
224c3ddb | 428 | char *buf = (char *) alloca (stub_unwind_size); |
c906108c SS |
429 | |
430 | /* Read in the stub unwind entries. */ | |
98badbfd | 431 | bfd_get_section_contents (objfile->obfd.get (), stub_unwind_sec, buf, |
c906108c SS |
432 | 0, stub_unwind_size); |
433 | ||
434 | /* Now convert them into regular unwind entries. */ | |
435 | for (i = 0; i < stub_entries; i++, index++) | |
436 | { | |
437 | /* Clear out the next unwind entry. */ | |
438 | memset (&ui->table[index], 0, sizeof (struct unwind_table_entry)); | |
439 | ||
1777feb0 | 440 | /* Convert offset & size into region_start and region_end. |
c906108c SS |
441 | Stuff away the stub type into "reserved" fields. */ |
442 | ui->table[index].region_start = bfd_get_32 (objfile->obfd, | |
443 | (bfd_byte *) buf); | |
444 | ui->table[index].region_start += text_offset; | |
445 | buf += 4; | |
446 | ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd, | |
c5aa993b | 447 | (bfd_byte *) buf); |
c906108c SS |
448 | buf += 2; |
449 | ui->table[index].region_end | |
c5aa993b JM |
450 | = ui->table[index].region_start + 4 * |
451 | (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1); | |
c906108c SS |
452 | buf += 2; |
453 | } | |
454 | ||
455 | } | |
456 | ||
457 | /* Unwind table needs to be kept sorted. */ | |
458 | qsort (ui->table, total_entries, sizeof (struct unwind_table_entry), | |
459 | compare_unwind_entries); | |
460 | ||
461 | /* Keep a pointer to the unwind information. */ | |
9a73f0ad | 462 | obj_private = hppa_objfile_priv_data.get (objfile); |
7c46b9fb | 463 | if (obj_private == NULL) |
abed5aa8 | 464 | obj_private = hppa_objfile_priv_data.emplace (objfile); |
77d18ded | 465 | |
c906108c SS |
466 | obj_private->unwind_info = ui; |
467 | } | |
468 | ||
469 | /* Lookup the unwind (stack backtrace) info for the given PC. We search all | |
470 | of the objfiles seeking the unwind table entry for this PC. Each objfile | |
471 | contains a sorted list of struct unwind_table_entry. Since we do a binary | |
472 | search of the unwind tables, we depend upon them to be sorted. */ | |
473 | ||
474 | struct unwind_table_entry * | |
fba45db2 | 475 | find_unwind_entry (CORE_ADDR pc) |
c906108c SS |
476 | { |
477 | int first, middle, last; | |
c906108c | 478 | |
369aa520 | 479 | if (hppa_debug) |
6cb06a8c TT |
480 | gdb_printf (gdb_stdlog, "{ find_unwind_entry %s -> ", |
481 | hex_string (pc)); | |
369aa520 | 482 | |
1777feb0 | 483 | /* A function at address 0? Not in HP-UX! */ |
c906108c | 484 | if (pc == (CORE_ADDR) 0) |
369aa520 RC |
485 | { |
486 | if (hppa_debug) | |
6cb06a8c | 487 | gdb_printf (gdb_stdlog, "NULL }\n"); |
369aa520 RC |
488 | return NULL; |
489 | } | |
c906108c | 490 | |
2030c079 | 491 | for (objfile *objfile : current_program_space->objfiles ()) |
aed57c53 TT |
492 | { |
493 | struct hppa_unwind_info *ui; | |
494 | ui = NULL; | |
abed5aa8 | 495 | struct hppa_objfile_private *priv = hppa_objfile_priv_data.get (objfile); |
aed57c53 | 496 | if (priv) |
abed5aa8 | 497 | ui = priv->unwind_info; |
aed57c53 TT |
498 | |
499 | if (!ui) | |
500 | { | |
501 | read_unwind_info (objfile); | |
9a73f0ad | 502 | priv = hppa_objfile_priv_data.get (objfile); |
aed57c53 TT |
503 | if (priv == NULL) |
504 | error (_("Internal error reading unwind information.")); | |
abed5aa8 | 505 | ui = priv->unwind_info; |
aed57c53 TT |
506 | } |
507 | ||
508 | /* First, check the cache. */ | |
509 | ||
510 | if (ui->cache | |
511 | && pc >= ui->cache->region_start | |
512 | && pc <= ui->cache->region_end) | |
513 | { | |
514 | if (hppa_debug) | |
6cb06a8c TT |
515 | gdb_printf (gdb_stdlog, "%s (cached) }\n", |
516 | hex_string ((uintptr_t) ui->cache)); | |
aed57c53 TT |
517 | return ui->cache; |
518 | } | |
519 | ||
520 | /* Not in the cache, do a binary search. */ | |
521 | ||
522 | first = 0; | |
523 | last = ui->last; | |
524 | ||
525 | while (first <= last) | |
526 | { | |
527 | middle = (first + last) / 2; | |
528 | if (pc >= ui->table[middle].region_start | |
529 | && pc <= ui->table[middle].region_end) | |
530 | { | |
531 | ui->cache = &ui->table[middle]; | |
532 | if (hppa_debug) | |
6cb06a8c TT |
533 | gdb_printf (gdb_stdlog, "%s }\n", |
534 | hex_string ((uintptr_t) ui->cache)); | |
aed57c53 TT |
535 | return &ui->table[middle]; |
536 | } | |
537 | ||
538 | if (pc < ui->table[middle].region_start) | |
539 | last = middle - 1; | |
540 | else | |
541 | first = middle + 1; | |
542 | } | |
543 | } | |
369aa520 RC |
544 | |
545 | if (hppa_debug) | |
6cb06a8c | 546 | gdb_printf (gdb_stdlog, "NULL (not found) }\n"); |
369aa520 | 547 | |
c906108c SS |
548 | return NULL; |
549 | } | |
550 | ||
c9cf6e20 MG |
551 | /* Implement the stack_frame_destroyed_p gdbarch method. |
552 | ||
553 | The epilogue is defined here as the area either on the `bv' instruction | |
1777feb0 | 554 | itself or an instruction which destroys the function's stack frame. |
1fb24930 RC |
555 | |
556 | We do not assume that the epilogue is at the end of a function as we can | |
557 | also have return sequences in the middle of a function. */ | |
c9cf6e20 | 558 | |
1fb24930 | 559 | static int |
c9cf6e20 | 560 | hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc) |
1fb24930 | 561 | { |
e17a4113 | 562 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
1fb24930 RC |
563 | unsigned long status; |
564 | unsigned int inst; | |
e362b510 | 565 | gdb_byte buf[4]; |
1fb24930 | 566 | |
8defab1a | 567 | status = target_read_memory (pc, buf, 4); |
1fb24930 RC |
568 | if (status != 0) |
569 | return 0; | |
570 | ||
e17a4113 | 571 | inst = extract_unsigned_integer (buf, 4, byte_order); |
1fb24930 RC |
572 | |
573 | /* The most common way to perform a stack adjustment ldo X(sp),sp | |
574 | We are destroying a stack frame if the offset is negative. */ | |
575 | if ((inst & 0xffffc000) == 0x37de0000 | |
576 | && hppa_extract_14 (inst) < 0) | |
577 | return 1; | |
578 | ||
579 | /* ldw,mb D(sp),X or ldd,mb D(sp),X */ | |
580 | if (((inst & 0x0fc010e0) == 0x0fc010e0 | |
581 | || (inst & 0x0fc010e0) == 0x0fc010e0) | |
582 | && hppa_extract_14 (inst) < 0) | |
583 | return 1; | |
584 | ||
585 | /* bv %r0(%rp) or bv,n %r0(%rp) */ | |
586 | if (inst == 0xe840c000 || inst == 0xe840c002) | |
587 | return 1; | |
588 | ||
589 | return 0; | |
590 | } | |
591 | ||
04180708 | 592 | constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04}; |
598cc9dc | 593 | |
04180708 | 594 | typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint; |
aaab4dba | 595 | |
e23457df AC |
596 | /* Return the name of a register. */ |
597 | ||
4a302917 | 598 | static const char * |
d93859e2 | 599 | hppa32_register_name (struct gdbarch *gdbarch, int i) |
e23457df | 600 | { |
a121b7c1 | 601 | static const char *names[] = { |
e23457df AC |
602 | "flags", "r1", "rp", "r3", |
603 | "r4", "r5", "r6", "r7", | |
604 | "r8", "r9", "r10", "r11", | |
605 | "r12", "r13", "r14", "r15", | |
606 | "r16", "r17", "r18", "r19", | |
607 | "r20", "r21", "r22", "r23", | |
608 | "r24", "r25", "r26", "dp", | |
609 | "ret0", "ret1", "sp", "r31", | |
610 | "sar", "pcoqh", "pcsqh", "pcoqt", | |
611 | "pcsqt", "eiem", "iir", "isr", | |
612 | "ior", "ipsw", "goto", "sr4", | |
613 | "sr0", "sr1", "sr2", "sr3", | |
614 | "sr5", "sr6", "sr7", "cr0", | |
615 | "cr8", "cr9", "ccr", "cr12", | |
616 | "cr13", "cr24", "cr25", "cr26", | |
617 | "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad", | |
618 | "fpsr", "fpe1", "fpe2", "fpe3", | |
619 | "fpe4", "fpe5", "fpe6", "fpe7", | |
620 | "fr4", "fr4R", "fr5", "fr5R", | |
621 | "fr6", "fr6R", "fr7", "fr7R", | |
622 | "fr8", "fr8R", "fr9", "fr9R", | |
623 | "fr10", "fr10R", "fr11", "fr11R", | |
624 | "fr12", "fr12R", "fr13", "fr13R", | |
625 | "fr14", "fr14R", "fr15", "fr15R", | |
626 | "fr16", "fr16R", "fr17", "fr17R", | |
627 | "fr18", "fr18R", "fr19", "fr19R", | |
628 | "fr20", "fr20R", "fr21", "fr21R", | |
629 | "fr22", "fr22R", "fr23", "fr23R", | |
630 | "fr24", "fr24R", "fr25", "fr25R", | |
631 | "fr26", "fr26R", "fr27", "fr27R", | |
632 | "fr28", "fr28R", "fr29", "fr29R", | |
633 | "fr30", "fr30R", "fr31", "fr31R" | |
634 | }; | |
69f6730d | 635 | static_assert (ARRAY_SIZE (names) == hppa32_num_regs); |
9b9e61c7 | 636 | return names[i]; |
e23457df AC |
637 | } |
638 | ||
4a302917 | 639 | static const char * |
d93859e2 | 640 | hppa64_register_name (struct gdbarch *gdbarch, int i) |
e23457df | 641 | { |
a121b7c1 | 642 | static const char *names[] = { |
e23457df AC |
643 | "flags", "r1", "rp", "r3", |
644 | "r4", "r5", "r6", "r7", | |
645 | "r8", "r9", "r10", "r11", | |
646 | "r12", "r13", "r14", "r15", | |
647 | "r16", "r17", "r18", "r19", | |
648 | "r20", "r21", "r22", "r23", | |
649 | "r24", "r25", "r26", "dp", | |
650 | "ret0", "ret1", "sp", "r31", | |
651 | "sar", "pcoqh", "pcsqh", "pcoqt", | |
652 | "pcsqt", "eiem", "iir", "isr", | |
653 | "ior", "ipsw", "goto", "sr4", | |
654 | "sr0", "sr1", "sr2", "sr3", | |
655 | "sr5", "sr6", "sr7", "cr0", | |
656 | "cr8", "cr9", "ccr", "cr12", | |
657 | "cr13", "cr24", "cr25", "cr26", | |
658 | "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad", | |
659 | "fpsr", "fpe1", "fpe2", "fpe3", | |
660 | "fr4", "fr5", "fr6", "fr7", | |
661 | "fr8", "fr9", "fr10", "fr11", | |
662 | "fr12", "fr13", "fr14", "fr15", | |
663 | "fr16", "fr17", "fr18", "fr19", | |
664 | "fr20", "fr21", "fr22", "fr23", | |
665 | "fr24", "fr25", "fr26", "fr27", | |
666 | "fr28", "fr29", "fr30", "fr31" | |
667 | }; | |
69f6730d | 668 | static_assert (ARRAY_SIZE (names) == hppa64_num_regs); |
9b9e61c7 | 669 | return names[i]; |
e23457df AC |
670 | } |
671 | ||
85c83e99 | 672 | /* Map dwarf DBX register numbers to GDB register numbers. */ |
1ef7fcb5 | 673 | static int |
d3f73121 | 674 | hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
1ef7fcb5 | 675 | { |
85c83e99 | 676 | /* The general registers and the sar are the same in both sets. */ |
0fde2c53 | 677 | if (reg >= 0 && reg <= 32) |
1ef7fcb5 RC |
678 | return reg; |
679 | ||
680 | /* fr4-fr31 are mapped from 72 in steps of 2. */ | |
85c83e99 | 681 | if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1)) |
1ef7fcb5 RC |
682 | return HPPA64_FP4_REGNUM + (reg - 72) / 2; |
683 | ||
1ef7fcb5 RC |
684 | return -1; |
685 | } | |
686 | ||
79508e1e AC |
687 | /* This function pushes a stack frame with arguments as part of the |
688 | inferior function calling mechanism. | |
689 | ||
690 | This is the version of the function for the 32-bit PA machines, in | |
691 | which later arguments appear at lower addresses. (The stack always | |
692 | grows towards higher addresses.) | |
693 | ||
694 | We simply allocate the appropriate amount of stack space and put | |
695 | arguments into their proper slots. */ | |
696 | ||
4a302917 | 697 | static CORE_ADDR |
7d9b040b | 698 | hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
79508e1e AC |
699 | struct regcache *regcache, CORE_ADDR bp_addr, |
700 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
701 | function_call_return_method return_method, |
702 | CORE_ADDR struct_addr) | |
79508e1e | 703 | { |
e17a4113 UW |
704 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
705 | ||
79508e1e AC |
706 | /* Stack base address at which any pass-by-reference parameters are |
707 | stored. */ | |
708 | CORE_ADDR struct_end = 0; | |
709 | /* Stack base address at which the first parameter is stored. */ | |
710 | CORE_ADDR param_end = 0; | |
711 | ||
79508e1e AC |
712 | /* Two passes. First pass computes the location of everything, |
713 | second pass writes the bytes out. */ | |
714 | int write_pass; | |
d49771ef RC |
715 | |
716 | /* Global pointer (r19) of the function we are trying to call. */ | |
717 | CORE_ADDR gp; | |
718 | ||
08106042 | 719 | hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch); |
d49771ef | 720 | |
79508e1e AC |
721 | for (write_pass = 0; write_pass < 2; write_pass++) |
722 | { | |
1797a8f6 | 723 | CORE_ADDR struct_ptr = 0; |
1777feb0 | 724 | /* The first parameter goes into sp-36, each stack slot is 4-bytes. |
dda83cd7 | 725 | struct_ptr is adjusted for each argument below, so the first |
2a6228ef RC |
726 | argument will end up at sp-36. */ |
727 | CORE_ADDR param_ptr = 32; | |
79508e1e | 728 | int i; |
2a6228ef RC |
729 | int small_struct = 0; |
730 | ||
79508e1e AC |
731 | for (i = 0; i < nargs; i++) |
732 | { | |
733 | struct value *arg = args[i]; | |
d0c97917 | 734 | struct type *type = check_typedef (arg->type ()); |
79508e1e AC |
735 | /* The corresponding parameter that is pushed onto the |
736 | stack, and [possibly] passed in a register. */ | |
948f8e3d | 737 | gdb_byte param_val[8]; |
79508e1e AC |
738 | int param_len; |
739 | memset (param_val, 0, sizeof param_val); | |
df86565b | 740 | if (type->length () > 8) |
79508e1e AC |
741 | { |
742 | /* Large parameter, pass by reference. Store the value | |
743 | in "struct" area and then pass its address. */ | |
744 | param_len = 4; | |
df86565b | 745 | struct_ptr += align_up (type->length (), 8); |
79508e1e | 746 | if (write_pass) |
50888e42 | 747 | write_memory (struct_end - struct_ptr, |
efaf1ae0 | 748 | arg->contents ().data (), type->length ()); |
e17a4113 UW |
749 | store_unsigned_integer (param_val, 4, byte_order, |
750 | struct_end - struct_ptr); | |
79508e1e | 751 | } |
78134374 SM |
752 | else if (type->code () == TYPE_CODE_INT |
753 | || type->code () == TYPE_CODE_ENUM) | |
79508e1e AC |
754 | { |
755 | /* Integer value store, right aligned. "unpack_long" | |
756 | takes care of any sign-extension problems. */ | |
df86565b | 757 | param_len = align_up (type->length (), 4); |
50888e42 SM |
758 | store_unsigned_integer |
759 | (param_val, param_len, byte_order, | |
efaf1ae0 | 760 | unpack_long (type, arg->contents ().data ())); |
79508e1e | 761 | } |
78134374 | 762 | else if (type->code () == TYPE_CODE_FLT) |
dda83cd7 | 763 | { |
2a6228ef | 764 | /* Floating point value store, right aligned. */ |
df86565b | 765 | param_len = align_up (type->length (), 4); |
efaf1ae0 | 766 | memcpy (param_val, arg->contents ().data (), param_len); |
dda83cd7 | 767 | } |
79508e1e AC |
768 | else |
769 | { | |
df86565b | 770 | param_len = align_up (type->length (), 4); |
2a6228ef RC |
771 | |
772 | /* Small struct value are stored right-aligned. */ | |
df86565b | 773 | memcpy (param_val + param_len - type->length (), |
efaf1ae0 | 774 | arg->contents ().data (), type->length ()); |
2a6228ef RC |
775 | |
776 | /* Structures of size 5, 6 and 7 bytes are special in that | |
dda83cd7 | 777 | the higher-ordered word is stored in the lower-ordered |
2a6228ef RC |
778 | argument, and even though it is a 8-byte quantity the |
779 | registers need not be 8-byte aligned. */ | |
1b07b470 | 780 | if (param_len > 4 && param_len < 8) |
2a6228ef | 781 | small_struct = 1; |
79508e1e | 782 | } |
2a6228ef | 783 | |
1797a8f6 | 784 | param_ptr += param_len; |
2a6228ef | 785 | if (param_len == 8 && !small_struct) |
dda83cd7 | 786 | param_ptr = align_up (param_ptr, 8); |
2a6228ef RC |
787 | |
788 | /* First 4 non-FP arguments are passed in gr26-gr23. | |
789 | First 4 32-bit FP arguments are passed in fr4L-fr7L. | |
790 | First 2 64-bit FP arguments are passed in fr5 and fr7. | |
791 | ||
792 | The rest go on the stack, starting at sp-36, towards lower | |
793 | addresses. 8-byte arguments must be aligned to a 8-byte | |
794 | stack boundary. */ | |
79508e1e AC |
795 | if (write_pass) |
796 | { | |
1797a8f6 | 797 | write_memory (param_end - param_ptr, param_val, param_len); |
2a6228ef RC |
798 | |
799 | /* There are some cases when we don't know the type | |
800 | expected by the callee (e.g. for variadic functions), so | |
801 | pass the parameters in both general and fp regs. */ | |
802 | if (param_ptr <= 48) | |
79508e1e | 803 | { |
2a6228ef RC |
804 | int grreg = 26 - (param_ptr - 36) / 4; |
805 | int fpLreg = 72 + (param_ptr - 36) / 4 * 2; | |
806 | int fpreg = 74 + (param_ptr - 32) / 8 * 4; | |
807 | ||
b66f5587 SM |
808 | regcache->cooked_write (grreg, param_val); |
809 | regcache->cooked_write (fpLreg, param_val); | |
2a6228ef | 810 | |
79508e1e | 811 | if (param_len > 4) |
2a6228ef | 812 | { |
b66f5587 | 813 | regcache->cooked_write (grreg + 1, param_val + 4); |
2a6228ef | 814 | |
b66f5587 SM |
815 | regcache->cooked_write (fpreg, param_val); |
816 | regcache->cooked_write (fpreg + 1, param_val + 4); | |
2a6228ef | 817 | } |
79508e1e AC |
818 | } |
819 | } | |
820 | } | |
821 | ||
822 | /* Update the various stack pointers. */ | |
823 | if (!write_pass) | |
824 | { | |
2a6228ef | 825 | struct_end = sp + align_up (struct_ptr, 64); |
79508e1e AC |
826 | /* PARAM_PTR already accounts for all the arguments passed |
827 | by the user. However, the ABI mandates minimum stack | |
828 | space allocations for outgoing arguments. The ABI also | |
829 | mandates minimum stack alignments which we must | |
830 | preserve. */ | |
2a6228ef | 831 | param_end = struct_end + align_up (param_ptr, 64); |
79508e1e AC |
832 | } |
833 | } | |
834 | ||
835 | /* If a structure has to be returned, set up register 28 to hold its | |
1777feb0 | 836 | address. */ |
cf84fa6b | 837 | if (return_method == return_method_struct) |
9c9acae0 | 838 | regcache_cooked_write_unsigned (regcache, 28, struct_addr); |
79508e1e | 839 | |
e38c262f | 840 | gp = tdep->find_global_pointer (gdbarch, function); |
d49771ef RC |
841 | |
842 | if (gp != 0) | |
9c9acae0 | 843 | regcache_cooked_write_unsigned (regcache, 19, gp); |
d49771ef | 844 | |
79508e1e | 845 | /* Set the return address. */ |
77d18ded RC |
846 | if (!gdbarch_push_dummy_code_p (gdbarch)) |
847 | regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr); | |
79508e1e | 848 | |
c4557624 | 849 | /* Update the Stack Pointer. */ |
34f75cc1 | 850 | regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end); |
c4557624 | 851 | |
2a6228ef | 852 | return param_end; |
79508e1e AC |
853 | } |
854 | ||
38ca4e0c MK |
855 | /* The 64-bit PA-RISC calling conventions are documented in "64-Bit |
856 | Runtime Architecture for PA-RISC 2.0", which is distributed as part | |
857 | as of the HP-UX Software Transition Kit (STK). This implementation | |
858 | is based on version 3.3, dated October 6, 1997. */ | |
2f690297 | 859 | |
38ca4e0c | 860 | /* Check whether TYPE is an "Integral or Pointer Scalar Type". */ |
2f690297 | 861 | |
38ca4e0c MK |
862 | static int |
863 | hppa64_integral_or_pointer_p (const struct type *type) | |
864 | { | |
78134374 | 865 | switch (type->code ()) |
38ca4e0c MK |
866 | { |
867 | case TYPE_CODE_INT: | |
868 | case TYPE_CODE_BOOL: | |
869 | case TYPE_CODE_CHAR: | |
870 | case TYPE_CODE_ENUM: | |
871 | case TYPE_CODE_RANGE: | |
872 | { | |
df86565b | 873 | int len = type->length (); |
38ca4e0c MK |
874 | return (len == 1 || len == 2 || len == 4 || len == 8); |
875 | } | |
876 | case TYPE_CODE_PTR: | |
877 | case TYPE_CODE_REF: | |
aa006118 | 878 | case TYPE_CODE_RVALUE_REF: |
df86565b | 879 | return (type->length () == 8); |
38ca4e0c MK |
880 | default: |
881 | break; | |
882 | } | |
883 | ||
884 | return 0; | |
885 | } | |
886 | ||
887 | /* Check whether TYPE is a "Floating Scalar Type". */ | |
888 | ||
889 | static int | |
890 | hppa64_floating_p (const struct type *type) | |
891 | { | |
78134374 | 892 | switch (type->code ()) |
38ca4e0c MK |
893 | { |
894 | case TYPE_CODE_FLT: | |
895 | { | |
df86565b | 896 | int len = type->length (); |
38ca4e0c MK |
897 | return (len == 4 || len == 8 || len == 16); |
898 | } | |
899 | default: | |
900 | break; | |
901 | } | |
902 | ||
903 | return 0; | |
904 | } | |
2f690297 | 905 | |
1218e655 RC |
906 | /* If CODE points to a function entry address, try to look up the corresponding |
907 | function descriptor and return its address instead. If CODE is not a | |
908 | function entry address, then just return it unchanged. */ | |
909 | static CORE_ADDR | |
e17a4113 | 910 | hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code) |
1218e655 | 911 | { |
e17a4113 | 912 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
5250cbc8 | 913 | struct obj_section *sec; |
1218e655 RC |
914 | |
915 | sec = find_pc_section (code); | |
916 | ||
917 | if (!sec) | |
918 | return code; | |
919 | ||
920 | /* If CODE is in a data section, assume it's already a fptr. */ | |
921 | if (!(sec->the_bfd_section->flags & SEC_CODE)) | |
922 | return code; | |
923 | ||
5250cbc8 | 924 | for (obj_section *opd : sec->objfile->sections ()) |
1218e655 RC |
925 | { |
926 | if (strcmp (opd->the_bfd_section->name, ".opd") == 0) | |
aded6f54 | 927 | { |
5250cbc8 TT |
928 | for (CORE_ADDR addr = opd->addr (); |
929 | addr < opd->endaddr (); | |
930 | addr += 2 * 8) | |
931 | { | |
932 | ULONGEST opdaddr; | |
933 | gdb_byte tmp[8]; | |
1218e655 | 934 | |
5250cbc8 TT |
935 | if (target_read_memory (addr, tmp, sizeof (tmp))) |
936 | break; | |
937 | opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order); | |
1218e655 | 938 | |
5250cbc8 TT |
939 | if (opdaddr == code) |
940 | return addr - 16; | |
941 | } | |
1218e655 RC |
942 | } |
943 | } | |
944 | ||
945 | return code; | |
946 | } | |
947 | ||
4a302917 | 948 | static CORE_ADDR |
7d9b040b | 949 | hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
2f690297 AC |
950 | struct regcache *regcache, CORE_ADDR bp_addr, |
951 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
952 | function_call_return_method return_method, |
953 | CORE_ADDR struct_addr) | |
2f690297 | 954 | { |
08106042 | 955 | hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch); |
e17a4113 | 956 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
38ca4e0c MK |
957 | int i, offset = 0; |
958 | CORE_ADDR gp; | |
2f690297 | 959 | |
38ca4e0c MK |
960 | /* "The outgoing parameter area [...] must be aligned at a 16-byte |
961 | boundary." */ | |
962 | sp = align_up (sp, 16); | |
2f690297 | 963 | |
38ca4e0c MK |
964 | for (i = 0; i < nargs; i++) |
965 | { | |
966 | struct value *arg = args[i]; | |
d0c97917 | 967 | struct type *type = arg->type (); |
df86565b | 968 | int len = type->length (); |
0fd88904 | 969 | const bfd_byte *valbuf; |
1218e655 | 970 | bfd_byte fptrbuf[8]; |
38ca4e0c | 971 | int regnum; |
2f690297 | 972 | |
38ca4e0c MK |
973 | /* "Each parameter begins on a 64-bit (8-byte) boundary." */ |
974 | offset = align_up (offset, 8); | |
77d18ded | 975 | |
38ca4e0c | 976 | if (hppa64_integral_or_pointer_p (type)) |
2f690297 | 977 | { |
38ca4e0c | 978 | /* "Integral scalar parameters smaller than 64 bits are |
dda83cd7 SM |
979 | padded on the left (i.e., the value is in the |
980 | least-significant bits of the 64-bit storage unit, and | |
981 | the high-order bits are undefined)." Therefore we can | |
982 | safely sign-extend them. */ | |
38ca4e0c | 983 | if (len < 8) |
449e1137 | 984 | { |
df4df182 | 985 | arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg); |
38ca4e0c MK |
986 | len = 8; |
987 | } | |
988 | } | |
989 | else if (hppa64_floating_p (type)) | |
990 | { | |
991 | if (len > 8) | |
992 | { | |
993 | /* "Quad-precision (128-bit) floating-point scalar | |
994 | parameters are aligned on a 16-byte boundary." */ | |
995 | offset = align_up (offset, 16); | |
996 | ||
997 | /* "Double-extended- and quad-precision floating-point | |
dda83cd7 SM |
998 | parameters within the first 64 bytes of the parameter |
999 | list are always passed in general registers." */ | |
449e1137 AC |
1000 | } |
1001 | else | |
1002 | { | |
38ca4e0c | 1003 | if (len == 4) |
449e1137 | 1004 | { |
38ca4e0c MK |
1005 | /* "Single-precision (32-bit) floating-point scalar |
1006 | parameters are padded on the left with 32 bits of | |
1007 | garbage (i.e., the floating-point value is in the | |
1008 | least-significant 32 bits of a 64-bit storage | |
1009 | unit)." */ | |
1010 | offset += 4; | |
449e1137 | 1011 | } |
38ca4e0c MK |
1012 | |
1013 | /* "Single- and double-precision floating-point | |
dda83cd7 SM |
1014 | parameters in this area are passed according to the |
1015 | available formal parameter information in a function | |
1016 | prototype. [...] If no prototype is in scope, | |
1017 | floating-point parameters must be passed both in the | |
1018 | corresponding general registers and in the | |
1019 | corresponding floating-point registers." */ | |
38ca4e0c MK |
1020 | regnum = HPPA64_FP4_REGNUM + offset / 8; |
1021 | ||
1022 | if (regnum < HPPA64_FP4_REGNUM + 8) | |
449e1137 | 1023 | { |
38ca4e0c MK |
1024 | /* "Single-precision floating-point parameters, when |
1025 | passed in floating-point registers, are passed in | |
1026 | the right halves of the floating point registers; | |
1027 | the left halves are unused." */ | |
e4c4a59b | 1028 | regcache->cooked_write_part (regnum, offset % 8, len, |
efaf1ae0 | 1029 | arg->contents ().data ()); |
449e1137 AC |
1030 | } |
1031 | } | |
2f690297 | 1032 | } |
38ca4e0c | 1033 | else |
2f690297 | 1034 | { |
38ca4e0c MK |
1035 | if (len > 8) |
1036 | { | |
1037 | /* "Aggregates larger than 8 bytes are aligned on a | |
1038 | 16-byte boundary, possibly leaving an unused argument | |
1777feb0 | 1039 | slot, which is filled with garbage. If necessary, |
38ca4e0c MK |
1040 | they are padded on the right (with garbage), to a |
1041 | multiple of 8 bytes." */ | |
1042 | offset = align_up (offset, 16); | |
1043 | } | |
1044 | } | |
1045 | ||
1218e655 | 1046 | /* If we are passing a function pointer, make sure we pass a function |
dda83cd7 | 1047 | descriptor instead of the function entry address. */ |
78134374 | 1048 | if (type->code () == TYPE_CODE_PTR |
27710edb | 1049 | && type->target_type ()->code () == TYPE_CODE_FUNC) |
dda83cd7 | 1050 | { |
1218e655 RC |
1051 | ULONGEST codeptr, fptr; |
1052 | ||
efaf1ae0 | 1053 | codeptr = unpack_long (type, arg->contents ().data ()); |
e17a4113 | 1054 | fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr); |
df86565b | 1055 | store_unsigned_integer (fptrbuf, type->length (), byte_order, |
e17a4113 | 1056 | fptr); |
1218e655 RC |
1057 | valbuf = fptrbuf; |
1058 | } | |
1059 | else | |
dda83cd7 | 1060 | { |
efaf1ae0 | 1061 | valbuf = arg->contents ().data (); |
1218e655 RC |
1062 | } |
1063 | ||
38ca4e0c | 1064 | /* Always store the argument in memory. */ |
1218e655 | 1065 | write_memory (sp + offset, valbuf, len); |
38ca4e0c | 1066 | |
38ca4e0c MK |
1067 | regnum = HPPA_ARG0_REGNUM - offset / 8; |
1068 | while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0) | |
1069 | { | |
e4c4a59b SM |
1070 | regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8), |
1071 | valbuf); | |
325fac50 PA |
1072 | offset += std::min (len, 8); |
1073 | valbuf += std::min (len, 8); | |
1074 | len -= std::min (len, 8); | |
38ca4e0c | 1075 | regnum--; |
2f690297 | 1076 | } |
38ca4e0c MK |
1077 | |
1078 | offset += len; | |
2f690297 AC |
1079 | } |
1080 | ||
38ca4e0c MK |
1081 | /* Set up GR29 (%ret1) to hold the argument pointer (ap). */ |
1082 | regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64); | |
1083 | ||
1084 | /* Allocate the outgoing parameter area. Make sure the outgoing | |
1085 | parameter area is multiple of 16 bytes in length. */ | |
325fac50 | 1086 | sp += std::max (align_up (offset, 16), (ULONGEST) 64); |
38ca4e0c MK |
1087 | |
1088 | /* Allocate 32-bytes of scratch space. The documentation doesn't | |
1089 | mention this, but it seems to be needed. */ | |
1090 | sp += 32; | |
1091 | ||
1092 | /* Allocate the frame marker area. */ | |
1093 | sp += 16; | |
1094 | ||
1095 | /* If a structure has to be returned, set up GR 28 (%ret0) to hold | |
1096 | its address. */ | |
cf84fa6b | 1097 | if (return_method == return_method_struct) |
38ca4e0c | 1098 | regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr); |
2f690297 | 1099 | |
38ca4e0c | 1100 | /* Set up GR27 (%dp) to hold the global pointer (gp). */ |
e38c262f | 1101 | gp = tdep->find_global_pointer (gdbarch, function); |
77d18ded | 1102 | if (gp != 0) |
38ca4e0c | 1103 | regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp); |
77d18ded | 1104 | |
38ca4e0c | 1105 | /* Set up GR2 (%rp) to hold the return pointer (rp). */ |
77d18ded RC |
1106 | if (!gdbarch_push_dummy_code_p (gdbarch)) |
1107 | regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr); | |
2f690297 | 1108 | |
38ca4e0c MK |
1109 | /* Set up GR30 to hold the stack pointer (sp). */ |
1110 | regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp); | |
c4557624 | 1111 | |
38ca4e0c | 1112 | return sp; |
2f690297 | 1113 | } |
38ca4e0c | 1114 | \f |
2f690297 | 1115 | |
08a27113 MK |
1116 | /* Handle 32/64-bit struct return conventions. */ |
1117 | ||
1118 | static enum return_value_convention | |
6a3a010b | 1119 | hppa32_return_value (struct gdbarch *gdbarch, struct value *function, |
08a27113 | 1120 | struct type *type, struct regcache *regcache, |
e127f0db | 1121 | gdb_byte *readbuf, const gdb_byte *writebuf) |
08a27113 | 1122 | { |
df86565b | 1123 | if (type->length () <= 2 * 4) |
08a27113 MK |
1124 | { |
1125 | /* The value always lives in the right hand end of the register | |
1126 | (or register pair)? */ | |
1127 | int b; | |
78134374 | 1128 | int reg = type->code () == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28; |
df86565b | 1129 | int part = type->length () % 4; |
08a27113 MK |
1130 | /* The left hand register contains only part of the value, |
1131 | transfer that first so that the rest can be xfered as entire | |
1132 | 4-byte registers. */ | |
1133 | if (part > 0) | |
1134 | { | |
1135 | if (readbuf != NULL) | |
73bb0000 | 1136 | regcache->cooked_read_part (reg, 4 - part, part, readbuf); |
08a27113 | 1137 | if (writebuf != NULL) |
e4c4a59b | 1138 | regcache->cooked_write_part (reg, 4 - part, part, writebuf); |
08a27113 MK |
1139 | reg++; |
1140 | } | |
1141 | /* Now transfer the remaining register values. */ | |
df86565b | 1142 | for (b = part; b < type->length (); b += 4) |
08a27113 MK |
1143 | { |
1144 | if (readbuf != NULL) | |
dca08e1f | 1145 | regcache->cooked_read (reg, readbuf + b); |
08a27113 | 1146 | if (writebuf != NULL) |
b66f5587 | 1147 | regcache->cooked_write (reg, writebuf + b); |
08a27113 MK |
1148 | reg++; |
1149 | } | |
1150 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1151 | } | |
1152 | else | |
1153 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1154 | } | |
1155 | ||
1156 | static enum return_value_convention | |
6a3a010b | 1157 | hppa64_return_value (struct gdbarch *gdbarch, struct value *function, |
08a27113 | 1158 | struct type *type, struct regcache *regcache, |
e127f0db | 1159 | gdb_byte *readbuf, const gdb_byte *writebuf) |
08a27113 | 1160 | { |
df86565b | 1161 | int len = type->length (); |
08a27113 MK |
1162 | int regnum, offset; |
1163 | ||
bad43aa5 | 1164 | if (len > 16) |
08a27113 | 1165 | { |
85102364 | 1166 | /* All return values larger than 128 bits must be aggregate |
dda83cd7 | 1167 | return values. */ |
9738b034 MK |
1168 | gdb_assert (!hppa64_integral_or_pointer_p (type)); |
1169 | gdb_assert (!hppa64_floating_p (type)); | |
08a27113 MK |
1170 | |
1171 | /* "Aggregate return values larger than 128 bits are returned in | |
1172 | a buffer allocated by the caller. The address of the buffer | |
1173 | must be passed in GR 28." */ | |
1174 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1175 | } | |
1176 | ||
1177 | if (hppa64_integral_or_pointer_p (type)) | |
1178 | { | |
1179 | /* "Integral return values are returned in GR 28. Values | |
dda83cd7 | 1180 | smaller than 64 bits are padded on the left (with garbage)." */ |
08a27113 MK |
1181 | regnum = HPPA_RET0_REGNUM; |
1182 | offset = 8 - len; | |
1183 | } | |
1184 | else if (hppa64_floating_p (type)) | |
1185 | { | |
1186 | if (len > 8) | |
1187 | { | |
1188 | /* "Double-extended- and quad-precision floating-point | |
1189 | values are returned in GRs 28 and 29. The sign, | |
1190 | exponent, and most-significant bits of the mantissa are | |
1191 | returned in GR 28; the least-significant bits of the | |
1192 | mantissa are passed in GR 29. For double-extended | |
1193 | precision values, GR 29 is padded on the right with 48 | |
1194 | bits of garbage." */ | |
1195 | regnum = HPPA_RET0_REGNUM; | |
1196 | offset = 0; | |
1197 | } | |
1198 | else | |
1199 | { | |
1200 | /* "Single-precision and double-precision floating-point | |
1201 | return values are returned in FR 4R (single precision) or | |
1202 | FR 4 (double-precision)." */ | |
1203 | regnum = HPPA64_FP4_REGNUM; | |
1204 | offset = 8 - len; | |
1205 | } | |
1206 | } | |
1207 | else | |
1208 | { | |
1209 | /* "Aggregate return values up to 64 bits in size are returned | |
dda83cd7 SM |
1210 | in GR 28. Aggregates smaller than 64 bits are left aligned |
1211 | in the register; the pad bits on the right are undefined." | |
08a27113 MK |
1212 | |
1213 | "Aggregate return values between 65 and 128 bits are returned | |
1214 | in GRs 28 and 29. The first 64 bits are placed in GR 28, and | |
1215 | the remaining bits are placed, left aligned, in GR 29. The | |
1216 | pad bits on the right of GR 29 (if any) are undefined." */ | |
1217 | regnum = HPPA_RET0_REGNUM; | |
1218 | offset = 0; | |
1219 | } | |
1220 | ||
1221 | if (readbuf) | |
1222 | { | |
08a27113 MK |
1223 | while (len > 0) |
1224 | { | |
73bb0000 SM |
1225 | regcache->cooked_read_part (regnum, offset, std::min (len, 8), |
1226 | readbuf); | |
325fac50 PA |
1227 | readbuf += std::min (len, 8); |
1228 | len -= std::min (len, 8); | |
08a27113 MK |
1229 | regnum++; |
1230 | } | |
1231 | } | |
1232 | ||
1233 | if (writebuf) | |
1234 | { | |
08a27113 MK |
1235 | while (len > 0) |
1236 | { | |
e4c4a59b SM |
1237 | regcache->cooked_write_part (regnum, offset, std::min (len, 8), |
1238 | writebuf); | |
325fac50 PA |
1239 | writebuf += std::min (len, 8); |
1240 | len -= std::min (len, 8); | |
08a27113 MK |
1241 | regnum++; |
1242 | } | |
1243 | } | |
1244 | ||
1245 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1246 | } | |
1247 | \f | |
1248 | ||
d49771ef | 1249 | static CORE_ADDR |
a7aad9aa | 1250 | hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr, |
d49771ef RC |
1251 | struct target_ops *targ) |
1252 | { | |
1253 | if (addr & 2) | |
1254 | { | |
0dfff4cb | 1255 | struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr; |
a7aad9aa | 1256 | CORE_ADDR plabel = addr & ~3; |
0dfff4cb | 1257 | return read_memory_typed_address (plabel, func_ptr_type); |
d49771ef RC |
1258 | } |
1259 | ||
1260 | return addr; | |
1261 | } | |
1262 | ||
1797a8f6 AC |
1263 | static CORE_ADDR |
1264 | hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
1265 | { | |
1266 | /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_ | |
1267 | and not _bit_)! */ | |
1268 | return align_up (addr, 64); | |
1269 | } | |
1270 | ||
2f690297 AC |
1271 | /* Force all frames to 16-byte alignment. Better safe than sorry. */ |
1272 | ||
1273 | static CORE_ADDR | |
1797a8f6 | 1274 | hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) |
2f690297 AC |
1275 | { |
1276 | /* Just always 16-byte align. */ | |
1277 | return align_up (addr, 16); | |
1278 | } | |
1279 | ||
cb8c24b6 | 1280 | static CORE_ADDR |
c113ed0c | 1281 | hppa_read_pc (readable_regcache *regcache) |
c906108c | 1282 | { |
cc72850f | 1283 | ULONGEST ipsw; |
61a1198a | 1284 | ULONGEST pc; |
c906108c | 1285 | |
c113ed0c YQ |
1286 | regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw); |
1287 | regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc); | |
fe46cd3a RC |
1288 | |
1289 | /* If the current instruction is nullified, then we are effectively | |
1290 | still executing the previous instruction. Pretend we are still | |
cc72850f MK |
1291 | there. This is needed when single stepping; if the nullified |
1292 | instruction is on a different line, we don't want GDB to think | |
1293 | we've stepped onto that line. */ | |
fe46cd3a RC |
1294 | if (ipsw & 0x00200000) |
1295 | pc -= 4; | |
1296 | ||
cc72850f | 1297 | return pc & ~0x3; |
c906108c SS |
1298 | } |
1299 | ||
cc72850f | 1300 | void |
61a1198a | 1301 | hppa_write_pc (struct regcache *regcache, CORE_ADDR pc) |
c906108c | 1302 | { |
61a1198a UW |
1303 | regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc); |
1304 | regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4); | |
c906108c SS |
1305 | } |
1306 | ||
c906108c | 1307 | /* For the given instruction (INST), return any adjustment it makes |
1777feb0 | 1308 | to the stack pointer or zero for no adjustment. |
c906108c SS |
1309 | |
1310 | This only handles instructions commonly found in prologues. */ | |
1311 | ||
1312 | static int | |
fba45db2 | 1313 | prologue_inst_adjust_sp (unsigned long inst) |
c906108c SS |
1314 | { |
1315 | /* This must persist across calls. */ | |
1316 | static int save_high21; | |
1317 | ||
1318 | /* The most common way to perform a stack adjustment ldo X(sp),sp */ | |
1319 | if ((inst & 0xffffc000) == 0x37de0000) | |
abc485a1 | 1320 | return hppa_extract_14 (inst); |
c906108c SS |
1321 | |
1322 | /* stwm X,D(sp) */ | |
1323 | if ((inst & 0xffe00000) == 0x6fc00000) | |
abc485a1 | 1324 | return hppa_extract_14 (inst); |
c906108c | 1325 | |
104c1213 JM |
1326 | /* std,ma X,D(sp) */ |
1327 | if ((inst & 0xffe00008) == 0x73c00008) | |
66c6502d | 1328 | return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3); |
104c1213 | 1329 | |
e22b26cb | 1330 | /* addil high21,%r30; ldo low11,(%r1),%r30) |
c906108c | 1331 | save high bits in save_high21 for later use. */ |
e22b26cb | 1332 | if ((inst & 0xffe00000) == 0x2bc00000) |
c906108c | 1333 | { |
abc485a1 | 1334 | save_high21 = hppa_extract_21 (inst); |
c906108c SS |
1335 | return 0; |
1336 | } | |
1337 | ||
1338 | if ((inst & 0xffff0000) == 0x343e0000) | |
abc485a1 | 1339 | return save_high21 + hppa_extract_14 (inst); |
c906108c SS |
1340 | |
1341 | /* fstws as used by the HP compilers. */ | |
1342 | if ((inst & 0xffffffe0) == 0x2fd01220) | |
abc485a1 | 1343 | return hppa_extract_5_load (inst); |
c906108c SS |
1344 | |
1345 | /* No adjustment. */ | |
1346 | return 0; | |
1347 | } | |
1348 | ||
1349 | /* Return nonzero if INST is a branch of some kind, else return zero. */ | |
1350 | ||
1351 | static int | |
fba45db2 | 1352 | is_branch (unsigned long inst) |
c906108c SS |
1353 | { |
1354 | switch (inst >> 26) | |
1355 | { | |
1356 | case 0x20: | |
1357 | case 0x21: | |
1358 | case 0x22: | |
1359 | case 0x23: | |
7be570e7 | 1360 | case 0x27: |
c906108c SS |
1361 | case 0x28: |
1362 | case 0x29: | |
1363 | case 0x2a: | |
1364 | case 0x2b: | |
7be570e7 | 1365 | case 0x2f: |
c906108c SS |
1366 | case 0x30: |
1367 | case 0x31: | |
1368 | case 0x32: | |
1369 | case 0x33: | |
1370 | case 0x38: | |
1371 | case 0x39: | |
1372 | case 0x3a: | |
7be570e7 | 1373 | case 0x3b: |
c906108c SS |
1374 | return 1; |
1375 | ||
1376 | default: | |
1377 | return 0; | |
1378 | } | |
1379 | } | |
1380 | ||
1381 | /* Return the register number for a GR which is saved by INST or | |
b35018fd | 1382 | zero if INST does not save a GR. |
c906108c | 1383 | |
b35018fd | 1384 | Referenced from: |
7be570e7 | 1385 | |
b35018fd CG |
1386 | parisc 1.1: |
1387 | https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf | |
c906108c | 1388 | |
b35018fd CG |
1389 | parisc 2.0: |
1390 | https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf | |
c906108c | 1391 | |
b35018fd CG |
1392 | According to Table 6-5 of Chapter 6 (Memory Reference Instructions) |
1393 | on page 106 in parisc 2.0, all instructions for storing values from | |
1394 | the general registers are: | |
c5aa993b | 1395 | |
b35018fd | 1396 | Store: stb, sth, stw, std (according to Chapter 7, they |
dda83cd7 | 1397 | are only in both "inst >> 26" and "inst >> 6". |
b35018fd | 1398 | Store Absolute: stwa, stda (according to Chapter 7, they are only |
dda83cd7 | 1399 | in "inst >> 6". |
b35018fd | 1400 | Store Bytes: stby, stdby (according to Chapter 7, they are |
dda83cd7 | 1401 | only in "inst >> 6"). |
b35018fd CG |
1402 | |
1403 | For (inst >> 26), according to Chapter 7: | |
1404 | ||
1405 | The effective memory reference address is formed by the addition | |
1406 | of an immediate displacement to a base value. | |
1407 | ||
1408 | - stb: 0x18, store a byte from a general register. | |
1409 | ||
1410 | - sth: 0x19, store a halfword from a general register. | |
1411 | ||
1412 | - stw: 0x1a, store a word from a general register. | |
1413 | ||
1414 | - stwm: 0x1b, store a word from a general register and perform base | |
85102364 | 1415 | register modification (2.0 will still treat it as stw). |
b35018fd CG |
1416 | |
1417 | - std: 0x1c, store a doubleword from a general register (2.0 only). | |
1418 | ||
1419 | - stw: 0x1f, store a word from a general register (2.0 only). | |
1420 | ||
1421 | For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7: | |
1422 | ||
1423 | The effective memory reference address is formed by the addition | |
1424 | of an index value to a base value specified in the instruction. | |
1425 | ||
1426 | - stb: 0x08, store a byte from a general register (1.1 calls stbs). | |
1427 | ||
1428 | - sth: 0x09, store a halfword from a general register (1.1 calls | |
1429 | sths). | |
1430 | ||
1431 | - stw: 0x0a, store a word from a general register (1.1 calls stws). | |
1432 | ||
1433 | - std: 0x0b: store a doubleword from a general register (2.0 only) | |
1434 | ||
1435 | Implement fast byte moves (stores) to unaligned word or doubleword | |
1436 | destination. | |
1437 | ||
1438 | - stby: 0x0c, for unaligned word (1.1 calls stbys). | |
1439 | ||
1440 | - stdby: 0x0d for unaligned doubleword (2.0 only). | |
1441 | ||
1442 | Store a word or doubleword using an absolute memory address formed | |
1443 | using short or long displacement or indexed | |
1444 | ||
1445 | - stwa: 0x0e, store a word from a general register to an absolute | |
1446 | address (1.0 calls stwas). | |
1447 | ||
1448 | - stda: 0x0f, store a doubleword from a general register to an | |
1449 | absolute address (2.0 only). */ | |
1450 | ||
1451 | static int | |
1452 | inst_saves_gr (unsigned long inst) | |
1453 | { | |
1454 | switch ((inst >> 26) & 0x0f) | |
1455 | { | |
1456 | case 0x03: | |
1457 | switch ((inst >> 6) & 0x0f) | |
1458 | { | |
1459 | case 0x08: | |
1460 | case 0x09: | |
1461 | case 0x0a: | |
1462 | case 0x0b: | |
1463 | case 0x0c: | |
1464 | case 0x0d: | |
1465 | case 0x0e: | |
1466 | case 0x0f: | |
1467 | return hppa_extract_5R_store (inst); | |
1468 | default: | |
1469 | return 0; | |
1470 | } | |
1471 | case 0x18: | |
1472 | case 0x19: | |
1473 | case 0x1a: | |
1474 | case 0x1b: | |
1475 | case 0x1c: | |
1476 | /* no 0x1d or 0x1e -- according to parisc 2.0 document */ | |
1477 | case 0x1f: | |
1478 | return hppa_extract_5R_store (inst); | |
1479 | default: | |
1480 | return 0; | |
1481 | } | |
c906108c SS |
1482 | } |
1483 | ||
1484 | /* Return the register number for a FR which is saved by INST or | |
1485 | zero it INST does not save a FR. | |
1486 | ||
1487 | Note we only care about full 64bit register stores (that's the only | |
1488 | kind of stores the prologue will use). | |
1489 | ||
1490 | FIXME: What about argument stores with the HP compiler in ANSI mode? */ | |
1491 | ||
1492 | static int | |
fba45db2 | 1493 | inst_saves_fr (unsigned long inst) |
c906108c | 1494 | { |
1777feb0 | 1495 | /* Is this an FSTD? */ |
c906108c | 1496 | if ((inst & 0xfc00dfc0) == 0x2c001200) |
abc485a1 | 1497 | return hppa_extract_5r_store (inst); |
7be570e7 | 1498 | if ((inst & 0xfc000002) == 0x70000002) |
abc485a1 | 1499 | return hppa_extract_5R_store (inst); |
1777feb0 | 1500 | /* Is this an FSTW? */ |
c906108c | 1501 | if ((inst & 0xfc00df80) == 0x24001200) |
abc485a1 | 1502 | return hppa_extract_5r_store (inst); |
7be570e7 | 1503 | if ((inst & 0xfc000002) == 0x7c000000) |
abc485a1 | 1504 | return hppa_extract_5R_store (inst); |
c906108c SS |
1505 | return 0; |
1506 | } | |
1507 | ||
1508 | /* Advance PC across any function entry prologue instructions | |
1777feb0 | 1509 | to reach some "real" code. |
c906108c SS |
1510 | |
1511 | Use information in the unwind table to determine what exactly should | |
1512 | be in the prologue. */ | |
1513 | ||
1514 | ||
a71f8c30 | 1515 | static CORE_ADDR |
be8626e0 MD |
1516 | skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc, |
1517 | int stop_before_branch) | |
c906108c | 1518 | { |
e17a4113 | 1519 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
e362b510 | 1520 | gdb_byte buf[4]; |
c906108c SS |
1521 | CORE_ADDR orig_pc = pc; |
1522 | unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp; | |
1523 | unsigned long args_stored, status, i, restart_gr, restart_fr; | |
1524 | struct unwind_table_entry *u; | |
a71f8c30 | 1525 | int final_iteration; |
c906108c SS |
1526 | |
1527 | restart_gr = 0; | |
1528 | restart_fr = 0; | |
1529 | ||
1530 | restart: | |
1531 | u = find_unwind_entry (pc); | |
1532 | if (!u) | |
1533 | return pc; | |
1534 | ||
1777feb0 | 1535 | /* If we are not at the beginning of a function, then return now. */ |
c906108c SS |
1536 | if ((pc & ~0x3) != u->region_start) |
1537 | return pc; | |
1538 | ||
1539 | /* This is how much of a frame adjustment we need to account for. */ | |
1540 | stack_remaining = u->Total_frame_size << 3; | |
1541 | ||
1542 | /* Magic register saves we want to know about. */ | |
1543 | save_rp = u->Save_RP; | |
1544 | save_sp = u->Save_SP; | |
1545 | ||
1546 | /* An indication that args may be stored into the stack. Unfortunately | |
1547 | the HPUX compilers tend to set this in cases where no args were | |
1548 | stored too!. */ | |
1549 | args_stored = 1; | |
1550 | ||
1551 | /* Turn the Entry_GR field into a bitmask. */ | |
1552 | save_gr = 0; | |
1553 | for (i = 3; i < u->Entry_GR + 3; i++) | |
1554 | { | |
1555 | /* Frame pointer gets saved into a special location. */ | |
eded0a31 | 1556 | if (u->Save_SP && i == HPPA_FP_REGNUM) |
c906108c SS |
1557 | continue; |
1558 | ||
1559 | save_gr |= (1 << i); | |
1560 | } | |
1561 | save_gr &= ~restart_gr; | |
1562 | ||
1563 | /* Turn the Entry_FR field into a bitmask too. */ | |
1564 | save_fr = 0; | |
1565 | for (i = 12; i < u->Entry_FR + 12; i++) | |
1566 | save_fr |= (1 << i); | |
1567 | save_fr &= ~restart_fr; | |
1568 | ||
a71f8c30 RC |
1569 | final_iteration = 0; |
1570 | ||
c906108c SS |
1571 | /* Loop until we find everything of interest or hit a branch. |
1572 | ||
1573 | For unoptimized GCC code and for any HP CC code this will never ever | |
1574 | examine any user instructions. | |
1575 | ||
85102364 | 1576 | For optimized GCC code we're faced with problems. GCC will schedule |
c906108c SS |
1577 | its prologue and make prologue instructions available for delay slot |
1578 | filling. The end result is user code gets mixed in with the prologue | |
1579 | and a prologue instruction may be in the delay slot of the first branch | |
1580 | or call. | |
1581 | ||
1582 | Some unexpected things are expected with debugging optimized code, so | |
1583 | we allow this routine to walk past user instructions in optimized | |
1584 | GCC code. */ | |
1585 | while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0 | |
1586 | || args_stored) | |
1587 | { | |
1588 | unsigned int reg_num; | |
1589 | unsigned long old_stack_remaining, old_save_gr, old_save_fr; | |
1590 | unsigned long old_save_rp, old_save_sp, next_inst; | |
1591 | ||
1592 | /* Save copies of all the triggers so we can compare them later | |
dda83cd7 | 1593 | (only for HPC). */ |
c906108c SS |
1594 | old_save_gr = save_gr; |
1595 | old_save_fr = save_fr; | |
1596 | old_save_rp = save_rp; | |
1597 | old_save_sp = save_sp; | |
1598 | old_stack_remaining = stack_remaining; | |
1599 | ||
8defab1a | 1600 | status = target_read_memory (pc, buf, 4); |
e17a4113 | 1601 | inst = extract_unsigned_integer (buf, 4, byte_order); |
c5aa993b | 1602 | |
c906108c SS |
1603 | /* Yow! */ |
1604 | if (status != 0) | |
1605 | return pc; | |
1606 | ||
1607 | /* Note the interesting effects of this instruction. */ | |
1608 | stack_remaining -= prologue_inst_adjust_sp (inst); | |
1609 | ||
7be570e7 JM |
1610 | /* There are limited ways to store the return pointer into the |
1611 | stack. */ | |
c4c79048 | 1612 | if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1) |
c906108c SS |
1613 | save_rp = 0; |
1614 | ||
104c1213 | 1615 | /* These are the only ways we save SP into the stack. At this time |
dda83cd7 | 1616 | the HP compilers never bother to save SP into the stack. */ |
104c1213 JM |
1617 | if ((inst & 0xffffc000) == 0x6fc10000 |
1618 | || (inst & 0xffffc00c) == 0x73c10008) | |
c906108c SS |
1619 | save_sp = 0; |
1620 | ||
6426a772 | 1621 | /* Are we loading some register with an offset from the argument |
dda83cd7 | 1622 | pointer? */ |
6426a772 JM |
1623 | if ((inst & 0xffe00000) == 0x37a00000 |
1624 | || (inst & 0xffffffe0) == 0x081d0240) | |
1625 | { | |
1626 | pc += 4; | |
1627 | continue; | |
1628 | } | |
1629 | ||
c906108c SS |
1630 | /* Account for general and floating-point register saves. */ |
1631 | reg_num = inst_saves_gr (inst); | |
1632 | save_gr &= ~(1 << reg_num); | |
1633 | ||
1634 | /* Ugh. Also account for argument stores into the stack. | |
dda83cd7 SM |
1635 | Unfortunately args_stored only tells us that some arguments |
1636 | where stored into the stack. Not how many or what kind! | |
c906108c | 1637 | |
dda83cd7 SM |
1638 | This is a kludge as on the HP compiler sets this bit and it |
1639 | never does prologue scheduling. So once we see one, skip past | |
1640 | all of them. We have similar code for the fp arg stores below. | |
c906108c | 1641 | |
dda83cd7 SM |
1642 | FIXME. Can still die if we have a mix of GR and FR argument |
1643 | stores! */ | |
be8626e0 | 1644 | if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23) |
819844ad | 1645 | && reg_num <= 26) |
c906108c | 1646 | { |
be8626e0 | 1647 | while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23) |
819844ad | 1648 | && reg_num <= 26) |
c906108c SS |
1649 | { |
1650 | pc += 4; | |
8defab1a | 1651 | status = target_read_memory (pc, buf, 4); |
e17a4113 | 1652 | inst = extract_unsigned_integer (buf, 4, byte_order); |
c906108c SS |
1653 | if (status != 0) |
1654 | return pc; | |
1655 | reg_num = inst_saves_gr (inst); | |
1656 | } | |
1657 | args_stored = 0; | |
1658 | continue; | |
1659 | } | |
1660 | ||
1661 | reg_num = inst_saves_fr (inst); | |
1662 | save_fr &= ~(1 << reg_num); | |
1663 | ||
8defab1a | 1664 | status = target_read_memory (pc + 4, buf, 4); |
e17a4113 | 1665 | next_inst = extract_unsigned_integer (buf, 4, byte_order); |
c5aa993b | 1666 | |
c906108c SS |
1667 | /* Yow! */ |
1668 | if (status != 0) | |
1669 | return pc; | |
1670 | ||
1671 | /* We've got to be read to handle the ldo before the fp register | |
dda83cd7 | 1672 | save. */ |
c906108c SS |
1673 | if ((inst & 0xfc000000) == 0x34000000 |
1674 | && inst_saves_fr (next_inst) >= 4 | |
819844ad | 1675 | && inst_saves_fr (next_inst) |
be8626e0 | 1676 | <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7)) |
c906108c SS |
1677 | { |
1678 | /* So we drop into the code below in a reasonable state. */ | |
1679 | reg_num = inst_saves_fr (next_inst); | |
1680 | pc -= 4; | |
1681 | } | |
1682 | ||
1683 | /* Ugh. Also account for argument stores into the stack. | |
dda83cd7 SM |
1684 | This is a kludge as on the HP compiler sets this bit and it |
1685 | never does prologue scheduling. So once we see one, skip past | |
1686 | all of them. */ | |
819844ad | 1687 | if (reg_num >= 4 |
be8626e0 | 1688 | && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7)) |
c906108c | 1689 | { |
819844ad UW |
1690 | while (reg_num >= 4 |
1691 | && reg_num | |
be8626e0 | 1692 | <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7)) |
c906108c SS |
1693 | { |
1694 | pc += 8; | |
8defab1a | 1695 | status = target_read_memory (pc, buf, 4); |
e17a4113 | 1696 | inst = extract_unsigned_integer (buf, 4, byte_order); |
c906108c SS |
1697 | if (status != 0) |
1698 | return pc; | |
1699 | if ((inst & 0xfc000000) != 0x34000000) | |
1700 | break; | |
8defab1a | 1701 | status = target_read_memory (pc + 4, buf, 4); |
e17a4113 | 1702 | next_inst = extract_unsigned_integer (buf, 4, byte_order); |
c906108c SS |
1703 | if (status != 0) |
1704 | return pc; | |
1705 | reg_num = inst_saves_fr (next_inst); | |
1706 | } | |
1707 | args_stored = 0; | |
1708 | continue; | |
1709 | } | |
1710 | ||
1711 | /* Quit if we hit any kind of branch. This can happen if a prologue | |
dda83cd7 | 1712 | instruction is in the delay slot of the first call/branch. */ |
a71f8c30 | 1713 | if (is_branch (inst) && stop_before_branch) |
c906108c SS |
1714 | break; |
1715 | ||
1716 | /* What a crock. The HP compilers set args_stored even if no | |
dda83cd7 SM |
1717 | arguments were stored into the stack (boo hiss). This could |
1718 | cause this code to then skip a bunch of user insns (up to the | |
1719 | first branch). | |
1720 | ||
1721 | To combat this we try to identify when args_stored was bogusly | |
1722 | set and clear it. We only do this when args_stored is nonzero, | |
1723 | all other resources are accounted for, and nothing changed on | |
1724 | this pass. */ | |
c906108c | 1725 | if (args_stored |
c5aa993b | 1726 | && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0) |
c906108c SS |
1727 | && old_save_gr == save_gr && old_save_fr == save_fr |
1728 | && old_save_rp == save_rp && old_save_sp == save_sp | |
1729 | && old_stack_remaining == stack_remaining) | |
1730 | break; | |
c5aa993b | 1731 | |
c906108c SS |
1732 | /* Bump the PC. */ |
1733 | pc += 4; | |
a71f8c30 RC |
1734 | |
1735 | /* !stop_before_branch, so also look at the insn in the delay slot | |
dda83cd7 | 1736 | of the branch. */ |
a71f8c30 RC |
1737 | if (final_iteration) |
1738 | break; | |
1739 | if (is_branch (inst)) | |
1740 | final_iteration = 1; | |
c906108c SS |
1741 | } |
1742 | ||
85102364 | 1743 | /* We've got a tentative location for the end of the prologue. However |
c906108c SS |
1744 | because of limitations in the unwind descriptor mechanism we may |
1745 | have went too far into user code looking for the save of a register | |
1746 | that does not exist. So, if there registers we expected to be saved | |
1747 | but never were, mask them out and restart. | |
1748 | ||
1749 | This should only happen in optimized code, and should be very rare. */ | |
c5aa993b | 1750 | if (save_gr || (save_fr && !(restart_fr || restart_gr))) |
c906108c SS |
1751 | { |
1752 | pc = orig_pc; | |
1753 | restart_gr = save_gr; | |
1754 | restart_fr = save_fr; | |
1755 | goto restart; | |
1756 | } | |
1757 | ||
1758 | return pc; | |
1759 | } | |
1760 | ||
1761 | ||
7be570e7 JM |
1762 | /* Return the address of the PC after the last prologue instruction if |
1763 | we can determine it from the debug symbols. Else return zero. */ | |
c906108c SS |
1764 | |
1765 | static CORE_ADDR | |
fba45db2 | 1766 | after_prologue (CORE_ADDR pc) |
c906108c SS |
1767 | { |
1768 | struct symtab_and_line sal; | |
1769 | CORE_ADDR func_addr, func_end; | |
c906108c | 1770 | |
7be570e7 JM |
1771 | /* If we can not find the symbol in the partial symbol table, then |
1772 | there is no hope we can determine the function's start address | |
1773 | with this code. */ | |
c906108c | 1774 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
7be570e7 | 1775 | return 0; |
c906108c | 1776 | |
7be570e7 | 1777 | /* Get the line associated with FUNC_ADDR. */ |
c906108c SS |
1778 | sal = find_pc_line (func_addr, 0); |
1779 | ||
7be570e7 JM |
1780 | /* There are only two cases to consider. First, the end of the source line |
1781 | is within the function bounds. In that case we return the end of the | |
1782 | source line. Second is the end of the source line extends beyond the | |
1783 | bounds of the current function. We need to use the slow code to | |
1777feb0 | 1784 | examine instructions in that case. |
c906108c | 1785 | |
7be570e7 JM |
1786 | Anything else is simply a bug elsewhere. Fixing it here is absolutely |
1787 | the wrong thing to do. In fact, it should be entirely possible for this | |
1788 | function to always return zero since the slow instruction scanning code | |
1789 | is supposed to *always* work. If it does not, then it is a bug. */ | |
1790 | if (sal.end < func_end) | |
1791 | return sal.end; | |
c5aa993b | 1792 | else |
7be570e7 | 1793 | return 0; |
c906108c SS |
1794 | } |
1795 | ||
1796 | /* To skip prologues, I use this predicate. Returns either PC itself | |
1797 | if the code at PC does not look like a function prologue; otherwise | |
1777feb0 | 1798 | returns an address that (if we're lucky) follows the prologue. |
a71f8c30 RC |
1799 | |
1800 | hppa_skip_prologue is called by gdb to place a breakpoint in a function. | |
1777feb0 | 1801 | It doesn't necessarily skips all the insns in the prologue. In fact |
a71f8c30 RC |
1802 | we might not want to skip all the insns because a prologue insn may |
1803 | appear in the delay slot of the first branch, and we don't want to | |
1804 | skip over the branch in that case. */ | |
c906108c | 1805 | |
8d153463 | 1806 | static CORE_ADDR |
6093d2eb | 1807 | hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
c906108c | 1808 | { |
c5aa993b | 1809 | CORE_ADDR post_prologue_pc; |
c906108c | 1810 | |
c5aa993b JM |
1811 | /* See if we can determine the end of the prologue via the symbol table. |
1812 | If so, then return either PC, or the PC after the prologue, whichever | |
1813 | is greater. */ | |
c906108c | 1814 | |
c5aa993b | 1815 | post_prologue_pc = after_prologue (pc); |
c906108c | 1816 | |
7be570e7 JM |
1817 | /* If after_prologue returned a useful address, then use it. Else |
1818 | fall back on the instruction skipping code. | |
1819 | ||
1820 | Some folks have claimed this causes problems because the breakpoint | |
1821 | may be the first instruction of the prologue. If that happens, then | |
1822 | the instruction skipping code has a bug that needs to be fixed. */ | |
c5aa993b | 1823 | if (post_prologue_pc != 0) |
325fac50 | 1824 | return std::max (pc, post_prologue_pc); |
c5aa993b | 1825 | else |
be8626e0 | 1826 | return (skip_prologue_hard_way (gdbarch, pc, 1)); |
c906108c SS |
1827 | } |
1828 | ||
29d375ac | 1829 | /* Return an unwind entry that falls within the frame's code block. */ |
227e86ad | 1830 | |
29d375ac | 1831 | static struct unwind_table_entry * |
8480a37e | 1832 | hppa_find_unwind_entry_in_block (const frame_info_ptr &this_frame) |
29d375ac | 1833 | { |
227e86ad | 1834 | CORE_ADDR pc = get_frame_address_in_block (this_frame); |
93d42b30 DJ |
1835 | |
1836 | /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the | |
ad1193e7 | 1837 | result of get_frame_address_in_block implies a problem. |
93d42b30 | 1838 | The bits should have been removed earlier, before the return |
c7ce8faa | 1839 | value of gdbarch_unwind_pc. That might be happening already; |
93d42b30 DJ |
1840 | if it isn't, it should be fixed. Then this call can be |
1841 | removed. */ | |
227e86ad | 1842 | pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc); |
29d375ac RC |
1843 | return find_unwind_entry (pc); |
1844 | } | |
1845 | ||
26d08f08 AC |
1846 | struct hppa_frame_cache |
1847 | { | |
1848 | CORE_ADDR base; | |
098caef4 | 1849 | trad_frame_saved_reg *saved_regs; |
26d08f08 AC |
1850 | }; |
1851 | ||
1852 | static struct hppa_frame_cache * | |
8480a37e | 1853 | hppa_frame_cache (const frame_info_ptr &this_frame, void **this_cache) |
26d08f08 | 1854 | { |
227e86ad | 1855 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
e17a4113 UW |
1856 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
1857 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
26d08f08 AC |
1858 | struct hppa_frame_cache *cache; |
1859 | long saved_gr_mask; | |
1860 | long saved_fr_mask; | |
26d08f08 AC |
1861 | long frame_size; |
1862 | struct unwind_table_entry *u; | |
9f7194c3 | 1863 | CORE_ADDR prologue_end; |
50b2f48a | 1864 | int fp_in_r1 = 0; |
26d08f08 AC |
1865 | int i; |
1866 | ||
369aa520 | 1867 | if (hppa_debug) |
6cb06a8c TT |
1868 | gdb_printf (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ", |
1869 | frame_relative_level(this_frame)); | |
369aa520 | 1870 | |
26d08f08 | 1871 | if ((*this_cache) != NULL) |
369aa520 RC |
1872 | { |
1873 | if (hppa_debug) | |
6cb06a8c TT |
1874 | gdb_printf (gdb_stdlog, "base=%s (cached) }", |
1875 | paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base)); | |
9a3c8263 | 1876 | return (struct hppa_frame_cache *) (*this_cache); |
369aa520 | 1877 | } |
26d08f08 AC |
1878 | cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache); |
1879 | (*this_cache) = cache; | |
227e86ad | 1880 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
26d08f08 AC |
1881 | |
1882 | /* Yow! */ | |
227e86ad | 1883 | u = hppa_find_unwind_entry_in_block (this_frame); |
26d08f08 | 1884 | if (!u) |
369aa520 RC |
1885 | { |
1886 | if (hppa_debug) | |
6cb06a8c | 1887 | gdb_printf (gdb_stdlog, "base=NULL (no unwind entry) }"); |
9a3c8263 | 1888 | return (struct hppa_frame_cache *) (*this_cache); |
369aa520 | 1889 | } |
26d08f08 AC |
1890 | |
1891 | /* Turn the Entry_GR field into a bitmask. */ | |
1892 | saved_gr_mask = 0; | |
1893 | for (i = 3; i < u->Entry_GR + 3; i++) | |
1894 | { | |
1895 | /* Frame pointer gets saved into a special location. */ | |
eded0a31 | 1896 | if (u->Save_SP && i == HPPA_FP_REGNUM) |
26d08f08 AC |
1897 | continue; |
1898 | ||
1899 | saved_gr_mask |= (1 << i); | |
1900 | } | |
1901 | ||
1902 | /* Turn the Entry_FR field into a bitmask too. */ | |
1903 | saved_fr_mask = 0; | |
1904 | for (i = 12; i < u->Entry_FR + 12; i++) | |
1905 | saved_fr_mask |= (1 << i); | |
1906 | ||
1907 | /* Loop until we find everything of interest or hit a branch. | |
1908 | ||
1909 | For unoptimized GCC code and for any HP CC code this will never ever | |
1910 | examine any user instructions. | |
1911 | ||
1912 | For optimized GCC code we're faced with problems. GCC will schedule | |
1913 | its prologue and make prologue instructions available for delay slot | |
1914 | filling. The end result is user code gets mixed in with the prologue | |
1915 | and a prologue instruction may be in the delay slot of the first branch | |
1916 | or call. | |
1917 | ||
1918 | Some unexpected things are expected with debugging optimized code, so | |
1919 | we allow this routine to walk past user instructions in optimized | |
1920 | GCC code. */ | |
1921 | { | |
1922 | int final_iteration = 0; | |
46acf081 | 1923 | CORE_ADDR pc, start_pc, end_pc; |
26d08f08 AC |
1924 | int looking_for_sp = u->Save_SP; |
1925 | int looking_for_rp = u->Save_RP; | |
1926 | int fp_loc = -1; | |
9f7194c3 | 1927 | |
a71f8c30 | 1928 | /* We have to use skip_prologue_hard_way instead of just |
9f7194c3 RC |
1929 | skip_prologue_using_sal, in case we stepped into a function without |
1930 | symbol information. hppa_skip_prologue also bounds the returned | |
1931 | pc by the passed in pc, so it will not return a pc in the next | |
1777feb0 | 1932 | function. |
a71f8c30 RC |
1933 | |
1934 | We used to call hppa_skip_prologue to find the end of the prologue, | |
1935 | but if some non-prologue instructions get scheduled into the prologue, | |
1936 | and the program is compiled with debug information, the "easy" way | |
1937 | in hppa_skip_prologue will return a prologue end that is too early | |
1938 | for us to notice any potential frame adjustments. */ | |
d5c27f81 | 1939 | |
ef02daa9 DJ |
1940 | /* We used to use get_frame_func to locate the beginning of the |
1941 | function to pass to skip_prologue. However, when objects are | |
1942 | compiled without debug symbols, get_frame_func can return the wrong | |
1777feb0 | 1943 | function (or 0). We can do better than that by using unwind records. |
46acf081 | 1944 | This only works if the Region_description of the unwind record |
1777feb0 | 1945 | indicates that it includes the entry point of the function. |
46acf081 RC |
1946 | HP compilers sometimes generate unwind records for regions that |
1947 | do not include the entry or exit point of a function. GNU tools | |
1948 | do not do this. */ | |
1949 | ||
1950 | if ((u->Region_description & 0x2) == 0) | |
1951 | start_pc = u->region_start; | |
1952 | else | |
227e86ad | 1953 | start_pc = get_frame_func (this_frame); |
d5c27f81 | 1954 | |
be8626e0 | 1955 | prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0); |
227e86ad | 1956 | end_pc = get_frame_pc (this_frame); |
9f7194c3 RC |
1957 | |
1958 | if (prologue_end != 0 && end_pc > prologue_end) | |
1959 | end_pc = prologue_end; | |
1960 | ||
26d08f08 | 1961 | frame_size = 0; |
9f7194c3 | 1962 | |
46acf081 | 1963 | for (pc = start_pc; |
26d08f08 AC |
1964 | ((saved_gr_mask || saved_fr_mask |
1965 | || looking_for_sp || looking_for_rp | |
1966 | || frame_size < (u->Total_frame_size << 3)) | |
9f7194c3 | 1967 | && pc < end_pc); |
26d08f08 AC |
1968 | pc += 4) |
1969 | { | |
1970 | int reg; | |
e362b510 | 1971 | gdb_byte buf4[4]; |
4a302917 RC |
1972 | long inst; |
1973 | ||
bdec2917 | 1974 | if (!safe_frame_unwind_memory (this_frame, pc, buf4)) |
4a302917 | 1975 | { |
5af949e3 UW |
1976 | error (_("Cannot read instruction at %s."), |
1977 | paddress (gdbarch, pc)); | |
9a3c8263 | 1978 | return (struct hppa_frame_cache *) (*this_cache); |
4a302917 RC |
1979 | } |
1980 | ||
e17a4113 | 1981 | inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order); |
9f7194c3 | 1982 | |
26d08f08 AC |
1983 | /* Note the interesting effects of this instruction. */ |
1984 | frame_size += prologue_inst_adjust_sp (inst); | |
1985 | ||
1986 | /* There are limited ways to store the return pointer into the | |
1987 | stack. */ | |
1988 | if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */ | |
1989 | { | |
1990 | looking_for_rp = 0; | |
098caef4 | 1991 | cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20); |
26d08f08 | 1992 | } |
dfaf8edb MK |
1993 | else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */ |
1994 | { | |
1995 | looking_for_rp = 0; | |
098caef4 | 1996 | cache->saved_regs[HPPA_RP_REGNUM].set_addr (-24); |
dfaf8edb | 1997 | } |
c4c79048 | 1998 | else if (inst == 0x0fc212c1 |
dda83cd7 | 1999 | || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */ |
26d08f08 AC |
2000 | { |
2001 | looking_for_rp = 0; | |
098caef4 | 2002 | cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16); |
26d08f08 AC |
2003 | } |
2004 | ||
2005 | /* Check to see if we saved SP into the stack. This also | |
2006 | happens to indicate the location of the saved frame | |
2007 | pointer. */ | |
2008 | if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */ | |
2009 | || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */ | |
2010 | { | |
2011 | looking_for_sp = 0; | |
098caef4 | 2012 | cache->saved_regs[HPPA_FP_REGNUM].set_addr (0); |
26d08f08 | 2013 | } |
50b2f48a RC |
2014 | else if (inst == 0x08030241) /* copy %r3, %r1 */ |
2015 | { | |
2016 | fp_in_r1 = 1; | |
2017 | } | |
26d08f08 AC |
2018 | |
2019 | /* Account for general and floating-point register saves. */ | |
2020 | reg = inst_saves_gr (inst); | |
2021 | if (reg >= 3 && reg <= 18 | |
eded0a31 | 2022 | && (!u->Save_SP || reg != HPPA_FP_REGNUM)) |
26d08f08 AC |
2023 | { |
2024 | saved_gr_mask &= ~(1 << reg); | |
abc485a1 | 2025 | if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0) |
26d08f08 AC |
2026 | /* stwm with a positive displacement is a _post_ |
2027 | _modify_. */ | |
098caef4 | 2028 | cache->saved_regs[reg].set_addr (0); |
26d08f08 AC |
2029 | else if ((inst & 0xfc00000c) == 0x70000008) |
2030 | /* A std has explicit post_modify forms. */ | |
098caef4 | 2031 | cache->saved_regs[reg].set_addr (0); |
26d08f08 AC |
2032 | else |
2033 | { | |
2034 | CORE_ADDR offset; | |
2035 | ||
2036 | if ((inst >> 26) == 0x1c) | |
66c6502d | 2037 | offset = (inst & 0x1 ? -(1 << 13) : 0) |
1777feb0 | 2038 | | (((inst >> 4) & 0x3ff) << 3); |
26d08f08 | 2039 | else if ((inst >> 26) == 0x03) |
abc485a1 | 2040 | offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5); |
26d08f08 | 2041 | else |
abc485a1 | 2042 | offset = hppa_extract_14 (inst); |
26d08f08 AC |
2043 | |
2044 | /* Handle code with and without frame pointers. */ | |
2045 | if (u->Save_SP) | |
098caef4 | 2046 | cache->saved_regs[reg].set_addr (offset); |
26d08f08 | 2047 | else |
098caef4 LM |
2048 | cache->saved_regs[reg].set_addr ((u->Total_frame_size << 3) |
2049 | + offset); | |
26d08f08 AC |
2050 | } |
2051 | } | |
2052 | ||
2053 | /* GCC handles callee saved FP regs a little differently. | |
2054 | ||
2055 | It emits an instruction to put the value of the start of | |
2056 | the FP store area into %r1. It then uses fstds,ma with a | |
2057 | basereg of %r1 for the stores. | |
2058 | ||
2059 | HP CC emits them at the current stack pointer modifying the | |
2060 | stack pointer as it stores each register. */ | |
2061 | ||
2062 | /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */ | |
2063 | if ((inst & 0xffffc000) == 0x34610000 | |
2064 | || (inst & 0xffffc000) == 0x37c10000) | |
abc485a1 | 2065 | fp_loc = hppa_extract_14 (inst); |
26d08f08 AC |
2066 | |
2067 | reg = inst_saves_fr (inst); | |
2068 | if (reg >= 12 && reg <= 21) | |
2069 | { | |
2070 | /* Note +4 braindamage below is necessary because the FP | |
2071 | status registers are internally 8 registers rather than | |
2072 | the expected 4 registers. */ | |
2073 | saved_fr_mask &= ~(1 << reg); | |
2074 | if (fp_loc == -1) | |
2075 | { | |
2076 | /* 1st HP CC FP register store. After this | |
2077 | instruction we've set enough state that the GCC and | |
2078 | HPCC code are both handled in the same manner. */ | |
098caef4 | 2079 | cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].set_addr (0); |
26d08f08 AC |
2080 | fp_loc = 8; |
2081 | } | |
2082 | else | |
2083 | { | |
098caef4 | 2084 | cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].set_addr (fp_loc); |
26d08f08 AC |
2085 | fp_loc += 8; |
2086 | } | |
2087 | } | |
2088 | ||
1777feb0 | 2089 | /* Quit if we hit any kind of branch the previous iteration. */ |
26d08f08 AC |
2090 | if (final_iteration) |
2091 | break; | |
2092 | /* We want to look precisely one instruction beyond the branch | |
2093 | if we have not found everything yet. */ | |
2094 | if (is_branch (inst)) | |
2095 | final_iteration = 1; | |
2096 | } | |
2097 | } | |
2098 | ||
2099 | { | |
2100 | /* The frame base always represents the value of %sp at entry to | |
2101 | the current function (and is thus equivalent to the "saved" | |
2102 | stack pointer. */ | |
227e86ad | 2103 | CORE_ADDR this_sp = get_frame_register_unsigned (this_frame, |
dda83cd7 | 2104 | HPPA_SP_REGNUM); |
ed70ba00 | 2105 | CORE_ADDR fp; |
9f7194c3 RC |
2106 | |
2107 | if (hppa_debug) | |
6cb06a8c TT |
2108 | gdb_printf (gdb_stdlog, " (this_sp=%s, pc=%s, " |
2109 | "prologue_end=%s) ", | |
2110 | paddress (gdbarch, this_sp), | |
2111 | paddress (gdbarch, get_frame_pc (this_frame)), | |
2112 | paddress (gdbarch, prologue_end)); | |
9f7194c3 | 2113 | |
ed70ba00 | 2114 | /* Check to see if a frame pointer is available, and use it for |
dda83cd7 | 2115 | frame unwinding if it is. |
ed70ba00 | 2116 | |
dda83cd7 SM |
2117 | There are some situations where we need to rely on the frame |
2118 | pointer to do stack unwinding. For example, if a function calls | |
2119 | alloca (), the stack pointer can get adjusted inside the body of | |
2120 | the function. In this case, the ABI requires that the compiler | |
2121 | maintain a frame pointer for the function. | |
ed70ba00 | 2122 | |
dda83cd7 SM |
2123 | The unwind record has a flag (alloca_frame) that indicates that |
2124 | a function has a variable frame; unfortunately, gcc/binutils | |
2125 | does not set this flag. Instead, whenever a frame pointer is used | |
2126 | and saved on the stack, the Save_SP flag is set. We use this to | |
2127 | decide whether to use the frame pointer for unwinding. | |
ed70ba00 | 2128 | |
dda83cd7 | 2129 | TODO: For the HP compiler, maybe we should use the alloca_frame flag |
ed70ba00 RC |
2130 | instead of Save_SP. */ |
2131 | ||
227e86ad | 2132 | fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM); |
46acf081 | 2133 | |
6fcecea0 | 2134 | if (u->alloca_frame) |
46acf081 | 2135 | fp -= u->Total_frame_size << 3; |
ed70ba00 | 2136 | |
227e86ad | 2137 | if (get_frame_pc (this_frame) >= prologue_end |
dda83cd7 | 2138 | && (u->Save_SP || u->alloca_frame) && fp != 0) |
ed70ba00 | 2139 | { |
24b21115 | 2140 | cache->base = fp; |
ed70ba00 | 2141 | |
24b21115 | 2142 | if (hppa_debug) |
6cb06a8c TT |
2143 | gdb_printf (gdb_stdlog, " (base=%s) [frame pointer]", |
2144 | paddress (gdbarch, cache->base)); | |
ed70ba00 | 2145 | } |
1658da49 | 2146 | else if (u->Save_SP |
a9a87d35 | 2147 | && cache->saved_regs[HPPA_SP_REGNUM].is_addr ()) |
9f7194c3 | 2148 | { |
dda83cd7 | 2149 | /* Both we're expecting the SP to be saved and the SP has been |
9f7194c3 RC |
2150 | saved. The entry SP value is saved at this frame's SP |
2151 | address. */ | |
dda83cd7 | 2152 | cache->base = read_memory_integer (this_sp, word_size, byte_order); |
9f7194c3 RC |
2153 | |
2154 | if (hppa_debug) | |
6cb06a8c TT |
2155 | gdb_printf (gdb_stdlog, " (base=%s) [saved]", |
2156 | paddress (gdbarch, cache->base)); | |
9f7194c3 | 2157 | } |
492325c4 | 2158 | else |
9f7194c3 | 2159 | { |
dda83cd7 | 2160 | /* The prologue has been slowly allocating stack space. Adjust |
1658da49 | 2161 | the SP back. */ |
dda83cd7 | 2162 | cache->base = this_sp - frame_size; |
9f7194c3 | 2163 | if (hppa_debug) |
6cb06a8c TT |
2164 | gdb_printf (gdb_stdlog, " (base=%s) [unwind adjust]", |
2165 | paddress (gdbarch, cache->base)); | |
9f7194c3 RC |
2166 | |
2167 | } | |
a9a87d35 | 2168 | cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base); |
26d08f08 AC |
2169 | } |
2170 | ||
412275d5 AC |
2171 | /* The PC is found in the "return register", "Millicode" uses "r31" |
2172 | as the return register while normal code uses "rp". */ | |
26d08f08 | 2173 | if (u->Millicode) |
9f7194c3 | 2174 | { |
a9a87d35 | 2175 | if (cache->saved_regs[31].is_addr ()) |
dda83cd7 SM |
2176 | { |
2177 | cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31]; | |
9ed5ba24 | 2178 | if (hppa_debug) |
6cb06a8c | 2179 | gdb_printf (gdb_stdlog, " (pc=r31) [stack] } "); |
dda83cd7 | 2180 | } |
9f7194c3 RC |
2181 | else |
2182 | { | |
227e86ad | 2183 | ULONGEST r31 = get_frame_register_unsigned (this_frame, 31); |
a9a87d35 | 2184 | cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (r31); |
9ed5ba24 | 2185 | if (hppa_debug) |
6cb06a8c | 2186 | gdb_printf (gdb_stdlog, " (pc=r31) [frame] } "); |
dda83cd7 | 2187 | } |
9f7194c3 | 2188 | } |
26d08f08 | 2189 | else |
9f7194c3 | 2190 | { |
a9a87d35 | 2191 | if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ()) |
dda83cd7 SM |
2192 | { |
2193 | cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = | |
9ed5ba24 RC |
2194 | cache->saved_regs[HPPA_RP_REGNUM]; |
2195 | if (hppa_debug) | |
6cb06a8c | 2196 | gdb_printf (gdb_stdlog, " (pc=rp) [stack] } "); |
dda83cd7 | 2197 | } |
9f7194c3 RC |
2198 | else |
2199 | { | |
227e86ad | 2200 | ULONGEST rp = get_frame_register_unsigned (this_frame, |
dda83cd7 | 2201 | HPPA_RP_REGNUM); |
a9a87d35 | 2202 | cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp); |
9ed5ba24 | 2203 | if (hppa_debug) |
6cb06a8c | 2204 | gdb_printf (gdb_stdlog, " (pc=rp) [frame] } "); |
9f7194c3 RC |
2205 | } |
2206 | } | |
26d08f08 | 2207 | |
50b2f48a RC |
2208 | /* If Save_SP is set, then we expect the frame pointer to be saved in the |
2209 | frame. However, there is a one-insn window where we haven't saved it | |
2210 | yet, but we've already clobbered it. Detect this case and fix it up. | |
2211 | ||
2212 | The prologue sequence for frame-pointer functions is: | |
2213 | 0: stw %rp, -20(%sp) | |
2214 | 4: copy %r3, %r1 | |
2215 | 8: copy %sp, %r3 | |
2216 | c: stw,ma %r1, XX(%sp) | |
2217 | ||
2218 | So if we are at offset c, the r3 value that we want is not yet saved | |
2219 | on the stack, but it's been overwritten. The prologue analyzer will | |
2220 | set fp_in_r1 when it sees the copy insn so we know to get the value | |
2221 | from r1 instead. */ | |
a9a87d35 | 2222 | if (u->Save_SP && !cache->saved_regs[HPPA_FP_REGNUM].is_addr () |
50b2f48a RC |
2223 | && fp_in_r1) |
2224 | { | |
227e86ad | 2225 | ULONGEST r1 = get_frame_register_unsigned (this_frame, 1); |
a9a87d35 | 2226 | cache->saved_regs[HPPA_FP_REGNUM].set_value (r1); |
50b2f48a | 2227 | } |
1658da49 | 2228 | |
26d08f08 AC |
2229 | { |
2230 | /* Convert all the offsets into addresses. */ | |
2231 | int reg; | |
65c5db89 | 2232 | for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++) |
26d08f08 | 2233 | { |
a9a87d35 | 2234 | if (cache->saved_regs[reg].is_addr ()) |
098caef4 LM |
2235 | cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr () |
2236 | + cache->base); | |
26d08f08 AC |
2237 | } |
2238 | } | |
2239 | ||
f77a2124 | 2240 | { |
08106042 | 2241 | hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch); |
f77a2124 RC |
2242 | |
2243 | if (tdep->unwind_adjust_stub) | |
227e86ad | 2244 | tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs); |
f77a2124 RC |
2245 | } |
2246 | ||
369aa520 | 2247 | if (hppa_debug) |
6cb06a8c TT |
2248 | gdb_printf (gdb_stdlog, "base=%s }", |
2249 | paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base)); | |
9a3c8263 | 2250 | return (struct hppa_frame_cache *) (*this_cache); |
26d08f08 AC |
2251 | } |
2252 | ||
2253 | static void | |
8480a37e | 2254 | hppa_frame_this_id (const frame_info_ptr &this_frame, void **this_cache, |
227e86ad | 2255 | struct frame_id *this_id) |
26d08f08 | 2256 | { |
d5c27f81 | 2257 | struct hppa_frame_cache *info; |
d5c27f81 RC |
2258 | struct unwind_table_entry *u; |
2259 | ||
227e86ad JB |
2260 | info = hppa_frame_cache (this_frame, this_cache); |
2261 | u = hppa_find_unwind_entry_in_block (this_frame); | |
d5c27f81 RC |
2262 | |
2263 | (*this_id) = frame_id_build (info->base, u->region_start); | |
26d08f08 AC |
2264 | } |
2265 | ||
227e86ad | 2266 | static struct value * |
8480a37e | 2267 | hppa_frame_prev_register (const frame_info_ptr &this_frame, |
227e86ad | 2268 | void **this_cache, int regnum) |
26d08f08 | 2269 | { |
227e86ad JB |
2270 | struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache); |
2271 | ||
1777feb0 MS |
2272 | return hppa_frame_prev_register_helper (this_frame, |
2273 | info->saved_regs, regnum); | |
227e86ad JB |
2274 | } |
2275 | ||
2276 | static int | |
2277 | hppa_frame_unwind_sniffer (const struct frame_unwind *self, | |
8480a37e | 2278 | const frame_info_ptr &this_frame, void **this_cache) |
227e86ad JB |
2279 | { |
2280 | if (hppa_find_unwind_entry_in_block (this_frame)) | |
2281 | return 1; | |
2282 | ||
2283 | return 0; | |
0da28f8a RC |
2284 | } |
2285 | ||
2286 | static const struct frame_unwind hppa_frame_unwind = | |
2287 | { | |
a154d838 | 2288 | "hppa unwind table", |
0da28f8a | 2289 | NORMAL_FRAME, |
8fbca658 | 2290 | default_frame_unwind_stop_reason, |
0da28f8a | 2291 | hppa_frame_this_id, |
227e86ad JB |
2292 | hppa_frame_prev_register, |
2293 | NULL, | |
2294 | hppa_frame_unwind_sniffer | |
0da28f8a RC |
2295 | }; |
2296 | ||
0da28f8a RC |
2297 | /* This is a generic fallback frame unwinder that kicks in if we fail all |
2298 | the other ones. Normally we would expect the stub and regular unwinder | |
2299 | to work, but in some cases we might hit a function that just doesn't | |
2300 | have any unwind information available. In this case we try to do | |
2301 | unwinding solely based on code reading. This is obviously going to be | |
2302 | slow, so only use this as a last resort. Currently this will only | |
2303 | identify the stack and pc for the frame. */ | |
2304 | ||
2305 | static struct hppa_frame_cache * | |
8480a37e | 2306 | hppa_fallback_frame_cache (const frame_info_ptr &this_frame, void **this_cache) |
0da28f8a | 2307 | { |
e17a4113 UW |
2308 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
2309 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
0da28f8a | 2310 | struct hppa_frame_cache *cache; |
4ba6a975 MK |
2311 | unsigned int frame_size = 0; |
2312 | int found_rp = 0; | |
2313 | CORE_ADDR start_pc; | |
0da28f8a | 2314 | |
d5c27f81 | 2315 | if (hppa_debug) |
6cb06a8c TT |
2316 | gdb_printf (gdb_stdlog, |
2317 | "{ hppa_fallback_frame_cache (frame=%d) -> ", | |
2318 | frame_relative_level (this_frame)); | |
d5c27f81 | 2319 | |
0da28f8a RC |
2320 | cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache); |
2321 | (*this_cache) = cache; | |
227e86ad | 2322 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
0da28f8a | 2323 | |
227e86ad | 2324 | start_pc = get_frame_func (this_frame); |
4ba6a975 | 2325 | if (start_pc) |
0da28f8a | 2326 | { |
227e86ad | 2327 | CORE_ADDR cur_pc = get_frame_pc (this_frame); |
4ba6a975 | 2328 | CORE_ADDR pc; |
0da28f8a | 2329 | |
4ba6a975 MK |
2330 | for (pc = start_pc; pc < cur_pc; pc += 4) |
2331 | { | |
2332 | unsigned int insn; | |
0da28f8a | 2333 | |
e17a4113 | 2334 | insn = read_memory_unsigned_integer (pc, 4, byte_order); |
4ba6a975 | 2335 | frame_size += prologue_inst_adjust_sp (insn); |
6d1be3f1 | 2336 | |
4ba6a975 MK |
2337 | /* There are limited ways to store the return pointer into the |
2338 | stack. */ | |
2339 | if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */ | |
2340 | { | |
098caef4 | 2341 | cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20); |
4ba6a975 MK |
2342 | found_rp = 1; |
2343 | } | |
c4c79048 | 2344 | else if (insn == 0x0fc212c1 |
dda83cd7 | 2345 | || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */ |
4ba6a975 | 2346 | { |
098caef4 | 2347 | cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16); |
4ba6a975 MK |
2348 | found_rp = 1; |
2349 | } | |
2350 | } | |
412275d5 | 2351 | } |
0da28f8a | 2352 | |
d5c27f81 | 2353 | if (hppa_debug) |
6cb06a8c TT |
2354 | gdb_printf (gdb_stdlog, " frame_size=%d, found_rp=%d }\n", |
2355 | frame_size, found_rp); | |
d5c27f81 | 2356 | |
227e86ad | 2357 | cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM); |
4ba6a975 | 2358 | cache->base -= frame_size; |
a9a87d35 | 2359 | cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base); |
0da28f8a | 2360 | |
a9a87d35 | 2361 | if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ()) |
0da28f8a | 2362 | { |
098caef4 LM |
2363 | cache->saved_regs[HPPA_RP_REGNUM].set_addr (cache->saved_regs[HPPA_RP_REGNUM].addr () |
2364 | + cache->base); | |
4ba6a975 MK |
2365 | cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = |
2366 | cache->saved_regs[HPPA_RP_REGNUM]; | |
0da28f8a | 2367 | } |
412275d5 AC |
2368 | else |
2369 | { | |
4ba6a975 | 2370 | ULONGEST rp; |
227e86ad | 2371 | rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM); |
a9a87d35 | 2372 | cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp); |
412275d5 | 2373 | } |
0da28f8a RC |
2374 | |
2375 | return cache; | |
26d08f08 AC |
2376 | } |
2377 | ||
0da28f8a | 2378 | static void |
8480a37e | 2379 | hppa_fallback_frame_this_id (const frame_info_ptr &this_frame, void **this_cache, |
0da28f8a RC |
2380 | struct frame_id *this_id) |
2381 | { | |
2382 | struct hppa_frame_cache *info = | |
227e86ad JB |
2383 | hppa_fallback_frame_cache (this_frame, this_cache); |
2384 | ||
2385 | (*this_id) = frame_id_build (info->base, get_frame_func (this_frame)); | |
0da28f8a RC |
2386 | } |
2387 | ||
227e86ad | 2388 | static struct value * |
8480a37e | 2389 | hppa_fallback_frame_prev_register (const frame_info_ptr &this_frame, |
dda83cd7 | 2390 | void **this_cache, int regnum) |
0da28f8a | 2391 | { |
1777feb0 MS |
2392 | struct hppa_frame_cache *info |
2393 | = hppa_fallback_frame_cache (this_frame, this_cache); | |
227e86ad | 2394 | |
1777feb0 MS |
2395 | return hppa_frame_prev_register_helper (this_frame, |
2396 | info->saved_regs, regnum); | |
0da28f8a RC |
2397 | } |
2398 | ||
2399 | static const struct frame_unwind hppa_fallback_frame_unwind = | |
26d08f08 | 2400 | { |
a154d838 | 2401 | "hppa prologue", |
26d08f08 | 2402 | NORMAL_FRAME, |
8fbca658 | 2403 | default_frame_unwind_stop_reason, |
0da28f8a | 2404 | hppa_fallback_frame_this_id, |
227e86ad JB |
2405 | hppa_fallback_frame_prev_register, |
2406 | NULL, | |
2407 | default_frame_sniffer | |
26d08f08 AC |
2408 | }; |
2409 | ||
7f07c5b6 RC |
2410 | /* Stub frames, used for all kinds of call stubs. */ |
2411 | struct hppa_stub_unwind_cache | |
2412 | { | |
2413 | CORE_ADDR base; | |
098caef4 | 2414 | trad_frame_saved_reg *saved_regs; |
7f07c5b6 RC |
2415 | }; |
2416 | ||
2417 | static struct hppa_stub_unwind_cache * | |
8480a37e | 2418 | hppa_stub_frame_unwind_cache (const frame_info_ptr &this_frame, |
7f07c5b6 RC |
2419 | void **this_cache) |
2420 | { | |
7f07c5b6 RC |
2421 | struct hppa_stub_unwind_cache *info; |
2422 | ||
2423 | if (*this_cache) | |
9a3c8263 | 2424 | return (struct hppa_stub_unwind_cache *) *this_cache; |
7f07c5b6 RC |
2425 | |
2426 | info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache); | |
2427 | *this_cache = info; | |
227e86ad | 2428 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
7f07c5b6 | 2429 | |
227e86ad | 2430 | info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM); |
7f07c5b6 | 2431 | |
22b0923d | 2432 | /* By default we assume that stubs do not change the rp. */ |
098caef4 | 2433 | info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_realreg (HPPA_RP_REGNUM); |
22b0923d | 2434 | |
7f07c5b6 RC |
2435 | return info; |
2436 | } | |
2437 | ||
2438 | static void | |
8480a37e | 2439 | hppa_stub_frame_this_id (const frame_info_ptr &this_frame, |
7f07c5b6 RC |
2440 | void **this_prologue_cache, |
2441 | struct frame_id *this_id) | |
2442 | { | |
2443 | struct hppa_stub_unwind_cache *info | |
227e86ad | 2444 | = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
f1b38a57 RC |
2445 | |
2446 | if (info) | |
227e86ad | 2447 | *this_id = frame_id_build (info->base, get_frame_func (this_frame)); |
7f07c5b6 RC |
2448 | } |
2449 | ||
227e86ad | 2450 | static struct value * |
8480a37e | 2451 | hppa_stub_frame_prev_register (const frame_info_ptr &this_frame, |
227e86ad | 2452 | void **this_prologue_cache, int regnum) |
7f07c5b6 RC |
2453 | { |
2454 | struct hppa_stub_unwind_cache *info | |
227e86ad | 2455 | = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
f1b38a57 | 2456 | |
227e86ad | 2457 | if (info == NULL) |
8a3fe4f8 | 2458 | error (_("Requesting registers from null frame.")); |
7f07c5b6 | 2459 | |
1777feb0 MS |
2460 | return hppa_frame_prev_register_helper (this_frame, |
2461 | info->saved_regs, regnum); | |
227e86ad | 2462 | } |
7f07c5b6 | 2463 | |
227e86ad JB |
2464 | static int |
2465 | hppa_stub_unwind_sniffer (const struct frame_unwind *self, | |
8480a37e | 2466 | const frame_info_ptr &this_frame, |
dda83cd7 | 2467 | void **this_cache) |
7f07c5b6 | 2468 | { |
227e86ad JB |
2469 | CORE_ADDR pc = get_frame_address_in_block (this_frame); |
2470 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
08106042 | 2471 | hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch); |
7f07c5b6 | 2472 | |
6d1be3f1 | 2473 | if (pc == 0 |
84674fe1 | 2474 | || (tdep->in_solib_call_trampoline != NULL |
3e5d3a5a | 2475 | && tdep->in_solib_call_trampoline (gdbarch, pc)) |
464963c9 | 2476 | || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL)) |
227e86ad JB |
2477 | return 1; |
2478 | return 0; | |
7f07c5b6 RC |
2479 | } |
2480 | ||
227e86ad | 2481 | static const struct frame_unwind hppa_stub_frame_unwind = { |
a154d838 | 2482 | "hppa stub", |
227e86ad | 2483 | NORMAL_FRAME, |
8fbca658 | 2484 | default_frame_unwind_stop_reason, |
227e86ad JB |
2485 | hppa_stub_frame_this_id, |
2486 | hppa_stub_frame_prev_register, | |
2487 | NULL, | |
2488 | hppa_stub_unwind_sniffer | |
2489 | }; | |
2490 | ||
cc72850f | 2491 | CORE_ADDR |
8480a37e | 2492 | hppa_unwind_pc (struct gdbarch *gdbarch, const frame_info_ptr &next_frame) |
26d08f08 | 2493 | { |
fe46cd3a RC |
2494 | ULONGEST ipsw; |
2495 | CORE_ADDR pc; | |
2496 | ||
cc72850f MK |
2497 | ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM); |
2498 | pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM); | |
fe46cd3a RC |
2499 | |
2500 | /* If the current instruction is nullified, then we are effectively | |
2501 | still executing the previous instruction. Pretend we are still | |
cc72850f MK |
2502 | there. This is needed when single stepping; if the nullified |
2503 | instruction is on a different line, we don't want GDB to think | |
2504 | we've stepped onto that line. */ | |
fe46cd3a RC |
2505 | if (ipsw & 0x00200000) |
2506 | pc -= 4; | |
2507 | ||
cc72850f | 2508 | return pc & ~0x3; |
26d08f08 AC |
2509 | } |
2510 | ||
c906108c | 2511 | static void |
c482f52c | 2512 | unwind_command (const char *exp, int from_tty) |
c906108c SS |
2513 | { |
2514 | CORE_ADDR address; | |
2515 | struct unwind_table_entry *u; | |
2516 | ||
2517 | /* If we have an expression, evaluate it and use it as the address. */ | |
2518 | ||
2519 | if (exp != 0 && *exp != 0) | |
2520 | address = parse_and_eval_address (exp); | |
2521 | else | |
2522 | return; | |
2523 | ||
2524 | u = find_unwind_entry (address); | |
2525 | ||
2526 | if (!u) | |
2527 | { | |
6cb06a8c | 2528 | gdb_printf ("Can't find unwind table entry for %s\n", exp); |
c906108c SS |
2529 | return; |
2530 | } | |
2531 | ||
6cb06a8c | 2532 | gdb_printf ("unwind_table_entry (%s):\n", host_address_to_string (u)); |
c906108c | 2533 | |
6cb06a8c | 2534 | gdb_printf ("\tregion_start = %s\n", hex_string (u->region_start)); |
c906108c | 2535 | |
6cb06a8c | 2536 | gdb_printf ("\tregion_end = %s\n", hex_string (u->region_end)); |
c906108c | 2537 | |
6cb06a8c | 2538 | #define pif(FLD) if (u->FLD) gdb_printf (" "#FLD); |
c906108c | 2539 | |
6cb06a8c | 2540 | gdb_printf ("\n\tflags ="); |
c906108c SS |
2541 | pif (Cannot_unwind); |
2542 | pif (Millicode); | |
2543 | pif (Millicode_save_sr0); | |
2544 | pif (Entry_SR); | |
2545 | pif (Args_stored); | |
2546 | pif (Variable_Frame); | |
2547 | pif (Separate_Package_Body); | |
2548 | pif (Frame_Extension_Millicode); | |
2549 | pif (Stack_Overflow_Check); | |
2550 | pif (Two_Instruction_SP_Increment); | |
6fcecea0 RC |
2551 | pif (sr4export); |
2552 | pif (cxx_info); | |
2553 | pif (cxx_try_catch); | |
2554 | pif (sched_entry_seq); | |
c906108c SS |
2555 | pif (Save_SP); |
2556 | pif (Save_RP); | |
2557 | pif (Save_MRP_in_frame); | |
6fcecea0 | 2558 | pif (save_r19); |
c906108c SS |
2559 | pif (Cleanup_defined); |
2560 | pif (MPE_XL_interrupt_marker); | |
2561 | pif (HP_UX_interrupt_marker); | |
2562 | pif (Large_frame); | |
6fcecea0 | 2563 | pif (alloca_frame); |
c906108c | 2564 | |
a11ac3b3 | 2565 | gdb_putc ('\n'); |
c906108c | 2566 | |
6cb06a8c | 2567 | #define pin(FLD) gdb_printf ("\t"#FLD" = 0x%x\n", u->FLD); |
c906108c SS |
2568 | |
2569 | pin (Region_description); | |
2570 | pin (Entry_FR); | |
2571 | pin (Entry_GR); | |
2572 | pin (Total_frame_size); | |
57dac9e1 RC |
2573 | |
2574 | if (u->stub_unwind.stub_type) | |
2575 | { | |
6cb06a8c | 2576 | gdb_printf ("\tstub type = "); |
57dac9e1 | 2577 | switch (u->stub_unwind.stub_type) |
dda83cd7 | 2578 | { |
57dac9e1 | 2579 | case LONG_BRANCH: |
6cb06a8c | 2580 | gdb_printf ("long branch\n"); |
57dac9e1 RC |
2581 | break; |
2582 | case PARAMETER_RELOCATION: | |
6cb06a8c | 2583 | gdb_printf ("parameter relocation\n"); |
57dac9e1 RC |
2584 | break; |
2585 | case EXPORT: | |
6cb06a8c | 2586 | gdb_printf ("export\n"); |
57dac9e1 RC |
2587 | break; |
2588 | case IMPORT: | |
6cb06a8c | 2589 | gdb_printf ("import\n"); |
57dac9e1 RC |
2590 | break; |
2591 | case IMPORT_SHLIB: | |
6cb06a8c | 2592 | gdb_printf ("import shlib\n"); |
57dac9e1 RC |
2593 | break; |
2594 | default: | |
6cb06a8c | 2595 | gdb_printf ("unknown (%d)\n", u->stub_unwind.stub_type); |
57dac9e1 RC |
2596 | } |
2597 | } | |
c906108c | 2598 | } |
c906108c | 2599 | |
38ca4e0c MK |
2600 | /* Return the GDB type object for the "standard" data type of data in |
2601 | register REGNUM. */ | |
d709c020 | 2602 | |
eded0a31 | 2603 | static struct type * |
38ca4e0c | 2604 | hppa32_register_type (struct gdbarch *gdbarch, int regnum) |
d709c020 | 2605 | { |
38ca4e0c | 2606 | if (regnum < HPPA_FP4_REGNUM) |
df4df182 | 2607 | return builtin_type (gdbarch)->builtin_uint32; |
d709c020 | 2608 | else |
27067745 | 2609 | return builtin_type (gdbarch)->builtin_float; |
d709c020 JB |
2610 | } |
2611 | ||
eded0a31 | 2612 | static struct type * |
38ca4e0c | 2613 | hppa64_register_type (struct gdbarch *gdbarch, int regnum) |
3ff7cf9e | 2614 | { |
38ca4e0c | 2615 | if (regnum < HPPA64_FP4_REGNUM) |
df4df182 | 2616 | return builtin_type (gdbarch)->builtin_uint64; |
3ff7cf9e | 2617 | else |
27067745 | 2618 | return builtin_type (gdbarch)->builtin_double; |
3ff7cf9e JB |
2619 | } |
2620 | ||
38ca4e0c MK |
2621 | /* Return non-zero if REGNUM is not a register available to the user |
2622 | through ptrace/ttrace. */ | |
d709c020 | 2623 | |
8d153463 | 2624 | static int |
64a3914f | 2625 | hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum) |
d709c020 JB |
2626 | { |
2627 | return (regnum == 0 | |
dda83cd7 SM |
2628 | || regnum == HPPA_PCSQ_HEAD_REGNUM |
2629 | || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM) | |
2630 | || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM)); | |
38ca4e0c | 2631 | } |
d709c020 | 2632 | |
d037d088 | 2633 | static int |
64a3914f | 2634 | hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum) |
d037d088 CD |
2635 | { |
2636 | /* cr26 and cr27 are readable (but not writable) from userspace. */ | |
2637 | if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM) | |
2638 | return 0; | |
2639 | else | |
64a3914f | 2640 | return hppa32_cannot_store_register (gdbarch, regnum); |
d037d088 CD |
2641 | } |
2642 | ||
38ca4e0c | 2643 | static int |
64a3914f | 2644 | hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum) |
38ca4e0c MK |
2645 | { |
2646 | return (regnum == 0 | |
dda83cd7 SM |
2647 | || regnum == HPPA_PCSQ_HEAD_REGNUM |
2648 | || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM) | |
2649 | || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM)); | |
d709c020 JB |
2650 | } |
2651 | ||
d037d088 | 2652 | static int |
64a3914f | 2653 | hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum) |
d037d088 CD |
2654 | { |
2655 | /* cr26 and cr27 are readable (but not writable) from userspace. */ | |
2656 | if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM) | |
2657 | return 0; | |
2658 | else | |
64a3914f | 2659 | return hppa64_cannot_store_register (gdbarch, regnum); |
d037d088 CD |
2660 | } |
2661 | ||
8d153463 | 2662 | static CORE_ADDR |
85ddcc70 | 2663 | hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
d709c020 JB |
2664 | { |
2665 | /* The low two bits of the PC on the PA contain the privilege level. | |
2666 | Some genius implementing a (non-GCC) compiler apparently decided | |
2667 | this means that "addresses" in a text section therefore include a | |
2668 | privilege level, and thus symbol tables should contain these bits. | |
2669 | This seems like a bonehead thing to do--anyway, it seems to work | |
2670 | for our purposes to just ignore those bits. */ | |
2671 | ||
2672 | return (addr &= ~0x3); | |
2673 | } | |
2674 | ||
e127f0db MK |
2675 | /* Get the ARGIth function argument for the current function. */ |
2676 | ||
4a302917 | 2677 | static CORE_ADDR |
8480a37e | 2678 | hppa_fetch_pointer_argument (const frame_info_ptr &frame, int argi, |
143985b7 AF |
2679 | struct type *type) |
2680 | { | |
e127f0db | 2681 | return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi); |
143985b7 AF |
2682 | } |
2683 | ||
05d1431c | 2684 | static enum register_status |
849d0ba8 | 2685 | hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, |
e127f0db | 2686 | int regnum, gdb_byte *buf) |
0f8d9d59 | 2687 | { |
05d1431c PA |
2688 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
2689 | ULONGEST tmp; | |
2690 | enum register_status status; | |
0f8d9d59 | 2691 | |
03f50fc8 | 2692 | status = regcache->raw_read (regnum, &tmp); |
05d1431c PA |
2693 | if (status == REG_VALID) |
2694 | { | |
2695 | if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM) | |
2696 | tmp &= ~0x3; | |
2697 | store_unsigned_integer (buf, sizeof tmp, byte_order, tmp); | |
2698 | } | |
2699 | return status; | |
0f8d9d59 RC |
2700 | } |
2701 | ||
d49771ef | 2702 | static CORE_ADDR |
e38c262f | 2703 | hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function) |
d49771ef RC |
2704 | { |
2705 | return 0; | |
2706 | } | |
2707 | ||
227e86ad | 2708 | struct value * |
8480a37e | 2709 | hppa_frame_prev_register_helper (const frame_info_ptr &this_frame, |
098caef4 | 2710 | trad_frame_saved_reg saved_regs[], |
227e86ad | 2711 | int regnum) |
0da28f8a | 2712 | { |
227e86ad | 2713 | struct gdbarch *arch = get_frame_arch (this_frame); |
e17a4113 | 2714 | enum bfd_endian byte_order = gdbarch_byte_order (arch); |
8f4e467c | 2715 | |
8693c419 MK |
2716 | if (regnum == HPPA_PCOQ_TAIL_REGNUM) |
2717 | { | |
227e86ad JB |
2718 | int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM); |
2719 | CORE_ADDR pc; | |
2720 | struct value *pcoq_val = | |
dda83cd7 SM |
2721 | trad_frame_get_prev_register (this_frame, saved_regs, |
2722 | HPPA_PCOQ_HEAD_REGNUM); | |
8693c419 | 2723 | |
efaf1ae0 | 2724 | pc = extract_unsigned_integer (pcoq_val->contents_all ().data (), |
e17a4113 | 2725 | size, byte_order); |
227e86ad | 2726 | return frame_unwind_got_constant (this_frame, regnum, pc + 4); |
8693c419 | 2727 | } |
0da28f8a | 2728 | |
227e86ad | 2729 | return trad_frame_get_prev_register (this_frame, saved_regs, regnum); |
0da28f8a | 2730 | } |
8693c419 | 2731 | \f |
0da28f8a | 2732 | |
34f55018 MK |
2733 | /* An instruction to match. */ |
2734 | struct insn_pattern | |
2735 | { | |
2736 | unsigned int data; /* See if it matches this.... */ | |
2737 | unsigned int mask; /* ... with this mask. */ | |
2738 | }; | |
2739 | ||
2740 | /* See bfd/elf32-hppa.c */ | |
2741 | static struct insn_pattern hppa_long_branch_stub[] = { | |
2742 | /* ldil LR'xxx,%r1 */ | |
2743 | { 0x20200000, 0xffe00000 }, | |
2744 | /* be,n RR'xxx(%sr4,%r1) */ | |
2745 | { 0xe0202002, 0xffe02002 }, | |
2746 | { 0, 0 } | |
2747 | }; | |
2748 | ||
2749 | static struct insn_pattern hppa_long_branch_pic_stub[] = { | |
2750 | /* b,l .+8, %r1 */ | |
2751 | { 0xe8200000, 0xffe00000 }, | |
2752 | /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */ | |
2753 | { 0x28200000, 0xffe00000 }, | |
2754 | /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */ | |
2755 | { 0xe0202002, 0xffe02002 }, | |
2756 | { 0, 0 } | |
2757 | }; | |
2758 | ||
2759 | static struct insn_pattern hppa_import_stub[] = { | |
2760 | /* addil LR'xxx, %dp */ | |
2761 | { 0x2b600000, 0xffe00000 }, | |
2762 | /* ldw RR'xxx(%r1), %r21 */ | |
2763 | { 0x48350000, 0xffffb000 }, | |
2764 | /* bv %r0(%r21) */ | |
2765 | { 0xeaa0c000, 0xffffffff }, | |
2766 | /* ldw RR'xxx+4(%r1), %r19 */ | |
2767 | { 0x48330000, 0xffffb000 }, | |
2768 | { 0, 0 } | |
2769 | }; | |
2770 | ||
2771 | static struct insn_pattern hppa_import_pic_stub[] = { | |
2772 | /* addil LR'xxx,%r19 */ | |
2773 | { 0x2a600000, 0xffe00000 }, | |
2774 | /* ldw RR'xxx(%r1),%r21 */ | |
2775 | { 0x48350000, 0xffffb000 }, | |
2776 | /* bv %r0(%r21) */ | |
2777 | { 0xeaa0c000, 0xffffffff }, | |
2778 | /* ldw RR'xxx+4(%r1),%r19 */ | |
2779 | { 0x48330000, 0xffffb000 }, | |
2780 | { 0, 0 }, | |
2781 | }; | |
2782 | ||
2783 | static struct insn_pattern hppa_plt_stub[] = { | |
2784 | /* b,l 1b, %r20 - 1b is 3 insns before here */ | |
2785 | { 0xea9f1fdd, 0xffffffff }, | |
2786 | /* depi 0,31,2,%r20 */ | |
2787 | { 0xd6801c1e, 0xffffffff }, | |
2788 | { 0, 0 } | |
34f55018 MK |
2789 | }; |
2790 | ||
2791 | /* Maximum number of instructions on the patterns above. */ | |
2792 | #define HPPA_MAX_INSN_PATTERN_LEN 4 | |
2793 | ||
2794 | /* Return non-zero if the instructions at PC match the series | |
2795 | described in PATTERN, or zero otherwise. PATTERN is an array of | |
2796 | 'struct insn_pattern' objects, terminated by an entry whose mask is | |
2797 | zero. | |
2798 | ||
2799 | When the match is successful, fill INSN[i] with what PATTERN[i] | |
2800 | matched. */ | |
2801 | ||
2802 | static int | |
e17a4113 UW |
2803 | hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc, |
2804 | struct insn_pattern *pattern, unsigned int *insn) | |
34f55018 | 2805 | { |
e17a4113 | 2806 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
34f55018 MK |
2807 | CORE_ADDR npc = pc; |
2808 | int i; | |
2809 | ||
2810 | for (i = 0; pattern[i].mask; i++) | |
2811 | { | |
2812 | gdb_byte buf[HPPA_INSN_SIZE]; | |
2813 | ||
8defab1a | 2814 | target_read_memory (npc, buf, HPPA_INSN_SIZE); |
e17a4113 | 2815 | insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order); |
34f55018 | 2816 | if ((insn[i] & pattern[i].mask) == pattern[i].data) |
dda83cd7 | 2817 | npc += 4; |
34f55018 | 2818 | else |
dda83cd7 | 2819 | return 0; |
34f55018 MK |
2820 | } |
2821 | ||
2822 | return 1; | |
2823 | } | |
2824 | ||
85102364 | 2825 | /* This relaxed version of the instruction matcher allows us to match |
34f55018 MK |
2826 | from somewhere inside the pattern, by looking backwards in the |
2827 | instruction scheme. */ | |
2828 | ||
2829 | static int | |
e17a4113 UW |
2830 | hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc, |
2831 | struct insn_pattern *pattern, unsigned int *insn) | |
34f55018 MK |
2832 | { |
2833 | int offset, len = 0; | |
2834 | ||
2835 | while (pattern[len].mask) | |
2836 | len++; | |
2837 | ||
2838 | for (offset = 0; offset < len; offset++) | |
e17a4113 UW |
2839 | if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE, |
2840 | pattern, insn)) | |
34f55018 MK |
2841 | return 1; |
2842 | ||
2843 | return 0; | |
2844 | } | |
2845 | ||
2846 | static int | |
2847 | hppa_in_dyncall (CORE_ADDR pc) | |
2848 | { | |
2849 | struct unwind_table_entry *u; | |
2850 | ||
2851 | u = find_unwind_entry (hppa_symbol_address ("$$dyncall")); | |
2852 | if (!u) | |
2853 | return 0; | |
2854 | ||
2855 | return (pc >= u->region_start && pc <= u->region_end); | |
2856 | } | |
2857 | ||
2858 | int | |
3e5d3a5a | 2859 | hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc) |
34f55018 MK |
2860 | { |
2861 | unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN]; | |
2862 | struct unwind_table_entry *u; | |
2863 | ||
3e5d3a5a | 2864 | if (in_plt_section (pc) || hppa_in_dyncall (pc)) |
34f55018 MK |
2865 | return 1; |
2866 | ||
2867 | /* The GNU toolchain produces linker stubs without unwind | |
2868 | information. Since the pattern matching for linker stubs can be | |
2869 | quite slow, so bail out if we do have an unwind entry. */ | |
2870 | ||
2871 | u = find_unwind_entry (pc); | |
806e23c0 | 2872 | if (u != NULL) |
34f55018 MK |
2873 | return 0; |
2874 | ||
e17a4113 UW |
2875 | return |
2876 | (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn) | |
2877 | || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn) | |
2878 | || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn) | |
2879 | || hppa_match_insns_relaxed (gdbarch, pc, | |
2880 | hppa_long_branch_pic_stub, insn)); | |
34f55018 MK |
2881 | } |
2882 | ||
2883 | /* This code skips several kind of "trampolines" used on PA-RISC | |
2884 | systems: $$dyncall, import stubs and PLT stubs. */ | |
2885 | ||
2886 | CORE_ADDR | |
8480a37e | 2887 | hppa_skip_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc) |
34f55018 | 2888 | { |
0dfff4cb UW |
2889 | struct gdbarch *gdbarch = get_frame_arch (frame); |
2890 | struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr; | |
2891 | ||
34f55018 MK |
2892 | unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN]; |
2893 | int dp_rel; | |
2894 | ||
2895 | /* $$dyncall handles both PLABELs and direct addresses. */ | |
2896 | if (hppa_in_dyncall (pc)) | |
2897 | { | |
52f729a7 | 2898 | pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22); |
34f55018 MK |
2899 | |
2900 | /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */ | |
2901 | if (pc & 0x2) | |
0dfff4cb | 2902 | pc = read_memory_typed_address (pc & ~0x3, func_ptr_type); |
34f55018 MK |
2903 | |
2904 | return pc; | |
2905 | } | |
2906 | ||
e17a4113 UW |
2907 | dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn); |
2908 | if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn)) | |
34f55018 MK |
2909 | { |
2910 | /* Extract the target address from the addil/ldw sequence. */ | |
2911 | pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]); | |
2912 | ||
2913 | if (dp_rel) | |
dda83cd7 | 2914 | pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM); |
34f55018 | 2915 | else |
dda83cd7 | 2916 | pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19); |
34f55018 MK |
2917 | |
2918 | /* fallthrough */ | |
2919 | } | |
2920 | ||
3e5d3a5a | 2921 | if (in_plt_section (pc)) |
34f55018 | 2922 | { |
0dfff4cb | 2923 | pc = read_memory_typed_address (pc, func_ptr_type); |
34f55018 MK |
2924 | |
2925 | /* If the PLT slot has not yet been resolved, the target will be | |
dda83cd7 | 2926 | the PLT stub. */ |
3e5d3a5a | 2927 | if (in_plt_section (pc)) |
34f55018 MK |
2928 | { |
2929 | /* Sanity check: are we pointing to the PLT stub? */ | |
24b21115 | 2930 | if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn)) |
34f55018 | 2931 | { |
5af949e3 UW |
2932 | warning (_("Cannot resolve PLT stub at %s."), |
2933 | paddress (gdbarch, pc)); | |
34f55018 MK |
2934 | return 0; |
2935 | } | |
2936 | ||
2937 | /* This should point to the fixup routine. */ | |
0dfff4cb | 2938 | pc = read_memory_typed_address (pc + 8, func_ptr_type); |
34f55018 MK |
2939 | } |
2940 | } | |
2941 | ||
2942 | return pc; | |
2943 | } | |
2944 | \f | |
2945 | ||
8e8b2dba MC |
2946 | /* Here is a table of C type sizes on hppa with various compiles |
2947 | and options. I measured this on PA 9000/800 with HP-UX 11.11 | |
2948 | and these compilers: | |
2949 | ||
2950 | /usr/ccs/bin/cc HP92453-01 A.11.01.21 | |
2951 | /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP | |
2952 | /opt/aCC/bin/aCC B3910B A.03.45 | |
2953 | gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11 | |
2954 | ||
2955 | cc : 1 2 4 4 8 : 4 8 -- : 4 4 | |
2956 | ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4 | |
2957 | ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4 | |
2958 | ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8 | |
2959 | acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4 | |
2960 | acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4 | |
2961 | acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8 | |
2962 | gcc : 1 2 4 4 8 : 4 8 16 : 4 4 | |
2963 | ||
2964 | Each line is: | |
2965 | ||
2966 | compiler and options | |
2967 | char, short, int, long, long long | |
2968 | float, double, long double | |
2969 | char *, void (*)() | |
2970 | ||
2971 | So all these compilers use either ILP32 or LP64 model. | |
2972 | TODO: gcc has more options so it needs more investigation. | |
2973 | ||
a2379359 MC |
2974 | For floating point types, see: |
2975 | ||
2976 | http://docs.hp.com/hpux/pdf/B3906-90006.pdf | |
2977 | HP-UX floating-point guide, hpux 11.00 | |
2978 | ||
8e8b2dba MC |
2979 | -- chastain 2003-12-18 */ |
2980 | ||
e6e68f1f JB |
2981 | static struct gdbarch * |
2982 | hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
2983 | { | |
e6e68f1f JB |
2984 | /* find a candidate among the list of pre-declared architectures. */ |
2985 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
2986 | if (arches != NULL) | |
2987 | return (arches->gdbarch); | |
2988 | ||
2989 | /* If none found, then allocate and initialize one. */ | |
2b16913c SM |
2990 | gdbarch *gdbarch |
2991 | = gdbarch_alloc (&info, gdbarch_tdep_up (new hppa_gdbarch_tdep)); | |
2992 | hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch); | |
3ff7cf9e JB |
2993 | |
2994 | /* Determine from the bfd_arch_info structure if we are dealing with | |
2995 | a 32 or 64 bits architecture. If the bfd_arch_info is not available, | |
2996 | then default to a 32bit machine. */ | |
2997 | if (info.bfd_arch_info != NULL) | |
2998 | tdep->bytes_per_address = | |
2999 | info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte; | |
3000 | else | |
3001 | tdep->bytes_per_address = 4; | |
3002 | ||
d49771ef RC |
3003 | tdep->find_global_pointer = hppa_find_global_pointer; |
3004 | ||
3ff7cf9e JB |
3005 | /* Some parts of the gdbarch vector depend on whether we are running |
3006 | on a 32 bits or 64 bits target. */ | |
3007 | switch (tdep->bytes_per_address) | |
3008 | { | |
3009 | case 4: | |
dda83cd7 SM |
3010 | set_gdbarch_num_regs (gdbarch, hppa32_num_regs); |
3011 | set_gdbarch_register_name (gdbarch, hppa32_register_name); | |
3012 | set_gdbarch_register_type (gdbarch, hppa32_register_type); | |
38ca4e0c MK |
3013 | set_gdbarch_cannot_store_register (gdbarch, |
3014 | hppa32_cannot_store_register); | |
3015 | set_gdbarch_cannot_fetch_register (gdbarch, | |
d037d088 | 3016 | hppa32_cannot_fetch_register); |
dda83cd7 | 3017 | break; |
3ff7cf9e | 3018 | case 8: |
dda83cd7 SM |
3019 | set_gdbarch_num_regs (gdbarch, hppa64_num_regs); |
3020 | set_gdbarch_register_name (gdbarch, hppa64_register_name); | |
3021 | set_gdbarch_register_type (gdbarch, hppa64_register_type); | |
3022 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum); | |
38ca4e0c MK |
3023 | set_gdbarch_cannot_store_register (gdbarch, |
3024 | hppa64_cannot_store_register); | |
3025 | set_gdbarch_cannot_fetch_register (gdbarch, | |
d037d088 | 3026 | hppa64_cannot_fetch_register); |
dda83cd7 | 3027 | break; |
3ff7cf9e | 3028 | default: |
f34652de | 3029 | internal_error (_("Unsupported address size: %d"), |
dda83cd7 | 3030 | tdep->bytes_per_address); |
3ff7cf9e JB |
3031 | } |
3032 | ||
3ff7cf9e | 3033 | set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT); |
3ff7cf9e | 3034 | set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT); |
e6e68f1f | 3035 | |
8e8b2dba MC |
3036 | /* The following gdbarch vector elements are the same in both ILP32 |
3037 | and LP64, but might show differences some day. */ | |
3038 | set_gdbarch_long_long_bit (gdbarch, 64); | |
3039 | set_gdbarch_long_double_bit (gdbarch, 128); | |
552f1157 | 3040 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad); |
8e8b2dba | 3041 | |
3ff7cf9e JB |
3042 | /* The following gdbarch vector elements do not depend on the address |
3043 | size, or in any other gdbarch element previously set. */ | |
60383d10 | 3044 | set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue); |
c9cf6e20 MG |
3045 | set_gdbarch_stack_frame_destroyed_p (gdbarch, |
3046 | hppa_stack_frame_destroyed_p); | |
a2a84a72 | 3047 | set_gdbarch_inner_than (gdbarch, core_addr_greaterthan); |
eded0a31 AC |
3048 | set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM); |
3049 | set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM); | |
85ddcc70 | 3050 | set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove); |
60383d10 | 3051 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
cc72850f MK |
3052 | set_gdbarch_read_pc (gdbarch, hppa_read_pc); |
3053 | set_gdbarch_write_pc (gdbarch, hppa_write_pc); | |
60383d10 | 3054 | |
143985b7 AF |
3055 | /* Helper for function argument information. */ |
3056 | set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument); | |
3057 | ||
3a3bc038 AC |
3058 | /* When a hardware watchpoint triggers, we'll move the inferior past |
3059 | it by removing all eventpoints; stepping past the instruction | |
3060 | that caused the trigger; reinserting eventpoints; and checking | |
3061 | whether any watched location changed. */ | |
3062 | set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1); | |
3063 | ||
5979bc46 | 3064 | /* Inferior function call methods. */ |
fca7aa43 | 3065 | switch (tdep->bytes_per_address) |
5979bc46 | 3066 | { |
fca7aa43 AC |
3067 | case 4: |
3068 | set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call); | |
3069 | set_gdbarch_frame_align (gdbarch, hppa32_frame_align); | |
d49771ef | 3070 | set_gdbarch_convert_from_func_ptr_addr |
dda83cd7 | 3071 | (gdbarch, hppa32_convert_from_func_ptr_addr); |
fca7aa43 AC |
3072 | break; |
3073 | case 8: | |
782eae8b AC |
3074 | set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call); |
3075 | set_gdbarch_frame_align (gdbarch, hppa64_frame_align); | |
fca7aa43 | 3076 | break; |
782eae8b | 3077 | default: |
f34652de | 3078 | internal_error (_("bad switch")); |
fad850b2 AC |
3079 | } |
3080 | ||
3081 | /* Struct return methods. */ | |
fca7aa43 | 3082 | switch (tdep->bytes_per_address) |
fad850b2 | 3083 | { |
fca7aa43 AC |
3084 | case 4: |
3085 | set_gdbarch_return_value (gdbarch, hppa32_return_value); | |
3086 | break; | |
3087 | case 8: | |
782eae8b | 3088 | set_gdbarch_return_value (gdbarch, hppa64_return_value); |
f5f907e2 | 3089 | break; |
fca7aa43 | 3090 | default: |
f34652de | 3091 | internal_error (_("bad switch")); |
e963316f | 3092 | } |
7f07c5b6 | 3093 | |
04180708 YQ |
3094 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc); |
3095 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind); | |
7f07c5b6 | 3096 | set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read); |
85f4f2d8 | 3097 | |
5979bc46 | 3098 | /* Frame unwind methods. */ |
782eae8b | 3099 | set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc); |
7f07c5b6 | 3100 | |
50306a9d RC |
3101 | /* Hook in ABI-specific overrides, if they have been registered. */ |
3102 | gdbarch_init_osabi (info, gdbarch); | |
3103 | ||
7f07c5b6 | 3104 | /* Hook in the default unwinders. */ |
227e86ad JB |
3105 | frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind); |
3106 | frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind); | |
3107 | frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind); | |
5979bc46 | 3108 | |
e6e68f1f JB |
3109 | return gdbarch; |
3110 | } | |
3111 | ||
3112 | static void | |
464963c9 | 3113 | hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
e6e68f1f | 3114 | { |
08106042 | 3115 | hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch); |
fdd72f95 | 3116 | |
6cb06a8c TT |
3117 | gdb_printf (file, "bytes_per_address = %d\n", |
3118 | tdep->bytes_per_address); | |
3119 | gdb_printf (file, "elf = %s\n", tdep->is_elf ? "yes" : "no"); | |
e6e68f1f JB |
3120 | } |
3121 | ||
6c265988 | 3122 | void _initialize_hppa_tdep (); |
4facf7e8 | 3123 | void |
6c265988 | 3124 | _initialize_hppa_tdep () |
4facf7e8 | 3125 | { |
e6e68f1f | 3126 | gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep); |
4facf7e8 JB |
3127 | |
3128 | add_cmd ("unwind", class_maintenance, unwind_command, | |
1a966eab | 3129 | _("Print unwind table entry at given address."), |
4facf7e8 JB |
3130 | &maintenanceprintlist); |
3131 | ||
1777feb0 | 3132 | /* Debug this files internals. */ |
7915a72c AC |
3133 | add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\ |
3134 | Set whether hppa target specific debugging information should be displayed."), | |
3135 | _("\ | |
3136 | Show whether hppa target specific debugging information is displayed."), _("\ | |
4a302917 RC |
3137 | This flag controls whether hppa target specific debugging information is\n\ |
3138 | displayed. This information is particularly useful for debugging frame\n\ | |
7915a72c | 3139 | unwinding problems."), |
2c5b56ce | 3140 | NULL, |
7915a72c | 3141 | NULL, /* FIXME: i18n: hppa debug flag is %s. */ |
2c5b56ce | 3142 | &setdebuglist, &showdebuglist); |
4facf7e8 | 3143 | } |