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[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2020 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 FALSE, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 FALSE), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 TRUE, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 FALSE, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 TRUE, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
143 32, /* bitsize */
144 TRUE, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 FALSE, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 FALSE, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 FALSE, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 FALSE, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 FALSE, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 24, /* bitsize */
231 TRUE, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 TRUE, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
258 32, /* bitsize */
259 FALSE, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
273 FALSE, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 FALSE, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
301 24, /* bitsize */
302 TRUE, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
316 24, /* bitsize */
317 TRUE, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 FALSE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 FALSE, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 FALSE, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 FALSE, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 FALSE, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 FALSE, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 FALSE, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 FALSE, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 TRUE, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 FALSE, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
474 24, /* bitsize */
475 TRUE, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 TRUE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 TRUE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 TRUE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
531 FALSE, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 TRUE, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 TRUE, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 TRUE, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 FALSE, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 FALSE, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 FALSE, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 FALSE, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 FALSE, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 FALSE, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 TRUE, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 FALSE, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 FALSE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 TRUE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 TRUE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 TRUE, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 TRUE, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 TRUE, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 TRUE, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 TRUE, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 TRUE, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 FALSE, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 TRUE, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 TRUE, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 TRUE, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 TRUE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 TRUE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 TRUE, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 TRUE, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 TRUE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 TRUE, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 TRUE, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 TRUE, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 TRUE, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 TRUE, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 TRUE, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 TRUE, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 TRUE, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 TRUE, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 TRUE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 TRUE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 TRUE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 TRUE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 TRUE, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 TRUE, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 TRUE, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 TRUE, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 TRUE, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 TRUE, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 FALSE, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 FALSE, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 FALSE, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 FALSE, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 FALSE, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_bitfield,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 TRUE, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 FALSE, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 FALSE, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 0, /* bitsize */
1493 FALSE, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 FALSE), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 FALSE), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 TRUE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 TRUE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 FALSE, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 FALSE, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 FALSE, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 32, /* bitsize */
1607 FALSE, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 FALSE, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 FALSE, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 12, /* bitsize */
1649 FALSE, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 FALSE, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_bitfield,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 16, /* bitsize. */
1699 FALSE, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 FALSE, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 FALSE), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 16, /* bitsize. */
1712 FALSE, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 FALSE, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 FALSE), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 16, /* bitsize. */
1725 FALSE, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 FALSE, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 FALSE), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 16, /* bitsize. */
1738 FALSE, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 FALSE, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 FALSE), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1751 16, /* bitsize. */
1752 TRUE, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 FALSE, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 TRUE), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 12, /* bitsize. */
1765 TRUE, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 FALSE, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 TRUE), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1777 18, /* bitsize. */
1778 TRUE, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 FALSE, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 TRUE), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 32, /* bitsize */
1796 FALSE, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 TRUE, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 FALSE), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 32, /* bitsize */
1809 FALSE, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 FALSE, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 FALSE), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 32, /* bitsize */
1822 FALSE, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 FALSE, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 FALSE), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 32, /* bitsize */
1835 FALSE, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 FALSE, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 FALSE), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 64, /* bitsize */
1848 FALSE, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 FALSE, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 FALSE), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 32, /* bitsize */
1861 FALSE, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 FALSE, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 FALSE), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 32, /* bitsize */
1874 FALSE, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 FALSE, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 FALSE), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
1887 FALSE, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 FALSE, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 FALSE), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 FALSE, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 FALSE, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 FALSE), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1918 0, /* bitsize */
1919 FALSE, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 FALSE, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 FALSE), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1932 0, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 FALSE, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1946 0, /* bitsize */
1947 FALSE, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 FALSE, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 FALSE) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bfd_boolean
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return FALSE;
1989 }
1990 return TRUE;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bfd_boolean
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return FALSE;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bfd_boolean
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return FALSE;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return TRUE;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The entries in a PLT when using a DLL-based target with multiple
2501 address spaces. */
2502 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2503 {
2504 0xe51ff004, /* ldr pc, [pc, #-4] */
2505 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2506 };
2507
2508 /* The first entry in a procedure linkage table looks like
2509 this. It is set up so that any shared library function that is
2510 called before the relocation has been set up calls the dynamic
2511 linker first. */
2512 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2513 {
2514 /* First bundle: */
2515 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2516 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2517 0xe08cc00f, /* add ip, ip, pc */
2518 0xe52dc008, /* str ip, [sp, #-8]! */
2519 /* Second bundle: */
2520 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2521 0xe59cc000, /* ldr ip, [ip] */
2522 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2523 0xe12fff1c, /* bx ip */
2524 /* Third bundle: */
2525 0xe320f000, /* nop */
2526 0xe320f000, /* nop */
2527 0xe320f000, /* nop */
2528 /* .Lplt_tail: */
2529 0xe50dc004, /* str ip, [sp, #-4] */
2530 /* Fourth bundle: */
2531 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2532 0xe59cc000, /* ldr ip, [ip] */
2533 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2534 0xe12fff1c, /* bx ip */
2535 };
2536 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2537
2538 /* Subsequent entries in a procedure linkage table look like this. */
2539 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2540 {
2541 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2542 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2543 0xe08cc00f, /* add ip, ip, pc */
2544 0xea000000, /* b .Lplt_tail */
2545 };
2546
2547 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2548 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2549 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2550 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2551 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2552 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2553 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2554 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2555
2556 enum stub_insn_type
2557 {
2558 THUMB16_TYPE = 1,
2559 THUMB32_TYPE,
2560 ARM_TYPE,
2561 DATA_TYPE
2562 };
2563
2564 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2565 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2566 is inserted in arm_build_one_stub(). */
2567 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2568 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2569 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2570 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2571 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2572 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2573 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2574 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2575
2576 typedef struct
2577 {
2578 bfd_vma data;
2579 enum stub_insn_type type;
2580 unsigned int r_type;
2581 int reloc_addend;
2582 } insn_sequence;
2583
2584 /* See note [Thumb nop sequence] when adding a veneer. */
2585
2586 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2587 to reach the stub if necessary. */
2588 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2589 {
2590 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2591 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2592 };
2593
2594 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2595 available. */
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2597 {
2598 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2599 ARM_INSN (0xe12fff1c), /* bx ip */
2600 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2601 };
2602
2603 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2604 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2605 {
2606 THUMB16_INSN (0xb401), /* push {r0} */
2607 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2608 THUMB16_INSN (0x4684), /* mov ip, r0 */
2609 THUMB16_INSN (0xbc01), /* pop {r0} */
2610 THUMB16_INSN (0x4760), /* bx ip */
2611 THUMB16_INSN (0xbf00), /* nop */
2612 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2613 };
2614
2615 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2617 {
2618 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2619 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2620 };
2621
2622 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2623 M-profile architectures. */
2624 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2625 {
2626 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2627 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2628 THUMB16_INSN (0x4760), /* bx ip */
2629 };
2630
2631 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2632 allowed. */
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2634 {
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0xe7fd), /* b .-2 */
2637 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2638 ARM_INSN (0xe12fff1c), /* bx ip */
2639 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2640 };
2641
2642 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2643 available. */
2644 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2645 {
2646 THUMB16_INSN (0x4778), /* bx pc */
2647 THUMB16_INSN (0xe7fd), /* b .-2 */
2648 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2649 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2650 };
2651
2652 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2653 one, when the destination is close enough. */
2654 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2655 {
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0xe7fd), /* b .-2 */
2658 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2659 };
2660
2661 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2662 blx to reach the stub if necessary. */
2663 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2664 {
2665 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2666 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2667 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2668 };
2669
2670 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2671 blx to reach the stub if necessary. We can not add into pc;
2672 it is not guaranteed to mode switch (different in ARMv6 and
2673 ARMv7). */
2674 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2675 {
2676 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2677 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2678 ARM_INSN (0xe12fff1c), /* bx ip */
2679 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2680 };
2681
2682 /* V4T ARM -> ARM long branch stub, PIC. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2684 {
2685 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2686 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2687 ARM_INSN (0xe12fff1c), /* bx ip */
2688 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2689 };
2690
2691 /* V4T Thumb -> ARM long branch stub, PIC. */
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2693 {
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0xe7fd), /* b .-2 */
2696 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2697 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2698 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2699 };
2700
2701 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2702 architectures. */
2703 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2704 {
2705 THUMB16_INSN (0xb401), /* push {r0} */
2706 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2707 THUMB16_INSN (0x46fc), /* mov ip, pc */
2708 THUMB16_INSN (0x4484), /* add ip, r0 */
2709 THUMB16_INSN (0xbc01), /* pop {r0} */
2710 THUMB16_INSN (0x4760), /* bx ip */
2711 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2712 };
2713
2714 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2715 allowed. */
2716 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2717 {
2718 THUMB16_INSN (0x4778), /* bx pc */
2719 THUMB16_INSN (0xe7fd), /* b .-2 */
2720 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2721 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2722 ARM_INSN (0xe12fff1c), /* bx ip */
2723 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2724 };
2725
2726 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2727 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2728 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2729 {
2730 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2731 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2732 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2733 };
2734
2735 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2736 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2737 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2738 {
2739 THUMB16_INSN (0x4778), /* bx pc */
2740 THUMB16_INSN (0xe7fd), /* b .-2 */
2741 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2742 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2743 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2744 };
2745
2746 /* NaCl ARM -> ARM long branch stub. */
2747 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2748 {
2749 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2750 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2751 ARM_INSN (0xe12fff1c), /* bx ip */
2752 ARM_INSN (0xe320f000), /* nop */
2753 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2754 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2755 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2756 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2757 };
2758
2759 /* NaCl ARM -> ARM long branch stub, PIC. */
2760 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2761 {
2762 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2763 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2764 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2765 ARM_INSN (0xe12fff1c), /* bx ip */
2766 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2767 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2768 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2769 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2770 };
2771
2772 /* Stub used for transition to secure state (aka SG veneer). */
2773 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2774 {
2775 THUMB32_INSN (0xe97fe97f), /* sg. */
2776 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2777 };
2778
2779
2780 /* Cortex-A8 erratum-workaround stubs. */
2781
2782 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2783 can't use a conditional branch to reach this stub). */
2784
2785 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2786 {
2787 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2788 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2789 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2790 };
2791
2792 /* Stub used for b.w and bl.w instructions. */
2793
2794 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2795 {
2796 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2797 };
2798
2799 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2800 {
2801 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2802 };
2803
2804 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2805 instruction (which switches to ARM mode) to point to this stub. Jump to the
2806 real destination using an ARM-mode branch. */
2807
2808 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2809 {
2810 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2811 };
2812
2813 /* For each section group there can be a specially created linker section
2814 to hold the stubs for that group. The name of the stub section is based
2815 upon the name of another section within that group with the suffix below
2816 applied.
2817
2818 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2819 create what appeared to be a linker stub section when it actually
2820 contained user code/data. For example, consider this fragment:
2821
2822 const char * stubborn_problems[] = { "np" };
2823
2824 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2825 section called:
2826
2827 .data.rel.local.stubborn_problems
2828
2829 This then causes problems in arm32_arm_build_stubs() as it triggers:
2830
2831 // Ignore non-stub sections.
2832 if (!strstr (stub_sec->name, STUB_SUFFIX))
2833 continue;
2834
2835 And so the section would be ignored instead of being processed. Hence
2836 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2837 C identifier. */
2838 #define STUB_SUFFIX ".__stub"
2839
2840 /* One entry per long/short branch stub defined above. */
2841 #define DEF_STUBS \
2842 DEF_STUB(long_branch_any_any) \
2843 DEF_STUB(long_branch_v4t_arm_thumb) \
2844 DEF_STUB(long_branch_thumb_only) \
2845 DEF_STUB(long_branch_v4t_thumb_thumb) \
2846 DEF_STUB(long_branch_v4t_thumb_arm) \
2847 DEF_STUB(short_branch_v4t_thumb_arm) \
2848 DEF_STUB(long_branch_any_arm_pic) \
2849 DEF_STUB(long_branch_any_thumb_pic) \
2850 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2851 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2852 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2853 DEF_STUB(long_branch_thumb_only_pic) \
2854 DEF_STUB(long_branch_any_tls_pic) \
2855 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2856 DEF_STUB(long_branch_arm_nacl) \
2857 DEF_STUB(long_branch_arm_nacl_pic) \
2858 DEF_STUB(cmse_branch_thumb_only) \
2859 DEF_STUB(a8_veneer_b_cond) \
2860 DEF_STUB(a8_veneer_b) \
2861 DEF_STUB(a8_veneer_bl) \
2862 DEF_STUB(a8_veneer_blx) \
2863 DEF_STUB(long_branch_thumb2_only) \
2864 DEF_STUB(long_branch_thumb2_only_pure)
2865
2866 #define DEF_STUB(x) arm_stub_##x,
2867 enum elf32_arm_stub_type
2868 {
2869 arm_stub_none,
2870 DEF_STUBS
2871 max_stub_type
2872 };
2873 #undef DEF_STUB
2874
2875 /* Note the first a8_veneer type. */
2876 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2877
2878 typedef struct
2879 {
2880 const insn_sequence* template_sequence;
2881 int template_size;
2882 } stub_def;
2883
2884 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2885 static const stub_def stub_definitions[] =
2886 {
2887 {NULL, 0},
2888 DEF_STUBS
2889 };
2890
2891 struct elf32_arm_stub_hash_entry
2892 {
2893 /* Base hash table entry structure. */
2894 struct bfd_hash_entry root;
2895
2896 /* The stub section. */
2897 asection *stub_sec;
2898
2899 /* Offset within stub_sec of the beginning of this stub. */
2900 bfd_vma stub_offset;
2901
2902 /* Given the symbol's value and its section we can determine its final
2903 value when building the stubs (so the stub knows where to jump). */
2904 bfd_vma target_value;
2905 asection *target_section;
2906
2907 /* Same as above but for the source of the branch to the stub. Used for
2908 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2909 such, source section does not need to be recorded since Cortex-A8 erratum
2910 workaround stubs are only generated when both source and target are in the
2911 same section. */
2912 bfd_vma source_value;
2913
2914 /* The instruction which caused this stub to be generated (only valid for
2915 Cortex-A8 erratum workaround stubs at present). */
2916 unsigned long orig_insn;
2917
2918 /* The stub type. */
2919 enum elf32_arm_stub_type stub_type;
2920 /* Its encoding size in bytes. */
2921 int stub_size;
2922 /* Its template. */
2923 const insn_sequence *stub_template;
2924 /* The size of the template (number of entries). */
2925 int stub_template_size;
2926
2927 /* The symbol table entry, if any, that this was derived from. */
2928 struct elf32_arm_link_hash_entry *h;
2929
2930 /* Type of branch. */
2931 enum arm_st_branch_type branch_type;
2932
2933 /* Where this stub is being called from, or, in the case of combined
2934 stub sections, the first input section in the group. */
2935 asection *id_sec;
2936
2937 /* The name for the local symbol at the start of this stub. The
2938 stub name in the hash table has to be unique; this does not, so
2939 it can be friendlier. */
2940 char *output_name;
2941 };
2942
2943 /* Used to build a map of a section. This is required for mixed-endian
2944 code/data. */
2945
2946 typedef struct elf32_elf_section_map
2947 {
2948 bfd_vma vma;
2949 char type;
2950 }
2951 elf32_arm_section_map;
2952
2953 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2954
2955 typedef enum
2956 {
2957 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2958 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2959 VFP11_ERRATUM_ARM_VENEER,
2960 VFP11_ERRATUM_THUMB_VENEER
2961 }
2962 elf32_vfp11_erratum_type;
2963
2964 typedef struct elf32_vfp11_erratum_list
2965 {
2966 struct elf32_vfp11_erratum_list *next;
2967 bfd_vma vma;
2968 union
2969 {
2970 struct
2971 {
2972 struct elf32_vfp11_erratum_list *veneer;
2973 unsigned int vfp_insn;
2974 } b;
2975 struct
2976 {
2977 struct elf32_vfp11_erratum_list *branch;
2978 unsigned int id;
2979 } v;
2980 } u;
2981 elf32_vfp11_erratum_type type;
2982 }
2983 elf32_vfp11_erratum_list;
2984
2985 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2986 veneer. */
2987 typedef enum
2988 {
2989 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2990 STM32L4XX_ERRATUM_VENEER
2991 }
2992 elf32_stm32l4xx_erratum_type;
2993
2994 typedef struct elf32_stm32l4xx_erratum_list
2995 {
2996 struct elf32_stm32l4xx_erratum_list *next;
2997 bfd_vma vma;
2998 union
2999 {
3000 struct
3001 {
3002 struct elf32_stm32l4xx_erratum_list *veneer;
3003 unsigned int insn;
3004 } b;
3005 struct
3006 {
3007 struct elf32_stm32l4xx_erratum_list *branch;
3008 unsigned int id;
3009 } v;
3010 } u;
3011 elf32_stm32l4xx_erratum_type type;
3012 }
3013 elf32_stm32l4xx_erratum_list;
3014
3015 typedef enum
3016 {
3017 DELETE_EXIDX_ENTRY,
3018 INSERT_EXIDX_CANTUNWIND_AT_END
3019 }
3020 arm_unwind_edit_type;
3021
3022 /* A (sorted) list of edits to apply to an unwind table. */
3023 typedef struct arm_unwind_table_edit
3024 {
3025 arm_unwind_edit_type type;
3026 /* Note: we sometimes want to insert an unwind entry corresponding to a
3027 section different from the one we're currently writing out, so record the
3028 (text) section this edit relates to here. */
3029 asection *linked_section;
3030 unsigned int index;
3031 struct arm_unwind_table_edit *next;
3032 }
3033 arm_unwind_table_edit;
3034
3035 typedef struct _arm_elf_section_data
3036 {
3037 /* Information about mapping symbols. */
3038 struct bfd_elf_section_data elf;
3039 unsigned int mapcount;
3040 unsigned int mapsize;
3041 elf32_arm_section_map *map;
3042 /* Information about CPU errata. */
3043 unsigned int erratumcount;
3044 elf32_vfp11_erratum_list *erratumlist;
3045 unsigned int stm32l4xx_erratumcount;
3046 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3047 unsigned int additional_reloc_count;
3048 /* Information about unwind tables. */
3049 union
3050 {
3051 /* Unwind info attached to a text section. */
3052 struct
3053 {
3054 asection *arm_exidx_sec;
3055 } text;
3056
3057 /* Unwind info attached to an .ARM.exidx section. */
3058 struct
3059 {
3060 arm_unwind_table_edit *unwind_edit_list;
3061 arm_unwind_table_edit *unwind_edit_tail;
3062 } exidx;
3063 } u;
3064 }
3065 _arm_elf_section_data;
3066
3067 #define elf32_arm_section_data(sec) \
3068 ((_arm_elf_section_data *) elf_section_data (sec))
3069
3070 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3071 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3072 so may be created multiple times: we use an array of these entries whilst
3073 relaxing which we can refresh easily, then create stubs for each potentially
3074 erratum-triggering instruction once we've settled on a solution. */
3075
3076 struct a8_erratum_fix
3077 {
3078 bfd *input_bfd;
3079 asection *section;
3080 bfd_vma offset;
3081 bfd_vma target_offset;
3082 unsigned long orig_insn;
3083 char *stub_name;
3084 enum elf32_arm_stub_type stub_type;
3085 enum arm_st_branch_type branch_type;
3086 };
3087
3088 /* A table of relocs applied to branches which might trigger Cortex-A8
3089 erratum. */
3090
3091 struct a8_erratum_reloc
3092 {
3093 bfd_vma from;
3094 bfd_vma destination;
3095 struct elf32_arm_link_hash_entry *hash;
3096 const char *sym_name;
3097 unsigned int r_type;
3098 enum arm_st_branch_type branch_type;
3099 bfd_boolean non_a8_stub;
3100 };
3101
3102 /* The size of the thread control block. */
3103 #define TCB_SIZE 8
3104
3105 /* ARM-specific information about a PLT entry, over and above the usual
3106 gotplt_union. */
3107 struct arm_plt_info
3108 {
3109 /* We reference count Thumb references to a PLT entry separately,
3110 so that we can emit the Thumb trampoline only if needed. */
3111 bfd_signed_vma thumb_refcount;
3112
3113 /* Some references from Thumb code may be eliminated by BL->BLX
3114 conversion, so record them separately. */
3115 bfd_signed_vma maybe_thumb_refcount;
3116
3117 /* How many of the recorded PLT accesses were from non-call relocations.
3118 This information is useful when deciding whether anything takes the
3119 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3120 non-call references to the function should resolve directly to the
3121 real runtime target. */
3122 unsigned int noncall_refcount;
3123
3124 /* Since PLT entries have variable size if the Thumb prologue is
3125 used, we need to record the index into .got.plt instead of
3126 recomputing it from the PLT offset. */
3127 bfd_signed_vma got_offset;
3128 };
3129
3130 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3131 struct arm_local_iplt_info
3132 {
3133 /* The information that is usually found in the generic ELF part of
3134 the hash table entry. */
3135 union gotplt_union root;
3136
3137 /* The information that is usually found in the ARM-specific part of
3138 the hash table entry. */
3139 struct arm_plt_info arm;
3140
3141 /* A list of all potential dynamic relocations against this symbol. */
3142 struct elf_dyn_relocs *dyn_relocs;
3143 };
3144
3145 /* Structure to handle FDPIC support for local functions. */
3146 struct fdpic_local {
3147 unsigned int funcdesc_cnt;
3148 unsigned int gotofffuncdesc_cnt;
3149 int funcdesc_offset;
3150 };
3151
3152 struct elf_arm_obj_tdata
3153 {
3154 struct elf_obj_tdata root;
3155
3156 /* tls_type for each local got entry. */
3157 char *local_got_tls_type;
3158
3159 /* GOTPLT entries for TLS descriptors. */
3160 bfd_vma *local_tlsdesc_gotent;
3161
3162 /* Information for local symbols that need entries in .iplt. */
3163 struct arm_local_iplt_info **local_iplt;
3164
3165 /* Zero to warn when linking objects with incompatible enum sizes. */
3166 int no_enum_size_warning;
3167
3168 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3169 int no_wchar_size_warning;
3170
3171 /* Maintains FDPIC counters and funcdesc info. */
3172 struct fdpic_local *local_fdpic_cnts;
3173 };
3174
3175 #define elf_arm_tdata(bfd) \
3176 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3177
3178 #define elf32_arm_local_got_tls_type(bfd) \
3179 (elf_arm_tdata (bfd)->local_got_tls_type)
3180
3181 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3182 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3183
3184 #define elf32_arm_local_iplt(bfd) \
3185 (elf_arm_tdata (bfd)->local_iplt)
3186
3187 #define elf32_arm_local_fdpic_cnts(bfd) \
3188 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3189
3190 #define is_arm_elf(bfd) \
3191 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3192 && elf_tdata (bfd) != NULL \
3193 && elf_object_id (bfd) == ARM_ELF_DATA)
3194
3195 static bfd_boolean
3196 elf32_arm_mkobject (bfd *abfd)
3197 {
3198 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3199 ARM_ELF_DATA);
3200 }
3201
3202 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3203
3204 /* Structure to handle FDPIC support for extern functions. */
3205 struct fdpic_global {
3206 unsigned int gotofffuncdesc_cnt;
3207 unsigned int gotfuncdesc_cnt;
3208 unsigned int funcdesc_cnt;
3209 int funcdesc_offset;
3210 int gotfuncdesc_offset;
3211 };
3212
3213 /* Arm ELF linker hash entry. */
3214 struct elf32_arm_link_hash_entry
3215 {
3216 struct elf_link_hash_entry root;
3217
3218 /* Track dynamic relocs copied for this symbol. */
3219 struct elf_dyn_relocs *dyn_relocs;
3220
3221 /* ARM-specific PLT information. */
3222 struct arm_plt_info plt;
3223
3224 #define GOT_UNKNOWN 0
3225 #define GOT_NORMAL 1
3226 #define GOT_TLS_GD 2
3227 #define GOT_TLS_IE 4
3228 #define GOT_TLS_GDESC 8
3229 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3230 unsigned int tls_type : 8;
3231
3232 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3233 unsigned int is_iplt : 1;
3234
3235 unsigned int unused : 23;
3236
3237 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3238 starting at the end of the jump table. */
3239 bfd_vma tlsdesc_got;
3240
3241 /* The symbol marking the real symbol location for exported thumb
3242 symbols with Arm stubs. */
3243 struct elf_link_hash_entry *export_glue;
3244
3245 /* A pointer to the most recently used stub hash entry against this
3246 symbol. */
3247 struct elf32_arm_stub_hash_entry *stub_cache;
3248
3249 /* Counter for FDPIC relocations against this symbol. */
3250 struct fdpic_global fdpic_cnts;
3251 };
3252
3253 /* Traverse an arm ELF linker hash table. */
3254 #define elf32_arm_link_hash_traverse(table, func, info) \
3255 (elf_link_hash_traverse \
3256 (&(table)->root, \
3257 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3258 (info)))
3259
3260 /* Get the ARM elf linker hash table from a link_info structure. */
3261 #define elf32_arm_hash_table(info) \
3262 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3263 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3264
3265 #define arm_stub_hash_lookup(table, string, create, copy) \
3266 ((struct elf32_arm_stub_hash_entry *) \
3267 bfd_hash_lookup ((table), (string), (create), (copy)))
3268
3269 /* Array to keep track of which stub sections have been created, and
3270 information on stub grouping. */
3271 struct map_stub
3272 {
3273 /* This is the section to which stubs in the group will be
3274 attached. */
3275 asection *link_sec;
3276 /* The stub section. */
3277 asection *stub_sec;
3278 };
3279
3280 #define elf32_arm_compute_jump_table_size(htab) \
3281 ((htab)->next_tls_desc_index * 4)
3282
3283 /* ARM ELF linker hash table. */
3284 struct elf32_arm_link_hash_table
3285 {
3286 /* The main hash table. */
3287 struct elf_link_hash_table root;
3288
3289 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3290 bfd_size_type thumb_glue_size;
3291
3292 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3293 bfd_size_type arm_glue_size;
3294
3295 /* The size in bytes of section containing the ARMv4 BX veneers. */
3296 bfd_size_type bx_glue_size;
3297
3298 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3299 veneer has been populated. */
3300 bfd_vma bx_glue_offset[15];
3301
3302 /* The size in bytes of the section containing glue for VFP11 erratum
3303 veneers. */
3304 bfd_size_type vfp11_erratum_glue_size;
3305
3306 /* The size in bytes of the section containing glue for STM32L4XX erratum
3307 veneers. */
3308 bfd_size_type stm32l4xx_erratum_glue_size;
3309
3310 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3311 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3312 elf32_arm_write_section(). */
3313 struct a8_erratum_fix *a8_erratum_fixes;
3314 unsigned int num_a8_erratum_fixes;
3315
3316 /* An arbitrary input BFD chosen to hold the glue sections. */
3317 bfd * bfd_of_glue_owner;
3318
3319 /* Nonzero to output a BE8 image. */
3320 int byteswap_code;
3321
3322 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3323 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3324 int target1_is_rel;
3325
3326 /* The relocation to use for R_ARM_TARGET2 relocations. */
3327 int target2_reloc;
3328
3329 /* 0 = Ignore R_ARM_V4BX.
3330 1 = Convert BX to MOV PC.
3331 2 = Generate v4 interworing stubs. */
3332 int fix_v4bx;
3333
3334 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3335 int fix_cortex_a8;
3336
3337 /* Whether we should fix the ARM1176 BLX immediate issue. */
3338 int fix_arm1176;
3339
3340 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3341 int use_blx;
3342
3343 /* What sort of code sequences we should look for which may trigger the
3344 VFP11 denorm erratum. */
3345 bfd_arm_vfp11_fix vfp11_fix;
3346
3347 /* Global counter for the number of fixes we have emitted. */
3348 int num_vfp11_fixes;
3349
3350 /* What sort of code sequences we should look for which may trigger the
3351 STM32L4XX erratum. */
3352 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3353
3354 /* Global counter for the number of fixes we have emitted. */
3355 int num_stm32l4xx_fixes;
3356
3357 /* Nonzero to force PIC branch veneers. */
3358 int pic_veneer;
3359
3360 /* The number of bytes in the initial entry in the PLT. */
3361 bfd_size_type plt_header_size;
3362
3363 /* The number of bytes in the subsequent PLT etries. */
3364 bfd_size_type plt_entry_size;
3365
3366 /* True if the target system is VxWorks. */
3367 int vxworks_p;
3368
3369 /* True if the target system is Symbian OS. */
3370 int symbian_p;
3371
3372 /* True if the target system is Native Client. */
3373 int nacl_p;
3374
3375 /* True if the target uses REL relocations. */
3376 bfd_boolean use_rel;
3377
3378 /* Nonzero if import library must be a secure gateway import library
3379 as per ARMv8-M Security Extensions. */
3380 int cmse_implib;
3381
3382 /* The import library whose symbols' address must remain stable in
3383 the import library generated. */
3384 bfd *in_implib_bfd;
3385
3386 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3387 bfd_vma next_tls_desc_index;
3388
3389 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3390 bfd_vma num_tls_desc;
3391
3392 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3393 asection *srelplt2;
3394
3395 /* The offset into splt of the PLT entry for the TLS descriptor
3396 resolver. Special values are 0, if not necessary (or not found
3397 to be necessary yet), and -1 if needed but not determined
3398 yet. */
3399 bfd_vma dt_tlsdesc_plt;
3400
3401 /* The offset into sgot of the GOT entry used by the PLT entry
3402 above. */
3403 bfd_vma dt_tlsdesc_got;
3404
3405 /* Offset in .plt section of tls_arm_trampoline. */
3406 bfd_vma tls_trampoline;
3407
3408 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3409 union
3410 {
3411 bfd_signed_vma refcount;
3412 bfd_vma offset;
3413 } tls_ldm_got;
3414
3415 /* Small local sym cache. */
3416 struct sym_cache sym_cache;
3417
3418 /* For convenience in allocate_dynrelocs. */
3419 bfd * obfd;
3420
3421 /* The amount of space used by the reserved portion of the sgotplt
3422 section, plus whatever space is used by the jump slots. */
3423 bfd_vma sgotplt_jump_table_size;
3424
3425 /* The stub hash table. */
3426 struct bfd_hash_table stub_hash_table;
3427
3428 /* Linker stub bfd. */
3429 bfd *stub_bfd;
3430
3431 /* Linker call-backs. */
3432 asection * (*add_stub_section) (const char *, asection *, asection *,
3433 unsigned int);
3434 void (*layout_sections_again) (void);
3435
3436 /* Array to keep track of which stub sections have been created, and
3437 information on stub grouping. */
3438 struct map_stub *stub_group;
3439
3440 /* Input stub section holding secure gateway veneers. */
3441 asection *cmse_stub_sec;
3442
3443 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3444 start to be allocated. */
3445 bfd_vma new_cmse_stub_offset;
3446
3447 /* Number of elements in stub_group. */
3448 unsigned int top_id;
3449
3450 /* Assorted information used by elf32_arm_size_stubs. */
3451 unsigned int bfd_count;
3452 unsigned int top_index;
3453 asection **input_list;
3454
3455 /* True if the target system uses FDPIC. */
3456 int fdpic_p;
3457
3458 /* Fixup section. Used for FDPIC. */
3459 asection *srofixup;
3460 };
3461
3462 /* Add an FDPIC read-only fixup. */
3463 static void
3464 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3465 {
3466 bfd_vma fixup_offset;
3467
3468 fixup_offset = srofixup->reloc_count++ * 4;
3469 BFD_ASSERT (fixup_offset < srofixup->size);
3470 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3471 }
3472
3473 static inline int
3474 ctz (unsigned int mask)
3475 {
3476 #if GCC_VERSION >= 3004
3477 return __builtin_ctz (mask);
3478 #else
3479 unsigned int i;
3480
3481 for (i = 0; i < 8 * sizeof (mask); i++)
3482 {
3483 if (mask & 0x1)
3484 break;
3485 mask = (mask >> 1);
3486 }
3487 return i;
3488 #endif
3489 }
3490
3491 static inline int
3492 elf32_arm_popcount (unsigned int mask)
3493 {
3494 #if GCC_VERSION >= 3004
3495 return __builtin_popcount (mask);
3496 #else
3497 unsigned int i;
3498 int sum = 0;
3499
3500 for (i = 0; i < 8 * sizeof (mask); i++)
3501 {
3502 if (mask & 0x1)
3503 sum++;
3504 mask = (mask >> 1);
3505 }
3506 return sum;
3507 #endif
3508 }
3509
3510 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3511 asection *sreloc, Elf_Internal_Rela *rel);
3512
3513 static void
3514 arm_elf_fill_funcdesc(bfd *output_bfd,
3515 struct bfd_link_info *info,
3516 int *funcdesc_offset,
3517 int dynindx,
3518 int offset,
3519 bfd_vma addr,
3520 bfd_vma dynreloc_value,
3521 bfd_vma seg)
3522 {
3523 if ((*funcdesc_offset & 1) == 0)
3524 {
3525 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3526 asection *sgot = globals->root.sgot;
3527
3528 if (bfd_link_pic(info))
3529 {
3530 asection *srelgot = globals->root.srelgot;
3531 Elf_Internal_Rela outrel;
3532
3533 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3534 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3535 outrel.r_addend = 0;
3536
3537 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3538 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3539 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3540 }
3541 else
3542 {
3543 struct elf_link_hash_entry *hgot = globals->root.hgot;
3544 bfd_vma got_value = hgot->root.u.def.value
3545 + hgot->root.u.def.section->output_section->vma
3546 + hgot->root.u.def.section->output_offset;
3547
3548 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3549 sgot->output_section->vma + sgot->output_offset
3550 + offset);
3551 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3552 sgot->output_section->vma + sgot->output_offset
3553 + offset + 4);
3554 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3555 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3556 }
3557 *funcdesc_offset |= 1;
3558 }
3559 }
3560
3561 /* Create an entry in an ARM ELF linker hash table. */
3562
3563 static struct bfd_hash_entry *
3564 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3565 struct bfd_hash_table * table,
3566 const char * string)
3567 {
3568 struct elf32_arm_link_hash_entry * ret =
3569 (struct elf32_arm_link_hash_entry *) entry;
3570
3571 /* Allocate the structure if it has not already been allocated by a
3572 subclass. */
3573 if (ret == NULL)
3574 ret = (struct elf32_arm_link_hash_entry *)
3575 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3576 if (ret == NULL)
3577 return (struct bfd_hash_entry *) ret;
3578
3579 /* Call the allocation method of the superclass. */
3580 ret = ((struct elf32_arm_link_hash_entry *)
3581 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3582 table, string));
3583 if (ret != NULL)
3584 {
3585 ret->dyn_relocs = NULL;
3586 ret->tls_type = GOT_UNKNOWN;
3587 ret->tlsdesc_got = (bfd_vma) -1;
3588 ret->plt.thumb_refcount = 0;
3589 ret->plt.maybe_thumb_refcount = 0;
3590 ret->plt.noncall_refcount = 0;
3591 ret->plt.got_offset = -1;
3592 ret->is_iplt = FALSE;
3593 ret->export_glue = NULL;
3594
3595 ret->stub_cache = NULL;
3596
3597 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3598 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3599 ret->fdpic_cnts.funcdesc_cnt = 0;
3600 ret->fdpic_cnts.funcdesc_offset = -1;
3601 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3602 }
3603
3604 return (struct bfd_hash_entry *) ret;
3605 }
3606
3607 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3608 symbols. */
3609
3610 static bfd_boolean
3611 elf32_arm_allocate_local_sym_info (bfd *abfd)
3612 {
3613 if (elf_local_got_refcounts (abfd) == NULL)
3614 {
3615 bfd_size_type num_syms;
3616 bfd_size_type size;
3617 char *data;
3618
3619 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3620 size = num_syms * (sizeof (bfd_signed_vma)
3621 + sizeof (struct arm_local_iplt_info *)
3622 + sizeof (bfd_vma)
3623 + sizeof (char)
3624 + sizeof (struct fdpic_local));
3625 data = bfd_zalloc (abfd, size);
3626 if (data == NULL)
3627 return FALSE;
3628
3629 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3630 data += num_syms * sizeof (struct fdpic_local);
3631
3632 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3633 data += num_syms * sizeof (bfd_signed_vma);
3634
3635 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3636 data += num_syms * sizeof (struct arm_local_iplt_info *);
3637
3638 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3639 data += num_syms * sizeof (bfd_vma);
3640
3641 elf32_arm_local_got_tls_type (abfd) = data;
3642 }
3643 return TRUE;
3644 }
3645
3646 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3647 to input bfd ABFD. Create the information if it doesn't already exist.
3648 Return null if an allocation fails. */
3649
3650 static struct arm_local_iplt_info *
3651 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3652 {
3653 struct arm_local_iplt_info **ptr;
3654
3655 if (!elf32_arm_allocate_local_sym_info (abfd))
3656 return NULL;
3657
3658 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3659 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3660 if (*ptr == NULL)
3661 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3662 return *ptr;
3663 }
3664
3665 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3666 in ABFD's symbol table. If the symbol is global, H points to its
3667 hash table entry, otherwise H is null.
3668
3669 Return true if the symbol does have PLT information. When returning
3670 true, point *ROOT_PLT at the target-independent reference count/offset
3671 union and *ARM_PLT at the ARM-specific information. */
3672
3673 static bfd_boolean
3674 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3675 struct elf32_arm_link_hash_entry *h,
3676 unsigned long r_symndx, union gotplt_union **root_plt,
3677 struct arm_plt_info **arm_plt)
3678 {
3679 struct arm_local_iplt_info *local_iplt;
3680
3681 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3682 return FALSE;
3683
3684 if (h != NULL)
3685 {
3686 *root_plt = &h->root.plt;
3687 *arm_plt = &h->plt;
3688 return TRUE;
3689 }
3690
3691 if (elf32_arm_local_iplt (abfd) == NULL)
3692 return FALSE;
3693
3694 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3695 if (local_iplt == NULL)
3696 return FALSE;
3697
3698 *root_plt = &local_iplt->root;
3699 *arm_plt = &local_iplt->arm;
3700 return TRUE;
3701 }
3702
3703 static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals);
3704
3705 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3706 before it. */
3707
3708 static bfd_boolean
3709 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3710 struct arm_plt_info *arm_plt)
3711 {
3712 struct elf32_arm_link_hash_table *htab;
3713
3714 htab = elf32_arm_hash_table (info);
3715
3716 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3717 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3718 }
3719
3720 /* Return a pointer to the head of the dynamic reloc list that should
3721 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3722 ABFD's symbol table. Return null if an error occurs. */
3723
3724 static struct elf_dyn_relocs **
3725 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3726 Elf_Internal_Sym *isym)
3727 {
3728 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3729 {
3730 struct arm_local_iplt_info *local_iplt;
3731
3732 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3733 if (local_iplt == NULL)
3734 return NULL;
3735 return &local_iplt->dyn_relocs;
3736 }
3737 else
3738 {
3739 /* Track dynamic relocs needed for local syms too.
3740 We really need local syms available to do this
3741 easily. Oh well. */
3742 asection *s;
3743 void *vpp;
3744
3745 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3746 if (s == NULL)
3747 abort ();
3748
3749 vpp = &elf_section_data (s)->local_dynrel;
3750 return (struct elf_dyn_relocs **) vpp;
3751 }
3752 }
3753
3754 /* Initialize an entry in the stub hash table. */
3755
3756 static struct bfd_hash_entry *
3757 stub_hash_newfunc (struct bfd_hash_entry *entry,
3758 struct bfd_hash_table *table,
3759 const char *string)
3760 {
3761 /* Allocate the structure if it has not already been allocated by a
3762 subclass. */
3763 if (entry == NULL)
3764 {
3765 entry = (struct bfd_hash_entry *)
3766 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3767 if (entry == NULL)
3768 return entry;
3769 }
3770
3771 /* Call the allocation method of the superclass. */
3772 entry = bfd_hash_newfunc (entry, table, string);
3773 if (entry != NULL)
3774 {
3775 struct elf32_arm_stub_hash_entry *eh;
3776
3777 /* Initialize the local fields. */
3778 eh = (struct elf32_arm_stub_hash_entry *) entry;
3779 eh->stub_sec = NULL;
3780 eh->stub_offset = (bfd_vma) -1;
3781 eh->source_value = 0;
3782 eh->target_value = 0;
3783 eh->target_section = NULL;
3784 eh->orig_insn = 0;
3785 eh->stub_type = arm_stub_none;
3786 eh->stub_size = 0;
3787 eh->stub_template = NULL;
3788 eh->stub_template_size = -1;
3789 eh->h = NULL;
3790 eh->id_sec = NULL;
3791 eh->output_name = NULL;
3792 }
3793
3794 return entry;
3795 }
3796
3797 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3798 shortcuts to them in our hash table. */
3799
3800 static bfd_boolean
3801 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3802 {
3803 struct elf32_arm_link_hash_table *htab;
3804
3805 htab = elf32_arm_hash_table (info);
3806 if (htab == NULL)
3807 return FALSE;
3808
3809 /* BPABI objects never have a GOT, or associated sections. */
3810 if (htab->symbian_p)
3811 return TRUE;
3812
3813 if (! _bfd_elf_create_got_section (dynobj, info))
3814 return FALSE;
3815
3816 /* Also create .rofixup. */
3817 if (htab->fdpic_p)
3818 {
3819 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3820 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3821 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3822 if (htab->srofixup == NULL
3823 || !bfd_set_section_alignment (htab->srofixup, 2))
3824 return FALSE;
3825 }
3826
3827 return TRUE;
3828 }
3829
3830 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3831
3832 static bfd_boolean
3833 create_ifunc_sections (struct bfd_link_info *info)
3834 {
3835 struct elf32_arm_link_hash_table *htab;
3836 const struct elf_backend_data *bed;
3837 bfd *dynobj;
3838 asection *s;
3839 flagword flags;
3840
3841 htab = elf32_arm_hash_table (info);
3842 dynobj = htab->root.dynobj;
3843 bed = get_elf_backend_data (dynobj);
3844 flags = bed->dynamic_sec_flags;
3845
3846 if (htab->root.iplt == NULL)
3847 {
3848 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3849 flags | SEC_READONLY | SEC_CODE);
3850 if (s == NULL
3851 || !bfd_set_section_alignment (s, bed->plt_alignment))
3852 return FALSE;
3853 htab->root.iplt = s;
3854 }
3855
3856 if (htab->root.irelplt == NULL)
3857 {
3858 s = bfd_make_section_anyway_with_flags (dynobj,
3859 RELOC_SECTION (htab, ".iplt"),
3860 flags | SEC_READONLY);
3861 if (s == NULL
3862 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3863 return FALSE;
3864 htab->root.irelplt = s;
3865 }
3866
3867 if (htab->root.igotplt == NULL)
3868 {
3869 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3870 if (s == NULL
3871 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3872 return FALSE;
3873 htab->root.igotplt = s;
3874 }
3875 return TRUE;
3876 }
3877
3878 /* Determine if we're dealing with a Thumb only architecture. */
3879
3880 static bfd_boolean
3881 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3882 {
3883 int arch;
3884 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3885 Tag_CPU_arch_profile);
3886
3887 if (profile)
3888 return profile == 'M';
3889
3890 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3891
3892 /* Force return logic to be reviewed for each new architecture. */
3893 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3894
3895 if (arch == TAG_CPU_ARCH_V6_M
3896 || arch == TAG_CPU_ARCH_V6S_M
3897 || arch == TAG_CPU_ARCH_V7E_M
3898 || arch == TAG_CPU_ARCH_V8M_BASE
3899 || arch == TAG_CPU_ARCH_V8M_MAIN
3900 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3901 return TRUE;
3902
3903 return FALSE;
3904 }
3905
3906 /* Determine if we're dealing with a Thumb-2 object. */
3907
3908 static bfd_boolean
3909 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3910 {
3911 int arch;
3912 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3913 Tag_THUMB_ISA_use);
3914
3915 if (thumb_isa)
3916 return thumb_isa == 2;
3917
3918 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3919
3920 /* Force return logic to be reviewed for each new architecture. */
3921 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3922
3923 return (arch == TAG_CPU_ARCH_V6T2
3924 || arch == TAG_CPU_ARCH_V7
3925 || arch == TAG_CPU_ARCH_V7E_M
3926 || arch == TAG_CPU_ARCH_V8
3927 || arch == TAG_CPU_ARCH_V8R
3928 || arch == TAG_CPU_ARCH_V8M_MAIN
3929 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3930 }
3931
3932 /* Determine whether Thumb-2 BL instruction is available. */
3933
3934 static bfd_boolean
3935 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3936 {
3937 int arch =
3938 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3939
3940 /* Force return logic to be reviewed for each new architecture. */
3941 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3942
3943 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3944 return (arch == TAG_CPU_ARCH_V6T2
3945 || arch >= TAG_CPU_ARCH_V7);
3946 }
3947
3948 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3949 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3950 hash table. */
3951
3952 static bfd_boolean
3953 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3954 {
3955 struct elf32_arm_link_hash_table *htab;
3956
3957 htab = elf32_arm_hash_table (info);
3958 if (htab == NULL)
3959 return FALSE;
3960
3961 if (!htab->root.sgot && !create_got_section (dynobj, info))
3962 return FALSE;
3963
3964 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3965 return FALSE;
3966
3967 if (htab->vxworks_p)
3968 {
3969 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3970 return FALSE;
3971
3972 if (bfd_link_pic (info))
3973 {
3974 htab->plt_header_size = 0;
3975 htab->plt_entry_size
3976 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3977 }
3978 else
3979 {
3980 htab->plt_header_size
3981 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3982 htab->plt_entry_size
3983 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3984 }
3985
3986 if (elf_elfheader (dynobj))
3987 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3988 }
3989 else
3990 {
3991 /* PR ld/16017
3992 Test for thumb only architectures. Note - we cannot just call
3993 using_thumb_only() as the attributes in the output bfd have not been
3994 initialised at this point, so instead we use the input bfd. */
3995 bfd * saved_obfd = htab->obfd;
3996
3997 htab->obfd = dynobj;
3998 if (using_thumb_only (htab))
3999 {
4000 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
4001 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
4002 }
4003 htab->obfd = saved_obfd;
4004 }
4005
4006 if (htab->fdpic_p) {
4007 htab->plt_header_size = 0;
4008 if (info->flags & DF_BIND_NOW)
4009 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
4010 else
4011 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
4012 }
4013
4014 if (!htab->root.splt
4015 || !htab->root.srelplt
4016 || !htab->root.sdynbss
4017 || (!bfd_link_pic (info) && !htab->root.srelbss))
4018 abort ();
4019
4020 return TRUE;
4021 }
4022
4023 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4024
4025 static void
4026 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4027 struct elf_link_hash_entry *dir,
4028 struct elf_link_hash_entry *ind)
4029 {
4030 struct elf32_arm_link_hash_entry *edir, *eind;
4031
4032 edir = (struct elf32_arm_link_hash_entry *) dir;
4033 eind = (struct elf32_arm_link_hash_entry *) ind;
4034
4035 if (eind->dyn_relocs != NULL)
4036 {
4037 if (edir->dyn_relocs != NULL)
4038 {
4039 struct elf_dyn_relocs **pp;
4040 struct elf_dyn_relocs *p;
4041
4042 /* Add reloc counts against the indirect sym to the direct sym
4043 list. Merge any entries against the same section. */
4044 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
4045 {
4046 struct elf_dyn_relocs *q;
4047
4048 for (q = edir->dyn_relocs; q != NULL; q = q->next)
4049 if (q->sec == p->sec)
4050 {
4051 q->pc_count += p->pc_count;
4052 q->count += p->count;
4053 *pp = p->next;
4054 break;
4055 }
4056 if (q == NULL)
4057 pp = &p->next;
4058 }
4059 *pp = edir->dyn_relocs;
4060 }
4061
4062 edir->dyn_relocs = eind->dyn_relocs;
4063 eind->dyn_relocs = NULL;
4064 }
4065
4066 if (ind->root.type == bfd_link_hash_indirect)
4067 {
4068 /* Copy over PLT info. */
4069 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4070 eind->plt.thumb_refcount = 0;
4071 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4072 eind->plt.maybe_thumb_refcount = 0;
4073 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4074 eind->plt.noncall_refcount = 0;
4075
4076 /* Copy FDPIC counters. */
4077 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4078 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4079 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4080
4081 /* We should only allocate a function to .iplt once the final
4082 symbol information is known. */
4083 BFD_ASSERT (!eind->is_iplt);
4084
4085 if (dir->got.refcount <= 0)
4086 {
4087 edir->tls_type = eind->tls_type;
4088 eind->tls_type = GOT_UNKNOWN;
4089 }
4090 }
4091
4092 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4093 }
4094
4095 /* Destroy an ARM elf linker hash table. */
4096
4097 static void
4098 elf32_arm_link_hash_table_free (bfd *obfd)
4099 {
4100 struct elf32_arm_link_hash_table *ret
4101 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4102
4103 bfd_hash_table_free (&ret->stub_hash_table);
4104 _bfd_elf_link_hash_table_free (obfd);
4105 }
4106
4107 /* Create an ARM elf linker hash table. */
4108
4109 static struct bfd_link_hash_table *
4110 elf32_arm_link_hash_table_create (bfd *abfd)
4111 {
4112 struct elf32_arm_link_hash_table *ret;
4113 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4114
4115 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4116 if (ret == NULL)
4117 return NULL;
4118
4119 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4120 elf32_arm_link_hash_newfunc,
4121 sizeof (struct elf32_arm_link_hash_entry),
4122 ARM_ELF_DATA))
4123 {
4124 free (ret);
4125 return NULL;
4126 }
4127
4128 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4129 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4130 #ifdef FOUR_WORD_PLT
4131 ret->plt_header_size = 16;
4132 ret->plt_entry_size = 16;
4133 #else
4134 ret->plt_header_size = 20;
4135 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4136 #endif
4137 ret->use_rel = TRUE;
4138 ret->obfd = abfd;
4139 ret->fdpic_p = 0;
4140
4141 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4142 sizeof (struct elf32_arm_stub_hash_entry)))
4143 {
4144 _bfd_elf_link_hash_table_free (abfd);
4145 return NULL;
4146 }
4147 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4148
4149 return &ret->root.root;
4150 }
4151
4152 /* Determine what kind of NOPs are available. */
4153
4154 static bfd_boolean
4155 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4156 {
4157 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4158 Tag_CPU_arch);
4159
4160 /* Force return logic to be reviewed for each new architecture. */
4161 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
4162
4163 return (arch == TAG_CPU_ARCH_V6T2
4164 || arch == TAG_CPU_ARCH_V6K
4165 || arch == TAG_CPU_ARCH_V7
4166 || arch == TAG_CPU_ARCH_V8
4167 || arch == TAG_CPU_ARCH_V8R);
4168 }
4169
4170 static bfd_boolean
4171 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4172 {
4173 switch (stub_type)
4174 {
4175 case arm_stub_long_branch_thumb_only:
4176 case arm_stub_long_branch_thumb2_only:
4177 case arm_stub_long_branch_thumb2_only_pure:
4178 case arm_stub_long_branch_v4t_thumb_arm:
4179 case arm_stub_short_branch_v4t_thumb_arm:
4180 case arm_stub_long_branch_v4t_thumb_arm_pic:
4181 case arm_stub_long_branch_v4t_thumb_tls_pic:
4182 case arm_stub_long_branch_thumb_only_pic:
4183 case arm_stub_cmse_branch_thumb_only:
4184 return TRUE;
4185 case arm_stub_none:
4186 BFD_FAIL ();
4187 return FALSE;
4188 break;
4189 default:
4190 return FALSE;
4191 }
4192 }
4193
4194 /* Determine the type of stub needed, if any, for a call. */
4195
4196 static enum elf32_arm_stub_type
4197 arm_type_of_stub (struct bfd_link_info *info,
4198 asection *input_sec,
4199 const Elf_Internal_Rela *rel,
4200 unsigned char st_type,
4201 enum arm_st_branch_type *actual_branch_type,
4202 struct elf32_arm_link_hash_entry *hash,
4203 bfd_vma destination,
4204 asection *sym_sec,
4205 bfd *input_bfd,
4206 const char *name)
4207 {
4208 bfd_vma location;
4209 bfd_signed_vma branch_offset;
4210 unsigned int r_type;
4211 struct elf32_arm_link_hash_table * globals;
4212 bfd_boolean thumb2, thumb2_bl, thumb_only;
4213 enum elf32_arm_stub_type stub_type = arm_stub_none;
4214 int use_plt = 0;
4215 enum arm_st_branch_type branch_type = *actual_branch_type;
4216 union gotplt_union *root_plt;
4217 struct arm_plt_info *arm_plt;
4218 int arch;
4219 int thumb2_movw;
4220
4221 if (branch_type == ST_BRANCH_LONG)
4222 return stub_type;
4223
4224 globals = elf32_arm_hash_table (info);
4225 if (globals == NULL)
4226 return stub_type;
4227
4228 thumb_only = using_thumb_only (globals);
4229 thumb2 = using_thumb2 (globals);
4230 thumb2_bl = using_thumb2_bl (globals);
4231
4232 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4233
4234 /* True for architectures that implement the thumb2 movw instruction. */
4235 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4236
4237 /* Determine where the call point is. */
4238 location = (input_sec->output_offset
4239 + input_sec->output_section->vma
4240 + rel->r_offset);
4241
4242 r_type = ELF32_R_TYPE (rel->r_info);
4243
4244 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4245 are considering a function call relocation. */
4246 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4247 || r_type == R_ARM_THM_JUMP19)
4248 && branch_type == ST_BRANCH_TO_ARM)
4249 branch_type = ST_BRANCH_TO_THUMB;
4250
4251 /* For TLS call relocs, it is the caller's responsibility to provide
4252 the address of the appropriate trampoline. */
4253 if (r_type != R_ARM_TLS_CALL
4254 && r_type != R_ARM_THM_TLS_CALL
4255 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4256 ELF32_R_SYM (rel->r_info), &root_plt,
4257 &arm_plt)
4258 && root_plt->offset != (bfd_vma) -1)
4259 {
4260 asection *splt;
4261
4262 if (hash == NULL || hash->is_iplt)
4263 splt = globals->root.iplt;
4264 else
4265 splt = globals->root.splt;
4266 if (splt != NULL)
4267 {
4268 use_plt = 1;
4269
4270 /* Note when dealing with PLT entries: the main PLT stub is in
4271 ARM mode, so if the branch is in Thumb mode, another
4272 Thumb->ARM stub will be inserted later just before the ARM
4273 PLT stub. If a long branch stub is needed, we'll add a
4274 Thumb->Arm one and branch directly to the ARM PLT entry.
4275 Here, we have to check if a pre-PLT Thumb->ARM stub
4276 is needed and if it will be close enough. */
4277
4278 destination = (splt->output_section->vma
4279 + splt->output_offset
4280 + root_plt->offset);
4281 st_type = STT_FUNC;
4282
4283 /* Thumb branch/call to PLT: it can become a branch to ARM
4284 or to Thumb. We must perform the same checks and
4285 corrections as in elf32_arm_final_link_relocate. */
4286 if ((r_type == R_ARM_THM_CALL)
4287 || (r_type == R_ARM_THM_JUMP24))
4288 {
4289 if (globals->use_blx
4290 && r_type == R_ARM_THM_CALL
4291 && !thumb_only)
4292 {
4293 /* If the Thumb BLX instruction is available, convert
4294 the BL to a BLX instruction to call the ARM-mode
4295 PLT entry. */
4296 branch_type = ST_BRANCH_TO_ARM;
4297 }
4298 else
4299 {
4300 if (!thumb_only)
4301 /* Target the Thumb stub before the ARM PLT entry. */
4302 destination -= PLT_THUMB_STUB_SIZE;
4303 branch_type = ST_BRANCH_TO_THUMB;
4304 }
4305 }
4306 else
4307 {
4308 branch_type = ST_BRANCH_TO_ARM;
4309 }
4310 }
4311 }
4312 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4313 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4314
4315 branch_offset = (bfd_signed_vma)(destination - location);
4316
4317 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4318 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4319 {
4320 /* Handle cases where:
4321 - this call goes too far (different Thumb/Thumb2 max
4322 distance)
4323 - it's a Thumb->Arm call and blx is not available, or it's a
4324 Thumb->Arm branch (not bl). A stub is needed in this case,
4325 but only if this call is not through a PLT entry. Indeed,
4326 PLT stubs handle mode switching already. */
4327 if ((!thumb2_bl
4328 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4329 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4330 || (thumb2_bl
4331 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4332 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4333 || (thumb2
4334 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4335 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4336 && (r_type == R_ARM_THM_JUMP19))
4337 || (branch_type == ST_BRANCH_TO_ARM
4338 && (((r_type == R_ARM_THM_CALL
4339 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4340 || (r_type == R_ARM_THM_JUMP24)
4341 || (r_type == R_ARM_THM_JUMP19))
4342 && !use_plt))
4343 {
4344 /* If we need to insert a Thumb-Thumb long branch stub to a
4345 PLT, use one that branches directly to the ARM PLT
4346 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4347 stub, undo this now. */
4348 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4349 {
4350 branch_type = ST_BRANCH_TO_ARM;
4351 branch_offset += PLT_THUMB_STUB_SIZE;
4352 }
4353
4354 if (branch_type == ST_BRANCH_TO_THUMB)
4355 {
4356 /* Thumb to thumb. */
4357 if (!thumb_only)
4358 {
4359 if (input_sec->flags & SEC_ELF_PURECODE)
4360 _bfd_error_handler
4361 (_("%pB(%pA): warning: long branch veneers used in"
4362 " section with SHF_ARM_PURECODE section"
4363 " attribute is only supported for M-profile"
4364 " targets that implement the movw instruction"),
4365 input_bfd, input_sec);
4366
4367 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4368 /* PIC stubs. */
4369 ? ((globals->use_blx
4370 && (r_type == R_ARM_THM_CALL))
4371 /* V5T and above. Stub starts with ARM code, so
4372 we must be able to switch mode before
4373 reaching it, which is only possible for 'bl'
4374 (ie R_ARM_THM_CALL relocation). */
4375 ? arm_stub_long_branch_any_thumb_pic
4376 /* On V4T, use Thumb code only. */
4377 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4378
4379 /* non-PIC stubs. */
4380 : ((globals->use_blx
4381 && (r_type == R_ARM_THM_CALL))
4382 /* V5T and above. */
4383 ? arm_stub_long_branch_any_any
4384 /* V4T. */
4385 : arm_stub_long_branch_v4t_thumb_thumb);
4386 }
4387 else
4388 {
4389 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4390 stub_type = arm_stub_long_branch_thumb2_only_pure;
4391 else
4392 {
4393 if (input_sec->flags & SEC_ELF_PURECODE)
4394 _bfd_error_handler
4395 (_("%pB(%pA): warning: long branch veneers used in"
4396 " section with SHF_ARM_PURECODE section"
4397 " attribute is only supported for M-profile"
4398 " targets that implement the movw instruction"),
4399 input_bfd, input_sec);
4400
4401 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4402 /* PIC stub. */
4403 ? arm_stub_long_branch_thumb_only_pic
4404 /* non-PIC stub. */
4405 : (thumb2 ? arm_stub_long_branch_thumb2_only
4406 : arm_stub_long_branch_thumb_only);
4407 }
4408 }
4409 }
4410 else
4411 {
4412 if (input_sec->flags & SEC_ELF_PURECODE)
4413 _bfd_error_handler
4414 (_("%pB(%pA): warning: long branch veneers used in"
4415 " section with SHF_ARM_PURECODE section"
4416 " attribute is only supported" " for M-profile"
4417 " targets that implement the movw instruction"),
4418 input_bfd, input_sec);
4419
4420 /* Thumb to arm. */
4421 if (sym_sec != NULL
4422 && sym_sec->owner != NULL
4423 && !INTERWORK_FLAG (sym_sec->owner))
4424 {
4425 _bfd_error_handler
4426 (_("%pB(%s): warning: interworking not enabled;"
4427 " first occurrence: %pB: %s call to %s"),
4428 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4429 }
4430
4431 stub_type =
4432 (bfd_link_pic (info) | globals->pic_veneer)
4433 /* PIC stubs. */
4434 ? (r_type == R_ARM_THM_TLS_CALL
4435 /* TLS PIC stubs. */
4436 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4437 : arm_stub_long_branch_v4t_thumb_tls_pic)
4438 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4439 /* V5T PIC and above. */
4440 ? arm_stub_long_branch_any_arm_pic
4441 /* V4T PIC stub. */
4442 : arm_stub_long_branch_v4t_thumb_arm_pic))
4443
4444 /* non-PIC stubs. */
4445 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4446 /* V5T and above. */
4447 ? arm_stub_long_branch_any_any
4448 /* V4T. */
4449 : arm_stub_long_branch_v4t_thumb_arm);
4450
4451 /* Handle v4t short branches. */
4452 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4453 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4454 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4455 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4456 }
4457 }
4458 }
4459 else if (r_type == R_ARM_CALL
4460 || r_type == R_ARM_JUMP24
4461 || r_type == R_ARM_PLT32
4462 || r_type == R_ARM_TLS_CALL)
4463 {
4464 if (input_sec->flags & SEC_ELF_PURECODE)
4465 _bfd_error_handler
4466 (_("%pB(%pA): warning: long branch veneers used in"
4467 " section with SHF_ARM_PURECODE section"
4468 " attribute is only supported for M-profile"
4469 " targets that implement the movw instruction"),
4470 input_bfd, input_sec);
4471 if (branch_type == ST_BRANCH_TO_THUMB)
4472 {
4473 /* Arm to thumb. */
4474
4475 if (sym_sec != NULL
4476 && sym_sec->owner != NULL
4477 && !INTERWORK_FLAG (sym_sec->owner))
4478 {
4479 _bfd_error_handler
4480 (_("%pB(%s): warning: interworking not enabled;"
4481 " first occurrence: %pB: %s call to %s"),
4482 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4483 }
4484
4485 /* We have an extra 2-bytes reach because of
4486 the mode change (bit 24 (H) of BLX encoding). */
4487 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4488 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4489 || (r_type == R_ARM_CALL && !globals->use_blx)
4490 || (r_type == R_ARM_JUMP24)
4491 || (r_type == R_ARM_PLT32))
4492 {
4493 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4494 /* PIC stubs. */
4495 ? ((globals->use_blx)
4496 /* V5T and above. */
4497 ? arm_stub_long_branch_any_thumb_pic
4498 /* V4T stub. */
4499 : arm_stub_long_branch_v4t_arm_thumb_pic)
4500
4501 /* non-PIC stubs. */
4502 : ((globals->use_blx)
4503 /* V5T and above. */
4504 ? arm_stub_long_branch_any_any
4505 /* V4T. */
4506 : arm_stub_long_branch_v4t_arm_thumb);
4507 }
4508 }
4509 else
4510 {
4511 /* Arm to arm. */
4512 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4513 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4514 {
4515 stub_type =
4516 (bfd_link_pic (info) | globals->pic_veneer)
4517 /* PIC stubs. */
4518 ? (r_type == R_ARM_TLS_CALL
4519 /* TLS PIC Stub. */
4520 ? arm_stub_long_branch_any_tls_pic
4521 : (globals->nacl_p
4522 ? arm_stub_long_branch_arm_nacl_pic
4523 : arm_stub_long_branch_any_arm_pic))
4524 /* non-PIC stubs. */
4525 : (globals->nacl_p
4526 ? arm_stub_long_branch_arm_nacl
4527 : arm_stub_long_branch_any_any);
4528 }
4529 }
4530 }
4531
4532 /* If a stub is needed, record the actual destination type. */
4533 if (stub_type != arm_stub_none)
4534 *actual_branch_type = branch_type;
4535
4536 return stub_type;
4537 }
4538
4539 /* Build a name for an entry in the stub hash table. */
4540
4541 static char *
4542 elf32_arm_stub_name (const asection *input_section,
4543 const asection *sym_sec,
4544 const struct elf32_arm_link_hash_entry *hash,
4545 const Elf_Internal_Rela *rel,
4546 enum elf32_arm_stub_type stub_type)
4547 {
4548 char *stub_name;
4549 bfd_size_type len;
4550
4551 if (hash)
4552 {
4553 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4554 stub_name = (char *) bfd_malloc (len);
4555 if (stub_name != NULL)
4556 sprintf (stub_name, "%08x_%s+%x_%d",
4557 input_section->id & 0xffffffff,
4558 hash->root.root.root.string,
4559 (int) rel->r_addend & 0xffffffff,
4560 (int) stub_type);
4561 }
4562 else
4563 {
4564 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4565 stub_name = (char *) bfd_malloc (len);
4566 if (stub_name != NULL)
4567 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4568 input_section->id & 0xffffffff,
4569 sym_sec->id & 0xffffffff,
4570 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4571 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4572 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4573 (int) rel->r_addend & 0xffffffff,
4574 (int) stub_type);
4575 }
4576
4577 return stub_name;
4578 }
4579
4580 /* Look up an entry in the stub hash. Stub entries are cached because
4581 creating the stub name takes a bit of time. */
4582
4583 static struct elf32_arm_stub_hash_entry *
4584 elf32_arm_get_stub_entry (const asection *input_section,
4585 const asection *sym_sec,
4586 struct elf_link_hash_entry *hash,
4587 const Elf_Internal_Rela *rel,
4588 struct elf32_arm_link_hash_table *htab,
4589 enum elf32_arm_stub_type stub_type)
4590 {
4591 struct elf32_arm_stub_hash_entry *stub_entry;
4592 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4593 const asection *id_sec;
4594
4595 if ((input_section->flags & SEC_CODE) == 0)
4596 return NULL;
4597
4598 /* If the input section is the CMSE stubs one and it needs a long
4599 branch stub to reach it's final destination, give up with an
4600 error message: this is not supported. See PR ld/24709. */
4601 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen(CMSE_STUB_NAME)))
4602 {
4603 bfd *output_bfd = htab->obfd;
4604 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4605
4606 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4607 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4608 CMSE_STUB_NAME,
4609 (uint64_t)out_sec->output_section->vma
4610 + out_sec->output_offset,
4611 (uint64_t)sym_sec->output_section->vma
4612 + sym_sec->output_offset
4613 + h->root.root.u.def.value);
4614 /* Exit, rather than leave incompletely processed
4615 relocations. */
4616 xexit(1);
4617 }
4618
4619 /* If this input section is part of a group of sections sharing one
4620 stub section, then use the id of the first section in the group.
4621 Stub names need to include a section id, as there may well be
4622 more than one stub used to reach say, printf, and we need to
4623 distinguish between them. */
4624 BFD_ASSERT (input_section->id <= htab->top_id);
4625 id_sec = htab->stub_group[input_section->id].link_sec;
4626
4627 if (h != NULL && h->stub_cache != NULL
4628 && h->stub_cache->h == h
4629 && h->stub_cache->id_sec == id_sec
4630 && h->stub_cache->stub_type == stub_type)
4631 {
4632 stub_entry = h->stub_cache;
4633 }
4634 else
4635 {
4636 char *stub_name;
4637
4638 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4639 if (stub_name == NULL)
4640 return NULL;
4641
4642 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4643 stub_name, FALSE, FALSE);
4644 if (h != NULL)
4645 h->stub_cache = stub_entry;
4646
4647 free (stub_name);
4648 }
4649
4650 return stub_entry;
4651 }
4652
4653 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4654 section. */
4655
4656 static bfd_boolean
4657 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4658 {
4659 if (stub_type >= max_stub_type)
4660 abort (); /* Should be unreachable. */
4661
4662 switch (stub_type)
4663 {
4664 case arm_stub_cmse_branch_thumb_only:
4665 return TRUE;
4666
4667 default:
4668 return FALSE;
4669 }
4670
4671 abort (); /* Should be unreachable. */
4672 }
4673
4674 /* Required alignment (as a power of 2) for the dedicated section holding
4675 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4676 with input sections. */
4677
4678 static int
4679 arm_dedicated_stub_output_section_required_alignment
4680 (enum elf32_arm_stub_type stub_type)
4681 {
4682 if (stub_type >= max_stub_type)
4683 abort (); /* Should be unreachable. */
4684
4685 switch (stub_type)
4686 {
4687 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4688 boundary. */
4689 case arm_stub_cmse_branch_thumb_only:
4690 return 5;
4691
4692 default:
4693 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4694 return 0;
4695 }
4696
4697 abort (); /* Should be unreachable. */
4698 }
4699
4700 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4701 NULL if veneers of this type are interspersed with input sections. */
4702
4703 static const char *
4704 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4705 {
4706 if (stub_type >= max_stub_type)
4707 abort (); /* Should be unreachable. */
4708
4709 switch (stub_type)
4710 {
4711 case arm_stub_cmse_branch_thumb_only:
4712 return CMSE_STUB_NAME;
4713
4714 default:
4715 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4716 return NULL;
4717 }
4718
4719 abort (); /* Should be unreachable. */
4720 }
4721
4722 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4723 returns the address of the hash table field in HTAB holding a pointer to the
4724 corresponding input section. Otherwise, returns NULL. */
4725
4726 static asection **
4727 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4728 enum elf32_arm_stub_type stub_type)
4729 {
4730 if (stub_type >= max_stub_type)
4731 abort (); /* Should be unreachable. */
4732
4733 switch (stub_type)
4734 {
4735 case arm_stub_cmse_branch_thumb_only:
4736 return &htab->cmse_stub_sec;
4737
4738 default:
4739 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4740 return NULL;
4741 }
4742
4743 abort (); /* Should be unreachable. */
4744 }
4745
4746 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4747 is the section that branch into veneer and can be NULL if stub should go in
4748 a dedicated output section. Returns a pointer to the stub section, and the
4749 section to which the stub section will be attached (in *LINK_SEC_P).
4750 LINK_SEC_P may be NULL. */
4751
4752 static asection *
4753 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4754 struct elf32_arm_link_hash_table *htab,
4755 enum elf32_arm_stub_type stub_type)
4756 {
4757 asection *link_sec, *out_sec, **stub_sec_p;
4758 const char *stub_sec_prefix;
4759 bfd_boolean dedicated_output_section =
4760 arm_dedicated_stub_output_section_required (stub_type);
4761 int align;
4762
4763 if (dedicated_output_section)
4764 {
4765 bfd *output_bfd = htab->obfd;
4766 const char *out_sec_name =
4767 arm_dedicated_stub_output_section_name (stub_type);
4768 link_sec = NULL;
4769 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4770 stub_sec_prefix = out_sec_name;
4771 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4772 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4773 if (out_sec == NULL)
4774 {
4775 _bfd_error_handler (_("no address assigned to the veneers output "
4776 "section %s"), out_sec_name);
4777 return NULL;
4778 }
4779 }
4780 else
4781 {
4782 BFD_ASSERT (section->id <= htab->top_id);
4783 link_sec = htab->stub_group[section->id].link_sec;
4784 BFD_ASSERT (link_sec != NULL);
4785 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4786 if (*stub_sec_p == NULL)
4787 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4788 stub_sec_prefix = link_sec->name;
4789 out_sec = link_sec->output_section;
4790 align = htab->nacl_p ? 4 : 3;
4791 }
4792
4793 if (*stub_sec_p == NULL)
4794 {
4795 size_t namelen;
4796 bfd_size_type len;
4797 char *s_name;
4798
4799 namelen = strlen (stub_sec_prefix);
4800 len = namelen + sizeof (STUB_SUFFIX);
4801 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4802 if (s_name == NULL)
4803 return NULL;
4804
4805 memcpy (s_name, stub_sec_prefix, namelen);
4806 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4807 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4808 align);
4809 if (*stub_sec_p == NULL)
4810 return NULL;
4811
4812 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4813 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4814 | SEC_KEEP;
4815 }
4816
4817 if (!dedicated_output_section)
4818 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4819
4820 if (link_sec_p)
4821 *link_sec_p = link_sec;
4822
4823 return *stub_sec_p;
4824 }
4825
4826 /* Add a new stub entry to the stub hash. Not all fields of the new
4827 stub entry are initialised. */
4828
4829 static struct elf32_arm_stub_hash_entry *
4830 elf32_arm_add_stub (const char *stub_name, asection *section,
4831 struct elf32_arm_link_hash_table *htab,
4832 enum elf32_arm_stub_type stub_type)
4833 {
4834 asection *link_sec;
4835 asection *stub_sec;
4836 struct elf32_arm_stub_hash_entry *stub_entry;
4837
4838 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4839 stub_type);
4840 if (stub_sec == NULL)
4841 return NULL;
4842
4843 /* Enter this entry into the linker stub hash table. */
4844 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4845 TRUE, FALSE);
4846 if (stub_entry == NULL)
4847 {
4848 if (section == NULL)
4849 section = stub_sec;
4850 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4851 section->owner, stub_name);
4852 return NULL;
4853 }
4854
4855 stub_entry->stub_sec = stub_sec;
4856 stub_entry->stub_offset = (bfd_vma) -1;
4857 stub_entry->id_sec = link_sec;
4858
4859 return stub_entry;
4860 }
4861
4862 /* Store an Arm insn into an output section not processed by
4863 elf32_arm_write_section. */
4864
4865 static void
4866 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4867 bfd * output_bfd, bfd_vma val, void * ptr)
4868 {
4869 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4870 bfd_putl32 (val, ptr);
4871 else
4872 bfd_putb32 (val, ptr);
4873 }
4874
4875 /* Store a 16-bit Thumb insn into an output section not processed by
4876 elf32_arm_write_section. */
4877
4878 static void
4879 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4880 bfd * output_bfd, bfd_vma val, void * ptr)
4881 {
4882 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4883 bfd_putl16 (val, ptr);
4884 else
4885 bfd_putb16 (val, ptr);
4886 }
4887
4888 /* Store a Thumb2 insn into an output section not processed by
4889 elf32_arm_write_section. */
4890
4891 static void
4892 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4893 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4894 {
4895 /* T2 instructions are 16-bit streamed. */
4896 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4897 {
4898 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4899 bfd_putl16 ((val & 0xffff), ptr + 2);
4900 }
4901 else
4902 {
4903 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4904 bfd_putb16 ((val & 0xffff), ptr + 2);
4905 }
4906 }
4907
4908 /* If it's possible to change R_TYPE to a more efficient access
4909 model, return the new reloc type. */
4910
4911 static unsigned
4912 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4913 struct elf_link_hash_entry *h)
4914 {
4915 int is_local = (h == NULL);
4916
4917 if (bfd_link_dll (info)
4918 || (h && h->root.type == bfd_link_hash_undefweak))
4919 return r_type;
4920
4921 /* We do not support relaxations for Old TLS models. */
4922 switch (r_type)
4923 {
4924 case R_ARM_TLS_GOTDESC:
4925 case R_ARM_TLS_CALL:
4926 case R_ARM_THM_TLS_CALL:
4927 case R_ARM_TLS_DESCSEQ:
4928 case R_ARM_THM_TLS_DESCSEQ:
4929 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4930 }
4931
4932 return r_type;
4933 }
4934
4935 static bfd_reloc_status_type elf32_arm_final_link_relocate
4936 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4937 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4938 const char *, unsigned char, enum arm_st_branch_type,
4939 struct elf_link_hash_entry *, bfd_boolean *, char **);
4940
4941 static unsigned int
4942 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4943 {
4944 switch (stub_type)
4945 {
4946 case arm_stub_a8_veneer_b_cond:
4947 case arm_stub_a8_veneer_b:
4948 case arm_stub_a8_veneer_bl:
4949 return 2;
4950
4951 case arm_stub_long_branch_any_any:
4952 case arm_stub_long_branch_v4t_arm_thumb:
4953 case arm_stub_long_branch_thumb_only:
4954 case arm_stub_long_branch_thumb2_only:
4955 case arm_stub_long_branch_thumb2_only_pure:
4956 case arm_stub_long_branch_v4t_thumb_thumb:
4957 case arm_stub_long_branch_v4t_thumb_arm:
4958 case arm_stub_short_branch_v4t_thumb_arm:
4959 case arm_stub_long_branch_any_arm_pic:
4960 case arm_stub_long_branch_any_thumb_pic:
4961 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4962 case arm_stub_long_branch_v4t_arm_thumb_pic:
4963 case arm_stub_long_branch_v4t_thumb_arm_pic:
4964 case arm_stub_long_branch_thumb_only_pic:
4965 case arm_stub_long_branch_any_tls_pic:
4966 case arm_stub_long_branch_v4t_thumb_tls_pic:
4967 case arm_stub_cmse_branch_thumb_only:
4968 case arm_stub_a8_veneer_blx:
4969 return 4;
4970
4971 case arm_stub_long_branch_arm_nacl:
4972 case arm_stub_long_branch_arm_nacl_pic:
4973 return 16;
4974
4975 default:
4976 abort (); /* Should be unreachable. */
4977 }
4978 }
4979
4980 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4981 veneering (TRUE) or have their own symbol (FALSE). */
4982
4983 static bfd_boolean
4984 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4985 {
4986 if (stub_type >= max_stub_type)
4987 abort (); /* Should be unreachable. */
4988
4989 switch (stub_type)
4990 {
4991 case arm_stub_cmse_branch_thumb_only:
4992 return TRUE;
4993
4994 default:
4995 return FALSE;
4996 }
4997
4998 abort (); /* Should be unreachable. */
4999 }
5000
5001 /* Returns the padding needed for the dedicated section used stubs of type
5002 STUB_TYPE. */
5003
5004 static int
5005 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
5006 {
5007 if (stub_type >= max_stub_type)
5008 abort (); /* Should be unreachable. */
5009
5010 switch (stub_type)
5011 {
5012 case arm_stub_cmse_branch_thumb_only:
5013 return 32;
5014
5015 default:
5016 return 0;
5017 }
5018
5019 abort (); /* Should be unreachable. */
5020 }
5021
5022 /* If veneers of type STUB_TYPE should go in a dedicated output section,
5023 returns the address of the hash table field in HTAB holding the offset at
5024 which new veneers should be layed out in the stub section. */
5025
5026 static bfd_vma*
5027 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
5028 enum elf32_arm_stub_type stub_type)
5029 {
5030 switch (stub_type)
5031 {
5032 case arm_stub_cmse_branch_thumb_only:
5033 return &htab->new_cmse_stub_offset;
5034
5035 default:
5036 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
5037 return NULL;
5038 }
5039 }
5040
5041 static bfd_boolean
5042 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
5043 void * in_arg)
5044 {
5045 #define MAXRELOCS 3
5046 bfd_boolean removed_sg_veneer;
5047 struct elf32_arm_stub_hash_entry *stub_entry;
5048 struct elf32_arm_link_hash_table *globals;
5049 struct bfd_link_info *info;
5050 asection *stub_sec;
5051 bfd *stub_bfd;
5052 bfd_byte *loc;
5053 bfd_vma sym_value;
5054 int template_size;
5055 int size;
5056 const insn_sequence *template_sequence;
5057 int i;
5058 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5059 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5060 int nrelocs = 0;
5061 int just_allocated = 0;
5062
5063 /* Massage our args to the form they really have. */
5064 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5065 info = (struct bfd_link_info *) in_arg;
5066
5067 /* Fail if the target section could not be assigned to an output
5068 section. The user should fix his linker script. */
5069 if (stub_entry->target_section->output_section == NULL
5070 && info->non_contiguous_regions)
5071 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5072 "Retry without --enable-non-contiguous-regions.\n"),
5073 stub_entry->target_section);
5074
5075 globals = elf32_arm_hash_table (info);
5076 if (globals == NULL)
5077 return FALSE;
5078
5079 stub_sec = stub_entry->stub_sec;
5080
5081 if ((globals->fix_cortex_a8 < 0)
5082 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5083 /* We have to do less-strictly-aligned fixes last. */
5084 return TRUE;
5085
5086 /* Assign a slot at the end of section if none assigned yet. */
5087 if (stub_entry->stub_offset == (bfd_vma) -1)
5088 {
5089 stub_entry->stub_offset = stub_sec->size;
5090 just_allocated = 1;
5091 }
5092 loc = stub_sec->contents + stub_entry->stub_offset;
5093
5094 stub_bfd = stub_sec->owner;
5095
5096 /* This is the address of the stub destination. */
5097 sym_value = (stub_entry->target_value
5098 + stub_entry->target_section->output_offset
5099 + stub_entry->target_section->output_section->vma);
5100
5101 template_sequence = stub_entry->stub_template;
5102 template_size = stub_entry->stub_template_size;
5103
5104 size = 0;
5105 for (i = 0; i < template_size; i++)
5106 {
5107 switch (template_sequence[i].type)
5108 {
5109 case THUMB16_TYPE:
5110 {
5111 bfd_vma data = (bfd_vma) template_sequence[i].data;
5112 if (template_sequence[i].reloc_addend != 0)
5113 {
5114 /* We've borrowed the reloc_addend field to mean we should
5115 insert a condition code into this (Thumb-1 branch)
5116 instruction. See THUMB16_BCOND_INSN. */
5117 BFD_ASSERT ((data & 0xff00) == 0xd000);
5118 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5119 }
5120 bfd_put_16 (stub_bfd, data, loc + size);
5121 size += 2;
5122 }
5123 break;
5124
5125 case THUMB32_TYPE:
5126 bfd_put_16 (stub_bfd,
5127 (template_sequence[i].data >> 16) & 0xffff,
5128 loc + size);
5129 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5130 loc + size + 2);
5131 if (template_sequence[i].r_type != R_ARM_NONE)
5132 {
5133 stub_reloc_idx[nrelocs] = i;
5134 stub_reloc_offset[nrelocs++] = size;
5135 }
5136 size += 4;
5137 break;
5138
5139 case ARM_TYPE:
5140 bfd_put_32 (stub_bfd, template_sequence[i].data,
5141 loc + size);
5142 /* Handle cases where the target is encoded within the
5143 instruction. */
5144 if (template_sequence[i].r_type == R_ARM_JUMP24)
5145 {
5146 stub_reloc_idx[nrelocs] = i;
5147 stub_reloc_offset[nrelocs++] = size;
5148 }
5149 size += 4;
5150 break;
5151
5152 case DATA_TYPE:
5153 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5154 stub_reloc_idx[nrelocs] = i;
5155 stub_reloc_offset[nrelocs++] = size;
5156 size += 4;
5157 break;
5158
5159 default:
5160 BFD_FAIL ();
5161 return FALSE;
5162 }
5163 }
5164
5165 if (just_allocated)
5166 stub_sec->size += size;
5167
5168 /* Stub size has already been computed in arm_size_one_stub. Check
5169 consistency. */
5170 BFD_ASSERT (size == stub_entry->stub_size);
5171
5172 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5173 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5174 sym_value |= 1;
5175
5176 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5177 to relocate in each stub. */
5178 removed_sg_veneer =
5179 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5180 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5181
5182 for (i = 0; i < nrelocs; i++)
5183 {
5184 Elf_Internal_Rela rel;
5185 bfd_boolean unresolved_reloc;
5186 char *error_message;
5187 bfd_vma points_to =
5188 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5189
5190 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5191 rel.r_info = ELF32_R_INFO (0,
5192 template_sequence[stub_reloc_idx[i]].r_type);
5193 rel.r_addend = 0;
5194
5195 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5196 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5197 template should refer back to the instruction after the original
5198 branch. We use target_section as Cortex-A8 erratum workaround stubs
5199 are only generated when both source and target are in the same
5200 section. */
5201 points_to = stub_entry->target_section->output_section->vma
5202 + stub_entry->target_section->output_offset
5203 + stub_entry->source_value;
5204
5205 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5206 (template_sequence[stub_reloc_idx[i]].r_type),
5207 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5208 points_to, info, stub_entry->target_section, "", STT_FUNC,
5209 stub_entry->branch_type,
5210 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5211 &error_message);
5212 }
5213
5214 return TRUE;
5215 #undef MAXRELOCS
5216 }
5217
5218 /* Calculate the template, template size and instruction size for a stub.
5219 Return value is the instruction size. */
5220
5221 static unsigned int
5222 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5223 const insn_sequence **stub_template,
5224 int *stub_template_size)
5225 {
5226 const insn_sequence *template_sequence = NULL;
5227 int template_size = 0, i;
5228 unsigned int size;
5229
5230 template_sequence = stub_definitions[stub_type].template_sequence;
5231 if (stub_template)
5232 *stub_template = template_sequence;
5233
5234 template_size = stub_definitions[stub_type].template_size;
5235 if (stub_template_size)
5236 *stub_template_size = template_size;
5237
5238 size = 0;
5239 for (i = 0; i < template_size; i++)
5240 {
5241 switch (template_sequence[i].type)
5242 {
5243 case THUMB16_TYPE:
5244 size += 2;
5245 break;
5246
5247 case ARM_TYPE:
5248 case THUMB32_TYPE:
5249 case DATA_TYPE:
5250 size += 4;
5251 break;
5252
5253 default:
5254 BFD_FAIL ();
5255 return 0;
5256 }
5257 }
5258
5259 return size;
5260 }
5261
5262 /* As above, but don't actually build the stub. Just bump offset so
5263 we know stub section sizes. */
5264
5265 static bfd_boolean
5266 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5267 void *in_arg ATTRIBUTE_UNUSED)
5268 {
5269 struct elf32_arm_stub_hash_entry *stub_entry;
5270 const insn_sequence *template_sequence;
5271 int template_size, size;
5272
5273 /* Massage our args to the form they really have. */
5274 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5275
5276 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5277 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5278
5279 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5280 &template_size);
5281
5282 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5283 if (stub_entry->stub_template_size)
5284 {
5285 stub_entry->stub_size = size;
5286 stub_entry->stub_template = template_sequence;
5287 stub_entry->stub_template_size = template_size;
5288 }
5289
5290 /* Already accounted for. */
5291 if (stub_entry->stub_offset != (bfd_vma) -1)
5292 return TRUE;
5293
5294 size = (size + 7) & ~7;
5295 stub_entry->stub_sec->size += size;
5296
5297 return TRUE;
5298 }
5299
5300 /* External entry points for sizing and building linker stubs. */
5301
5302 /* Set up various things so that we can make a list of input sections
5303 for each output section included in the link. Returns -1 on error,
5304 0 when no stubs will be needed, and 1 on success. */
5305
5306 int
5307 elf32_arm_setup_section_lists (bfd *output_bfd,
5308 struct bfd_link_info *info)
5309 {
5310 bfd *input_bfd;
5311 unsigned int bfd_count;
5312 unsigned int top_id, top_index;
5313 asection *section;
5314 asection **input_list, **list;
5315 size_t amt;
5316 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5317
5318 if (htab == NULL)
5319 return 0;
5320 if (! is_elf_hash_table (htab))
5321 return 0;
5322
5323 /* Count the number of input BFDs and find the top input section id. */
5324 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5325 input_bfd != NULL;
5326 input_bfd = input_bfd->link.next)
5327 {
5328 bfd_count += 1;
5329 for (section = input_bfd->sections;
5330 section != NULL;
5331 section = section->next)
5332 {
5333 if (top_id < section->id)
5334 top_id = section->id;
5335 }
5336 }
5337 htab->bfd_count = bfd_count;
5338
5339 amt = sizeof (struct map_stub) * (top_id + 1);
5340 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5341 if (htab->stub_group == NULL)
5342 return -1;
5343 htab->top_id = top_id;
5344
5345 /* We can't use output_bfd->section_count here to find the top output
5346 section index as some sections may have been removed, and
5347 _bfd_strip_section_from_output doesn't renumber the indices. */
5348 for (section = output_bfd->sections, top_index = 0;
5349 section != NULL;
5350 section = section->next)
5351 {
5352 if (top_index < section->index)
5353 top_index = section->index;
5354 }
5355
5356 htab->top_index = top_index;
5357 amt = sizeof (asection *) * (top_index + 1);
5358 input_list = (asection **) bfd_malloc (amt);
5359 htab->input_list = input_list;
5360 if (input_list == NULL)
5361 return -1;
5362
5363 /* For sections we aren't interested in, mark their entries with a
5364 value we can check later. */
5365 list = input_list + top_index;
5366 do
5367 *list = bfd_abs_section_ptr;
5368 while (list-- != input_list);
5369
5370 for (section = output_bfd->sections;
5371 section != NULL;
5372 section = section->next)
5373 {
5374 if ((section->flags & SEC_CODE) != 0)
5375 input_list[section->index] = NULL;
5376 }
5377
5378 return 1;
5379 }
5380
5381 /* The linker repeatedly calls this function for each input section,
5382 in the order that input sections are linked into output sections.
5383 Build lists of input sections to determine groupings between which
5384 we may insert linker stubs. */
5385
5386 void
5387 elf32_arm_next_input_section (struct bfd_link_info *info,
5388 asection *isec)
5389 {
5390 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5391
5392 if (htab == NULL)
5393 return;
5394
5395 if (isec->output_section->index <= htab->top_index)
5396 {
5397 asection **list = htab->input_list + isec->output_section->index;
5398
5399 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5400 {
5401 /* Steal the link_sec pointer for our list. */
5402 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5403 /* This happens to make the list in reverse order,
5404 which we reverse later. */
5405 PREV_SEC (isec) = *list;
5406 *list = isec;
5407 }
5408 }
5409 }
5410
5411 /* See whether we can group stub sections together. Grouping stub
5412 sections may result in fewer stubs. More importantly, we need to
5413 put all .init* and .fini* stubs at the end of the .init or
5414 .fini output sections respectively, because glibc splits the
5415 _init and _fini functions into multiple parts. Putting a stub in
5416 the middle of a function is not a good idea. */
5417
5418 static void
5419 group_sections (struct elf32_arm_link_hash_table *htab,
5420 bfd_size_type stub_group_size,
5421 bfd_boolean stubs_always_after_branch)
5422 {
5423 asection **list = htab->input_list;
5424
5425 do
5426 {
5427 asection *tail = *list;
5428 asection *head;
5429
5430 if (tail == bfd_abs_section_ptr)
5431 continue;
5432
5433 /* Reverse the list: we must avoid placing stubs at the
5434 beginning of the section because the beginning of the text
5435 section may be required for an interrupt vector in bare metal
5436 code. */
5437 #define NEXT_SEC PREV_SEC
5438 head = NULL;
5439 while (tail != NULL)
5440 {
5441 /* Pop from tail. */
5442 asection *item = tail;
5443 tail = PREV_SEC (item);
5444
5445 /* Push on head. */
5446 NEXT_SEC (item) = head;
5447 head = item;
5448 }
5449
5450 while (head != NULL)
5451 {
5452 asection *curr;
5453 asection *next;
5454 bfd_vma stub_group_start = head->output_offset;
5455 bfd_vma end_of_next;
5456
5457 curr = head;
5458 while (NEXT_SEC (curr) != NULL)
5459 {
5460 next = NEXT_SEC (curr);
5461 end_of_next = next->output_offset + next->size;
5462 if (end_of_next - stub_group_start >= stub_group_size)
5463 /* End of NEXT is too far from start, so stop. */
5464 break;
5465 /* Add NEXT to the group. */
5466 curr = next;
5467 }
5468
5469 /* OK, the size from the start to the start of CURR is less
5470 than stub_group_size and thus can be handled by one stub
5471 section. (Or the head section is itself larger than
5472 stub_group_size, in which case we may be toast.)
5473 We should really be keeping track of the total size of
5474 stubs added here, as stubs contribute to the final output
5475 section size. */
5476 do
5477 {
5478 next = NEXT_SEC (head);
5479 /* Set up this stub group. */
5480 htab->stub_group[head->id].link_sec = curr;
5481 }
5482 while (head != curr && (head = next) != NULL);
5483
5484 /* But wait, there's more! Input sections up to stub_group_size
5485 bytes after the stub section can be handled by it too. */
5486 if (!stubs_always_after_branch)
5487 {
5488 stub_group_start = curr->output_offset + curr->size;
5489
5490 while (next != NULL)
5491 {
5492 end_of_next = next->output_offset + next->size;
5493 if (end_of_next - stub_group_start >= stub_group_size)
5494 /* End of NEXT is too far from stubs, so stop. */
5495 break;
5496 /* Add NEXT to the stub group. */
5497 head = next;
5498 next = NEXT_SEC (head);
5499 htab->stub_group[head->id].link_sec = curr;
5500 }
5501 }
5502 head = next;
5503 }
5504 }
5505 while (list++ != htab->input_list + htab->top_index);
5506
5507 free (htab->input_list);
5508 #undef PREV_SEC
5509 #undef NEXT_SEC
5510 }
5511
5512 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5513 erratum fix. */
5514
5515 static int
5516 a8_reloc_compare (const void *a, const void *b)
5517 {
5518 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5519 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5520
5521 if (ra->from < rb->from)
5522 return -1;
5523 else if (ra->from > rb->from)
5524 return 1;
5525 else
5526 return 0;
5527 }
5528
5529 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5530 const char *, char **);
5531
5532 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5533 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5534 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5535 otherwise. */
5536
5537 static bfd_boolean
5538 cortex_a8_erratum_scan (bfd *input_bfd,
5539 struct bfd_link_info *info,
5540 struct a8_erratum_fix **a8_fixes_p,
5541 unsigned int *num_a8_fixes_p,
5542 unsigned int *a8_fix_table_size_p,
5543 struct a8_erratum_reloc *a8_relocs,
5544 unsigned int num_a8_relocs,
5545 unsigned prev_num_a8_fixes,
5546 bfd_boolean *stub_changed_p)
5547 {
5548 asection *section;
5549 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5550 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5551 unsigned int num_a8_fixes = *num_a8_fixes_p;
5552 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5553
5554 if (htab == NULL)
5555 return FALSE;
5556
5557 for (section = input_bfd->sections;
5558 section != NULL;
5559 section = section->next)
5560 {
5561 bfd_byte *contents = NULL;
5562 struct _arm_elf_section_data *sec_data;
5563 unsigned int span;
5564 bfd_vma base_vma;
5565
5566 if (elf_section_type (section) != SHT_PROGBITS
5567 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5568 || (section->flags & SEC_EXCLUDE) != 0
5569 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5570 || (section->output_section == bfd_abs_section_ptr))
5571 continue;
5572
5573 base_vma = section->output_section->vma + section->output_offset;
5574
5575 if (elf_section_data (section)->this_hdr.contents != NULL)
5576 contents = elf_section_data (section)->this_hdr.contents;
5577 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5578 return TRUE;
5579
5580 sec_data = elf32_arm_section_data (section);
5581
5582 for (span = 0; span < sec_data->mapcount; span++)
5583 {
5584 unsigned int span_start = sec_data->map[span].vma;
5585 unsigned int span_end = (span == sec_data->mapcount - 1)
5586 ? section->size : sec_data->map[span + 1].vma;
5587 unsigned int i;
5588 char span_type = sec_data->map[span].type;
5589 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5590
5591 if (span_type != 't')
5592 continue;
5593
5594 /* Span is entirely within a single 4KB region: skip scanning. */
5595 if (((base_vma + span_start) & ~0xfff)
5596 == ((base_vma + span_end) & ~0xfff))
5597 continue;
5598
5599 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5600
5601 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5602 * The branch target is in the same 4KB region as the
5603 first half of the branch.
5604 * The instruction before the branch is a 32-bit
5605 length non-branch instruction. */
5606 for (i = span_start; i < span_end;)
5607 {
5608 unsigned int insn = bfd_getl16 (&contents[i]);
5609 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5610 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5611
5612 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5613 insn_32bit = TRUE;
5614
5615 if (insn_32bit)
5616 {
5617 /* Load the rest of the insn (in manual-friendly order). */
5618 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5619
5620 /* Encoding T4: B<c>.W. */
5621 is_b = (insn & 0xf800d000) == 0xf0009000;
5622 /* Encoding T1: BL<c>.W. */
5623 is_bl = (insn & 0xf800d000) == 0xf000d000;
5624 /* Encoding T2: BLX<c>.W. */
5625 is_blx = (insn & 0xf800d000) == 0xf000c000;
5626 /* Encoding T3: B<c>.W (not permitted in IT block). */
5627 is_bcc = (insn & 0xf800d000) == 0xf0008000
5628 && (insn & 0x07f00000) != 0x03800000;
5629 }
5630
5631 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5632
5633 if (((base_vma + i) & 0xfff) == 0xffe
5634 && insn_32bit
5635 && is_32bit_branch
5636 && last_was_32bit
5637 && ! last_was_branch)
5638 {
5639 bfd_signed_vma offset = 0;
5640 bfd_boolean force_target_arm = FALSE;
5641 bfd_boolean force_target_thumb = FALSE;
5642 bfd_vma target;
5643 enum elf32_arm_stub_type stub_type = arm_stub_none;
5644 struct a8_erratum_reloc key, *found;
5645 bfd_boolean use_plt = FALSE;
5646
5647 key.from = base_vma + i;
5648 found = (struct a8_erratum_reloc *)
5649 bsearch (&key, a8_relocs, num_a8_relocs,
5650 sizeof (struct a8_erratum_reloc),
5651 &a8_reloc_compare);
5652
5653 if (found)
5654 {
5655 char *error_message = NULL;
5656 struct elf_link_hash_entry *entry;
5657
5658 /* We don't care about the error returned from this
5659 function, only if there is glue or not. */
5660 entry = find_thumb_glue (info, found->sym_name,
5661 &error_message);
5662
5663 if (entry)
5664 found->non_a8_stub = TRUE;
5665
5666 /* Keep a simpler condition, for the sake of clarity. */
5667 if (htab->root.splt != NULL && found->hash != NULL
5668 && found->hash->root.plt.offset != (bfd_vma) -1)
5669 use_plt = TRUE;
5670
5671 if (found->r_type == R_ARM_THM_CALL)
5672 {
5673 if (found->branch_type == ST_BRANCH_TO_ARM
5674 || use_plt)
5675 force_target_arm = TRUE;
5676 else
5677 force_target_thumb = TRUE;
5678 }
5679 }
5680
5681 /* Check if we have an offending branch instruction. */
5682
5683 if (found && found->non_a8_stub)
5684 /* We've already made a stub for this instruction, e.g.
5685 it's a long branch or a Thumb->ARM stub. Assume that
5686 stub will suffice to work around the A8 erratum (see
5687 setting of always_after_branch above). */
5688 ;
5689 else if (is_bcc)
5690 {
5691 offset = (insn & 0x7ff) << 1;
5692 offset |= (insn & 0x3f0000) >> 4;
5693 offset |= (insn & 0x2000) ? 0x40000 : 0;
5694 offset |= (insn & 0x800) ? 0x80000 : 0;
5695 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5696 if (offset & 0x100000)
5697 offset |= ~ ((bfd_signed_vma) 0xfffff);
5698 stub_type = arm_stub_a8_veneer_b_cond;
5699 }
5700 else if (is_b || is_bl || is_blx)
5701 {
5702 int s = (insn & 0x4000000) != 0;
5703 int j1 = (insn & 0x2000) != 0;
5704 int j2 = (insn & 0x800) != 0;
5705 int i1 = !(j1 ^ s);
5706 int i2 = !(j2 ^ s);
5707
5708 offset = (insn & 0x7ff) << 1;
5709 offset |= (insn & 0x3ff0000) >> 4;
5710 offset |= i2 << 22;
5711 offset |= i1 << 23;
5712 offset |= s << 24;
5713 if (offset & 0x1000000)
5714 offset |= ~ ((bfd_signed_vma) 0xffffff);
5715
5716 if (is_blx)
5717 offset &= ~ ((bfd_signed_vma) 3);
5718
5719 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5720 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5721 }
5722
5723 if (stub_type != arm_stub_none)
5724 {
5725 bfd_vma pc_for_insn = base_vma + i + 4;
5726
5727 /* The original instruction is a BL, but the target is
5728 an ARM instruction. If we were not making a stub,
5729 the BL would have been converted to a BLX. Use the
5730 BLX stub instead in that case. */
5731 if (htab->use_blx && force_target_arm
5732 && stub_type == arm_stub_a8_veneer_bl)
5733 {
5734 stub_type = arm_stub_a8_veneer_blx;
5735 is_blx = TRUE;
5736 is_bl = FALSE;
5737 }
5738 /* Conversely, if the original instruction was
5739 BLX but the target is Thumb mode, use the BL
5740 stub. */
5741 else if (force_target_thumb
5742 && stub_type == arm_stub_a8_veneer_blx)
5743 {
5744 stub_type = arm_stub_a8_veneer_bl;
5745 is_blx = FALSE;
5746 is_bl = TRUE;
5747 }
5748
5749 if (is_blx)
5750 pc_for_insn &= ~ ((bfd_vma) 3);
5751
5752 /* If we found a relocation, use the proper destination,
5753 not the offset in the (unrelocated) instruction.
5754 Note this is always done if we switched the stub type
5755 above. */
5756 if (found)
5757 offset =
5758 (bfd_signed_vma) (found->destination - pc_for_insn);
5759
5760 /* If the stub will use a Thumb-mode branch to a
5761 PLT target, redirect it to the preceding Thumb
5762 entry point. */
5763 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5764 offset -= PLT_THUMB_STUB_SIZE;
5765
5766 target = pc_for_insn + offset;
5767
5768 /* The BLX stub is ARM-mode code. Adjust the offset to
5769 take the different PC value (+8 instead of +4) into
5770 account. */
5771 if (stub_type == arm_stub_a8_veneer_blx)
5772 offset += 4;
5773
5774 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5775 {
5776 char *stub_name = NULL;
5777
5778 if (num_a8_fixes == a8_fix_table_size)
5779 {
5780 a8_fix_table_size *= 2;
5781 a8_fixes = (struct a8_erratum_fix *)
5782 bfd_realloc (a8_fixes,
5783 sizeof (struct a8_erratum_fix)
5784 * a8_fix_table_size);
5785 }
5786
5787 if (num_a8_fixes < prev_num_a8_fixes)
5788 {
5789 /* If we're doing a subsequent scan,
5790 check if we've found the same fix as
5791 before, and try and reuse the stub
5792 name. */
5793 stub_name = a8_fixes[num_a8_fixes].stub_name;
5794 if ((a8_fixes[num_a8_fixes].section != section)
5795 || (a8_fixes[num_a8_fixes].offset != i))
5796 {
5797 free (stub_name);
5798 stub_name = NULL;
5799 *stub_changed_p = TRUE;
5800 }
5801 }
5802
5803 if (!stub_name)
5804 {
5805 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5806 if (stub_name != NULL)
5807 sprintf (stub_name, "%x:%x", section->id, i);
5808 }
5809
5810 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5811 a8_fixes[num_a8_fixes].section = section;
5812 a8_fixes[num_a8_fixes].offset = i;
5813 a8_fixes[num_a8_fixes].target_offset =
5814 target - base_vma;
5815 a8_fixes[num_a8_fixes].orig_insn = insn;
5816 a8_fixes[num_a8_fixes].stub_name = stub_name;
5817 a8_fixes[num_a8_fixes].stub_type = stub_type;
5818 a8_fixes[num_a8_fixes].branch_type =
5819 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5820
5821 num_a8_fixes++;
5822 }
5823 }
5824 }
5825
5826 i += insn_32bit ? 4 : 2;
5827 last_was_32bit = insn_32bit;
5828 last_was_branch = is_32bit_branch;
5829 }
5830 }
5831
5832 if (elf_section_data (section)->this_hdr.contents == NULL)
5833 free (contents);
5834 }
5835
5836 *a8_fixes_p = a8_fixes;
5837 *num_a8_fixes_p = num_a8_fixes;
5838 *a8_fix_table_size_p = a8_fix_table_size;
5839
5840 return FALSE;
5841 }
5842
5843 /* Create or update a stub entry depending on whether the stub can already be
5844 found in HTAB. The stub is identified by:
5845 - its type STUB_TYPE
5846 - its source branch (note that several can share the same stub) whose
5847 section and relocation (if any) are given by SECTION and IRELA
5848 respectively
5849 - its target symbol whose input section, hash, name, value and branch type
5850 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5851 respectively
5852
5853 If found, the value of the stub's target symbol is updated from SYM_VALUE
5854 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5855 TRUE and the stub entry is initialized.
5856
5857 Returns the stub that was created or updated, or NULL if an error
5858 occurred. */
5859
5860 static struct elf32_arm_stub_hash_entry *
5861 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5862 enum elf32_arm_stub_type stub_type, asection *section,
5863 Elf_Internal_Rela *irela, asection *sym_sec,
5864 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5865 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5866 bfd_boolean *new_stub)
5867 {
5868 const asection *id_sec;
5869 char *stub_name;
5870 struct elf32_arm_stub_hash_entry *stub_entry;
5871 unsigned int r_type;
5872 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5873
5874 BFD_ASSERT (stub_type != arm_stub_none);
5875 *new_stub = FALSE;
5876
5877 if (sym_claimed)
5878 stub_name = sym_name;
5879 else
5880 {
5881 BFD_ASSERT (irela);
5882 BFD_ASSERT (section);
5883 BFD_ASSERT (section->id <= htab->top_id);
5884
5885 /* Support for grouping stub sections. */
5886 id_sec = htab->stub_group[section->id].link_sec;
5887
5888 /* Get the name of this stub. */
5889 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5890 stub_type);
5891 if (!stub_name)
5892 return NULL;
5893 }
5894
5895 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5896 FALSE);
5897 /* The proper stub has already been created, just update its value. */
5898 if (stub_entry != NULL)
5899 {
5900 if (!sym_claimed)
5901 free (stub_name);
5902 stub_entry->target_value = sym_value;
5903 return stub_entry;
5904 }
5905
5906 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5907 if (stub_entry == NULL)
5908 {
5909 if (!sym_claimed)
5910 free (stub_name);
5911 return NULL;
5912 }
5913
5914 stub_entry->target_value = sym_value;
5915 stub_entry->target_section = sym_sec;
5916 stub_entry->stub_type = stub_type;
5917 stub_entry->h = hash;
5918 stub_entry->branch_type = branch_type;
5919
5920 if (sym_claimed)
5921 stub_entry->output_name = sym_name;
5922 else
5923 {
5924 if (sym_name == NULL)
5925 sym_name = "unnamed";
5926 stub_entry->output_name = (char *)
5927 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5928 + strlen (sym_name));
5929 if (stub_entry->output_name == NULL)
5930 {
5931 free (stub_name);
5932 return NULL;
5933 }
5934
5935 /* For historical reasons, use the existing names for ARM-to-Thumb and
5936 Thumb-to-ARM stubs. */
5937 r_type = ELF32_R_TYPE (irela->r_info);
5938 if ((r_type == (unsigned int) R_ARM_THM_CALL
5939 || r_type == (unsigned int) R_ARM_THM_JUMP24
5940 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5941 && branch_type == ST_BRANCH_TO_ARM)
5942 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5943 else if ((r_type == (unsigned int) R_ARM_CALL
5944 || r_type == (unsigned int) R_ARM_JUMP24)
5945 && branch_type == ST_BRANCH_TO_THUMB)
5946 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5947 else
5948 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5949 }
5950
5951 *new_stub = TRUE;
5952 return stub_entry;
5953 }
5954
5955 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5956 gateway veneer to transition from non secure to secure state and create them
5957 accordingly.
5958
5959 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5960 defines the conditions that govern Secure Gateway veneer creation for a
5961 given symbol <SYM> as follows:
5962 - it has function type
5963 - it has non local binding
5964 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5965 same type, binding and value as <SYM> (called normal symbol).
5966 An entry function can handle secure state transition itself in which case
5967 its special symbol would have a different value from the normal symbol.
5968
5969 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5970 entry mapping while HTAB gives the name to hash entry mapping.
5971 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5972 created.
5973
5974 The return value gives whether a stub failed to be allocated. */
5975
5976 static bfd_boolean
5977 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5978 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5979 int *cmse_stub_created)
5980 {
5981 const struct elf_backend_data *bed;
5982 Elf_Internal_Shdr *symtab_hdr;
5983 unsigned i, j, sym_count, ext_start;
5984 Elf_Internal_Sym *cmse_sym, *local_syms;
5985 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5986 enum arm_st_branch_type branch_type;
5987 char *sym_name, *lsym_name;
5988 bfd_vma sym_value;
5989 asection *section;
5990 struct elf32_arm_stub_hash_entry *stub_entry;
5991 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5992
5993 bed = get_elf_backend_data (input_bfd);
5994 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5995 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5996 ext_start = symtab_hdr->sh_info;
5997 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5998 && out_attr[Tag_CPU_arch_profile].i == 'M');
5999
6000 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
6001 if (local_syms == NULL)
6002 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6003 symtab_hdr->sh_info, 0, NULL, NULL,
6004 NULL);
6005 if (symtab_hdr->sh_info && local_syms == NULL)
6006 return FALSE;
6007
6008 /* Scan symbols. */
6009 for (i = 0; i < sym_count; i++)
6010 {
6011 cmse_invalid = FALSE;
6012
6013 if (i < ext_start)
6014 {
6015 cmse_sym = &local_syms[i];
6016 sym_name = bfd_elf_string_from_elf_section (input_bfd,
6017 symtab_hdr->sh_link,
6018 cmse_sym->st_name);
6019 if (!sym_name || !CONST_STRNEQ (sym_name, CMSE_PREFIX))
6020 continue;
6021
6022 /* Special symbol with local binding. */
6023 cmse_invalid = TRUE;
6024 }
6025 else
6026 {
6027 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
6028 sym_name = (char *) cmse_hash->root.root.root.string;
6029 if (!CONST_STRNEQ (sym_name, CMSE_PREFIX))
6030 continue;
6031
6032 /* Special symbol has incorrect binding or type. */
6033 if ((cmse_hash->root.root.type != bfd_link_hash_defined
6034 && cmse_hash->root.root.type != bfd_link_hash_defweak)
6035 || cmse_hash->root.type != STT_FUNC)
6036 cmse_invalid = TRUE;
6037 }
6038
6039 if (!is_v8m)
6040 {
6041 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6042 "ARMv8-M architecture or later"),
6043 input_bfd, sym_name);
6044 is_v8m = TRUE; /* Avoid multiple warning. */
6045 ret = FALSE;
6046 }
6047
6048 if (cmse_invalid)
6049 {
6050 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6051 " a global or weak function symbol"),
6052 input_bfd, sym_name);
6053 ret = FALSE;
6054 if (i < ext_start)
6055 continue;
6056 }
6057
6058 sym_name += strlen (CMSE_PREFIX);
6059 hash = (struct elf32_arm_link_hash_entry *)
6060 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6061
6062 /* No associated normal symbol or it is neither global nor weak. */
6063 if (!hash
6064 || (hash->root.root.type != bfd_link_hash_defined
6065 && hash->root.root.type != bfd_link_hash_defweak)
6066 || hash->root.type != STT_FUNC)
6067 {
6068 /* Initialize here to avoid warning about use of possibly
6069 uninitialized variable. */
6070 j = 0;
6071
6072 if (!hash)
6073 {
6074 /* Searching for a normal symbol with local binding. */
6075 for (; j < ext_start; j++)
6076 {
6077 lsym_name =
6078 bfd_elf_string_from_elf_section (input_bfd,
6079 symtab_hdr->sh_link,
6080 local_syms[j].st_name);
6081 if (!strcmp (sym_name, lsym_name))
6082 break;
6083 }
6084 }
6085
6086 if (hash || j < ext_start)
6087 {
6088 _bfd_error_handler
6089 (_("%pB: invalid standard symbol `%s'; it must be "
6090 "a global or weak function symbol"),
6091 input_bfd, sym_name);
6092 }
6093 else
6094 _bfd_error_handler
6095 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6096 ret = FALSE;
6097 if (!hash)
6098 continue;
6099 }
6100
6101 sym_value = hash->root.root.u.def.value;
6102 section = hash->root.root.u.def.section;
6103
6104 if (cmse_hash->root.root.u.def.section != section)
6105 {
6106 _bfd_error_handler
6107 (_("%pB: `%s' and its special symbol are in different sections"),
6108 input_bfd, sym_name);
6109 ret = FALSE;
6110 }
6111 if (cmse_hash->root.root.u.def.value != sym_value)
6112 continue; /* Ignore: could be an entry function starting with SG. */
6113
6114 /* If this section is a link-once section that will be discarded, then
6115 don't create any stubs. */
6116 if (section->output_section == NULL)
6117 {
6118 _bfd_error_handler
6119 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6120 continue;
6121 }
6122
6123 if (hash->root.size == 0)
6124 {
6125 _bfd_error_handler
6126 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6127 ret = FALSE;
6128 }
6129
6130 if (!ret)
6131 continue;
6132 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6133 stub_entry
6134 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6135 NULL, NULL, section, hash, sym_name,
6136 sym_value, branch_type, &new_stub);
6137
6138 if (stub_entry == NULL)
6139 ret = FALSE;
6140 else
6141 {
6142 BFD_ASSERT (new_stub);
6143 (*cmse_stub_created)++;
6144 }
6145 }
6146
6147 if (!symtab_hdr->contents)
6148 free (local_syms);
6149 return ret;
6150 }
6151
6152 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6153 code entry function, ie can be called from non secure code without using a
6154 veneer. */
6155
6156 static bfd_boolean
6157 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6158 {
6159 bfd_byte contents[4];
6160 uint32_t first_insn;
6161 asection *section;
6162 file_ptr offset;
6163 bfd *abfd;
6164
6165 /* Defined symbol of function type. */
6166 if (hash->root.root.type != bfd_link_hash_defined
6167 && hash->root.root.type != bfd_link_hash_defweak)
6168 return FALSE;
6169 if (hash->root.type != STT_FUNC)
6170 return FALSE;
6171
6172 /* Read first instruction. */
6173 section = hash->root.root.u.def.section;
6174 abfd = section->owner;
6175 offset = hash->root.root.u.def.value - section->vma;
6176 if (!bfd_get_section_contents (abfd, section, contents, offset,
6177 sizeof (contents)))
6178 return FALSE;
6179
6180 first_insn = bfd_get_32 (abfd, contents);
6181
6182 /* Starts by SG instruction. */
6183 return first_insn == 0xe97fe97f;
6184 }
6185
6186 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6187 secure gateway veneers (ie. the veneers was not in the input import library)
6188 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6189
6190 static bfd_boolean
6191 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6192 {
6193 struct elf32_arm_stub_hash_entry *stub_entry;
6194 struct bfd_link_info *info;
6195
6196 /* Massage our args to the form they really have. */
6197 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6198 info = (struct bfd_link_info *) gen_info;
6199
6200 if (info->out_implib_bfd)
6201 return TRUE;
6202
6203 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6204 return TRUE;
6205
6206 if (stub_entry->stub_offset == (bfd_vma) -1)
6207 _bfd_error_handler (" %s", stub_entry->output_name);
6208
6209 return TRUE;
6210 }
6211
6212 /* Set offset of each secure gateway veneers so that its address remain
6213 identical to the one in the input import library referred by
6214 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6215 (present in input import library but absent from the executable being
6216 linked) or if new veneers appeared and there is no output import library
6217 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6218 number of secure gateway veneers found in the input import library.
6219
6220 The function returns whether an error occurred. If no error occurred,
6221 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6222 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6223 veneer observed set for new veneers to be layed out after. */
6224
6225 static bfd_boolean
6226 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6227 struct elf32_arm_link_hash_table *htab,
6228 int *cmse_stub_created)
6229 {
6230 long symsize;
6231 char *sym_name;
6232 flagword flags;
6233 long i, symcount;
6234 bfd *in_implib_bfd;
6235 asection *stub_out_sec;
6236 bfd_boolean ret = TRUE;
6237 Elf_Internal_Sym *intsym;
6238 const char *out_sec_name;
6239 bfd_size_type cmse_stub_size;
6240 asymbol **sympp = NULL, *sym;
6241 struct elf32_arm_link_hash_entry *hash;
6242 const insn_sequence *cmse_stub_template;
6243 struct elf32_arm_stub_hash_entry *stub_entry;
6244 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6245 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6246 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6247
6248 /* No input secure gateway import library. */
6249 if (!htab->in_implib_bfd)
6250 return TRUE;
6251
6252 in_implib_bfd = htab->in_implib_bfd;
6253 if (!htab->cmse_implib)
6254 {
6255 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6256 "Gateway import libraries"), in_implib_bfd);
6257 return FALSE;
6258 }
6259
6260 /* Get symbol table size. */
6261 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6262 if (symsize < 0)
6263 return FALSE;
6264
6265 /* Read in the input secure gateway import library's symbol table. */
6266 sympp = (asymbol **) bfd_malloc (symsize);
6267 if (sympp == NULL)
6268 return FALSE;
6269
6270 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6271 if (symcount < 0)
6272 {
6273 ret = FALSE;
6274 goto free_sym_buf;
6275 }
6276
6277 htab->new_cmse_stub_offset = 0;
6278 cmse_stub_size =
6279 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6280 &cmse_stub_template,
6281 &cmse_stub_template_size);
6282 out_sec_name =
6283 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6284 stub_out_sec =
6285 bfd_get_section_by_name (htab->obfd, out_sec_name);
6286 if (stub_out_sec != NULL)
6287 cmse_stub_sec_vma = stub_out_sec->vma;
6288
6289 /* Set addresses of veneers mentionned in input secure gateway import
6290 library's symbol table. */
6291 for (i = 0; i < symcount; i++)
6292 {
6293 sym = sympp[i];
6294 flags = sym->flags;
6295 sym_name = (char *) bfd_asymbol_name (sym);
6296 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6297
6298 if (sym->section != bfd_abs_section_ptr
6299 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6300 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6301 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6302 != ST_BRANCH_TO_THUMB))
6303 {
6304 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6305 "symbol should be absolute, global and "
6306 "refer to Thumb functions"),
6307 in_implib_bfd, sym_name);
6308 ret = FALSE;
6309 continue;
6310 }
6311
6312 veneer_value = bfd_asymbol_value (sym);
6313 stub_offset = veneer_value - cmse_stub_sec_vma;
6314 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6315 FALSE, FALSE);
6316 hash = (struct elf32_arm_link_hash_entry *)
6317 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6318
6319 /* Stub entry should have been created by cmse_scan or the symbol be of
6320 a secure function callable from non secure code. */
6321 if (!stub_entry && !hash)
6322 {
6323 bfd_boolean new_stub;
6324
6325 _bfd_error_handler
6326 (_("entry function `%s' disappeared from secure code"), sym_name);
6327 hash = (struct elf32_arm_link_hash_entry *)
6328 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6329 stub_entry
6330 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6331 NULL, NULL, bfd_abs_section_ptr, hash,
6332 sym_name, veneer_value,
6333 ST_BRANCH_TO_THUMB, &new_stub);
6334 if (stub_entry == NULL)
6335 ret = FALSE;
6336 else
6337 {
6338 BFD_ASSERT (new_stub);
6339 new_cmse_stubs_created++;
6340 (*cmse_stub_created)++;
6341 }
6342 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6343 stub_entry->stub_offset = stub_offset;
6344 }
6345 /* Symbol found is not callable from non secure code. */
6346 else if (!stub_entry)
6347 {
6348 if (!cmse_entry_fct_p (hash))
6349 {
6350 _bfd_error_handler (_("`%s' refers to a non entry function"),
6351 sym_name);
6352 ret = FALSE;
6353 }
6354 continue;
6355 }
6356 else
6357 {
6358 /* Only stubs for SG veneers should have been created. */
6359 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6360
6361 /* Check visibility hasn't changed. */
6362 if (!!(flags & BSF_GLOBAL)
6363 != (hash->root.root.type == bfd_link_hash_defined))
6364 _bfd_error_handler
6365 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6366 sym_name);
6367
6368 stub_entry->stub_offset = stub_offset;
6369 }
6370
6371 /* Size should match that of a SG veneer. */
6372 if (intsym->st_size != cmse_stub_size)
6373 {
6374 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6375 in_implib_bfd, sym_name);
6376 ret = FALSE;
6377 }
6378
6379 /* Previous veneer address is before current SG veneer section. */
6380 if (veneer_value < cmse_stub_sec_vma)
6381 {
6382 /* Avoid offset underflow. */
6383 if (stub_entry)
6384 stub_entry->stub_offset = 0;
6385 stub_offset = 0;
6386 ret = FALSE;
6387 }
6388
6389 /* Complain if stub offset not a multiple of stub size. */
6390 if (stub_offset % cmse_stub_size)
6391 {
6392 _bfd_error_handler
6393 (_("offset of veneer for entry function `%s' not a multiple of "
6394 "its size"), sym_name);
6395 ret = FALSE;
6396 }
6397
6398 if (!ret)
6399 continue;
6400
6401 new_cmse_stubs_created--;
6402 if (veneer_value < cmse_stub_array_start)
6403 cmse_stub_array_start = veneer_value;
6404 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6405 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6406 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6407 }
6408
6409 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6410 {
6411 BFD_ASSERT (new_cmse_stubs_created > 0);
6412 _bfd_error_handler
6413 (_("new entry function(s) introduced but no output import library "
6414 "specified:"));
6415 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6416 }
6417
6418 if (cmse_stub_array_start != cmse_stub_sec_vma)
6419 {
6420 _bfd_error_handler
6421 (_("start address of `%s' is different from previous link"),
6422 out_sec_name);
6423 ret = FALSE;
6424 }
6425
6426 free_sym_buf:
6427 free (sympp);
6428 return ret;
6429 }
6430
6431 /* Determine and set the size of the stub section for a final link.
6432
6433 The basic idea here is to examine all the relocations looking for
6434 PC-relative calls to a target that is unreachable with a "bl"
6435 instruction. */
6436
6437 bfd_boolean
6438 elf32_arm_size_stubs (bfd *output_bfd,
6439 bfd *stub_bfd,
6440 struct bfd_link_info *info,
6441 bfd_signed_vma group_size,
6442 asection * (*add_stub_section) (const char *, asection *,
6443 asection *,
6444 unsigned int),
6445 void (*layout_sections_again) (void))
6446 {
6447 bfd_boolean ret = TRUE;
6448 obj_attribute *out_attr;
6449 int cmse_stub_created = 0;
6450 bfd_size_type stub_group_size;
6451 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6452 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6453 struct a8_erratum_fix *a8_fixes = NULL;
6454 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6455 struct a8_erratum_reloc *a8_relocs = NULL;
6456 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6457
6458 if (htab == NULL)
6459 return FALSE;
6460
6461 if (htab->fix_cortex_a8)
6462 {
6463 a8_fixes = (struct a8_erratum_fix *)
6464 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6465 a8_relocs = (struct a8_erratum_reloc *)
6466 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6467 }
6468
6469 /* Propagate mach to stub bfd, because it may not have been
6470 finalized when we created stub_bfd. */
6471 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6472 bfd_get_mach (output_bfd));
6473
6474 /* Stash our params away. */
6475 htab->stub_bfd = stub_bfd;
6476 htab->add_stub_section = add_stub_section;
6477 htab->layout_sections_again = layout_sections_again;
6478 stubs_always_after_branch = group_size < 0;
6479
6480 out_attr = elf_known_obj_attributes_proc (output_bfd);
6481 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6482
6483 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6484 as the first half of a 32-bit branch straddling two 4K pages. This is a
6485 crude way of enforcing that. */
6486 if (htab->fix_cortex_a8)
6487 stubs_always_after_branch = 1;
6488
6489 if (group_size < 0)
6490 stub_group_size = -group_size;
6491 else
6492 stub_group_size = group_size;
6493
6494 if (stub_group_size == 1)
6495 {
6496 /* Default values. */
6497 /* Thumb branch range is +-4MB has to be used as the default
6498 maximum size (a given section can contain both ARM and Thumb
6499 code, so the worst case has to be taken into account).
6500
6501 This value is 24K less than that, which allows for 2025
6502 12-byte stubs. If we exceed that, then we will fail to link.
6503 The user will have to relink with an explicit group size
6504 option. */
6505 stub_group_size = 4170000;
6506 }
6507
6508 group_sections (htab, stub_group_size, stubs_always_after_branch);
6509
6510 /* If we're applying the cortex A8 fix, we need to determine the
6511 program header size now, because we cannot change it later --
6512 that could alter section placements. Notice the A8 erratum fix
6513 ends up requiring the section addresses to remain unchanged
6514 modulo the page size. That's something we cannot represent
6515 inside BFD, and we don't want to force the section alignment to
6516 be the page size. */
6517 if (htab->fix_cortex_a8)
6518 (*htab->layout_sections_again) ();
6519
6520 while (1)
6521 {
6522 bfd *input_bfd;
6523 unsigned int bfd_indx;
6524 asection *stub_sec;
6525 enum elf32_arm_stub_type stub_type;
6526 bfd_boolean stub_changed = FALSE;
6527 unsigned prev_num_a8_fixes = num_a8_fixes;
6528
6529 num_a8_fixes = 0;
6530 for (input_bfd = info->input_bfds, bfd_indx = 0;
6531 input_bfd != NULL;
6532 input_bfd = input_bfd->link.next, bfd_indx++)
6533 {
6534 Elf_Internal_Shdr *symtab_hdr;
6535 asection *section;
6536 Elf_Internal_Sym *local_syms = NULL;
6537
6538 if (!is_arm_elf (input_bfd))
6539 continue;
6540 if ((input_bfd->flags & DYNAMIC) != 0
6541 && (elf_sym_hashes (input_bfd) == NULL
6542 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6543 continue;
6544
6545 num_a8_relocs = 0;
6546
6547 /* We'll need the symbol table in a second. */
6548 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6549 if (symtab_hdr->sh_info == 0)
6550 continue;
6551
6552 /* Limit scan of symbols to object file whose profile is
6553 Microcontroller to not hinder performance in the general case. */
6554 if (m_profile && first_veneer_scan)
6555 {
6556 struct elf_link_hash_entry **sym_hashes;
6557
6558 sym_hashes = elf_sym_hashes (input_bfd);
6559 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6560 &cmse_stub_created))
6561 goto error_ret_free_local;
6562
6563 if (cmse_stub_created != 0)
6564 stub_changed = TRUE;
6565 }
6566
6567 /* Walk over each section attached to the input bfd. */
6568 for (section = input_bfd->sections;
6569 section != NULL;
6570 section = section->next)
6571 {
6572 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6573
6574 /* If there aren't any relocs, then there's nothing more
6575 to do. */
6576 if ((section->flags & SEC_RELOC) == 0
6577 || section->reloc_count == 0
6578 || (section->flags & SEC_CODE) == 0)
6579 continue;
6580
6581 /* If this section is a link-once section that will be
6582 discarded, then don't create any stubs. */
6583 if (section->output_section == NULL
6584 || section->output_section->owner != output_bfd)
6585 continue;
6586
6587 /* Get the relocs. */
6588 internal_relocs
6589 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6590 NULL, info->keep_memory);
6591 if (internal_relocs == NULL)
6592 goto error_ret_free_local;
6593
6594 /* Now examine each relocation. */
6595 irela = internal_relocs;
6596 irelaend = irela + section->reloc_count;
6597 for (; irela < irelaend; irela++)
6598 {
6599 unsigned int r_type, r_indx;
6600 asection *sym_sec;
6601 bfd_vma sym_value;
6602 bfd_vma destination;
6603 struct elf32_arm_link_hash_entry *hash;
6604 const char *sym_name;
6605 unsigned char st_type;
6606 enum arm_st_branch_type branch_type;
6607 bfd_boolean created_stub = FALSE;
6608
6609 r_type = ELF32_R_TYPE (irela->r_info);
6610 r_indx = ELF32_R_SYM (irela->r_info);
6611
6612 if (r_type >= (unsigned int) R_ARM_max)
6613 {
6614 bfd_set_error (bfd_error_bad_value);
6615 error_ret_free_internal:
6616 if (elf_section_data (section)->relocs == NULL)
6617 free (internal_relocs);
6618 /* Fall through. */
6619 error_ret_free_local:
6620 if (symtab_hdr->contents != (unsigned char *) local_syms)
6621 free (local_syms);
6622 return FALSE;
6623 }
6624
6625 hash = NULL;
6626 if (r_indx >= symtab_hdr->sh_info)
6627 hash = elf32_arm_hash_entry
6628 (elf_sym_hashes (input_bfd)
6629 [r_indx - symtab_hdr->sh_info]);
6630
6631 /* Only look for stubs on branch instructions, or
6632 non-relaxed TLSCALL */
6633 if ((r_type != (unsigned int) R_ARM_CALL)
6634 && (r_type != (unsigned int) R_ARM_THM_CALL)
6635 && (r_type != (unsigned int) R_ARM_JUMP24)
6636 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6637 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6638 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6639 && (r_type != (unsigned int) R_ARM_PLT32)
6640 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6641 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6642 && r_type == elf32_arm_tls_transition
6643 (info, r_type, &hash->root)
6644 && ((hash ? hash->tls_type
6645 : (elf32_arm_local_got_tls_type
6646 (input_bfd)[r_indx]))
6647 & GOT_TLS_GDESC) != 0))
6648 continue;
6649
6650 /* Now determine the call target, its name, value,
6651 section. */
6652 sym_sec = NULL;
6653 sym_value = 0;
6654 destination = 0;
6655 sym_name = NULL;
6656
6657 if (r_type == (unsigned int) R_ARM_TLS_CALL
6658 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6659 {
6660 /* A non-relaxed TLS call. The target is the
6661 plt-resident trampoline and nothing to do
6662 with the symbol. */
6663 BFD_ASSERT (htab->tls_trampoline > 0);
6664 sym_sec = htab->root.splt;
6665 sym_value = htab->tls_trampoline;
6666 hash = 0;
6667 st_type = STT_FUNC;
6668 branch_type = ST_BRANCH_TO_ARM;
6669 }
6670 else if (!hash)
6671 {
6672 /* It's a local symbol. */
6673 Elf_Internal_Sym *sym;
6674
6675 if (local_syms == NULL)
6676 {
6677 local_syms
6678 = (Elf_Internal_Sym *) symtab_hdr->contents;
6679 if (local_syms == NULL)
6680 local_syms
6681 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6682 symtab_hdr->sh_info, 0,
6683 NULL, NULL, NULL);
6684 if (local_syms == NULL)
6685 goto error_ret_free_internal;
6686 }
6687
6688 sym = local_syms + r_indx;
6689 if (sym->st_shndx == SHN_UNDEF)
6690 sym_sec = bfd_und_section_ptr;
6691 else if (sym->st_shndx == SHN_ABS)
6692 sym_sec = bfd_abs_section_ptr;
6693 else if (sym->st_shndx == SHN_COMMON)
6694 sym_sec = bfd_com_section_ptr;
6695 else
6696 sym_sec =
6697 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6698
6699 if (!sym_sec)
6700 /* This is an undefined symbol. It can never
6701 be resolved. */
6702 continue;
6703
6704 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6705 sym_value = sym->st_value;
6706 destination = (sym_value + irela->r_addend
6707 + sym_sec->output_offset
6708 + sym_sec->output_section->vma);
6709 st_type = ELF_ST_TYPE (sym->st_info);
6710 branch_type =
6711 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6712 sym_name
6713 = bfd_elf_string_from_elf_section (input_bfd,
6714 symtab_hdr->sh_link,
6715 sym->st_name);
6716 }
6717 else
6718 {
6719 /* It's an external symbol. */
6720 while (hash->root.root.type == bfd_link_hash_indirect
6721 || hash->root.root.type == bfd_link_hash_warning)
6722 hash = ((struct elf32_arm_link_hash_entry *)
6723 hash->root.root.u.i.link);
6724
6725 if (hash->root.root.type == bfd_link_hash_defined
6726 || hash->root.root.type == bfd_link_hash_defweak)
6727 {
6728 sym_sec = hash->root.root.u.def.section;
6729 sym_value = hash->root.root.u.def.value;
6730
6731 struct elf32_arm_link_hash_table *globals =
6732 elf32_arm_hash_table (info);
6733
6734 /* For a destination in a shared library,
6735 use the PLT stub as target address to
6736 decide whether a branch stub is
6737 needed. */
6738 if (globals != NULL
6739 && globals->root.splt != NULL
6740 && hash != NULL
6741 && hash->root.plt.offset != (bfd_vma) -1)
6742 {
6743 sym_sec = globals->root.splt;
6744 sym_value = hash->root.plt.offset;
6745 if (sym_sec->output_section != NULL)
6746 destination = (sym_value
6747 + sym_sec->output_offset
6748 + sym_sec->output_section->vma);
6749 }
6750 else if (sym_sec->output_section != NULL)
6751 destination = (sym_value + irela->r_addend
6752 + sym_sec->output_offset
6753 + sym_sec->output_section->vma);
6754 }
6755 else if ((hash->root.root.type == bfd_link_hash_undefined)
6756 || (hash->root.root.type == bfd_link_hash_undefweak))
6757 {
6758 /* For a shared library, use the PLT stub as
6759 target address to decide whether a long
6760 branch stub is needed.
6761 For absolute code, they cannot be handled. */
6762 struct elf32_arm_link_hash_table *globals =
6763 elf32_arm_hash_table (info);
6764
6765 if (globals != NULL
6766 && globals->root.splt != NULL
6767 && hash != NULL
6768 && hash->root.plt.offset != (bfd_vma) -1)
6769 {
6770 sym_sec = globals->root.splt;
6771 sym_value = hash->root.plt.offset;
6772 if (sym_sec->output_section != NULL)
6773 destination = (sym_value
6774 + sym_sec->output_offset
6775 + sym_sec->output_section->vma);
6776 }
6777 else
6778 continue;
6779 }
6780 else
6781 {
6782 bfd_set_error (bfd_error_bad_value);
6783 goto error_ret_free_internal;
6784 }
6785 st_type = hash->root.type;
6786 branch_type =
6787 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6788 sym_name = hash->root.root.root.string;
6789 }
6790
6791 do
6792 {
6793 bfd_boolean new_stub;
6794 struct elf32_arm_stub_hash_entry *stub_entry;
6795
6796 /* Determine what (if any) linker stub is needed. */
6797 stub_type = arm_type_of_stub (info, section, irela,
6798 st_type, &branch_type,
6799 hash, destination, sym_sec,
6800 input_bfd, sym_name);
6801 if (stub_type == arm_stub_none)
6802 break;
6803
6804 /* We've either created a stub for this reloc already,
6805 or we are about to. */
6806 stub_entry =
6807 elf32_arm_create_stub (htab, stub_type, section, irela,
6808 sym_sec, hash,
6809 (char *) sym_name, sym_value,
6810 branch_type, &new_stub);
6811
6812 created_stub = stub_entry != NULL;
6813 if (!created_stub)
6814 goto error_ret_free_internal;
6815 else if (!new_stub)
6816 break;
6817 else
6818 stub_changed = TRUE;
6819 }
6820 while (0);
6821
6822 /* Look for relocations which might trigger Cortex-A8
6823 erratum. */
6824 if (htab->fix_cortex_a8
6825 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6826 || r_type == (unsigned int) R_ARM_THM_JUMP19
6827 || r_type == (unsigned int) R_ARM_THM_CALL
6828 || r_type == (unsigned int) R_ARM_THM_XPC22))
6829 {
6830 bfd_vma from = section->output_section->vma
6831 + section->output_offset
6832 + irela->r_offset;
6833
6834 if ((from & 0xfff) == 0xffe)
6835 {
6836 /* Found a candidate. Note we haven't checked the
6837 destination is within 4K here: if we do so (and
6838 don't create an entry in a8_relocs) we can't tell
6839 that a branch should have been relocated when
6840 scanning later. */
6841 if (num_a8_relocs == a8_reloc_table_size)
6842 {
6843 a8_reloc_table_size *= 2;
6844 a8_relocs = (struct a8_erratum_reloc *)
6845 bfd_realloc (a8_relocs,
6846 sizeof (struct a8_erratum_reloc)
6847 * a8_reloc_table_size);
6848 }
6849
6850 a8_relocs[num_a8_relocs].from = from;
6851 a8_relocs[num_a8_relocs].destination = destination;
6852 a8_relocs[num_a8_relocs].r_type = r_type;
6853 a8_relocs[num_a8_relocs].branch_type = branch_type;
6854 a8_relocs[num_a8_relocs].sym_name = sym_name;
6855 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6856 a8_relocs[num_a8_relocs].hash = hash;
6857
6858 num_a8_relocs++;
6859 }
6860 }
6861 }
6862
6863 /* We're done with the internal relocs, free them. */
6864 if (elf_section_data (section)->relocs == NULL)
6865 free (internal_relocs);
6866 }
6867
6868 if (htab->fix_cortex_a8)
6869 {
6870 /* Sort relocs which might apply to Cortex-A8 erratum. */
6871 qsort (a8_relocs, num_a8_relocs,
6872 sizeof (struct a8_erratum_reloc),
6873 &a8_reloc_compare);
6874
6875 /* Scan for branches which might trigger Cortex-A8 erratum. */
6876 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6877 &num_a8_fixes, &a8_fix_table_size,
6878 a8_relocs, num_a8_relocs,
6879 prev_num_a8_fixes, &stub_changed)
6880 != 0)
6881 goto error_ret_free_local;
6882 }
6883
6884 if (local_syms != NULL
6885 && symtab_hdr->contents != (unsigned char *) local_syms)
6886 {
6887 if (!info->keep_memory)
6888 free (local_syms);
6889 else
6890 symtab_hdr->contents = (unsigned char *) local_syms;
6891 }
6892 }
6893
6894 if (first_veneer_scan
6895 && !set_cmse_veneer_addr_from_implib (info, htab,
6896 &cmse_stub_created))
6897 ret = FALSE;
6898
6899 if (prev_num_a8_fixes != num_a8_fixes)
6900 stub_changed = TRUE;
6901
6902 if (!stub_changed)
6903 break;
6904
6905 /* OK, we've added some stubs. Find out the new size of the
6906 stub sections. */
6907 for (stub_sec = htab->stub_bfd->sections;
6908 stub_sec != NULL;
6909 stub_sec = stub_sec->next)
6910 {
6911 /* Ignore non-stub sections. */
6912 if (!strstr (stub_sec->name, STUB_SUFFIX))
6913 continue;
6914
6915 stub_sec->size = 0;
6916 }
6917
6918 /* Add new SG veneers after those already in the input import
6919 library. */
6920 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6921 stub_type++)
6922 {
6923 bfd_vma *start_offset_p;
6924 asection **stub_sec_p;
6925
6926 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6927 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6928 if (start_offset_p == NULL)
6929 continue;
6930
6931 BFD_ASSERT (stub_sec_p != NULL);
6932 if (*stub_sec_p != NULL)
6933 (*stub_sec_p)->size = *start_offset_p;
6934 }
6935
6936 /* Compute stub section size, considering padding. */
6937 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6938 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6939 stub_type++)
6940 {
6941 int size, padding;
6942 asection **stub_sec_p;
6943
6944 padding = arm_dedicated_stub_section_padding (stub_type);
6945 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6946 /* Skip if no stub input section or no stub section padding
6947 required. */
6948 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6949 continue;
6950 /* Stub section padding required but no dedicated section. */
6951 BFD_ASSERT (stub_sec_p);
6952
6953 size = (*stub_sec_p)->size;
6954 size = (size + padding - 1) & ~(padding - 1);
6955 (*stub_sec_p)->size = size;
6956 }
6957
6958 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6959 if (htab->fix_cortex_a8)
6960 for (i = 0; i < num_a8_fixes; i++)
6961 {
6962 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6963 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6964
6965 if (stub_sec == NULL)
6966 return FALSE;
6967
6968 stub_sec->size
6969 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6970 NULL);
6971 }
6972
6973
6974 /* Ask the linker to do its stuff. */
6975 (*htab->layout_sections_again) ();
6976 first_veneer_scan = FALSE;
6977 }
6978
6979 /* Add stubs for Cortex-A8 erratum fixes now. */
6980 if (htab->fix_cortex_a8)
6981 {
6982 for (i = 0; i < num_a8_fixes; i++)
6983 {
6984 struct elf32_arm_stub_hash_entry *stub_entry;
6985 char *stub_name = a8_fixes[i].stub_name;
6986 asection *section = a8_fixes[i].section;
6987 unsigned int section_id = a8_fixes[i].section->id;
6988 asection *link_sec = htab->stub_group[section_id].link_sec;
6989 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6990 const insn_sequence *template_sequence;
6991 int template_size, size = 0;
6992
6993 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6994 TRUE, FALSE);
6995 if (stub_entry == NULL)
6996 {
6997 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6998 section->owner, stub_name);
6999 return FALSE;
7000 }
7001
7002 stub_entry->stub_sec = stub_sec;
7003 stub_entry->stub_offset = (bfd_vma) -1;
7004 stub_entry->id_sec = link_sec;
7005 stub_entry->stub_type = a8_fixes[i].stub_type;
7006 stub_entry->source_value = a8_fixes[i].offset;
7007 stub_entry->target_section = a8_fixes[i].section;
7008 stub_entry->target_value = a8_fixes[i].target_offset;
7009 stub_entry->orig_insn = a8_fixes[i].orig_insn;
7010 stub_entry->branch_type = a8_fixes[i].branch_type;
7011
7012 size = find_stub_size_and_template (a8_fixes[i].stub_type,
7013 &template_sequence,
7014 &template_size);
7015
7016 stub_entry->stub_size = size;
7017 stub_entry->stub_template = template_sequence;
7018 stub_entry->stub_template_size = template_size;
7019 }
7020
7021 /* Stash the Cortex-A8 erratum fix array for use later in
7022 elf32_arm_write_section(). */
7023 htab->a8_erratum_fixes = a8_fixes;
7024 htab->num_a8_erratum_fixes = num_a8_fixes;
7025 }
7026 else
7027 {
7028 htab->a8_erratum_fixes = NULL;
7029 htab->num_a8_erratum_fixes = 0;
7030 }
7031 return ret;
7032 }
7033
7034 /* Build all the stubs associated with the current output file. The
7035 stubs are kept in a hash table attached to the main linker hash
7036 table. We also set up the .plt entries for statically linked PIC
7037 functions here. This function is called via arm_elf_finish in the
7038 linker. */
7039
7040 bfd_boolean
7041 elf32_arm_build_stubs (struct bfd_link_info *info)
7042 {
7043 asection *stub_sec;
7044 struct bfd_hash_table *table;
7045 enum elf32_arm_stub_type stub_type;
7046 struct elf32_arm_link_hash_table *htab;
7047
7048 htab = elf32_arm_hash_table (info);
7049 if (htab == NULL)
7050 return FALSE;
7051
7052 for (stub_sec = htab->stub_bfd->sections;
7053 stub_sec != NULL;
7054 stub_sec = stub_sec->next)
7055 {
7056 bfd_size_type size;
7057
7058 /* Ignore non-stub sections. */
7059 if (!strstr (stub_sec->name, STUB_SUFFIX))
7060 continue;
7061
7062 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7063 must at least be done for stub section requiring padding and for SG
7064 veneers to ensure that a non secure code branching to a removed SG
7065 veneer causes an error. */
7066 size = stub_sec->size;
7067 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7068 if (stub_sec->contents == NULL && size != 0)
7069 return FALSE;
7070
7071 stub_sec->size = 0;
7072 }
7073
7074 /* Add new SG veneers after those already in the input import library. */
7075 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7076 {
7077 bfd_vma *start_offset_p;
7078 asection **stub_sec_p;
7079
7080 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7081 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7082 if (start_offset_p == NULL)
7083 continue;
7084
7085 BFD_ASSERT (stub_sec_p != NULL);
7086 if (*stub_sec_p != NULL)
7087 (*stub_sec_p)->size = *start_offset_p;
7088 }
7089
7090 /* Build the stubs as directed by the stub hash table. */
7091 table = &htab->stub_hash_table;
7092 bfd_hash_traverse (table, arm_build_one_stub, info);
7093 if (htab->fix_cortex_a8)
7094 {
7095 /* Place the cortex a8 stubs last. */
7096 htab->fix_cortex_a8 = -1;
7097 bfd_hash_traverse (table, arm_build_one_stub, info);
7098 }
7099
7100 return TRUE;
7101 }
7102
7103 /* Locate the Thumb encoded calling stub for NAME. */
7104
7105 static struct elf_link_hash_entry *
7106 find_thumb_glue (struct bfd_link_info *link_info,
7107 const char *name,
7108 char **error_message)
7109 {
7110 char *tmp_name;
7111 struct elf_link_hash_entry *hash;
7112 struct elf32_arm_link_hash_table *hash_table;
7113
7114 /* We need a pointer to the armelf specific hash table. */
7115 hash_table = elf32_arm_hash_table (link_info);
7116 if (hash_table == NULL)
7117 return NULL;
7118
7119 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7120 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7121
7122 BFD_ASSERT (tmp_name);
7123
7124 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7125
7126 hash = elf_link_hash_lookup
7127 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7128
7129 if (hash == NULL
7130 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7131 "Thumb", tmp_name, name) == -1)
7132 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7133
7134 free (tmp_name);
7135
7136 return hash;
7137 }
7138
7139 /* Locate the ARM encoded calling stub for NAME. */
7140
7141 static struct elf_link_hash_entry *
7142 find_arm_glue (struct bfd_link_info *link_info,
7143 const char *name,
7144 char **error_message)
7145 {
7146 char *tmp_name;
7147 struct elf_link_hash_entry *myh;
7148 struct elf32_arm_link_hash_table *hash_table;
7149
7150 /* We need a pointer to the elfarm specific hash table. */
7151 hash_table = elf32_arm_hash_table (link_info);
7152 if (hash_table == NULL)
7153 return NULL;
7154
7155 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7156 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7157 BFD_ASSERT (tmp_name);
7158
7159 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7160
7161 myh = elf_link_hash_lookup
7162 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7163
7164 if (myh == NULL
7165 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7166 "ARM", tmp_name, name) == -1)
7167 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7168
7169 free (tmp_name);
7170
7171 return myh;
7172 }
7173
7174 /* ARM->Thumb glue (static images):
7175
7176 .arm
7177 __func_from_arm:
7178 ldr r12, __func_addr
7179 bx r12
7180 __func_addr:
7181 .word func @ behave as if you saw a ARM_32 reloc.
7182
7183 (v5t static images)
7184 .arm
7185 __func_from_arm:
7186 ldr pc, __func_addr
7187 __func_addr:
7188 .word func @ behave as if you saw a ARM_32 reloc.
7189
7190 (relocatable images)
7191 .arm
7192 __func_from_arm:
7193 ldr r12, __func_offset
7194 add r12, r12, pc
7195 bx r12
7196 __func_offset:
7197 .word func - . */
7198
7199 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7200 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7201 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7202 static const insn32 a2t3_func_addr_insn = 0x00000001;
7203
7204 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7205 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7206 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7207
7208 #define ARM2THUMB_PIC_GLUE_SIZE 16
7209 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7210 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7211 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7212
7213 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7214
7215 .thumb .thumb
7216 .align 2 .align 2
7217 __func_from_thumb: __func_from_thumb:
7218 bx pc push {r6, lr}
7219 nop ldr r6, __func_addr
7220 .arm mov lr, pc
7221 b func bx r6
7222 .arm
7223 ;; back_to_thumb
7224 ldmia r13! {r6, lr}
7225 bx lr
7226 __func_addr:
7227 .word func */
7228
7229 #define THUMB2ARM_GLUE_SIZE 8
7230 static const insn16 t2a1_bx_pc_insn = 0x4778;
7231 static const insn16 t2a2_noop_insn = 0x46c0;
7232 static const insn32 t2a3_b_insn = 0xea000000;
7233
7234 #define VFP11_ERRATUM_VENEER_SIZE 8
7235 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7236 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7237
7238 #define ARM_BX_VENEER_SIZE 12
7239 static const insn32 armbx1_tst_insn = 0xe3100001;
7240 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7241 static const insn32 armbx3_bx_insn = 0xe12fff10;
7242
7243 #ifndef ELFARM_NABI_C_INCLUDED
7244 static void
7245 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7246 {
7247 asection * s;
7248 bfd_byte * contents;
7249
7250 if (size == 0)
7251 {
7252 /* Do not include empty glue sections in the output. */
7253 if (abfd != NULL)
7254 {
7255 s = bfd_get_linker_section (abfd, name);
7256 if (s != NULL)
7257 s->flags |= SEC_EXCLUDE;
7258 }
7259 return;
7260 }
7261
7262 BFD_ASSERT (abfd != NULL);
7263
7264 s = bfd_get_linker_section (abfd, name);
7265 BFD_ASSERT (s != NULL);
7266
7267 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7268
7269 BFD_ASSERT (s->size == size);
7270 s->contents = contents;
7271 }
7272
7273 bfd_boolean
7274 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7275 {
7276 struct elf32_arm_link_hash_table * globals;
7277
7278 globals = elf32_arm_hash_table (info);
7279 BFD_ASSERT (globals != NULL);
7280
7281 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7282 globals->arm_glue_size,
7283 ARM2THUMB_GLUE_SECTION_NAME);
7284
7285 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7286 globals->thumb_glue_size,
7287 THUMB2ARM_GLUE_SECTION_NAME);
7288
7289 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7290 globals->vfp11_erratum_glue_size,
7291 VFP11_ERRATUM_VENEER_SECTION_NAME);
7292
7293 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7294 globals->stm32l4xx_erratum_glue_size,
7295 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7296
7297 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7298 globals->bx_glue_size,
7299 ARM_BX_GLUE_SECTION_NAME);
7300
7301 return TRUE;
7302 }
7303
7304 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7305 returns the symbol identifying the stub. */
7306
7307 static struct elf_link_hash_entry *
7308 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7309 struct elf_link_hash_entry * h)
7310 {
7311 const char * name = h->root.root.string;
7312 asection * s;
7313 char * tmp_name;
7314 struct elf_link_hash_entry * myh;
7315 struct bfd_link_hash_entry * bh;
7316 struct elf32_arm_link_hash_table * globals;
7317 bfd_vma val;
7318 bfd_size_type size;
7319
7320 globals = elf32_arm_hash_table (link_info);
7321 BFD_ASSERT (globals != NULL);
7322 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7323
7324 s = bfd_get_linker_section
7325 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7326
7327 BFD_ASSERT (s != NULL);
7328
7329 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7330 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7331 BFD_ASSERT (tmp_name);
7332
7333 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7334
7335 myh = elf_link_hash_lookup
7336 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7337
7338 if (myh != NULL)
7339 {
7340 /* We've already seen this guy. */
7341 free (tmp_name);
7342 return myh;
7343 }
7344
7345 /* The only trick here is using hash_table->arm_glue_size as the value.
7346 Even though the section isn't allocated yet, this is where we will be
7347 putting it. The +1 on the value marks that the stub has not been
7348 output yet - not that it is a Thumb function. */
7349 bh = NULL;
7350 val = globals->arm_glue_size + 1;
7351 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7352 tmp_name, BSF_GLOBAL, s, val,
7353 NULL, TRUE, FALSE, &bh);
7354
7355 myh = (struct elf_link_hash_entry *) bh;
7356 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7357 myh->forced_local = 1;
7358
7359 free (tmp_name);
7360
7361 if (bfd_link_pic (link_info)
7362 || globals->root.is_relocatable_executable
7363 || globals->pic_veneer)
7364 size = ARM2THUMB_PIC_GLUE_SIZE;
7365 else if (globals->use_blx)
7366 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7367 else
7368 size = ARM2THUMB_STATIC_GLUE_SIZE;
7369
7370 s->size += size;
7371 globals->arm_glue_size += size;
7372
7373 return myh;
7374 }
7375
7376 /* Allocate space for ARMv4 BX veneers. */
7377
7378 static void
7379 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7380 {
7381 asection * s;
7382 struct elf32_arm_link_hash_table *globals;
7383 char *tmp_name;
7384 struct elf_link_hash_entry *myh;
7385 struct bfd_link_hash_entry *bh;
7386 bfd_vma val;
7387
7388 /* BX PC does not need a veneer. */
7389 if (reg == 15)
7390 return;
7391
7392 globals = elf32_arm_hash_table (link_info);
7393 BFD_ASSERT (globals != NULL);
7394 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7395
7396 /* Check if this veneer has already been allocated. */
7397 if (globals->bx_glue_offset[reg])
7398 return;
7399
7400 s = bfd_get_linker_section
7401 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7402
7403 BFD_ASSERT (s != NULL);
7404
7405 /* Add symbol for veneer. */
7406 tmp_name = (char *)
7407 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7408 BFD_ASSERT (tmp_name);
7409
7410 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7411
7412 myh = elf_link_hash_lookup
7413 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7414
7415 BFD_ASSERT (myh == NULL);
7416
7417 bh = NULL;
7418 val = globals->bx_glue_size;
7419 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7420 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7421 NULL, TRUE, FALSE, &bh);
7422
7423 myh = (struct elf_link_hash_entry *) bh;
7424 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7425 myh->forced_local = 1;
7426
7427 s->size += ARM_BX_VENEER_SIZE;
7428 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7429 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7430 }
7431
7432
7433 /* Add an entry to the code/data map for section SEC. */
7434
7435 static void
7436 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7437 {
7438 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7439 unsigned int newidx;
7440
7441 if (sec_data->map == NULL)
7442 {
7443 sec_data->map = (elf32_arm_section_map *)
7444 bfd_malloc (sizeof (elf32_arm_section_map));
7445 sec_data->mapcount = 0;
7446 sec_data->mapsize = 1;
7447 }
7448
7449 newidx = sec_data->mapcount++;
7450
7451 if (sec_data->mapcount > sec_data->mapsize)
7452 {
7453 sec_data->mapsize *= 2;
7454 sec_data->map = (elf32_arm_section_map *)
7455 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7456 * sizeof (elf32_arm_section_map));
7457 }
7458
7459 if (sec_data->map)
7460 {
7461 sec_data->map[newidx].vma = vma;
7462 sec_data->map[newidx].type = type;
7463 }
7464 }
7465
7466
7467 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7468 veneers are handled for now. */
7469
7470 static bfd_vma
7471 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7472 elf32_vfp11_erratum_list *branch,
7473 bfd *branch_bfd,
7474 asection *branch_sec,
7475 unsigned int offset)
7476 {
7477 asection *s;
7478 struct elf32_arm_link_hash_table *hash_table;
7479 char *tmp_name;
7480 struct elf_link_hash_entry *myh;
7481 struct bfd_link_hash_entry *bh;
7482 bfd_vma val;
7483 struct _arm_elf_section_data *sec_data;
7484 elf32_vfp11_erratum_list *newerr;
7485
7486 hash_table = elf32_arm_hash_table (link_info);
7487 BFD_ASSERT (hash_table != NULL);
7488 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7489
7490 s = bfd_get_linker_section
7491 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7492
7493 sec_data = elf32_arm_section_data (s);
7494
7495 BFD_ASSERT (s != NULL);
7496
7497 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7498 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7499 BFD_ASSERT (tmp_name);
7500
7501 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7502 hash_table->num_vfp11_fixes);
7503
7504 myh = elf_link_hash_lookup
7505 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7506
7507 BFD_ASSERT (myh == NULL);
7508
7509 bh = NULL;
7510 val = hash_table->vfp11_erratum_glue_size;
7511 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7512 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7513 NULL, TRUE, FALSE, &bh);
7514
7515 myh = (struct elf_link_hash_entry *) bh;
7516 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7517 myh->forced_local = 1;
7518
7519 /* Link veneer back to calling location. */
7520 sec_data->erratumcount += 1;
7521 newerr = (elf32_vfp11_erratum_list *)
7522 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7523
7524 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7525 newerr->vma = -1;
7526 newerr->u.v.branch = branch;
7527 newerr->u.v.id = hash_table->num_vfp11_fixes;
7528 branch->u.b.veneer = newerr;
7529
7530 newerr->next = sec_data->erratumlist;
7531 sec_data->erratumlist = newerr;
7532
7533 /* A symbol for the return from the veneer. */
7534 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7535 hash_table->num_vfp11_fixes);
7536
7537 myh = elf_link_hash_lookup
7538 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7539
7540 if (myh != NULL)
7541 abort ();
7542
7543 bh = NULL;
7544 val = offset + 4;
7545 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7546 branch_sec, val, NULL, TRUE, FALSE, &bh);
7547
7548 myh = (struct elf_link_hash_entry *) bh;
7549 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7550 myh->forced_local = 1;
7551
7552 free (tmp_name);
7553
7554 /* Generate a mapping symbol for the veneer section, and explicitly add an
7555 entry for that symbol to the code/data map for the section. */
7556 if (hash_table->vfp11_erratum_glue_size == 0)
7557 {
7558 bh = NULL;
7559 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7560 ever requires this erratum fix. */
7561 _bfd_generic_link_add_one_symbol (link_info,
7562 hash_table->bfd_of_glue_owner, "$a",
7563 BSF_LOCAL, s, 0, NULL,
7564 TRUE, FALSE, &bh);
7565
7566 myh = (struct elf_link_hash_entry *) bh;
7567 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7568 myh->forced_local = 1;
7569
7570 /* The elf32_arm_init_maps function only cares about symbols from input
7571 BFDs. We must make a note of this generated mapping symbol
7572 ourselves so that code byteswapping works properly in
7573 elf32_arm_write_section. */
7574 elf32_arm_section_map_add (s, 'a', 0);
7575 }
7576
7577 s->size += VFP11_ERRATUM_VENEER_SIZE;
7578 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7579 hash_table->num_vfp11_fixes++;
7580
7581 /* The offset of the veneer. */
7582 return val;
7583 }
7584
7585 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7586 veneers need to be handled because used only in Cortex-M. */
7587
7588 static bfd_vma
7589 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7590 elf32_stm32l4xx_erratum_list *branch,
7591 bfd *branch_bfd,
7592 asection *branch_sec,
7593 unsigned int offset,
7594 bfd_size_type veneer_size)
7595 {
7596 asection *s;
7597 struct elf32_arm_link_hash_table *hash_table;
7598 char *tmp_name;
7599 struct elf_link_hash_entry *myh;
7600 struct bfd_link_hash_entry *bh;
7601 bfd_vma val;
7602 struct _arm_elf_section_data *sec_data;
7603 elf32_stm32l4xx_erratum_list *newerr;
7604
7605 hash_table = elf32_arm_hash_table (link_info);
7606 BFD_ASSERT (hash_table != NULL);
7607 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7608
7609 s = bfd_get_linker_section
7610 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7611
7612 BFD_ASSERT (s != NULL);
7613
7614 sec_data = elf32_arm_section_data (s);
7615
7616 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7617 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7618 BFD_ASSERT (tmp_name);
7619
7620 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7621 hash_table->num_stm32l4xx_fixes);
7622
7623 myh = elf_link_hash_lookup
7624 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7625
7626 BFD_ASSERT (myh == NULL);
7627
7628 bh = NULL;
7629 val = hash_table->stm32l4xx_erratum_glue_size;
7630 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7631 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7632 NULL, TRUE, FALSE, &bh);
7633
7634 myh = (struct elf_link_hash_entry *) bh;
7635 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7636 myh->forced_local = 1;
7637
7638 /* Link veneer back to calling location. */
7639 sec_data->stm32l4xx_erratumcount += 1;
7640 newerr = (elf32_stm32l4xx_erratum_list *)
7641 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7642
7643 newerr->type = STM32L4XX_ERRATUM_VENEER;
7644 newerr->vma = -1;
7645 newerr->u.v.branch = branch;
7646 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7647 branch->u.b.veneer = newerr;
7648
7649 newerr->next = sec_data->stm32l4xx_erratumlist;
7650 sec_data->stm32l4xx_erratumlist = newerr;
7651
7652 /* A symbol for the return from the veneer. */
7653 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7654 hash_table->num_stm32l4xx_fixes);
7655
7656 myh = elf_link_hash_lookup
7657 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7658
7659 if (myh != NULL)
7660 abort ();
7661
7662 bh = NULL;
7663 val = offset + 4;
7664 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7665 branch_sec, val, NULL, TRUE, FALSE, &bh);
7666
7667 myh = (struct elf_link_hash_entry *) bh;
7668 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7669 myh->forced_local = 1;
7670
7671 free (tmp_name);
7672
7673 /* Generate a mapping symbol for the veneer section, and explicitly add an
7674 entry for that symbol to the code/data map for the section. */
7675 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7676 {
7677 bh = NULL;
7678 /* Creates a THUMB symbol since there is no other choice. */
7679 _bfd_generic_link_add_one_symbol (link_info,
7680 hash_table->bfd_of_glue_owner, "$t",
7681 BSF_LOCAL, s, 0, NULL,
7682 TRUE, FALSE, &bh);
7683
7684 myh = (struct elf_link_hash_entry *) bh;
7685 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7686 myh->forced_local = 1;
7687
7688 /* The elf32_arm_init_maps function only cares about symbols from input
7689 BFDs. We must make a note of this generated mapping symbol
7690 ourselves so that code byteswapping works properly in
7691 elf32_arm_write_section. */
7692 elf32_arm_section_map_add (s, 't', 0);
7693 }
7694
7695 s->size += veneer_size;
7696 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7697 hash_table->num_stm32l4xx_fixes++;
7698
7699 /* The offset of the veneer. */
7700 return val;
7701 }
7702
7703 #define ARM_GLUE_SECTION_FLAGS \
7704 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7705 | SEC_READONLY | SEC_LINKER_CREATED)
7706
7707 /* Create a fake section for use by the ARM backend of the linker. */
7708
7709 static bfd_boolean
7710 arm_make_glue_section (bfd * abfd, const char * name)
7711 {
7712 asection * sec;
7713
7714 sec = bfd_get_linker_section (abfd, name);
7715 if (sec != NULL)
7716 /* Already made. */
7717 return TRUE;
7718
7719 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7720
7721 if (sec == NULL
7722 || !bfd_set_section_alignment (sec, 2))
7723 return FALSE;
7724
7725 /* Set the gc mark to prevent the section from being removed by garbage
7726 collection, despite the fact that no relocs refer to this section. */
7727 sec->gc_mark = 1;
7728
7729 return TRUE;
7730 }
7731
7732 /* Set size of .plt entries. This function is called from the
7733 linker scripts in ld/emultempl/{armelf}.em. */
7734
7735 void
7736 bfd_elf32_arm_use_long_plt (void)
7737 {
7738 elf32_arm_use_long_plt_entry = TRUE;
7739 }
7740
7741 /* Add the glue sections to ABFD. This function is called from the
7742 linker scripts in ld/emultempl/{armelf}.em. */
7743
7744 bfd_boolean
7745 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7746 struct bfd_link_info *info)
7747 {
7748 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7749 bfd_boolean dostm32l4xx = globals
7750 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7751 bfd_boolean addglue;
7752
7753 /* If we are only performing a partial
7754 link do not bother adding the glue. */
7755 if (bfd_link_relocatable (info))
7756 return TRUE;
7757
7758 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7759 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7760 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7761 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7762
7763 if (!dostm32l4xx)
7764 return addglue;
7765
7766 return addglue
7767 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7768 }
7769
7770 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7771 ensures they are not marked for deletion by
7772 strip_excluded_output_sections () when veneers are going to be created
7773 later. Not doing so would trigger assert on empty section size in
7774 lang_size_sections_1 (). */
7775
7776 void
7777 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7778 {
7779 enum elf32_arm_stub_type stub_type;
7780
7781 /* If we are only performing a partial
7782 link do not bother adding the glue. */
7783 if (bfd_link_relocatable (info))
7784 return;
7785
7786 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7787 {
7788 asection *out_sec;
7789 const char *out_sec_name;
7790
7791 if (!arm_dedicated_stub_output_section_required (stub_type))
7792 continue;
7793
7794 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7795 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7796 if (out_sec != NULL)
7797 out_sec->flags |= SEC_KEEP;
7798 }
7799 }
7800
7801 /* Select a BFD to be used to hold the sections used by the glue code.
7802 This function is called from the linker scripts in ld/emultempl/
7803 {armelf/pe}.em. */
7804
7805 bfd_boolean
7806 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7807 {
7808 struct elf32_arm_link_hash_table *globals;
7809
7810 /* If we are only performing a partial link
7811 do not bother getting a bfd to hold the glue. */
7812 if (bfd_link_relocatable (info))
7813 return TRUE;
7814
7815 /* Make sure we don't attach the glue sections to a dynamic object. */
7816 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7817
7818 globals = elf32_arm_hash_table (info);
7819 BFD_ASSERT (globals != NULL);
7820
7821 if (globals->bfd_of_glue_owner != NULL)
7822 return TRUE;
7823
7824 /* Save the bfd for later use. */
7825 globals->bfd_of_glue_owner = abfd;
7826
7827 return TRUE;
7828 }
7829
7830 static void
7831 check_use_blx (struct elf32_arm_link_hash_table *globals)
7832 {
7833 int cpu_arch;
7834
7835 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7836 Tag_CPU_arch);
7837
7838 if (globals->fix_arm1176)
7839 {
7840 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7841 globals->use_blx = 1;
7842 }
7843 else
7844 {
7845 if (cpu_arch > TAG_CPU_ARCH_V4T)
7846 globals->use_blx = 1;
7847 }
7848 }
7849
7850 bfd_boolean
7851 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7852 struct bfd_link_info *link_info)
7853 {
7854 Elf_Internal_Shdr *symtab_hdr;
7855 Elf_Internal_Rela *internal_relocs = NULL;
7856 Elf_Internal_Rela *irel, *irelend;
7857 bfd_byte *contents = NULL;
7858
7859 asection *sec;
7860 struct elf32_arm_link_hash_table *globals;
7861
7862 /* If we are only performing a partial link do not bother
7863 to construct any glue. */
7864 if (bfd_link_relocatable (link_info))
7865 return TRUE;
7866
7867 /* Here we have a bfd that is to be included on the link. We have a
7868 hook to do reloc rummaging, before section sizes are nailed down. */
7869 globals = elf32_arm_hash_table (link_info);
7870 BFD_ASSERT (globals != NULL);
7871
7872 check_use_blx (globals);
7873
7874 if (globals->byteswap_code && !bfd_big_endian (abfd))
7875 {
7876 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7877 abfd);
7878 return FALSE;
7879 }
7880
7881 /* PR 5398: If we have not decided to include any loadable sections in
7882 the output then we will not have a glue owner bfd. This is OK, it
7883 just means that there is nothing else for us to do here. */
7884 if (globals->bfd_of_glue_owner == NULL)
7885 return TRUE;
7886
7887 /* Rummage around all the relocs and map the glue vectors. */
7888 sec = abfd->sections;
7889
7890 if (sec == NULL)
7891 return TRUE;
7892
7893 for (; sec != NULL; sec = sec->next)
7894 {
7895 if (sec->reloc_count == 0)
7896 continue;
7897
7898 if ((sec->flags & SEC_EXCLUDE) != 0)
7899 continue;
7900
7901 symtab_hdr = & elf_symtab_hdr (abfd);
7902
7903 /* Load the relocs. */
7904 internal_relocs
7905 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7906
7907 if (internal_relocs == NULL)
7908 goto error_return;
7909
7910 irelend = internal_relocs + sec->reloc_count;
7911 for (irel = internal_relocs; irel < irelend; irel++)
7912 {
7913 long r_type;
7914 unsigned long r_index;
7915
7916 struct elf_link_hash_entry *h;
7917
7918 r_type = ELF32_R_TYPE (irel->r_info);
7919 r_index = ELF32_R_SYM (irel->r_info);
7920
7921 /* These are the only relocation types we care about. */
7922 if ( r_type != R_ARM_PC24
7923 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7924 continue;
7925
7926 /* Get the section contents if we haven't done so already. */
7927 if (contents == NULL)
7928 {
7929 /* Get cached copy if it exists. */
7930 if (elf_section_data (sec)->this_hdr.contents != NULL)
7931 contents = elf_section_data (sec)->this_hdr.contents;
7932 else
7933 {
7934 /* Go get them off disk. */
7935 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7936 goto error_return;
7937 }
7938 }
7939
7940 if (r_type == R_ARM_V4BX)
7941 {
7942 int reg;
7943
7944 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7945 record_arm_bx_glue (link_info, reg);
7946 continue;
7947 }
7948
7949 /* If the relocation is not against a symbol it cannot concern us. */
7950 h = NULL;
7951
7952 /* We don't care about local symbols. */
7953 if (r_index < symtab_hdr->sh_info)
7954 continue;
7955
7956 /* This is an external symbol. */
7957 r_index -= symtab_hdr->sh_info;
7958 h = (struct elf_link_hash_entry *)
7959 elf_sym_hashes (abfd)[r_index];
7960
7961 /* If the relocation is against a static symbol it must be within
7962 the current section and so cannot be a cross ARM/Thumb relocation. */
7963 if (h == NULL)
7964 continue;
7965
7966 /* If the call will go through a PLT entry then we do not need
7967 glue. */
7968 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7969 continue;
7970
7971 switch (r_type)
7972 {
7973 case R_ARM_PC24:
7974 /* This one is a call from arm code. We need to look up
7975 the target of the call. If it is a thumb target, we
7976 insert glue. */
7977 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7978 == ST_BRANCH_TO_THUMB)
7979 record_arm_to_thumb_glue (link_info, h);
7980 break;
7981
7982 default:
7983 abort ();
7984 }
7985 }
7986
7987 if (elf_section_data (sec)->this_hdr.contents != contents)
7988 free (contents);
7989 contents = NULL;
7990
7991 if (elf_section_data (sec)->relocs != internal_relocs)
7992 free (internal_relocs);
7993 internal_relocs = NULL;
7994 }
7995
7996 return TRUE;
7997
7998 error_return:
7999 if (elf_section_data (sec)->this_hdr.contents != contents)
8000 free (contents);
8001 if (elf_section_data (sec)->relocs != internal_relocs)
8002 free (internal_relocs);
8003
8004 return FALSE;
8005 }
8006 #endif
8007
8008
8009 /* Initialise maps of ARM/Thumb/data for input BFDs. */
8010
8011 void
8012 bfd_elf32_arm_init_maps (bfd *abfd)
8013 {
8014 Elf_Internal_Sym *isymbuf;
8015 Elf_Internal_Shdr *hdr;
8016 unsigned int i, localsyms;
8017
8018 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
8019 if (! is_arm_elf (abfd))
8020 return;
8021
8022 if ((abfd->flags & DYNAMIC) != 0)
8023 return;
8024
8025 hdr = & elf_symtab_hdr (abfd);
8026 localsyms = hdr->sh_info;
8027
8028 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8029 should contain the number of local symbols, which should come before any
8030 global symbols. Mapping symbols are always local. */
8031 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
8032 NULL);
8033
8034 /* No internal symbols read? Skip this BFD. */
8035 if (isymbuf == NULL)
8036 return;
8037
8038 for (i = 0; i < localsyms; i++)
8039 {
8040 Elf_Internal_Sym *isym = &isymbuf[i];
8041 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8042 const char *name;
8043
8044 if (sec != NULL
8045 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8046 {
8047 name = bfd_elf_string_from_elf_section (abfd,
8048 hdr->sh_link, isym->st_name);
8049
8050 if (bfd_is_arm_special_symbol_name (name,
8051 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8052 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8053 }
8054 }
8055 }
8056
8057
8058 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8059 say what they wanted. */
8060
8061 void
8062 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8063 {
8064 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8065 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8066
8067 if (globals == NULL)
8068 return;
8069
8070 if (globals->fix_cortex_a8 == -1)
8071 {
8072 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8073 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8074 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8075 || out_attr[Tag_CPU_arch_profile].i == 0))
8076 globals->fix_cortex_a8 = 1;
8077 else
8078 globals->fix_cortex_a8 = 0;
8079 }
8080 }
8081
8082
8083 void
8084 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8085 {
8086 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8087 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8088
8089 if (globals == NULL)
8090 return;
8091 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8092 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8093 {
8094 switch (globals->vfp11_fix)
8095 {
8096 case BFD_ARM_VFP11_FIX_DEFAULT:
8097 case BFD_ARM_VFP11_FIX_NONE:
8098 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8099 break;
8100
8101 default:
8102 /* Give a warning, but do as the user requests anyway. */
8103 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8104 "workaround is not necessary for target architecture"), obfd);
8105 }
8106 }
8107 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8108 /* For earlier architectures, we might need the workaround, but do not
8109 enable it by default. If users is running with broken hardware, they
8110 must enable the erratum fix explicitly. */
8111 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8112 }
8113
8114 void
8115 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8116 {
8117 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8118 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8119
8120 if (globals == NULL)
8121 return;
8122
8123 /* We assume only Cortex-M4 may require the fix. */
8124 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8125 || out_attr[Tag_CPU_arch_profile].i != 'M')
8126 {
8127 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8128 /* Give a warning, but do as the user requests anyway. */
8129 _bfd_error_handler
8130 (_("%pB: warning: selected STM32L4XX erratum "
8131 "workaround is not necessary for target architecture"), obfd);
8132 }
8133 }
8134
8135 enum bfd_arm_vfp11_pipe
8136 {
8137 VFP11_FMAC,
8138 VFP11_LS,
8139 VFP11_DS,
8140 VFP11_BAD
8141 };
8142
8143 /* Return a VFP register number. This is encoded as RX:X for single-precision
8144 registers, or X:RX for double-precision registers, where RX is the group of
8145 four bits in the instruction encoding and X is the single extension bit.
8146 RX and X fields are specified using their lowest (starting) bit. The return
8147 value is:
8148
8149 0...31: single-precision registers s0...s31
8150 32...63: double-precision registers d0...d31.
8151
8152 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8153 encounter VFP3 instructions, so we allow the full range for DP registers. */
8154
8155 static unsigned int
8156 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8157 unsigned int x)
8158 {
8159 if (is_double)
8160 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8161 else
8162 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8163 }
8164
8165 /* Set bits in *WMASK according to a register number REG as encoded by
8166 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8167
8168 static void
8169 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8170 {
8171 if (reg < 32)
8172 *wmask |= 1 << reg;
8173 else if (reg < 48)
8174 *wmask |= 3 << ((reg - 32) * 2);
8175 }
8176
8177 /* Return TRUE if WMASK overwrites anything in REGS. */
8178
8179 static bfd_boolean
8180 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8181 {
8182 int i;
8183
8184 for (i = 0; i < numregs; i++)
8185 {
8186 unsigned int reg = regs[i];
8187
8188 if (reg < 32 && (wmask & (1 << reg)) != 0)
8189 return TRUE;
8190
8191 reg -= 32;
8192
8193 if (reg >= 16)
8194 continue;
8195
8196 if ((wmask & (3 << (reg * 2))) != 0)
8197 return TRUE;
8198 }
8199
8200 return FALSE;
8201 }
8202
8203 /* In this function, we're interested in two things: finding input registers
8204 for VFP data-processing instructions, and finding the set of registers which
8205 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8206 hold the written set, so FLDM etc. are easy to deal with (we're only
8207 interested in 32 SP registers or 16 dp registers, due to the VFP version
8208 implemented by the chip in question). DP registers are marked by setting
8209 both SP registers in the write mask). */
8210
8211 static enum bfd_arm_vfp11_pipe
8212 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8213 int *numregs)
8214 {
8215 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8216 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8217
8218 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8219 {
8220 unsigned int pqrs;
8221 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8222 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8223
8224 pqrs = ((insn & 0x00800000) >> 20)
8225 | ((insn & 0x00300000) >> 19)
8226 | ((insn & 0x00000040) >> 6);
8227
8228 switch (pqrs)
8229 {
8230 case 0: /* fmac[sd]. */
8231 case 1: /* fnmac[sd]. */
8232 case 2: /* fmsc[sd]. */
8233 case 3: /* fnmsc[sd]. */
8234 vpipe = VFP11_FMAC;
8235 bfd_arm_vfp11_write_mask (destmask, fd);
8236 regs[0] = fd;
8237 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8238 regs[2] = fm;
8239 *numregs = 3;
8240 break;
8241
8242 case 4: /* fmul[sd]. */
8243 case 5: /* fnmul[sd]. */
8244 case 6: /* fadd[sd]. */
8245 case 7: /* fsub[sd]. */
8246 vpipe = VFP11_FMAC;
8247 goto vfp_binop;
8248
8249 case 8: /* fdiv[sd]. */
8250 vpipe = VFP11_DS;
8251 vfp_binop:
8252 bfd_arm_vfp11_write_mask (destmask, fd);
8253 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8254 regs[1] = fm;
8255 *numregs = 2;
8256 break;
8257
8258 case 15: /* extended opcode. */
8259 {
8260 unsigned int extn = ((insn >> 15) & 0x1e)
8261 | ((insn >> 7) & 1);
8262
8263 switch (extn)
8264 {
8265 case 0: /* fcpy[sd]. */
8266 case 1: /* fabs[sd]. */
8267 case 2: /* fneg[sd]. */
8268 case 8: /* fcmp[sd]. */
8269 case 9: /* fcmpe[sd]. */
8270 case 10: /* fcmpz[sd]. */
8271 case 11: /* fcmpez[sd]. */
8272 case 16: /* fuito[sd]. */
8273 case 17: /* fsito[sd]. */
8274 case 24: /* ftoui[sd]. */
8275 case 25: /* ftouiz[sd]. */
8276 case 26: /* ftosi[sd]. */
8277 case 27: /* ftosiz[sd]. */
8278 /* These instructions will not bounce due to underflow. */
8279 *numregs = 0;
8280 vpipe = VFP11_FMAC;
8281 break;
8282
8283 case 3: /* fsqrt[sd]. */
8284 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8285 registers to cause the erratum in previous instructions. */
8286 bfd_arm_vfp11_write_mask (destmask, fd);
8287 vpipe = VFP11_DS;
8288 break;
8289
8290 case 15: /* fcvt{ds,sd}. */
8291 {
8292 int rnum = 0;
8293
8294 bfd_arm_vfp11_write_mask (destmask, fd);
8295
8296 /* Only FCVTSD can underflow. */
8297 if ((insn & 0x100) != 0)
8298 regs[rnum++] = fm;
8299
8300 *numregs = rnum;
8301
8302 vpipe = VFP11_FMAC;
8303 }
8304 break;
8305
8306 default:
8307 return VFP11_BAD;
8308 }
8309 }
8310 break;
8311
8312 default:
8313 return VFP11_BAD;
8314 }
8315 }
8316 /* Two-register transfer. */
8317 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8318 {
8319 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8320
8321 if ((insn & 0x100000) == 0)
8322 {
8323 if (is_double)
8324 bfd_arm_vfp11_write_mask (destmask, fm);
8325 else
8326 {
8327 bfd_arm_vfp11_write_mask (destmask, fm);
8328 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8329 }
8330 }
8331
8332 vpipe = VFP11_LS;
8333 }
8334 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8335 {
8336 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8337 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8338
8339 switch (puw)
8340 {
8341 case 0: /* Two-reg transfer. We should catch these above. */
8342 abort ();
8343
8344 case 2: /* fldm[sdx]. */
8345 case 3:
8346 case 5:
8347 {
8348 unsigned int i, offset = insn & 0xff;
8349
8350 if (is_double)
8351 offset >>= 1;
8352
8353 for (i = fd; i < fd + offset; i++)
8354 bfd_arm_vfp11_write_mask (destmask, i);
8355 }
8356 break;
8357
8358 case 4: /* fld[sd]. */
8359 case 6:
8360 bfd_arm_vfp11_write_mask (destmask, fd);
8361 break;
8362
8363 default:
8364 return VFP11_BAD;
8365 }
8366
8367 vpipe = VFP11_LS;
8368 }
8369 /* Single-register transfer. Note L==0. */
8370 else if ((insn & 0x0f100e10) == 0x0e000a10)
8371 {
8372 unsigned int opcode = (insn >> 21) & 7;
8373 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8374
8375 switch (opcode)
8376 {
8377 case 0: /* fmsr/fmdlr. */
8378 case 1: /* fmdhr. */
8379 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8380 destination register. I don't know if this is exactly right,
8381 but it is the conservative choice. */
8382 bfd_arm_vfp11_write_mask (destmask, fn);
8383 break;
8384
8385 case 7: /* fmxr. */
8386 break;
8387 }
8388
8389 vpipe = VFP11_LS;
8390 }
8391
8392 return vpipe;
8393 }
8394
8395
8396 static int elf32_arm_compare_mapping (const void * a, const void * b);
8397
8398
8399 /* Look for potentially-troublesome code sequences which might trigger the
8400 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8401 (available from ARM) for details of the erratum. A short version is
8402 described in ld.texinfo. */
8403
8404 bfd_boolean
8405 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8406 {
8407 asection *sec;
8408 bfd_byte *contents = NULL;
8409 int state = 0;
8410 int regs[3], numregs = 0;
8411 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8412 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8413
8414 if (globals == NULL)
8415 return FALSE;
8416
8417 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8418 The states transition as follows:
8419
8420 0 -> 1 (vector) or 0 -> 2 (scalar)
8421 A VFP FMAC-pipeline instruction has been seen. Fill
8422 regs[0]..regs[numregs-1] with its input operands. Remember this
8423 instruction in 'first_fmac'.
8424
8425 1 -> 2
8426 Any instruction, except for a VFP instruction which overwrites
8427 regs[*].
8428
8429 1 -> 3 [ -> 0 ] or
8430 2 -> 3 [ -> 0 ]
8431 A VFP instruction has been seen which overwrites any of regs[*].
8432 We must make a veneer! Reset state to 0 before examining next
8433 instruction.
8434
8435 2 -> 0
8436 If we fail to match anything in state 2, reset to state 0 and reset
8437 the instruction pointer to the instruction after 'first_fmac'.
8438
8439 If the VFP11 vector mode is in use, there must be at least two unrelated
8440 instructions between anti-dependent VFP11 instructions to properly avoid
8441 triggering the erratum, hence the use of the extra state 1. */
8442
8443 /* If we are only performing a partial link do not bother
8444 to construct any glue. */
8445 if (bfd_link_relocatable (link_info))
8446 return TRUE;
8447
8448 /* Skip if this bfd does not correspond to an ELF image. */
8449 if (! is_arm_elf (abfd))
8450 return TRUE;
8451
8452 /* We should have chosen a fix type by the time we get here. */
8453 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8454
8455 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8456 return TRUE;
8457
8458 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8459 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8460 return TRUE;
8461
8462 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8463 {
8464 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8465 struct _arm_elf_section_data *sec_data;
8466
8467 /* If we don't have executable progbits, we're not interested in this
8468 section. Also skip if section is to be excluded. */
8469 if (elf_section_type (sec) != SHT_PROGBITS
8470 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8471 || (sec->flags & SEC_EXCLUDE) != 0
8472 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8473 || sec->output_section == bfd_abs_section_ptr
8474 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8475 continue;
8476
8477 sec_data = elf32_arm_section_data (sec);
8478
8479 if (sec_data->mapcount == 0)
8480 continue;
8481
8482 if (elf_section_data (sec)->this_hdr.contents != NULL)
8483 contents = elf_section_data (sec)->this_hdr.contents;
8484 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8485 goto error_return;
8486
8487 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8488 elf32_arm_compare_mapping);
8489
8490 for (span = 0; span < sec_data->mapcount; span++)
8491 {
8492 unsigned int span_start = sec_data->map[span].vma;
8493 unsigned int span_end = (span == sec_data->mapcount - 1)
8494 ? sec->size : sec_data->map[span + 1].vma;
8495 char span_type = sec_data->map[span].type;
8496
8497 /* FIXME: Only ARM mode is supported at present. We may need to
8498 support Thumb-2 mode also at some point. */
8499 if (span_type != 'a')
8500 continue;
8501
8502 for (i = span_start; i < span_end;)
8503 {
8504 unsigned int next_i = i + 4;
8505 unsigned int insn = bfd_big_endian (abfd)
8506 ? (((unsigned) contents[i] << 24)
8507 | (contents[i + 1] << 16)
8508 | (contents[i + 2] << 8)
8509 | contents[i + 3])
8510 : (((unsigned) contents[i + 3] << 24)
8511 | (contents[i + 2] << 16)
8512 | (contents[i + 1] << 8)
8513 | contents[i]);
8514 unsigned int writemask = 0;
8515 enum bfd_arm_vfp11_pipe vpipe;
8516
8517 switch (state)
8518 {
8519 case 0:
8520 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8521 &numregs);
8522 /* I'm assuming the VFP11 erratum can trigger with denorm
8523 operands on either the FMAC or the DS pipeline. This might
8524 lead to slightly overenthusiastic veneer insertion. */
8525 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8526 {
8527 state = use_vector ? 1 : 2;
8528 first_fmac = i;
8529 veneer_of_insn = insn;
8530 }
8531 break;
8532
8533 case 1:
8534 {
8535 int other_regs[3], other_numregs;
8536 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8537 other_regs,
8538 &other_numregs);
8539 if (vpipe != VFP11_BAD
8540 && bfd_arm_vfp11_antidependency (writemask, regs,
8541 numregs))
8542 state = 3;
8543 else
8544 state = 2;
8545 }
8546 break;
8547
8548 case 2:
8549 {
8550 int other_regs[3], other_numregs;
8551 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8552 other_regs,
8553 &other_numregs);
8554 if (vpipe != VFP11_BAD
8555 && bfd_arm_vfp11_antidependency (writemask, regs,
8556 numregs))
8557 state = 3;
8558 else
8559 {
8560 state = 0;
8561 next_i = first_fmac + 4;
8562 }
8563 }
8564 break;
8565
8566 case 3:
8567 abort (); /* Should be unreachable. */
8568 }
8569
8570 if (state == 3)
8571 {
8572 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8573 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8574
8575 elf32_arm_section_data (sec)->erratumcount += 1;
8576
8577 newerr->u.b.vfp_insn = veneer_of_insn;
8578
8579 switch (span_type)
8580 {
8581 case 'a':
8582 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8583 break;
8584
8585 default:
8586 abort ();
8587 }
8588
8589 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8590 first_fmac);
8591
8592 newerr->vma = -1;
8593
8594 newerr->next = sec_data->erratumlist;
8595 sec_data->erratumlist = newerr;
8596
8597 state = 0;
8598 }
8599
8600 i = next_i;
8601 }
8602 }
8603
8604 if (elf_section_data (sec)->this_hdr.contents != contents)
8605 free (contents);
8606 contents = NULL;
8607 }
8608
8609 return TRUE;
8610
8611 error_return:
8612 if (elf_section_data (sec)->this_hdr.contents != contents)
8613 free (contents);
8614
8615 return FALSE;
8616 }
8617
8618 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8619 after sections have been laid out, using specially-named symbols. */
8620
8621 void
8622 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8623 struct bfd_link_info *link_info)
8624 {
8625 asection *sec;
8626 struct elf32_arm_link_hash_table *globals;
8627 char *tmp_name;
8628
8629 if (bfd_link_relocatable (link_info))
8630 return;
8631
8632 /* Skip if this bfd does not correspond to an ELF image. */
8633 if (! is_arm_elf (abfd))
8634 return;
8635
8636 globals = elf32_arm_hash_table (link_info);
8637 if (globals == NULL)
8638 return;
8639
8640 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8641 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8642 BFD_ASSERT (tmp_name);
8643
8644 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8645 {
8646 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8647 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8648
8649 for (; errnode != NULL; errnode = errnode->next)
8650 {
8651 struct elf_link_hash_entry *myh;
8652 bfd_vma vma;
8653
8654 switch (errnode->type)
8655 {
8656 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8657 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8658 /* Find veneer symbol. */
8659 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8660 errnode->u.b.veneer->u.v.id);
8661
8662 myh = elf_link_hash_lookup
8663 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8664
8665 if (myh == NULL)
8666 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8667 abfd, "VFP11", tmp_name);
8668
8669 vma = myh->root.u.def.section->output_section->vma
8670 + myh->root.u.def.section->output_offset
8671 + myh->root.u.def.value;
8672
8673 errnode->u.b.veneer->vma = vma;
8674 break;
8675
8676 case VFP11_ERRATUM_ARM_VENEER:
8677 case VFP11_ERRATUM_THUMB_VENEER:
8678 /* Find return location. */
8679 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8680 errnode->u.v.id);
8681
8682 myh = elf_link_hash_lookup
8683 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8684
8685 if (myh == NULL)
8686 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8687 abfd, "VFP11", tmp_name);
8688
8689 vma = myh->root.u.def.section->output_section->vma
8690 + myh->root.u.def.section->output_offset
8691 + myh->root.u.def.value;
8692
8693 errnode->u.v.branch->vma = vma;
8694 break;
8695
8696 default:
8697 abort ();
8698 }
8699 }
8700 }
8701
8702 free (tmp_name);
8703 }
8704
8705 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8706 return locations after sections have been laid out, using
8707 specially-named symbols. */
8708
8709 void
8710 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8711 struct bfd_link_info *link_info)
8712 {
8713 asection *sec;
8714 struct elf32_arm_link_hash_table *globals;
8715 char *tmp_name;
8716
8717 if (bfd_link_relocatable (link_info))
8718 return;
8719
8720 /* Skip if this bfd does not correspond to an ELF image. */
8721 if (! is_arm_elf (abfd))
8722 return;
8723
8724 globals = elf32_arm_hash_table (link_info);
8725 if (globals == NULL)
8726 return;
8727
8728 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8729 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8730 BFD_ASSERT (tmp_name);
8731
8732 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8733 {
8734 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8735 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8736
8737 for (; errnode != NULL; errnode = errnode->next)
8738 {
8739 struct elf_link_hash_entry *myh;
8740 bfd_vma vma;
8741
8742 switch (errnode->type)
8743 {
8744 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8745 /* Find veneer symbol. */
8746 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8747 errnode->u.b.veneer->u.v.id);
8748
8749 myh = elf_link_hash_lookup
8750 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8751
8752 if (myh == NULL)
8753 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8754 abfd, "STM32L4XX", tmp_name);
8755
8756 vma = myh->root.u.def.section->output_section->vma
8757 + myh->root.u.def.section->output_offset
8758 + myh->root.u.def.value;
8759
8760 errnode->u.b.veneer->vma = vma;
8761 break;
8762
8763 case STM32L4XX_ERRATUM_VENEER:
8764 /* Find return location. */
8765 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8766 errnode->u.v.id);
8767
8768 myh = elf_link_hash_lookup
8769 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8770
8771 if (myh == NULL)
8772 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8773 abfd, "STM32L4XX", tmp_name);
8774
8775 vma = myh->root.u.def.section->output_section->vma
8776 + myh->root.u.def.section->output_offset
8777 + myh->root.u.def.value;
8778
8779 errnode->u.v.branch->vma = vma;
8780 break;
8781
8782 default:
8783 abort ();
8784 }
8785 }
8786 }
8787
8788 free (tmp_name);
8789 }
8790
8791 static inline bfd_boolean
8792 is_thumb2_ldmia (const insn32 insn)
8793 {
8794 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8795 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8796 return (insn & 0xffd02000) == 0xe8900000;
8797 }
8798
8799 static inline bfd_boolean
8800 is_thumb2_ldmdb (const insn32 insn)
8801 {
8802 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8803 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8804 return (insn & 0xffd02000) == 0xe9100000;
8805 }
8806
8807 static inline bfd_boolean
8808 is_thumb2_vldm (const insn32 insn)
8809 {
8810 /* A6.5 Extension register load or store instruction
8811 A7.7.229
8812 We look for SP 32-bit and DP 64-bit registers.
8813 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8814 <list> is consecutive 64-bit registers
8815 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8816 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8817 <list> is consecutive 32-bit registers
8818 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8819 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8820 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8821 return
8822 (((insn & 0xfe100f00) == 0xec100b00) ||
8823 ((insn & 0xfe100f00) == 0xec100a00))
8824 && /* (IA without !). */
8825 (((((insn << 7) >> 28) & 0xd) == 0x4)
8826 /* (IA with !), includes VPOP (when reg number is SP). */
8827 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8828 /* (DB with !). */
8829 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8830 }
8831
8832 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8833 VLDM opcode and:
8834 - computes the number and the mode of memory accesses
8835 - decides if the replacement should be done:
8836 . replaces only if > 8-word accesses
8837 . or (testing purposes only) replaces all accesses. */
8838
8839 static bfd_boolean
8840 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8841 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8842 {
8843 int nb_words = 0;
8844
8845 /* The field encoding the register list is the same for both LDMIA
8846 and LDMDB encodings. */
8847 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8848 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8849 else if (is_thumb2_vldm (insn))
8850 nb_words = (insn & 0xff);
8851
8852 /* DEFAULT mode accounts for the real bug condition situation,
8853 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8854 return
8855 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8856 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8857 }
8858
8859 /* Look for potentially-troublesome code sequences which might trigger
8860 the STM STM32L4XX erratum. */
8861
8862 bfd_boolean
8863 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8864 struct bfd_link_info *link_info)
8865 {
8866 asection *sec;
8867 bfd_byte *contents = NULL;
8868 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8869
8870 if (globals == NULL)
8871 return FALSE;
8872
8873 /* If we are only performing a partial link do not bother
8874 to construct any glue. */
8875 if (bfd_link_relocatable (link_info))
8876 return TRUE;
8877
8878 /* Skip if this bfd does not correspond to an ELF image. */
8879 if (! is_arm_elf (abfd))
8880 return TRUE;
8881
8882 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8883 return TRUE;
8884
8885 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8886 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8887 return TRUE;
8888
8889 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8890 {
8891 unsigned int i, span;
8892 struct _arm_elf_section_data *sec_data;
8893
8894 /* If we don't have executable progbits, we're not interested in this
8895 section. Also skip if section is to be excluded. */
8896 if (elf_section_type (sec) != SHT_PROGBITS
8897 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8898 || (sec->flags & SEC_EXCLUDE) != 0
8899 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8900 || sec->output_section == bfd_abs_section_ptr
8901 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8902 continue;
8903
8904 sec_data = elf32_arm_section_data (sec);
8905
8906 if (sec_data->mapcount == 0)
8907 continue;
8908
8909 if (elf_section_data (sec)->this_hdr.contents != NULL)
8910 contents = elf_section_data (sec)->this_hdr.contents;
8911 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8912 goto error_return;
8913
8914 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8915 elf32_arm_compare_mapping);
8916
8917 for (span = 0; span < sec_data->mapcount; span++)
8918 {
8919 unsigned int span_start = sec_data->map[span].vma;
8920 unsigned int span_end = (span == sec_data->mapcount - 1)
8921 ? sec->size : sec_data->map[span + 1].vma;
8922 char span_type = sec_data->map[span].type;
8923 int itblock_current_pos = 0;
8924
8925 /* Only Thumb2 mode need be supported with this CM4 specific
8926 code, we should not encounter any arm mode eg span_type
8927 != 'a'. */
8928 if (span_type != 't')
8929 continue;
8930
8931 for (i = span_start; i < span_end;)
8932 {
8933 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8934 bfd_boolean insn_32bit = FALSE;
8935 bfd_boolean is_ldm = FALSE;
8936 bfd_boolean is_vldm = FALSE;
8937 bfd_boolean is_not_last_in_it_block = FALSE;
8938
8939 /* The first 16-bits of all 32-bit thumb2 instructions start
8940 with opcode[15..13]=0b111 and the encoded op1 can be anything
8941 except opcode[12..11]!=0b00.
8942 See 32-bit Thumb instruction encoding. */
8943 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8944 insn_32bit = TRUE;
8945
8946 /* Compute the predicate that tells if the instruction
8947 is concerned by the IT block
8948 - Creates an error if there is a ldm that is not
8949 last in the IT block thus cannot be replaced
8950 - Otherwise we can create a branch at the end of the
8951 IT block, it will be controlled naturally by IT
8952 with the proper pseudo-predicate
8953 - So the only interesting predicate is the one that
8954 tells that we are not on the last item of an IT
8955 block. */
8956 if (itblock_current_pos != 0)
8957 is_not_last_in_it_block = !!--itblock_current_pos;
8958
8959 if (insn_32bit)
8960 {
8961 /* Load the rest of the insn (in manual-friendly order). */
8962 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8963 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8964 is_vldm = is_thumb2_vldm (insn);
8965
8966 /* Veneers are created for (v)ldm depending on
8967 option flags and memory accesses conditions; but
8968 if the instruction is not the last instruction of
8969 an IT block, we cannot create a jump there, so we
8970 bail out. */
8971 if ((is_ldm || is_vldm)
8972 && stm32l4xx_need_create_replacing_stub
8973 (insn, globals->stm32l4xx_fix))
8974 {
8975 if (is_not_last_in_it_block)
8976 {
8977 _bfd_error_handler
8978 /* xgettext:c-format */
8979 (_("%pB(%pA+%#x): error: multiple load detected"
8980 " in non-last IT block instruction:"
8981 " STM32L4XX veneer cannot be generated; "
8982 "use gcc option -mrestrict-it to generate"
8983 " only one instruction per IT block"),
8984 abfd, sec, i);
8985 }
8986 else
8987 {
8988 elf32_stm32l4xx_erratum_list *newerr =
8989 (elf32_stm32l4xx_erratum_list *)
8990 bfd_zmalloc
8991 (sizeof (elf32_stm32l4xx_erratum_list));
8992
8993 elf32_arm_section_data (sec)
8994 ->stm32l4xx_erratumcount += 1;
8995 newerr->u.b.insn = insn;
8996 /* We create only thumb branches. */
8997 newerr->type =
8998 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8999 record_stm32l4xx_erratum_veneer
9000 (link_info, newerr, abfd, sec,
9001 i,
9002 is_ldm ?
9003 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
9004 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
9005 newerr->vma = -1;
9006 newerr->next = sec_data->stm32l4xx_erratumlist;
9007 sec_data->stm32l4xx_erratumlist = newerr;
9008 }
9009 }
9010 }
9011 else
9012 {
9013 /* A7.7.37 IT p208
9014 IT blocks are only encoded in T1
9015 Encoding T1: IT{x{y{z}}} <firstcond>
9016 1 0 1 1 - 1 1 1 1 - firstcond - mask
9017 if mask = '0000' then see 'related encodings'
9018 We don't deal with UNPREDICTABLE, just ignore these.
9019 There can be no nested IT blocks so an IT block
9020 is naturally a new one for which it is worth
9021 computing its size. */
9022 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
9023 && ((insn & 0x000f) != 0x0000);
9024 /* If we have a new IT block we compute its size. */
9025 if (is_newitblock)
9026 {
9027 /* Compute the number of instructions controlled
9028 by the IT block, it will be used to decide
9029 whether we are inside an IT block or not. */
9030 unsigned int mask = insn & 0x000f;
9031 itblock_current_pos = 4 - ctz (mask);
9032 }
9033 }
9034
9035 i += insn_32bit ? 4 : 2;
9036 }
9037 }
9038
9039 if (elf_section_data (sec)->this_hdr.contents != contents)
9040 free (contents);
9041 contents = NULL;
9042 }
9043
9044 return TRUE;
9045
9046 error_return:
9047 if (elf_section_data (sec)->this_hdr.contents != contents)
9048 free (contents);
9049
9050 return FALSE;
9051 }
9052
9053 /* Set target relocation values needed during linking. */
9054
9055 void
9056 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9057 struct bfd_link_info *link_info,
9058 struct elf32_arm_params *params)
9059 {
9060 struct elf32_arm_link_hash_table *globals;
9061
9062 globals = elf32_arm_hash_table (link_info);
9063 if (globals == NULL)
9064 return;
9065
9066 globals->target1_is_rel = params->target1_is_rel;
9067 if (globals->fdpic_p)
9068 globals->target2_reloc = R_ARM_GOT32;
9069 else if (strcmp (params->target2_type, "rel") == 0)
9070 globals->target2_reloc = R_ARM_REL32;
9071 else if (strcmp (params->target2_type, "abs") == 0)
9072 globals->target2_reloc = R_ARM_ABS32;
9073 else if (strcmp (params->target2_type, "got-rel") == 0)
9074 globals->target2_reloc = R_ARM_GOT_PREL;
9075 else
9076 {
9077 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9078 params->target2_type);
9079 }
9080 globals->fix_v4bx = params->fix_v4bx;
9081 globals->use_blx |= params->use_blx;
9082 globals->vfp11_fix = params->vfp11_denorm_fix;
9083 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9084 if (globals->fdpic_p)
9085 globals->pic_veneer = 1;
9086 else
9087 globals->pic_veneer = params->pic_veneer;
9088 globals->fix_cortex_a8 = params->fix_cortex_a8;
9089 globals->fix_arm1176 = params->fix_arm1176;
9090 globals->cmse_implib = params->cmse_implib;
9091 globals->in_implib_bfd = params->in_implib_bfd;
9092
9093 BFD_ASSERT (is_arm_elf (output_bfd));
9094 elf_arm_tdata (output_bfd)->no_enum_size_warning
9095 = params->no_enum_size_warning;
9096 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9097 = params->no_wchar_size_warning;
9098 }
9099
9100 /* Replace the target offset of a Thumb bl or b.w instruction. */
9101
9102 static void
9103 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9104 {
9105 bfd_vma upper;
9106 bfd_vma lower;
9107 int reloc_sign;
9108
9109 BFD_ASSERT ((offset & 1) == 0);
9110
9111 upper = bfd_get_16 (abfd, insn);
9112 lower = bfd_get_16 (abfd, insn + 2);
9113 reloc_sign = (offset < 0) ? 1 : 0;
9114 upper = (upper & ~(bfd_vma) 0x7ff)
9115 | ((offset >> 12) & 0x3ff)
9116 | (reloc_sign << 10);
9117 lower = (lower & ~(bfd_vma) 0x2fff)
9118 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9119 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9120 | ((offset >> 1) & 0x7ff);
9121 bfd_put_16 (abfd, upper, insn);
9122 bfd_put_16 (abfd, lower, insn + 2);
9123 }
9124
9125 /* Thumb code calling an ARM function. */
9126
9127 static int
9128 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9129 const char * name,
9130 bfd * input_bfd,
9131 bfd * output_bfd,
9132 asection * input_section,
9133 bfd_byte * hit_data,
9134 asection * sym_sec,
9135 bfd_vma offset,
9136 bfd_signed_vma addend,
9137 bfd_vma val,
9138 char **error_message)
9139 {
9140 asection * s = 0;
9141 bfd_vma my_offset;
9142 long int ret_offset;
9143 struct elf_link_hash_entry * myh;
9144 struct elf32_arm_link_hash_table * globals;
9145
9146 myh = find_thumb_glue (info, name, error_message);
9147 if (myh == NULL)
9148 return FALSE;
9149
9150 globals = elf32_arm_hash_table (info);
9151 BFD_ASSERT (globals != NULL);
9152 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9153
9154 my_offset = myh->root.u.def.value;
9155
9156 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9157 THUMB2ARM_GLUE_SECTION_NAME);
9158
9159 BFD_ASSERT (s != NULL);
9160 BFD_ASSERT (s->contents != NULL);
9161 BFD_ASSERT (s->output_section != NULL);
9162
9163 if ((my_offset & 0x01) == 0x01)
9164 {
9165 if (sym_sec != NULL
9166 && sym_sec->owner != NULL
9167 && !INTERWORK_FLAG (sym_sec->owner))
9168 {
9169 _bfd_error_handler
9170 (_("%pB(%s): warning: interworking not enabled;"
9171 " first occurrence: %pB: %s call to %s"),
9172 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9173
9174 return FALSE;
9175 }
9176
9177 --my_offset;
9178 myh->root.u.def.value = my_offset;
9179
9180 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9181 s->contents + my_offset);
9182
9183 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9184 s->contents + my_offset + 2);
9185
9186 ret_offset =
9187 /* Address of destination of the stub. */
9188 ((bfd_signed_vma) val)
9189 - ((bfd_signed_vma)
9190 /* Offset from the start of the current section
9191 to the start of the stubs. */
9192 (s->output_offset
9193 /* Offset of the start of this stub from the start of the stubs. */
9194 + my_offset
9195 /* Address of the start of the current section. */
9196 + s->output_section->vma)
9197 /* The branch instruction is 4 bytes into the stub. */
9198 + 4
9199 /* ARM branches work from the pc of the instruction + 8. */
9200 + 8);
9201
9202 put_arm_insn (globals, output_bfd,
9203 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9204 s->contents + my_offset + 4);
9205 }
9206
9207 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9208
9209 /* Now go back and fix up the original BL insn to point to here. */
9210 ret_offset =
9211 /* Address of where the stub is located. */
9212 (s->output_section->vma + s->output_offset + my_offset)
9213 /* Address of where the BL is located. */
9214 - (input_section->output_section->vma + input_section->output_offset
9215 + offset)
9216 /* Addend in the relocation. */
9217 - addend
9218 /* Biassing for PC-relative addressing. */
9219 - 8;
9220
9221 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9222
9223 return TRUE;
9224 }
9225
9226 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9227
9228 static struct elf_link_hash_entry *
9229 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9230 const char * name,
9231 bfd * input_bfd,
9232 bfd * output_bfd,
9233 asection * sym_sec,
9234 bfd_vma val,
9235 asection * s,
9236 char ** error_message)
9237 {
9238 bfd_vma my_offset;
9239 long int ret_offset;
9240 struct elf_link_hash_entry * myh;
9241 struct elf32_arm_link_hash_table * globals;
9242
9243 myh = find_arm_glue (info, name, error_message);
9244 if (myh == NULL)
9245 return NULL;
9246
9247 globals = elf32_arm_hash_table (info);
9248 BFD_ASSERT (globals != NULL);
9249 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9250
9251 my_offset = myh->root.u.def.value;
9252
9253 if ((my_offset & 0x01) == 0x01)
9254 {
9255 if (sym_sec != NULL
9256 && sym_sec->owner != NULL
9257 && !INTERWORK_FLAG (sym_sec->owner))
9258 {
9259 _bfd_error_handler
9260 (_("%pB(%s): warning: interworking not enabled;"
9261 " first occurrence: %pB: %s call to %s"),
9262 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9263 }
9264
9265 --my_offset;
9266 myh->root.u.def.value = my_offset;
9267
9268 if (bfd_link_pic (info)
9269 || globals->root.is_relocatable_executable
9270 || globals->pic_veneer)
9271 {
9272 /* For relocatable objects we can't use absolute addresses,
9273 so construct the address from a relative offset. */
9274 /* TODO: If the offset is small it's probably worth
9275 constructing the address with adds. */
9276 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9277 s->contents + my_offset);
9278 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9279 s->contents + my_offset + 4);
9280 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9281 s->contents + my_offset + 8);
9282 /* Adjust the offset by 4 for the position of the add,
9283 and 8 for the pipeline offset. */
9284 ret_offset = (val - (s->output_offset
9285 + s->output_section->vma
9286 + my_offset + 12))
9287 | 1;
9288 bfd_put_32 (output_bfd, ret_offset,
9289 s->contents + my_offset + 12);
9290 }
9291 else if (globals->use_blx)
9292 {
9293 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9294 s->contents + my_offset);
9295
9296 /* It's a thumb address. Add the low order bit. */
9297 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9298 s->contents + my_offset + 4);
9299 }
9300 else
9301 {
9302 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9303 s->contents + my_offset);
9304
9305 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9306 s->contents + my_offset + 4);
9307
9308 /* It's a thumb address. Add the low order bit. */
9309 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9310 s->contents + my_offset + 8);
9311
9312 my_offset += 12;
9313 }
9314 }
9315
9316 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9317
9318 return myh;
9319 }
9320
9321 /* Arm code calling a Thumb function. */
9322
9323 static int
9324 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9325 const char * name,
9326 bfd * input_bfd,
9327 bfd * output_bfd,
9328 asection * input_section,
9329 bfd_byte * hit_data,
9330 asection * sym_sec,
9331 bfd_vma offset,
9332 bfd_signed_vma addend,
9333 bfd_vma val,
9334 char **error_message)
9335 {
9336 unsigned long int tmp;
9337 bfd_vma my_offset;
9338 asection * s;
9339 long int ret_offset;
9340 struct elf_link_hash_entry * myh;
9341 struct elf32_arm_link_hash_table * globals;
9342
9343 globals = elf32_arm_hash_table (info);
9344 BFD_ASSERT (globals != NULL);
9345 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9346
9347 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9348 ARM2THUMB_GLUE_SECTION_NAME);
9349 BFD_ASSERT (s != NULL);
9350 BFD_ASSERT (s->contents != NULL);
9351 BFD_ASSERT (s->output_section != NULL);
9352
9353 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9354 sym_sec, val, s, error_message);
9355 if (!myh)
9356 return FALSE;
9357
9358 my_offset = myh->root.u.def.value;
9359 tmp = bfd_get_32 (input_bfd, hit_data);
9360 tmp = tmp & 0xFF000000;
9361
9362 /* Somehow these are both 4 too far, so subtract 8. */
9363 ret_offset = (s->output_offset
9364 + my_offset
9365 + s->output_section->vma
9366 - (input_section->output_offset
9367 + input_section->output_section->vma
9368 + offset + addend)
9369 - 8);
9370
9371 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9372
9373 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9374
9375 return TRUE;
9376 }
9377
9378 /* Populate Arm stub for an exported Thumb function. */
9379
9380 static bfd_boolean
9381 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9382 {
9383 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9384 asection * s;
9385 struct elf_link_hash_entry * myh;
9386 struct elf32_arm_link_hash_entry *eh;
9387 struct elf32_arm_link_hash_table * globals;
9388 asection *sec;
9389 bfd_vma val;
9390 char *error_message;
9391
9392 eh = elf32_arm_hash_entry (h);
9393 /* Allocate stubs for exported Thumb functions on v4t. */
9394 if (eh->export_glue == NULL)
9395 return TRUE;
9396
9397 globals = elf32_arm_hash_table (info);
9398 BFD_ASSERT (globals != NULL);
9399 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9400
9401 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9402 ARM2THUMB_GLUE_SECTION_NAME);
9403 BFD_ASSERT (s != NULL);
9404 BFD_ASSERT (s->contents != NULL);
9405 BFD_ASSERT (s->output_section != NULL);
9406
9407 sec = eh->export_glue->root.u.def.section;
9408
9409 BFD_ASSERT (sec->output_section != NULL);
9410
9411 val = eh->export_glue->root.u.def.value + sec->output_offset
9412 + sec->output_section->vma;
9413
9414 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9415 h->root.u.def.section->owner,
9416 globals->obfd, sec, val, s,
9417 &error_message);
9418 BFD_ASSERT (myh);
9419 return TRUE;
9420 }
9421
9422 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9423
9424 static bfd_vma
9425 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9426 {
9427 bfd_byte *p;
9428 bfd_vma glue_addr;
9429 asection *s;
9430 struct elf32_arm_link_hash_table *globals;
9431
9432 globals = elf32_arm_hash_table (info);
9433 BFD_ASSERT (globals != NULL);
9434 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9435
9436 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9437 ARM_BX_GLUE_SECTION_NAME);
9438 BFD_ASSERT (s != NULL);
9439 BFD_ASSERT (s->contents != NULL);
9440 BFD_ASSERT (s->output_section != NULL);
9441
9442 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9443
9444 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9445
9446 if ((globals->bx_glue_offset[reg] & 1) == 0)
9447 {
9448 p = s->contents + glue_addr;
9449 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9450 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9451 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9452 globals->bx_glue_offset[reg] |= 1;
9453 }
9454
9455 return glue_addr + s->output_section->vma + s->output_offset;
9456 }
9457
9458 /* Generate Arm stubs for exported Thumb symbols. */
9459 static void
9460 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9461 struct bfd_link_info *link_info)
9462 {
9463 struct elf32_arm_link_hash_table * globals;
9464
9465 if (link_info == NULL)
9466 /* Ignore this if we are not called by the ELF backend linker. */
9467 return;
9468
9469 globals = elf32_arm_hash_table (link_info);
9470 if (globals == NULL)
9471 return;
9472
9473 /* If blx is available then exported Thumb symbols are OK and there is
9474 nothing to do. */
9475 if (globals->use_blx)
9476 return;
9477
9478 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9479 link_info);
9480 }
9481
9482 /* Reserve space for COUNT dynamic relocations in relocation selection
9483 SRELOC. */
9484
9485 static void
9486 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9487 bfd_size_type count)
9488 {
9489 struct elf32_arm_link_hash_table *htab;
9490
9491 htab = elf32_arm_hash_table (info);
9492 BFD_ASSERT (htab->root.dynamic_sections_created);
9493 if (sreloc == NULL)
9494 abort ();
9495 sreloc->size += RELOC_SIZE (htab) * count;
9496 }
9497
9498 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9499 dynamic, the relocations should go in SRELOC, otherwise they should
9500 go in the special .rel.iplt section. */
9501
9502 static void
9503 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9504 bfd_size_type count)
9505 {
9506 struct elf32_arm_link_hash_table *htab;
9507
9508 htab = elf32_arm_hash_table (info);
9509 if (!htab->root.dynamic_sections_created)
9510 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9511 else
9512 {
9513 BFD_ASSERT (sreloc != NULL);
9514 sreloc->size += RELOC_SIZE (htab) * count;
9515 }
9516 }
9517
9518 /* Add relocation REL to the end of relocation section SRELOC. */
9519
9520 static void
9521 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9522 asection *sreloc, Elf_Internal_Rela *rel)
9523 {
9524 bfd_byte *loc;
9525 struct elf32_arm_link_hash_table *htab;
9526
9527 htab = elf32_arm_hash_table (info);
9528 if (!htab->root.dynamic_sections_created
9529 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9530 sreloc = htab->root.irelplt;
9531 if (sreloc == NULL)
9532 abort ();
9533 loc = sreloc->contents;
9534 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9535 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9536 abort ();
9537 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9538 }
9539
9540 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9541 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9542 to .plt. */
9543
9544 static void
9545 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9546 bfd_boolean is_iplt_entry,
9547 union gotplt_union *root_plt,
9548 struct arm_plt_info *arm_plt)
9549 {
9550 struct elf32_arm_link_hash_table *htab;
9551 asection *splt;
9552 asection *sgotplt;
9553
9554 htab = elf32_arm_hash_table (info);
9555
9556 if (is_iplt_entry)
9557 {
9558 splt = htab->root.iplt;
9559 sgotplt = htab->root.igotplt;
9560
9561 /* NaCl uses a special first entry in .iplt too. */
9562 if (htab->nacl_p && splt->size == 0)
9563 splt->size += htab->plt_header_size;
9564
9565 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9566 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9567 }
9568 else
9569 {
9570 splt = htab->root.splt;
9571 sgotplt = htab->root.sgotplt;
9572
9573 if (htab->fdpic_p)
9574 {
9575 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9576 /* For lazy binding, relocations will be put into .rel.plt, in
9577 .rel.got otherwise. */
9578 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9579 if (info->flags & DF_BIND_NOW)
9580 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9581 else
9582 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9583 }
9584 else
9585 {
9586 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9587 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9588 }
9589
9590 /* If this is the first .plt entry, make room for the special
9591 first entry. */
9592 if (splt->size == 0)
9593 splt->size += htab->plt_header_size;
9594
9595 htab->next_tls_desc_index++;
9596 }
9597
9598 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9599 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9600 splt->size += PLT_THUMB_STUB_SIZE;
9601 root_plt->offset = splt->size;
9602 splt->size += htab->plt_entry_size;
9603
9604 if (!htab->symbian_p)
9605 {
9606 /* We also need to make an entry in the .got.plt section, which
9607 will be placed in the .got section by the linker script. */
9608 if (is_iplt_entry)
9609 arm_plt->got_offset = sgotplt->size;
9610 else
9611 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9612 if (htab->fdpic_p)
9613 /* Function descriptor takes 64 bits in GOT. */
9614 sgotplt->size += 8;
9615 else
9616 sgotplt->size += 4;
9617 }
9618 }
9619
9620 static bfd_vma
9621 arm_movw_immediate (bfd_vma value)
9622 {
9623 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9624 }
9625
9626 static bfd_vma
9627 arm_movt_immediate (bfd_vma value)
9628 {
9629 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9630 }
9631
9632 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9633 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9634 Otherwise, DYNINDX is the index of the symbol in the dynamic
9635 symbol table and SYM_VALUE is undefined.
9636
9637 ROOT_PLT points to the offset of the PLT entry from the start of its
9638 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9639 bookkeeping information.
9640
9641 Returns FALSE if there was a problem. */
9642
9643 static bfd_boolean
9644 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9645 union gotplt_union *root_plt,
9646 struct arm_plt_info *arm_plt,
9647 int dynindx, bfd_vma sym_value)
9648 {
9649 struct elf32_arm_link_hash_table *htab;
9650 asection *sgot;
9651 asection *splt;
9652 asection *srel;
9653 bfd_byte *loc;
9654 bfd_vma plt_index;
9655 Elf_Internal_Rela rel;
9656 bfd_vma plt_header_size;
9657 bfd_vma got_header_size;
9658
9659 htab = elf32_arm_hash_table (info);
9660
9661 /* Pick the appropriate sections and sizes. */
9662 if (dynindx == -1)
9663 {
9664 splt = htab->root.iplt;
9665 sgot = htab->root.igotplt;
9666 srel = htab->root.irelplt;
9667
9668 /* There are no reserved entries in .igot.plt, and no special
9669 first entry in .iplt. */
9670 got_header_size = 0;
9671 plt_header_size = 0;
9672 }
9673 else
9674 {
9675 splt = htab->root.splt;
9676 sgot = htab->root.sgotplt;
9677 srel = htab->root.srelplt;
9678
9679 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9680 plt_header_size = htab->plt_header_size;
9681 }
9682 BFD_ASSERT (splt != NULL && srel != NULL);
9683
9684 /* Fill in the entry in the procedure linkage table. */
9685 if (htab->symbian_p)
9686 {
9687 BFD_ASSERT (dynindx >= 0);
9688 put_arm_insn (htab, output_bfd,
9689 elf32_arm_symbian_plt_entry[0],
9690 splt->contents + root_plt->offset);
9691 bfd_put_32 (output_bfd,
9692 elf32_arm_symbian_plt_entry[1],
9693 splt->contents + root_plt->offset + 4);
9694
9695 /* Fill in the entry in the .rel.plt section. */
9696 rel.r_offset = (splt->output_section->vma
9697 + splt->output_offset
9698 + root_plt->offset + 4);
9699 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9700
9701 /* Get the index in the procedure linkage table which
9702 corresponds to this symbol. This is the index of this symbol
9703 in all the symbols for which we are making plt entries. The
9704 first entry in the procedure linkage table is reserved. */
9705 plt_index = ((root_plt->offset - plt_header_size)
9706 / htab->plt_entry_size);
9707 }
9708 else
9709 {
9710 bfd_vma got_offset, got_address, plt_address;
9711 bfd_vma got_displacement, initial_got_entry;
9712 bfd_byte * ptr;
9713
9714 BFD_ASSERT (sgot != NULL);
9715
9716 /* Get the offset into the .(i)got.plt table of the entry that
9717 corresponds to this function. */
9718 got_offset = (arm_plt->got_offset & -2);
9719
9720 /* Get the index in the procedure linkage table which
9721 corresponds to this symbol. This is the index of this symbol
9722 in all the symbols for which we are making plt entries.
9723 After the reserved .got.plt entries, all symbols appear in
9724 the same order as in .plt. */
9725 if (htab->fdpic_p)
9726 /* Function descriptor takes 8 bytes. */
9727 plt_index = (got_offset - got_header_size) / 8;
9728 else
9729 plt_index = (got_offset - got_header_size) / 4;
9730
9731 /* Calculate the address of the GOT entry. */
9732 got_address = (sgot->output_section->vma
9733 + sgot->output_offset
9734 + got_offset);
9735
9736 /* ...and the address of the PLT entry. */
9737 plt_address = (splt->output_section->vma
9738 + splt->output_offset
9739 + root_plt->offset);
9740
9741 ptr = splt->contents + root_plt->offset;
9742 if (htab->vxworks_p && bfd_link_pic (info))
9743 {
9744 unsigned int i;
9745 bfd_vma val;
9746
9747 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9748 {
9749 val = elf32_arm_vxworks_shared_plt_entry[i];
9750 if (i == 2)
9751 val |= got_address - sgot->output_section->vma;
9752 if (i == 5)
9753 val |= plt_index * RELOC_SIZE (htab);
9754 if (i == 2 || i == 5)
9755 bfd_put_32 (output_bfd, val, ptr);
9756 else
9757 put_arm_insn (htab, output_bfd, val, ptr);
9758 }
9759 }
9760 else if (htab->vxworks_p)
9761 {
9762 unsigned int i;
9763 bfd_vma val;
9764
9765 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9766 {
9767 val = elf32_arm_vxworks_exec_plt_entry[i];
9768 if (i == 2)
9769 val |= got_address;
9770 if (i == 4)
9771 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9772 if (i == 5)
9773 val |= plt_index * RELOC_SIZE (htab);
9774 if (i == 2 || i == 5)
9775 bfd_put_32 (output_bfd, val, ptr);
9776 else
9777 put_arm_insn (htab, output_bfd, val, ptr);
9778 }
9779
9780 loc = (htab->srelplt2->contents
9781 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9782
9783 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9784 referencing the GOT for this PLT entry. */
9785 rel.r_offset = plt_address + 8;
9786 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9787 rel.r_addend = got_offset;
9788 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9789 loc += RELOC_SIZE (htab);
9790
9791 /* Create the R_ARM_ABS32 relocation referencing the
9792 beginning of the PLT for this GOT entry. */
9793 rel.r_offset = got_address;
9794 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9795 rel.r_addend = 0;
9796 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9797 }
9798 else if (htab->nacl_p)
9799 {
9800 /* Calculate the displacement between the PLT slot and the
9801 common tail that's part of the special initial PLT slot. */
9802 int32_t tail_displacement
9803 = ((splt->output_section->vma + splt->output_offset
9804 + ARM_NACL_PLT_TAIL_OFFSET)
9805 - (plt_address + htab->plt_entry_size + 4));
9806 BFD_ASSERT ((tail_displacement & 3) == 0);
9807 tail_displacement >>= 2;
9808
9809 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9810 || (-tail_displacement & 0xff000000) == 0);
9811
9812 /* Calculate the displacement between the PLT slot and the entry
9813 in the GOT. The offset accounts for the value produced by
9814 adding to pc in the penultimate instruction of the PLT stub. */
9815 got_displacement = (got_address
9816 - (plt_address + htab->plt_entry_size));
9817
9818 /* NaCl does not support interworking at all. */
9819 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9820
9821 put_arm_insn (htab, output_bfd,
9822 elf32_arm_nacl_plt_entry[0]
9823 | arm_movw_immediate (got_displacement),
9824 ptr + 0);
9825 put_arm_insn (htab, output_bfd,
9826 elf32_arm_nacl_plt_entry[1]
9827 | arm_movt_immediate (got_displacement),
9828 ptr + 4);
9829 put_arm_insn (htab, output_bfd,
9830 elf32_arm_nacl_plt_entry[2],
9831 ptr + 8);
9832 put_arm_insn (htab, output_bfd,
9833 elf32_arm_nacl_plt_entry[3]
9834 | (tail_displacement & 0x00ffffff),
9835 ptr + 12);
9836 }
9837 else if (htab->fdpic_p)
9838 {
9839 const bfd_vma *plt_entry = using_thumb_only(htab)
9840 ? elf32_arm_fdpic_thumb_plt_entry
9841 : elf32_arm_fdpic_plt_entry;
9842
9843 /* Fill-up Thumb stub if needed. */
9844 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9845 {
9846 put_thumb_insn (htab, output_bfd,
9847 elf32_arm_plt_thumb_stub[0], ptr - 4);
9848 put_thumb_insn (htab, output_bfd,
9849 elf32_arm_plt_thumb_stub[1], ptr - 2);
9850 }
9851 /* As we are using 32 bit instructions even for the Thumb
9852 version, we have to use 'put_arm_insn' instead of
9853 'put_thumb_insn'. */
9854 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9855 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9856 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9857 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9858 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9859
9860 if (!(info->flags & DF_BIND_NOW))
9861 {
9862 /* funcdesc_value_reloc_offset. */
9863 bfd_put_32 (output_bfd,
9864 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9865 ptr + 20);
9866 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9867 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9868 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9869 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9870 }
9871 }
9872 else if (using_thumb_only (htab))
9873 {
9874 /* PR ld/16017: Generate thumb only PLT entries. */
9875 if (!using_thumb2 (htab))
9876 {
9877 /* FIXME: We ought to be able to generate thumb-1 PLT
9878 instructions... */
9879 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9880 output_bfd);
9881 return FALSE;
9882 }
9883
9884 /* Calculate the displacement between the PLT slot and the entry in
9885 the GOT. The 12-byte offset accounts for the value produced by
9886 adding to pc in the 3rd instruction of the PLT stub. */
9887 got_displacement = got_address - (plt_address + 12);
9888
9889 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9890 instead of 'put_thumb_insn'. */
9891 put_arm_insn (htab, output_bfd,
9892 elf32_thumb2_plt_entry[0]
9893 | ((got_displacement & 0x000000ff) << 16)
9894 | ((got_displacement & 0x00000700) << 20)
9895 | ((got_displacement & 0x00000800) >> 1)
9896 | ((got_displacement & 0x0000f000) >> 12),
9897 ptr + 0);
9898 put_arm_insn (htab, output_bfd,
9899 elf32_thumb2_plt_entry[1]
9900 | ((got_displacement & 0x00ff0000) )
9901 | ((got_displacement & 0x07000000) << 4)
9902 | ((got_displacement & 0x08000000) >> 17)
9903 | ((got_displacement & 0xf0000000) >> 28),
9904 ptr + 4);
9905 put_arm_insn (htab, output_bfd,
9906 elf32_thumb2_plt_entry[2],
9907 ptr + 8);
9908 put_arm_insn (htab, output_bfd,
9909 elf32_thumb2_plt_entry[3],
9910 ptr + 12);
9911 }
9912 else
9913 {
9914 /* Calculate the displacement between the PLT slot and the
9915 entry in the GOT. The eight-byte offset accounts for the
9916 value produced by adding to pc in the first instruction
9917 of the PLT stub. */
9918 got_displacement = got_address - (plt_address + 8);
9919
9920 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9921 {
9922 put_thumb_insn (htab, output_bfd,
9923 elf32_arm_plt_thumb_stub[0], ptr - 4);
9924 put_thumb_insn (htab, output_bfd,
9925 elf32_arm_plt_thumb_stub[1], ptr - 2);
9926 }
9927
9928 if (!elf32_arm_use_long_plt_entry)
9929 {
9930 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9931
9932 put_arm_insn (htab, output_bfd,
9933 elf32_arm_plt_entry_short[0]
9934 | ((got_displacement & 0x0ff00000) >> 20),
9935 ptr + 0);
9936 put_arm_insn (htab, output_bfd,
9937 elf32_arm_plt_entry_short[1]
9938 | ((got_displacement & 0x000ff000) >> 12),
9939 ptr+ 4);
9940 put_arm_insn (htab, output_bfd,
9941 elf32_arm_plt_entry_short[2]
9942 | (got_displacement & 0x00000fff),
9943 ptr + 8);
9944 #ifdef FOUR_WORD_PLT
9945 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9946 #endif
9947 }
9948 else
9949 {
9950 put_arm_insn (htab, output_bfd,
9951 elf32_arm_plt_entry_long[0]
9952 | ((got_displacement & 0xf0000000) >> 28),
9953 ptr + 0);
9954 put_arm_insn (htab, output_bfd,
9955 elf32_arm_plt_entry_long[1]
9956 | ((got_displacement & 0x0ff00000) >> 20),
9957 ptr + 4);
9958 put_arm_insn (htab, output_bfd,
9959 elf32_arm_plt_entry_long[2]
9960 | ((got_displacement & 0x000ff000) >> 12),
9961 ptr+ 8);
9962 put_arm_insn (htab, output_bfd,
9963 elf32_arm_plt_entry_long[3]
9964 | (got_displacement & 0x00000fff),
9965 ptr + 12);
9966 }
9967 }
9968
9969 /* Fill in the entry in the .rel(a).(i)plt section. */
9970 rel.r_offset = got_address;
9971 rel.r_addend = 0;
9972 if (dynindx == -1)
9973 {
9974 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9975 The dynamic linker or static executable then calls SYM_VALUE
9976 to determine the correct run-time value of the .igot.plt entry. */
9977 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9978 initial_got_entry = sym_value;
9979 }
9980 else
9981 {
9982 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9983 used by PLT entry. */
9984 if (htab->fdpic_p)
9985 {
9986 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9987 initial_got_entry = 0;
9988 }
9989 else
9990 {
9991 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9992 initial_got_entry = (splt->output_section->vma
9993 + splt->output_offset);
9994
9995 /* PR ld/16017
9996 When thumb only we need to set the LSB for any address that
9997 will be used with an interworking branch instruction. */
9998 if (using_thumb_only (htab))
9999 initial_got_entry |= 1;
10000 }
10001 }
10002
10003 /* Fill in the entry in the global offset table. */
10004 bfd_put_32 (output_bfd, initial_got_entry,
10005 sgot->contents + got_offset);
10006
10007 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
10008 {
10009 /* Setup initial funcdesc value. */
10010 /* FIXME: we don't support lazy binding because there is a
10011 race condition between both words getting written and
10012 some other thread attempting to read them. The ARM
10013 architecture does not have an atomic 64 bit load/store
10014 instruction that could be used to prevent it; it is
10015 recommended that threaded FDPIC applications run with the
10016 LD_BIND_NOW environment variable set. */
10017 bfd_put_32(output_bfd, plt_address + 0x18,
10018 sgot->contents + got_offset);
10019 bfd_put_32(output_bfd, -1 /*TODO*/,
10020 sgot->contents + got_offset + 4);
10021 }
10022 }
10023
10024 if (dynindx == -1)
10025 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
10026 else
10027 {
10028 if (htab->fdpic_p)
10029 {
10030 /* For FDPIC we put PLT relocationss into .rel.got when not
10031 lazy binding otherwise we put them in .rel.plt. For now,
10032 we don't support lazy binding so put it in .rel.got. */
10033 if (info->flags & DF_BIND_NOW)
10034 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
10035 else
10036 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
10037 }
10038 else
10039 {
10040 loc = srel->contents + plt_index * RELOC_SIZE (htab);
10041 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
10042 }
10043 }
10044
10045 return TRUE;
10046 }
10047
10048 /* Some relocations map to different relocations depending on the
10049 target. Return the real relocation. */
10050
10051 static int
10052 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10053 int r_type)
10054 {
10055 switch (r_type)
10056 {
10057 case R_ARM_TARGET1:
10058 if (globals->target1_is_rel)
10059 return R_ARM_REL32;
10060 else
10061 return R_ARM_ABS32;
10062
10063 case R_ARM_TARGET2:
10064 return globals->target2_reloc;
10065
10066 default:
10067 return r_type;
10068 }
10069 }
10070
10071 /* Return the base VMA address which should be subtracted from real addresses
10072 when resolving @dtpoff relocation.
10073 This is PT_TLS segment p_vaddr. */
10074
10075 static bfd_vma
10076 dtpoff_base (struct bfd_link_info *info)
10077 {
10078 /* If tls_sec is NULL, we should have signalled an error already. */
10079 if (elf_hash_table (info)->tls_sec == NULL)
10080 return 0;
10081 return elf_hash_table (info)->tls_sec->vma;
10082 }
10083
10084 /* Return the relocation value for @tpoff relocation
10085 if STT_TLS virtual address is ADDRESS. */
10086
10087 static bfd_vma
10088 tpoff (struct bfd_link_info *info, bfd_vma address)
10089 {
10090 struct elf_link_hash_table *htab = elf_hash_table (info);
10091 bfd_vma base;
10092
10093 /* If tls_sec is NULL, we should have signalled an error already. */
10094 if (htab->tls_sec == NULL)
10095 return 0;
10096 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10097 return address - htab->tls_sec->vma + base;
10098 }
10099
10100 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10101 VALUE is the relocation value. */
10102
10103 static bfd_reloc_status_type
10104 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10105 {
10106 if (value > 0xfff)
10107 return bfd_reloc_overflow;
10108
10109 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10110 bfd_put_32 (abfd, value, data);
10111 return bfd_reloc_ok;
10112 }
10113
10114 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10115 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10116 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10117
10118 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10119 is to then call final_link_relocate. Return other values in the
10120 case of error.
10121
10122 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10123 the pre-relaxed code. It would be nice if the relocs were updated
10124 to match the optimization. */
10125
10126 static bfd_reloc_status_type
10127 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10128 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10129 Elf_Internal_Rela *rel, unsigned long is_local)
10130 {
10131 unsigned long insn;
10132
10133 switch (ELF32_R_TYPE (rel->r_info))
10134 {
10135 default:
10136 return bfd_reloc_notsupported;
10137
10138 case R_ARM_TLS_GOTDESC:
10139 if (is_local)
10140 insn = 0;
10141 else
10142 {
10143 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10144 if (insn & 1)
10145 insn -= 5; /* THUMB */
10146 else
10147 insn -= 8; /* ARM */
10148 }
10149 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10150 return bfd_reloc_continue;
10151
10152 case R_ARM_THM_TLS_DESCSEQ:
10153 /* Thumb insn. */
10154 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10155 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10156 {
10157 if (is_local)
10158 /* nop */
10159 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10160 }
10161 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10162 {
10163 if (is_local)
10164 /* nop */
10165 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10166 else
10167 /* ldr rx,[ry] */
10168 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10169 }
10170 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10171 {
10172 if (is_local)
10173 /* nop */
10174 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10175 else
10176 /* mov r0, rx */
10177 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10178 contents + rel->r_offset);
10179 }
10180 else
10181 {
10182 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10183 /* It's a 32 bit instruction, fetch the rest of it for
10184 error generation. */
10185 insn = (insn << 16)
10186 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10187 _bfd_error_handler
10188 /* xgettext:c-format */
10189 (_("%pB(%pA+%#" PRIx64 "): "
10190 "unexpected %s instruction '%#lx' in TLS trampoline"),
10191 input_bfd, input_sec, (uint64_t) rel->r_offset,
10192 "Thumb", insn);
10193 return bfd_reloc_notsupported;
10194 }
10195 break;
10196
10197 case R_ARM_TLS_DESCSEQ:
10198 /* arm insn. */
10199 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10200 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10201 {
10202 if (is_local)
10203 /* mov rx, ry */
10204 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10205 contents + rel->r_offset);
10206 }
10207 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10208 {
10209 if (is_local)
10210 /* nop */
10211 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10212 else
10213 /* ldr rx,[ry] */
10214 bfd_put_32 (input_bfd, insn & 0xfffff000,
10215 contents + rel->r_offset);
10216 }
10217 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10218 {
10219 if (is_local)
10220 /* nop */
10221 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10222 else
10223 /* mov r0, rx */
10224 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10225 contents + rel->r_offset);
10226 }
10227 else
10228 {
10229 _bfd_error_handler
10230 /* xgettext:c-format */
10231 (_("%pB(%pA+%#" PRIx64 "): "
10232 "unexpected %s instruction '%#lx' in TLS trampoline"),
10233 input_bfd, input_sec, (uint64_t) rel->r_offset,
10234 "ARM", insn);
10235 return bfd_reloc_notsupported;
10236 }
10237 break;
10238
10239 case R_ARM_TLS_CALL:
10240 /* GD->IE relaxation, turn the instruction into 'nop' or
10241 'ldr r0, [pc,r0]' */
10242 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10243 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10244 break;
10245
10246 case R_ARM_THM_TLS_CALL:
10247 /* GD->IE relaxation. */
10248 if (!is_local)
10249 /* add r0,pc; ldr r0, [r0] */
10250 insn = 0x44786800;
10251 else if (using_thumb2 (globals))
10252 /* nop.w */
10253 insn = 0xf3af8000;
10254 else
10255 /* nop; nop */
10256 insn = 0xbf00bf00;
10257
10258 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10259 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10260 break;
10261 }
10262 return bfd_reloc_ok;
10263 }
10264
10265 /* For a given value of n, calculate the value of G_n as required to
10266 deal with group relocations. We return it in the form of an
10267 encoded constant-and-rotation, together with the final residual. If n is
10268 specified as less than zero, then final_residual is filled with the
10269 input value and no further action is performed. */
10270
10271 static bfd_vma
10272 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10273 {
10274 int current_n;
10275 bfd_vma g_n;
10276 bfd_vma encoded_g_n = 0;
10277 bfd_vma residual = value; /* Also known as Y_n. */
10278
10279 for (current_n = 0; current_n <= n; current_n++)
10280 {
10281 int shift;
10282
10283 /* Calculate which part of the value to mask. */
10284 if (residual == 0)
10285 shift = 0;
10286 else
10287 {
10288 int msb;
10289
10290 /* Determine the most significant bit in the residual and
10291 align the resulting value to a 2-bit boundary. */
10292 for (msb = 30; msb >= 0; msb -= 2)
10293 if (residual & (3 << msb))
10294 break;
10295
10296 /* The desired shift is now (msb - 6), or zero, whichever
10297 is the greater. */
10298 shift = msb - 6;
10299 if (shift < 0)
10300 shift = 0;
10301 }
10302
10303 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10304 g_n = residual & (0xff << shift);
10305 encoded_g_n = (g_n >> shift)
10306 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10307
10308 /* Calculate the residual for the next time around. */
10309 residual &= ~g_n;
10310 }
10311
10312 *final_residual = residual;
10313
10314 return encoded_g_n;
10315 }
10316
10317 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10318 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10319
10320 static int
10321 identify_add_or_sub (bfd_vma insn)
10322 {
10323 int opcode = insn & 0x1e00000;
10324
10325 if (opcode == 1 << 23) /* ADD */
10326 return 1;
10327
10328 if (opcode == 1 << 22) /* SUB */
10329 return -1;
10330
10331 return 0;
10332 }
10333
10334 /* Perform a relocation as part of a final link. */
10335
10336 static bfd_reloc_status_type
10337 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10338 bfd * input_bfd,
10339 bfd * output_bfd,
10340 asection * input_section,
10341 bfd_byte * contents,
10342 Elf_Internal_Rela * rel,
10343 bfd_vma value,
10344 struct bfd_link_info * info,
10345 asection * sym_sec,
10346 const char * sym_name,
10347 unsigned char st_type,
10348 enum arm_st_branch_type branch_type,
10349 struct elf_link_hash_entry * h,
10350 bfd_boolean * unresolved_reloc_p,
10351 char ** error_message)
10352 {
10353 unsigned long r_type = howto->type;
10354 unsigned long r_symndx;
10355 bfd_byte * hit_data = contents + rel->r_offset;
10356 bfd_vma * local_got_offsets;
10357 bfd_vma * local_tlsdesc_gotents;
10358 asection * sgot;
10359 asection * splt;
10360 asection * sreloc = NULL;
10361 asection * srelgot;
10362 bfd_vma addend;
10363 bfd_signed_vma signed_addend;
10364 unsigned char dynreloc_st_type;
10365 bfd_vma dynreloc_value;
10366 struct elf32_arm_link_hash_table * globals;
10367 struct elf32_arm_link_hash_entry *eh;
10368 union gotplt_union *root_plt;
10369 struct arm_plt_info *arm_plt;
10370 bfd_vma plt_offset;
10371 bfd_vma gotplt_offset;
10372 bfd_boolean has_iplt_entry;
10373 bfd_boolean resolved_to_zero;
10374
10375 globals = elf32_arm_hash_table (info);
10376 if (globals == NULL)
10377 return bfd_reloc_notsupported;
10378
10379 BFD_ASSERT (is_arm_elf (input_bfd));
10380 BFD_ASSERT (howto != NULL);
10381
10382 /* Some relocation types map to different relocations depending on the
10383 target. We pick the right one here. */
10384 r_type = arm_real_reloc_type (globals, r_type);
10385
10386 /* It is possible to have linker relaxations on some TLS access
10387 models. Update our information here. */
10388 r_type = elf32_arm_tls_transition (info, r_type, h);
10389
10390 if (r_type != howto->type)
10391 howto = elf32_arm_howto_from_type (r_type);
10392
10393 eh = (struct elf32_arm_link_hash_entry *) h;
10394 sgot = globals->root.sgot;
10395 local_got_offsets = elf_local_got_offsets (input_bfd);
10396 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10397
10398 if (globals->root.dynamic_sections_created)
10399 srelgot = globals->root.srelgot;
10400 else
10401 srelgot = NULL;
10402
10403 r_symndx = ELF32_R_SYM (rel->r_info);
10404
10405 if (globals->use_rel)
10406 {
10407 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10408
10409 if (addend & ((howto->src_mask + 1) >> 1))
10410 {
10411 signed_addend = -1;
10412 signed_addend &= ~ howto->src_mask;
10413 signed_addend |= addend;
10414 }
10415 else
10416 signed_addend = addend;
10417 }
10418 else
10419 addend = signed_addend = rel->r_addend;
10420
10421 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10422 are resolving a function call relocation. */
10423 if (using_thumb_only (globals)
10424 && (r_type == R_ARM_THM_CALL
10425 || r_type == R_ARM_THM_JUMP24)
10426 && branch_type == ST_BRANCH_TO_ARM)
10427 branch_type = ST_BRANCH_TO_THUMB;
10428
10429 /* Record the symbol information that should be used in dynamic
10430 relocations. */
10431 dynreloc_st_type = st_type;
10432 dynreloc_value = value;
10433 if (branch_type == ST_BRANCH_TO_THUMB)
10434 dynreloc_value |= 1;
10435
10436 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10437 VALUE appropriately for relocations that we resolve at link time. */
10438 has_iplt_entry = FALSE;
10439 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10440 &arm_plt)
10441 && root_plt->offset != (bfd_vma) -1)
10442 {
10443 plt_offset = root_plt->offset;
10444 gotplt_offset = arm_plt->got_offset;
10445
10446 if (h == NULL || eh->is_iplt)
10447 {
10448 has_iplt_entry = TRUE;
10449 splt = globals->root.iplt;
10450
10451 /* Populate .iplt entries here, because not all of them will
10452 be seen by finish_dynamic_symbol. The lower bit is set if
10453 we have already populated the entry. */
10454 if (plt_offset & 1)
10455 plt_offset--;
10456 else
10457 {
10458 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10459 -1, dynreloc_value))
10460 root_plt->offset |= 1;
10461 else
10462 return bfd_reloc_notsupported;
10463 }
10464
10465 /* Static relocations always resolve to the .iplt entry. */
10466 st_type = STT_FUNC;
10467 value = (splt->output_section->vma
10468 + splt->output_offset
10469 + plt_offset);
10470 branch_type = ST_BRANCH_TO_ARM;
10471
10472 /* If there are non-call relocations that resolve to the .iplt
10473 entry, then all dynamic ones must too. */
10474 if (arm_plt->noncall_refcount != 0)
10475 {
10476 dynreloc_st_type = st_type;
10477 dynreloc_value = value;
10478 }
10479 }
10480 else
10481 /* We populate the .plt entry in finish_dynamic_symbol. */
10482 splt = globals->root.splt;
10483 }
10484 else
10485 {
10486 splt = NULL;
10487 plt_offset = (bfd_vma) -1;
10488 gotplt_offset = (bfd_vma) -1;
10489 }
10490
10491 resolved_to_zero = (h != NULL
10492 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10493
10494 switch (r_type)
10495 {
10496 case R_ARM_NONE:
10497 /* We don't need to find a value for this symbol. It's just a
10498 marker. */
10499 *unresolved_reloc_p = FALSE;
10500 return bfd_reloc_ok;
10501
10502 case R_ARM_ABS12:
10503 if (!globals->vxworks_p)
10504 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10505 /* Fall through. */
10506
10507 case R_ARM_PC24:
10508 case R_ARM_ABS32:
10509 case R_ARM_ABS32_NOI:
10510 case R_ARM_REL32:
10511 case R_ARM_REL32_NOI:
10512 case R_ARM_CALL:
10513 case R_ARM_JUMP24:
10514 case R_ARM_XPC25:
10515 case R_ARM_PREL31:
10516 case R_ARM_PLT32:
10517 /* Handle relocations which should use the PLT entry. ABS32/REL32
10518 will use the symbol's value, which may point to a PLT entry, but we
10519 don't need to handle that here. If we created a PLT entry, all
10520 branches in this object should go to it, except if the PLT is too
10521 far away, in which case a long branch stub should be inserted. */
10522 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10523 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10524 && r_type != R_ARM_CALL
10525 && r_type != R_ARM_JUMP24
10526 && r_type != R_ARM_PLT32)
10527 && plt_offset != (bfd_vma) -1)
10528 {
10529 /* If we've created a .plt section, and assigned a PLT entry
10530 to this function, it must either be a STT_GNU_IFUNC reference
10531 or not be known to bind locally. In other cases, we should
10532 have cleared the PLT entry by now. */
10533 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10534
10535 value = (splt->output_section->vma
10536 + splt->output_offset
10537 + plt_offset);
10538 *unresolved_reloc_p = FALSE;
10539 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10540 contents, rel->r_offset, value,
10541 rel->r_addend);
10542 }
10543
10544 /* When generating a shared object or relocatable executable, these
10545 relocations are copied into the output file to be resolved at
10546 run time. */
10547 if ((bfd_link_pic (info)
10548 || globals->root.is_relocatable_executable
10549 || globals->fdpic_p)
10550 && (input_section->flags & SEC_ALLOC)
10551 && !(globals->vxworks_p
10552 && strcmp (input_section->output_section->name,
10553 ".tls_vars") == 0)
10554 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10555 || !SYMBOL_CALLS_LOCAL (info, h))
10556 && !(input_bfd == globals->stub_bfd
10557 && strstr (input_section->name, STUB_SUFFIX))
10558 && (h == NULL
10559 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10560 && !resolved_to_zero)
10561 || h->root.type != bfd_link_hash_undefweak)
10562 && r_type != R_ARM_PC24
10563 && r_type != R_ARM_CALL
10564 && r_type != R_ARM_JUMP24
10565 && r_type != R_ARM_PREL31
10566 && r_type != R_ARM_PLT32)
10567 {
10568 Elf_Internal_Rela outrel;
10569 bfd_boolean skip, relocate;
10570 int isrofixup = 0;
10571
10572 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10573 && !h->def_regular)
10574 {
10575 char *v = _("shared object");
10576
10577 if (bfd_link_executable (info))
10578 v = _("PIE executable");
10579
10580 _bfd_error_handler
10581 (_("%pB: relocation %s against external or undefined symbol `%s'"
10582 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10583 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10584 return bfd_reloc_notsupported;
10585 }
10586
10587 *unresolved_reloc_p = FALSE;
10588
10589 if (sreloc == NULL && globals->root.dynamic_sections_created)
10590 {
10591 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10592 ! globals->use_rel);
10593
10594 if (sreloc == NULL)
10595 return bfd_reloc_notsupported;
10596 }
10597
10598 skip = FALSE;
10599 relocate = FALSE;
10600
10601 outrel.r_addend = addend;
10602 outrel.r_offset =
10603 _bfd_elf_section_offset (output_bfd, info, input_section,
10604 rel->r_offset);
10605 if (outrel.r_offset == (bfd_vma) -1)
10606 skip = TRUE;
10607 else if (outrel.r_offset == (bfd_vma) -2)
10608 skip = TRUE, relocate = TRUE;
10609 outrel.r_offset += (input_section->output_section->vma
10610 + input_section->output_offset);
10611
10612 if (skip)
10613 memset (&outrel, 0, sizeof outrel);
10614 else if (h != NULL
10615 && h->dynindx != -1
10616 && (!bfd_link_pic (info)
10617 || !(bfd_link_pie (info)
10618 || SYMBOLIC_BIND (info, h))
10619 || !h->def_regular))
10620 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10621 else
10622 {
10623 int symbol;
10624
10625 /* This symbol is local, or marked to become local. */
10626 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10627 || (globals->fdpic_p && !bfd_link_pic(info)));
10628 if (globals->symbian_p)
10629 {
10630 asection *osec;
10631
10632 /* On Symbian OS, the data segment and text segement
10633 can be relocated independently. Therefore, we
10634 must indicate the segment to which this
10635 relocation is relative. The BPABI allows us to
10636 use any symbol in the right segment; we just use
10637 the section symbol as it is convenient. (We
10638 cannot use the symbol given by "h" directly as it
10639 will not appear in the dynamic symbol table.)
10640
10641 Note that the dynamic linker ignores the section
10642 symbol value, so we don't subtract osec->vma
10643 from the emitted reloc addend. */
10644 if (sym_sec)
10645 osec = sym_sec->output_section;
10646 else
10647 osec = input_section->output_section;
10648 symbol = elf_section_data (osec)->dynindx;
10649 if (symbol == 0)
10650 {
10651 struct elf_link_hash_table *htab = elf_hash_table (info);
10652
10653 if ((osec->flags & SEC_READONLY) == 0
10654 && htab->data_index_section != NULL)
10655 osec = htab->data_index_section;
10656 else
10657 osec = htab->text_index_section;
10658 symbol = elf_section_data (osec)->dynindx;
10659 }
10660 BFD_ASSERT (symbol != 0);
10661 }
10662 else
10663 /* On SVR4-ish systems, the dynamic loader cannot
10664 relocate the text and data segments independently,
10665 so the symbol does not matter. */
10666 symbol = 0;
10667 if (dynreloc_st_type == STT_GNU_IFUNC)
10668 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10669 to the .iplt entry. Instead, every non-call reference
10670 must use an R_ARM_IRELATIVE relocation to obtain the
10671 correct run-time address. */
10672 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10673 else if (globals->fdpic_p && !bfd_link_pic(info))
10674 isrofixup = 1;
10675 else
10676 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10677 if (globals->use_rel)
10678 relocate = TRUE;
10679 else
10680 outrel.r_addend += dynreloc_value;
10681 }
10682
10683 if (isrofixup)
10684 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10685 else
10686 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10687
10688 /* If this reloc is against an external symbol, we do not want to
10689 fiddle with the addend. Otherwise, we need to include the symbol
10690 value so that it becomes an addend for the dynamic reloc. */
10691 if (! relocate)
10692 return bfd_reloc_ok;
10693
10694 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10695 contents, rel->r_offset,
10696 dynreloc_value, (bfd_vma) 0);
10697 }
10698 else switch (r_type)
10699 {
10700 case R_ARM_ABS12:
10701 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10702
10703 case R_ARM_XPC25: /* Arm BLX instruction. */
10704 case R_ARM_CALL:
10705 case R_ARM_JUMP24:
10706 case R_ARM_PC24: /* Arm B/BL instruction. */
10707 case R_ARM_PLT32:
10708 {
10709 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10710
10711 if (r_type == R_ARM_XPC25)
10712 {
10713 /* Check for Arm calling Arm function. */
10714 /* FIXME: Should we translate the instruction into a BL
10715 instruction instead ? */
10716 if (branch_type != ST_BRANCH_TO_THUMB)
10717 _bfd_error_handler
10718 (_("\%pB: warning: %s BLX instruction targets"
10719 " %s function '%s'"),
10720 input_bfd, "ARM",
10721 "ARM", h ? h->root.root.string : "(local)");
10722 }
10723 else if (r_type == R_ARM_PC24)
10724 {
10725 /* Check for Arm calling Thumb function. */
10726 if (branch_type == ST_BRANCH_TO_THUMB)
10727 {
10728 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10729 output_bfd, input_section,
10730 hit_data, sym_sec, rel->r_offset,
10731 signed_addend, value,
10732 error_message))
10733 return bfd_reloc_ok;
10734 else
10735 return bfd_reloc_dangerous;
10736 }
10737 }
10738
10739 /* Check if a stub has to be inserted because the
10740 destination is too far or we are changing mode. */
10741 if ( r_type == R_ARM_CALL
10742 || r_type == R_ARM_JUMP24
10743 || r_type == R_ARM_PLT32)
10744 {
10745 enum elf32_arm_stub_type stub_type = arm_stub_none;
10746 struct elf32_arm_link_hash_entry *hash;
10747
10748 hash = (struct elf32_arm_link_hash_entry *) h;
10749 stub_type = arm_type_of_stub (info, input_section, rel,
10750 st_type, &branch_type,
10751 hash, value, sym_sec,
10752 input_bfd, sym_name);
10753
10754 if (stub_type != arm_stub_none)
10755 {
10756 /* The target is out of reach, so redirect the
10757 branch to the local stub for this function. */
10758 stub_entry = elf32_arm_get_stub_entry (input_section,
10759 sym_sec, h,
10760 rel, globals,
10761 stub_type);
10762 {
10763 if (stub_entry != NULL)
10764 value = (stub_entry->stub_offset
10765 + stub_entry->stub_sec->output_offset
10766 + stub_entry->stub_sec->output_section->vma);
10767
10768 if (plt_offset != (bfd_vma) -1)
10769 *unresolved_reloc_p = FALSE;
10770 }
10771 }
10772 else
10773 {
10774 /* If the call goes through a PLT entry, make sure to
10775 check distance to the right destination address. */
10776 if (plt_offset != (bfd_vma) -1)
10777 {
10778 value = (splt->output_section->vma
10779 + splt->output_offset
10780 + plt_offset);
10781 *unresolved_reloc_p = FALSE;
10782 /* The PLT entry is in ARM mode, regardless of the
10783 target function. */
10784 branch_type = ST_BRANCH_TO_ARM;
10785 }
10786 }
10787 }
10788
10789 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10790 where:
10791 S is the address of the symbol in the relocation.
10792 P is address of the instruction being relocated.
10793 A is the addend (extracted from the instruction) in bytes.
10794
10795 S is held in 'value'.
10796 P is the base address of the section containing the
10797 instruction plus the offset of the reloc into that
10798 section, ie:
10799 (input_section->output_section->vma +
10800 input_section->output_offset +
10801 rel->r_offset).
10802 A is the addend, converted into bytes, ie:
10803 (signed_addend * 4)
10804
10805 Note: None of these operations have knowledge of the pipeline
10806 size of the processor, thus it is up to the assembler to
10807 encode this information into the addend. */
10808 value -= (input_section->output_section->vma
10809 + input_section->output_offset);
10810 value -= rel->r_offset;
10811 if (globals->use_rel)
10812 value += (signed_addend << howto->size);
10813 else
10814 /* RELA addends do not have to be adjusted by howto->size. */
10815 value += signed_addend;
10816
10817 signed_addend = value;
10818 signed_addend >>= howto->rightshift;
10819
10820 /* A branch to an undefined weak symbol is turned into a jump to
10821 the next instruction unless a PLT entry will be created.
10822 Do the same for local undefined symbols (but not for STN_UNDEF).
10823 The jump to the next instruction is optimized as a NOP depending
10824 on the architecture. */
10825 if (h ? (h->root.type == bfd_link_hash_undefweak
10826 && plt_offset == (bfd_vma) -1)
10827 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10828 {
10829 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10830
10831 if (arch_has_arm_nop (globals))
10832 value |= 0x0320f000;
10833 else
10834 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10835 }
10836 else
10837 {
10838 /* Perform a signed range check. */
10839 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10840 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10841 return bfd_reloc_overflow;
10842
10843 addend = (value & 2);
10844
10845 value = (signed_addend & howto->dst_mask)
10846 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10847
10848 if (r_type == R_ARM_CALL)
10849 {
10850 /* Set the H bit in the BLX instruction. */
10851 if (branch_type == ST_BRANCH_TO_THUMB)
10852 {
10853 if (addend)
10854 value |= (1 << 24);
10855 else
10856 value &= ~(bfd_vma)(1 << 24);
10857 }
10858
10859 /* Select the correct instruction (BL or BLX). */
10860 /* Only if we are not handling a BL to a stub. In this
10861 case, mode switching is performed by the stub. */
10862 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10863 value |= (1 << 28);
10864 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10865 {
10866 value &= ~(bfd_vma)(1 << 28);
10867 value |= (1 << 24);
10868 }
10869 }
10870 }
10871 }
10872 break;
10873
10874 case R_ARM_ABS32:
10875 value += addend;
10876 if (branch_type == ST_BRANCH_TO_THUMB)
10877 value |= 1;
10878 break;
10879
10880 case R_ARM_ABS32_NOI:
10881 value += addend;
10882 break;
10883
10884 case R_ARM_REL32:
10885 value += addend;
10886 if (branch_type == ST_BRANCH_TO_THUMB)
10887 value |= 1;
10888 value -= (input_section->output_section->vma
10889 + input_section->output_offset + rel->r_offset);
10890 break;
10891
10892 case R_ARM_REL32_NOI:
10893 value += addend;
10894 value -= (input_section->output_section->vma
10895 + input_section->output_offset + rel->r_offset);
10896 break;
10897
10898 case R_ARM_PREL31:
10899 value -= (input_section->output_section->vma
10900 + input_section->output_offset + rel->r_offset);
10901 value += signed_addend;
10902 if (! h || h->root.type != bfd_link_hash_undefweak)
10903 {
10904 /* Check for overflow. */
10905 if ((value ^ (value >> 1)) & (1 << 30))
10906 return bfd_reloc_overflow;
10907 }
10908 value &= 0x7fffffff;
10909 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10910 if (branch_type == ST_BRANCH_TO_THUMB)
10911 value |= 1;
10912 break;
10913 }
10914
10915 bfd_put_32 (input_bfd, value, hit_data);
10916 return bfd_reloc_ok;
10917
10918 case R_ARM_ABS8:
10919 /* PR 16202: Refectch the addend using the correct size. */
10920 if (globals->use_rel)
10921 addend = bfd_get_8 (input_bfd, hit_data);
10922 value += addend;
10923
10924 /* There is no way to tell whether the user intended to use a signed or
10925 unsigned addend. When checking for overflow we accept either,
10926 as specified by the AAELF. */
10927 if ((long) value > 0xff || (long) value < -0x80)
10928 return bfd_reloc_overflow;
10929
10930 bfd_put_8 (input_bfd, value, hit_data);
10931 return bfd_reloc_ok;
10932
10933 case R_ARM_ABS16:
10934 /* PR 16202: Refectch the addend using the correct size. */
10935 if (globals->use_rel)
10936 addend = bfd_get_16 (input_bfd, hit_data);
10937 value += addend;
10938
10939 /* See comment for R_ARM_ABS8. */
10940 if ((long) value > 0xffff || (long) value < -0x8000)
10941 return bfd_reloc_overflow;
10942
10943 bfd_put_16 (input_bfd, value, hit_data);
10944 return bfd_reloc_ok;
10945
10946 case R_ARM_THM_ABS5:
10947 /* Support ldr and str instructions for the thumb. */
10948 if (globals->use_rel)
10949 {
10950 /* Need to refetch addend. */
10951 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10952 /* ??? Need to determine shift amount from operand size. */
10953 addend >>= howto->rightshift;
10954 }
10955 value += addend;
10956
10957 /* ??? Isn't value unsigned? */
10958 if ((long) value > 0x1f || (long) value < -0x10)
10959 return bfd_reloc_overflow;
10960
10961 /* ??? Value needs to be properly shifted into place first. */
10962 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10963 bfd_put_16 (input_bfd, value, hit_data);
10964 return bfd_reloc_ok;
10965
10966 case R_ARM_THM_ALU_PREL_11_0:
10967 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10968 {
10969 bfd_vma insn;
10970 bfd_signed_vma relocation;
10971
10972 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10973 | bfd_get_16 (input_bfd, hit_data + 2);
10974
10975 if (globals->use_rel)
10976 {
10977 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10978 | ((insn & (1 << 26)) >> 15);
10979 if (insn & 0xf00000)
10980 signed_addend = -signed_addend;
10981 }
10982
10983 relocation = value + signed_addend;
10984 relocation -= Pa (input_section->output_section->vma
10985 + input_section->output_offset
10986 + rel->r_offset);
10987
10988 /* PR 21523: Use an absolute value. The user of this reloc will
10989 have already selected an ADD or SUB insn appropriately. */
10990 value = llabs (relocation);
10991
10992 if (value >= 0x1000)
10993 return bfd_reloc_overflow;
10994
10995 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10996 if (branch_type == ST_BRANCH_TO_THUMB)
10997 value |= 1;
10998
10999 insn = (insn & 0xfb0f8f00) | (value & 0xff)
11000 | ((value & 0x700) << 4)
11001 | ((value & 0x800) << 15);
11002 if (relocation < 0)
11003 insn |= 0xa00000;
11004
11005 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11006 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11007
11008 return bfd_reloc_ok;
11009 }
11010
11011 case R_ARM_THM_PC8:
11012 /* PR 10073: This reloc is not generated by the GNU toolchain,
11013 but it is supported for compatibility with third party libraries
11014 generated by other compilers, specifically the ARM/IAR. */
11015 {
11016 bfd_vma insn;
11017 bfd_signed_vma relocation;
11018
11019 insn = bfd_get_16 (input_bfd, hit_data);
11020
11021 if (globals->use_rel)
11022 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
11023
11024 relocation = value + addend;
11025 relocation -= Pa (input_section->output_section->vma
11026 + input_section->output_offset
11027 + rel->r_offset);
11028
11029 value = relocation;
11030
11031 /* We do not check for overflow of this reloc. Although strictly
11032 speaking this is incorrect, it appears to be necessary in order
11033 to work with IAR generated relocs. Since GCC and GAS do not
11034 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
11035 a problem for them. */
11036 value &= 0x3fc;
11037
11038 insn = (insn & 0xff00) | (value >> 2);
11039
11040 bfd_put_16 (input_bfd, insn, hit_data);
11041
11042 return bfd_reloc_ok;
11043 }
11044
11045 case R_ARM_THM_PC12:
11046 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11047 {
11048 bfd_vma insn;
11049 bfd_signed_vma relocation;
11050
11051 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
11052 | bfd_get_16 (input_bfd, hit_data + 2);
11053
11054 if (globals->use_rel)
11055 {
11056 signed_addend = insn & 0xfff;
11057 if (!(insn & (1 << 23)))
11058 signed_addend = -signed_addend;
11059 }
11060
11061 relocation = value + signed_addend;
11062 relocation -= Pa (input_section->output_section->vma
11063 + input_section->output_offset
11064 + rel->r_offset);
11065
11066 value = relocation;
11067
11068 if (value >= 0x1000)
11069 return bfd_reloc_overflow;
11070
11071 insn = (insn & 0xff7ff000) | value;
11072 if (relocation >= 0)
11073 insn |= (1 << 23);
11074
11075 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11076 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11077
11078 return bfd_reloc_ok;
11079 }
11080
11081 case R_ARM_THM_XPC22:
11082 case R_ARM_THM_CALL:
11083 case R_ARM_THM_JUMP24:
11084 /* Thumb BL (branch long instruction). */
11085 {
11086 bfd_vma relocation;
11087 bfd_vma reloc_sign;
11088 bfd_boolean overflow = FALSE;
11089 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11090 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11091 bfd_signed_vma reloc_signed_max;
11092 bfd_signed_vma reloc_signed_min;
11093 bfd_vma check;
11094 bfd_signed_vma signed_check;
11095 int bitsize;
11096 const int thumb2 = using_thumb2 (globals);
11097 const int thumb2_bl = using_thumb2_bl (globals);
11098
11099 /* A branch to an undefined weak symbol is turned into a jump to
11100 the next instruction unless a PLT entry will be created.
11101 The jump to the next instruction is optimized as a NOP.W for
11102 Thumb-2 enabled architectures. */
11103 if (h && h->root.type == bfd_link_hash_undefweak
11104 && plt_offset == (bfd_vma) -1)
11105 {
11106 if (thumb2)
11107 {
11108 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11109 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11110 }
11111 else
11112 {
11113 bfd_put_16 (input_bfd, 0xe000, hit_data);
11114 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11115 }
11116 return bfd_reloc_ok;
11117 }
11118
11119 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11120 with Thumb-1) involving the J1 and J2 bits. */
11121 if (globals->use_rel)
11122 {
11123 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11124 bfd_vma upper = upper_insn & 0x3ff;
11125 bfd_vma lower = lower_insn & 0x7ff;
11126 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11127 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11128 bfd_vma i1 = j1 ^ s ? 0 : 1;
11129 bfd_vma i2 = j2 ^ s ? 0 : 1;
11130
11131 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11132 /* Sign extend. */
11133 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11134
11135 signed_addend = addend;
11136 }
11137
11138 if (r_type == R_ARM_THM_XPC22)
11139 {
11140 /* Check for Thumb to Thumb call. */
11141 /* FIXME: Should we translate the instruction into a BL
11142 instruction instead ? */
11143 if (branch_type == ST_BRANCH_TO_THUMB)
11144 _bfd_error_handler
11145 (_("%pB: warning: %s BLX instruction targets"
11146 " %s function '%s'"),
11147 input_bfd, "Thumb",
11148 "Thumb", h ? h->root.root.string : "(local)");
11149 }
11150 else
11151 {
11152 /* If it is not a call to Thumb, assume call to Arm.
11153 If it is a call relative to a section name, then it is not a
11154 function call at all, but rather a long jump. Calls through
11155 the PLT do not require stubs. */
11156 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11157 {
11158 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11159 {
11160 /* Convert BL to BLX. */
11161 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11162 }
11163 else if (( r_type != R_ARM_THM_CALL)
11164 && (r_type != R_ARM_THM_JUMP24))
11165 {
11166 if (elf32_thumb_to_arm_stub
11167 (info, sym_name, input_bfd, output_bfd, input_section,
11168 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11169 error_message))
11170 return bfd_reloc_ok;
11171 else
11172 return bfd_reloc_dangerous;
11173 }
11174 }
11175 else if (branch_type == ST_BRANCH_TO_THUMB
11176 && globals->use_blx
11177 && r_type == R_ARM_THM_CALL)
11178 {
11179 /* Make sure this is a BL. */
11180 lower_insn |= 0x1800;
11181 }
11182 }
11183
11184 enum elf32_arm_stub_type stub_type = arm_stub_none;
11185 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11186 {
11187 /* Check if a stub has to be inserted because the destination
11188 is too far. */
11189 struct elf32_arm_stub_hash_entry *stub_entry;
11190 struct elf32_arm_link_hash_entry *hash;
11191
11192 hash = (struct elf32_arm_link_hash_entry *) h;
11193
11194 stub_type = arm_type_of_stub (info, input_section, rel,
11195 st_type, &branch_type,
11196 hash, value, sym_sec,
11197 input_bfd, sym_name);
11198
11199 if (stub_type != arm_stub_none)
11200 {
11201 /* The target is out of reach or we are changing modes, so
11202 redirect the branch to the local stub for this
11203 function. */
11204 stub_entry = elf32_arm_get_stub_entry (input_section,
11205 sym_sec, h,
11206 rel, globals,
11207 stub_type);
11208 if (stub_entry != NULL)
11209 {
11210 value = (stub_entry->stub_offset
11211 + stub_entry->stub_sec->output_offset
11212 + stub_entry->stub_sec->output_section->vma);
11213
11214 if (plt_offset != (bfd_vma) -1)
11215 *unresolved_reloc_p = FALSE;
11216 }
11217
11218 /* If this call becomes a call to Arm, force BLX. */
11219 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11220 {
11221 if ((stub_entry
11222 && !arm_stub_is_thumb (stub_entry->stub_type))
11223 || branch_type != ST_BRANCH_TO_THUMB)
11224 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11225 }
11226 }
11227 }
11228
11229 /* Handle calls via the PLT. */
11230 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11231 {
11232 value = (splt->output_section->vma
11233 + splt->output_offset
11234 + plt_offset);
11235
11236 if (globals->use_blx
11237 && r_type == R_ARM_THM_CALL
11238 && ! using_thumb_only (globals))
11239 {
11240 /* If the Thumb BLX instruction is available, convert
11241 the BL to a BLX instruction to call the ARM-mode
11242 PLT entry. */
11243 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11244 branch_type = ST_BRANCH_TO_ARM;
11245 }
11246 else
11247 {
11248 if (! using_thumb_only (globals))
11249 /* Target the Thumb stub before the ARM PLT entry. */
11250 value -= PLT_THUMB_STUB_SIZE;
11251 branch_type = ST_BRANCH_TO_THUMB;
11252 }
11253 *unresolved_reloc_p = FALSE;
11254 }
11255
11256 relocation = value + signed_addend;
11257
11258 relocation -= (input_section->output_section->vma
11259 + input_section->output_offset
11260 + rel->r_offset);
11261
11262 check = relocation >> howto->rightshift;
11263
11264 /* If this is a signed value, the rightshift just dropped
11265 leading 1 bits (assuming twos complement). */
11266 if ((bfd_signed_vma) relocation >= 0)
11267 signed_check = check;
11268 else
11269 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11270
11271 /* Calculate the permissable maximum and minimum values for
11272 this relocation according to whether we're relocating for
11273 Thumb-2 or not. */
11274 bitsize = howto->bitsize;
11275 if (!thumb2_bl)
11276 bitsize -= 2;
11277 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11278 reloc_signed_min = ~reloc_signed_max;
11279
11280 /* Assumes two's complement. */
11281 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11282 overflow = TRUE;
11283
11284 if ((lower_insn & 0x5000) == 0x4000)
11285 /* For a BLX instruction, make sure that the relocation is rounded up
11286 to a word boundary. This follows the semantics of the instruction
11287 which specifies that bit 1 of the target address will come from bit
11288 1 of the base address. */
11289 relocation = (relocation + 2) & ~ 3;
11290
11291 /* Put RELOCATION back into the insn. Assumes two's complement.
11292 We use the Thumb-2 encoding, which is safe even if dealing with
11293 a Thumb-1 instruction by virtue of our overflow check above. */
11294 reloc_sign = (signed_check < 0) ? 1 : 0;
11295 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11296 | ((relocation >> 12) & 0x3ff)
11297 | (reloc_sign << 10);
11298 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11299 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11300 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11301 | ((relocation >> 1) & 0x7ff);
11302
11303 /* Put the relocated value back in the object file: */
11304 bfd_put_16 (input_bfd, upper_insn, hit_data);
11305 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11306
11307 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11308 }
11309 break;
11310
11311 case R_ARM_THM_JUMP19:
11312 /* Thumb32 conditional branch instruction. */
11313 {
11314 bfd_vma relocation;
11315 bfd_boolean overflow = FALSE;
11316 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11317 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11318 bfd_signed_vma reloc_signed_max = 0xffffe;
11319 bfd_signed_vma reloc_signed_min = -0x100000;
11320 bfd_signed_vma signed_check;
11321 enum elf32_arm_stub_type stub_type = arm_stub_none;
11322 struct elf32_arm_stub_hash_entry *stub_entry;
11323 struct elf32_arm_link_hash_entry *hash;
11324
11325 /* Need to refetch the addend, reconstruct the top three bits,
11326 and squish the two 11 bit pieces together. */
11327 if (globals->use_rel)
11328 {
11329 bfd_vma S = (upper_insn & 0x0400) >> 10;
11330 bfd_vma upper = (upper_insn & 0x003f);
11331 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11332 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11333 bfd_vma lower = (lower_insn & 0x07ff);
11334
11335 upper |= J1 << 6;
11336 upper |= J2 << 7;
11337 upper |= (!S) << 8;
11338 upper -= 0x0100; /* Sign extend. */
11339
11340 addend = (upper << 12) | (lower << 1);
11341 signed_addend = addend;
11342 }
11343
11344 /* Handle calls via the PLT. */
11345 if (plt_offset != (bfd_vma) -1)
11346 {
11347 value = (splt->output_section->vma
11348 + splt->output_offset
11349 + plt_offset);
11350 /* Target the Thumb stub before the ARM PLT entry. */
11351 value -= PLT_THUMB_STUB_SIZE;
11352 *unresolved_reloc_p = FALSE;
11353 }
11354
11355 hash = (struct elf32_arm_link_hash_entry *)h;
11356
11357 stub_type = arm_type_of_stub (info, input_section, rel,
11358 st_type, &branch_type,
11359 hash, value, sym_sec,
11360 input_bfd, sym_name);
11361 if (stub_type != arm_stub_none)
11362 {
11363 stub_entry = elf32_arm_get_stub_entry (input_section,
11364 sym_sec, h,
11365 rel, globals,
11366 stub_type);
11367 if (stub_entry != NULL)
11368 {
11369 value = (stub_entry->stub_offset
11370 + stub_entry->stub_sec->output_offset
11371 + stub_entry->stub_sec->output_section->vma);
11372 }
11373 }
11374
11375 relocation = value + signed_addend;
11376 relocation -= (input_section->output_section->vma
11377 + input_section->output_offset
11378 + rel->r_offset);
11379 signed_check = (bfd_signed_vma) relocation;
11380
11381 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11382 overflow = TRUE;
11383
11384 /* Put RELOCATION back into the insn. */
11385 {
11386 bfd_vma S = (relocation & 0x00100000) >> 20;
11387 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11388 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11389 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11390 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11391
11392 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11393 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11394 }
11395
11396 /* Put the relocated value back in the object file: */
11397 bfd_put_16 (input_bfd, upper_insn, hit_data);
11398 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11399
11400 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11401 }
11402
11403 case R_ARM_THM_JUMP11:
11404 case R_ARM_THM_JUMP8:
11405 case R_ARM_THM_JUMP6:
11406 /* Thumb B (branch) instruction). */
11407 {
11408 bfd_signed_vma relocation;
11409 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11410 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11411 bfd_signed_vma signed_check;
11412
11413 /* CZB cannot jump backward. */
11414 if (r_type == R_ARM_THM_JUMP6)
11415 reloc_signed_min = 0;
11416
11417 if (globals->use_rel)
11418 {
11419 /* Need to refetch addend. */
11420 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11421 if (addend & ((howto->src_mask + 1) >> 1))
11422 {
11423 signed_addend = -1;
11424 signed_addend &= ~ howto->src_mask;
11425 signed_addend |= addend;
11426 }
11427 else
11428 signed_addend = addend;
11429 /* The value in the insn has been right shifted. We need to
11430 undo this, so that we can perform the address calculation
11431 in terms of bytes. */
11432 signed_addend <<= howto->rightshift;
11433 }
11434 relocation = value + signed_addend;
11435
11436 relocation -= (input_section->output_section->vma
11437 + input_section->output_offset
11438 + rel->r_offset);
11439
11440 relocation >>= howto->rightshift;
11441 signed_check = relocation;
11442
11443 if (r_type == R_ARM_THM_JUMP6)
11444 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11445 else
11446 relocation &= howto->dst_mask;
11447 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11448
11449 bfd_put_16 (input_bfd, relocation, hit_data);
11450
11451 /* Assumes two's complement. */
11452 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11453 return bfd_reloc_overflow;
11454
11455 return bfd_reloc_ok;
11456 }
11457
11458 case R_ARM_ALU_PCREL7_0:
11459 case R_ARM_ALU_PCREL15_8:
11460 case R_ARM_ALU_PCREL23_15:
11461 {
11462 bfd_vma insn;
11463 bfd_vma relocation;
11464
11465 insn = bfd_get_32 (input_bfd, hit_data);
11466 if (globals->use_rel)
11467 {
11468 /* Extract the addend. */
11469 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11470 signed_addend = addend;
11471 }
11472 relocation = value + signed_addend;
11473
11474 relocation -= (input_section->output_section->vma
11475 + input_section->output_offset
11476 + rel->r_offset);
11477 insn = (insn & ~0xfff)
11478 | ((howto->bitpos << 7) & 0xf00)
11479 | ((relocation >> howto->bitpos) & 0xff);
11480 bfd_put_32 (input_bfd, value, hit_data);
11481 }
11482 return bfd_reloc_ok;
11483
11484 case R_ARM_GNU_VTINHERIT:
11485 case R_ARM_GNU_VTENTRY:
11486 return bfd_reloc_ok;
11487
11488 case R_ARM_GOTOFF32:
11489 /* Relocation is relative to the start of the
11490 global offset table. */
11491
11492 BFD_ASSERT (sgot != NULL);
11493 if (sgot == NULL)
11494 return bfd_reloc_notsupported;
11495
11496 /* If we are addressing a Thumb function, we need to adjust the
11497 address by one, so that attempts to call the function pointer will
11498 correctly interpret it as Thumb code. */
11499 if (branch_type == ST_BRANCH_TO_THUMB)
11500 value += 1;
11501
11502 /* Note that sgot->output_offset is not involved in this
11503 calculation. We always want the start of .got. If we
11504 define _GLOBAL_OFFSET_TABLE in a different way, as is
11505 permitted by the ABI, we might have to change this
11506 calculation. */
11507 value -= sgot->output_section->vma;
11508 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11509 contents, rel->r_offset, value,
11510 rel->r_addend);
11511
11512 case R_ARM_GOTPC:
11513 /* Use global offset table as symbol value. */
11514 BFD_ASSERT (sgot != NULL);
11515
11516 if (sgot == NULL)
11517 return bfd_reloc_notsupported;
11518
11519 *unresolved_reloc_p = FALSE;
11520 value = sgot->output_section->vma;
11521 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11522 contents, rel->r_offset, value,
11523 rel->r_addend);
11524
11525 case R_ARM_GOT32:
11526 case R_ARM_GOT_PREL:
11527 /* Relocation is to the entry for this symbol in the
11528 global offset table. */
11529 if (sgot == NULL)
11530 return bfd_reloc_notsupported;
11531
11532 if (dynreloc_st_type == STT_GNU_IFUNC
11533 && plt_offset != (bfd_vma) -1
11534 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11535 {
11536 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11537 symbol, and the relocation resolves directly to the runtime
11538 target rather than to the .iplt entry. This means that any
11539 .got entry would be the same value as the .igot.plt entry,
11540 so there's no point creating both. */
11541 sgot = globals->root.igotplt;
11542 value = sgot->output_offset + gotplt_offset;
11543 }
11544 else if (h != NULL)
11545 {
11546 bfd_vma off;
11547
11548 off = h->got.offset;
11549 BFD_ASSERT (off != (bfd_vma) -1);
11550 if ((off & 1) != 0)
11551 {
11552 /* We have already processsed one GOT relocation against
11553 this symbol. */
11554 off &= ~1;
11555 if (globals->root.dynamic_sections_created
11556 && !SYMBOL_REFERENCES_LOCAL (info, h))
11557 *unresolved_reloc_p = FALSE;
11558 }
11559 else
11560 {
11561 Elf_Internal_Rela outrel;
11562 int isrofixup = 0;
11563
11564 if (((h->dynindx != -1) || globals->fdpic_p)
11565 && !SYMBOL_REFERENCES_LOCAL (info, h))
11566 {
11567 /* If the symbol doesn't resolve locally in a static
11568 object, we have an undefined reference. If the
11569 symbol doesn't resolve locally in a dynamic object,
11570 it should be resolved by the dynamic linker. */
11571 if (globals->root.dynamic_sections_created)
11572 {
11573 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11574 *unresolved_reloc_p = FALSE;
11575 }
11576 else
11577 outrel.r_info = 0;
11578 outrel.r_addend = 0;
11579 }
11580 else
11581 {
11582 if (dynreloc_st_type == STT_GNU_IFUNC)
11583 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11584 else if (bfd_link_pic (info)
11585 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11586 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11587 else
11588 {
11589 outrel.r_info = 0;
11590 if (globals->fdpic_p)
11591 isrofixup = 1;
11592 }
11593 outrel.r_addend = dynreloc_value;
11594 }
11595
11596 /* The GOT entry is initialized to zero by default.
11597 See if we should install a different value. */
11598 if (outrel.r_addend != 0
11599 && (globals->use_rel || outrel.r_info == 0))
11600 {
11601 bfd_put_32 (output_bfd, outrel.r_addend,
11602 sgot->contents + off);
11603 outrel.r_addend = 0;
11604 }
11605
11606 if (isrofixup)
11607 arm_elf_add_rofixup (output_bfd,
11608 elf32_arm_hash_table(info)->srofixup,
11609 sgot->output_section->vma
11610 + sgot->output_offset + off);
11611
11612 else if (outrel.r_info != 0)
11613 {
11614 outrel.r_offset = (sgot->output_section->vma
11615 + sgot->output_offset
11616 + off);
11617 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11618 }
11619
11620 h->got.offset |= 1;
11621 }
11622 value = sgot->output_offset + off;
11623 }
11624 else
11625 {
11626 bfd_vma off;
11627
11628 BFD_ASSERT (local_got_offsets != NULL
11629 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11630
11631 off = local_got_offsets[r_symndx];
11632
11633 /* The offset must always be a multiple of 4. We use the
11634 least significant bit to record whether we have already
11635 generated the necessary reloc. */
11636 if ((off & 1) != 0)
11637 off &= ~1;
11638 else
11639 {
11640 Elf_Internal_Rela outrel;
11641 int isrofixup = 0;
11642
11643 if (dynreloc_st_type == STT_GNU_IFUNC)
11644 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11645 else if (bfd_link_pic (info))
11646 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11647 else
11648 {
11649 outrel.r_info = 0;
11650 if (globals->fdpic_p)
11651 isrofixup = 1;
11652 }
11653
11654 /* The GOT entry is initialized to zero by default.
11655 See if we should install a different value. */
11656 if (globals->use_rel || outrel.r_info == 0)
11657 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11658
11659 if (isrofixup)
11660 arm_elf_add_rofixup (output_bfd,
11661 globals->srofixup,
11662 sgot->output_section->vma
11663 + sgot->output_offset + off);
11664
11665 else if (outrel.r_info != 0)
11666 {
11667 outrel.r_addend = addend + dynreloc_value;
11668 outrel.r_offset = (sgot->output_section->vma
11669 + sgot->output_offset
11670 + off);
11671 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11672 }
11673
11674 local_got_offsets[r_symndx] |= 1;
11675 }
11676
11677 value = sgot->output_offset + off;
11678 }
11679 if (r_type != R_ARM_GOT32)
11680 value += sgot->output_section->vma;
11681
11682 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11683 contents, rel->r_offset, value,
11684 rel->r_addend);
11685
11686 case R_ARM_TLS_LDO32:
11687 value = value - dtpoff_base (info);
11688
11689 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11690 contents, rel->r_offset, value,
11691 rel->r_addend);
11692
11693 case R_ARM_TLS_LDM32:
11694 case R_ARM_TLS_LDM32_FDPIC:
11695 {
11696 bfd_vma off;
11697
11698 if (sgot == NULL)
11699 abort ();
11700
11701 off = globals->tls_ldm_got.offset;
11702
11703 if ((off & 1) != 0)
11704 off &= ~1;
11705 else
11706 {
11707 /* If we don't know the module number, create a relocation
11708 for it. */
11709 if (bfd_link_dll (info))
11710 {
11711 Elf_Internal_Rela outrel;
11712
11713 if (srelgot == NULL)
11714 abort ();
11715
11716 outrel.r_addend = 0;
11717 outrel.r_offset = (sgot->output_section->vma
11718 + sgot->output_offset + off);
11719 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11720
11721 if (globals->use_rel)
11722 bfd_put_32 (output_bfd, outrel.r_addend,
11723 sgot->contents + off);
11724
11725 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11726 }
11727 else
11728 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11729
11730 globals->tls_ldm_got.offset |= 1;
11731 }
11732
11733 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11734 {
11735 bfd_put_32(output_bfd,
11736 globals->root.sgot->output_offset + off,
11737 contents + rel->r_offset);
11738
11739 return bfd_reloc_ok;
11740 }
11741 else
11742 {
11743 value = sgot->output_section->vma + sgot->output_offset + off
11744 - (input_section->output_section->vma
11745 + input_section->output_offset + rel->r_offset);
11746
11747 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11748 contents, rel->r_offset, value,
11749 rel->r_addend);
11750 }
11751 }
11752
11753 case R_ARM_TLS_CALL:
11754 case R_ARM_THM_TLS_CALL:
11755 case R_ARM_TLS_GD32:
11756 case R_ARM_TLS_GD32_FDPIC:
11757 case R_ARM_TLS_IE32:
11758 case R_ARM_TLS_IE32_FDPIC:
11759 case R_ARM_TLS_GOTDESC:
11760 case R_ARM_TLS_DESCSEQ:
11761 case R_ARM_THM_TLS_DESCSEQ:
11762 {
11763 bfd_vma off, offplt;
11764 int indx = 0;
11765 char tls_type;
11766
11767 BFD_ASSERT (sgot != NULL);
11768
11769 if (h != NULL)
11770 {
11771 bfd_boolean dyn;
11772 dyn = globals->root.dynamic_sections_created;
11773 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11774 bfd_link_pic (info),
11775 h)
11776 && (!bfd_link_pic (info)
11777 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11778 {
11779 *unresolved_reloc_p = FALSE;
11780 indx = h->dynindx;
11781 }
11782 off = h->got.offset;
11783 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11784 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11785 }
11786 else
11787 {
11788 BFD_ASSERT (local_got_offsets != NULL);
11789 off = local_got_offsets[r_symndx];
11790 offplt = local_tlsdesc_gotents[r_symndx];
11791 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11792 }
11793
11794 /* Linker relaxations happens from one of the
11795 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11796 if (ELF32_R_TYPE(rel->r_info) != r_type)
11797 tls_type = GOT_TLS_IE;
11798
11799 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11800
11801 if ((off & 1) != 0)
11802 off &= ~1;
11803 else
11804 {
11805 bfd_boolean need_relocs = FALSE;
11806 Elf_Internal_Rela outrel;
11807 int cur_off = off;
11808
11809 /* The GOT entries have not been initialized yet. Do it
11810 now, and emit any relocations. If both an IE GOT and a
11811 GD GOT are necessary, we emit the GD first. */
11812
11813 if ((bfd_link_dll (info) || indx != 0)
11814 && (h == NULL
11815 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11816 && !resolved_to_zero)
11817 || h->root.type != bfd_link_hash_undefweak))
11818 {
11819 need_relocs = TRUE;
11820 BFD_ASSERT (srelgot != NULL);
11821 }
11822
11823 if (tls_type & GOT_TLS_GDESC)
11824 {
11825 bfd_byte *loc;
11826
11827 /* We should have relaxed, unless this is an undefined
11828 weak symbol. */
11829 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11830 || bfd_link_dll (info));
11831 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11832 <= globals->root.sgotplt->size);
11833
11834 outrel.r_addend = 0;
11835 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11836 + globals->root.sgotplt->output_offset
11837 + offplt
11838 + globals->sgotplt_jump_table_size);
11839
11840 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11841 sreloc = globals->root.srelplt;
11842 loc = sreloc->contents;
11843 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11844 BFD_ASSERT (loc + RELOC_SIZE (globals)
11845 <= sreloc->contents + sreloc->size);
11846
11847 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11848
11849 /* For globals, the first word in the relocation gets
11850 the relocation index and the top bit set, or zero,
11851 if we're binding now. For locals, it gets the
11852 symbol's offset in the tls section. */
11853 bfd_put_32 (output_bfd,
11854 !h ? value - elf_hash_table (info)->tls_sec->vma
11855 : info->flags & DF_BIND_NOW ? 0
11856 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11857 globals->root.sgotplt->contents + offplt
11858 + globals->sgotplt_jump_table_size);
11859
11860 /* Second word in the relocation is always zero. */
11861 bfd_put_32 (output_bfd, 0,
11862 globals->root.sgotplt->contents + offplt
11863 + globals->sgotplt_jump_table_size + 4);
11864 }
11865 if (tls_type & GOT_TLS_GD)
11866 {
11867 if (need_relocs)
11868 {
11869 outrel.r_addend = 0;
11870 outrel.r_offset = (sgot->output_section->vma
11871 + sgot->output_offset
11872 + cur_off);
11873 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11874
11875 if (globals->use_rel)
11876 bfd_put_32 (output_bfd, outrel.r_addend,
11877 sgot->contents + cur_off);
11878
11879 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11880
11881 if (indx == 0)
11882 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11883 sgot->contents + cur_off + 4);
11884 else
11885 {
11886 outrel.r_addend = 0;
11887 outrel.r_info = ELF32_R_INFO (indx,
11888 R_ARM_TLS_DTPOFF32);
11889 outrel.r_offset += 4;
11890
11891 if (globals->use_rel)
11892 bfd_put_32 (output_bfd, outrel.r_addend,
11893 sgot->contents + cur_off + 4);
11894
11895 elf32_arm_add_dynreloc (output_bfd, info,
11896 srelgot, &outrel);
11897 }
11898 }
11899 else
11900 {
11901 /* If we are not emitting relocations for a
11902 general dynamic reference, then we must be in a
11903 static link or an executable link with the
11904 symbol binding locally. Mark it as belonging
11905 to module 1, the executable. */
11906 bfd_put_32 (output_bfd, 1,
11907 sgot->contents + cur_off);
11908 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11909 sgot->contents + cur_off + 4);
11910 }
11911
11912 cur_off += 8;
11913 }
11914
11915 if (tls_type & GOT_TLS_IE)
11916 {
11917 if (need_relocs)
11918 {
11919 if (indx == 0)
11920 outrel.r_addend = value - dtpoff_base (info);
11921 else
11922 outrel.r_addend = 0;
11923 outrel.r_offset = (sgot->output_section->vma
11924 + sgot->output_offset
11925 + cur_off);
11926 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11927
11928 if (globals->use_rel)
11929 bfd_put_32 (output_bfd, outrel.r_addend,
11930 sgot->contents + cur_off);
11931
11932 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11933 }
11934 else
11935 bfd_put_32 (output_bfd, tpoff (info, value),
11936 sgot->contents + cur_off);
11937 cur_off += 4;
11938 }
11939
11940 if (h != NULL)
11941 h->got.offset |= 1;
11942 else
11943 local_got_offsets[r_symndx] |= 1;
11944 }
11945
11946 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11947 off += 8;
11948 else if (tls_type & GOT_TLS_GDESC)
11949 off = offplt;
11950
11951 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11952 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11953 {
11954 bfd_signed_vma offset;
11955 /* TLS stubs are arm mode. The original symbol is a
11956 data object, so branch_type is bogus. */
11957 branch_type = ST_BRANCH_TO_ARM;
11958 enum elf32_arm_stub_type stub_type
11959 = arm_type_of_stub (info, input_section, rel,
11960 st_type, &branch_type,
11961 (struct elf32_arm_link_hash_entry *)h,
11962 globals->tls_trampoline, globals->root.splt,
11963 input_bfd, sym_name);
11964
11965 if (stub_type != arm_stub_none)
11966 {
11967 struct elf32_arm_stub_hash_entry *stub_entry
11968 = elf32_arm_get_stub_entry
11969 (input_section, globals->root.splt, 0, rel,
11970 globals, stub_type);
11971 offset = (stub_entry->stub_offset
11972 + stub_entry->stub_sec->output_offset
11973 + stub_entry->stub_sec->output_section->vma);
11974 }
11975 else
11976 offset = (globals->root.splt->output_section->vma
11977 + globals->root.splt->output_offset
11978 + globals->tls_trampoline);
11979
11980 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11981 {
11982 unsigned long inst;
11983
11984 offset -= (input_section->output_section->vma
11985 + input_section->output_offset
11986 + rel->r_offset + 8);
11987
11988 inst = offset >> 2;
11989 inst &= 0x00ffffff;
11990 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11991 }
11992 else
11993 {
11994 /* Thumb blx encodes the offset in a complicated
11995 fashion. */
11996 unsigned upper_insn, lower_insn;
11997 unsigned neg;
11998
11999 offset -= (input_section->output_section->vma
12000 + input_section->output_offset
12001 + rel->r_offset + 4);
12002
12003 if (stub_type != arm_stub_none
12004 && arm_stub_is_thumb (stub_type))
12005 {
12006 lower_insn = 0xd000;
12007 }
12008 else
12009 {
12010 lower_insn = 0xc000;
12011 /* Round up the offset to a word boundary. */
12012 offset = (offset + 2) & ~2;
12013 }
12014
12015 neg = offset < 0;
12016 upper_insn = (0xf000
12017 | ((offset >> 12) & 0x3ff)
12018 | (neg << 10));
12019 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
12020 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12021 | ((offset >> 1) & 0x7ff);
12022 bfd_put_16 (input_bfd, upper_insn, hit_data);
12023 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12024 return bfd_reloc_ok;
12025 }
12026 }
12027 /* These relocations needs special care, as besides the fact
12028 they point somewhere in .gotplt, the addend must be
12029 adjusted accordingly depending on the type of instruction
12030 we refer to. */
12031 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
12032 {
12033 unsigned long data, insn;
12034 unsigned thumb;
12035
12036 data = bfd_get_signed_32 (input_bfd, hit_data);
12037 thumb = data & 1;
12038 data &= ~1ul;
12039
12040 if (thumb)
12041 {
12042 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
12043 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
12044 insn = (insn << 16)
12045 | bfd_get_16 (input_bfd,
12046 contents + rel->r_offset - data + 2);
12047 if ((insn & 0xf800c000) == 0xf000c000)
12048 /* bl/blx */
12049 value = -6;
12050 else if ((insn & 0xffffff00) == 0x4400)
12051 /* add */
12052 value = -5;
12053 else
12054 {
12055 _bfd_error_handler
12056 /* xgettext:c-format */
12057 (_("%pB(%pA+%#" PRIx64 "): "
12058 "unexpected %s instruction '%#lx' "
12059 "referenced by TLS_GOTDESC"),
12060 input_bfd, input_section, (uint64_t) rel->r_offset,
12061 "Thumb", insn);
12062 return bfd_reloc_notsupported;
12063 }
12064 }
12065 else
12066 {
12067 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
12068
12069 switch (insn >> 24)
12070 {
12071 case 0xeb: /* bl */
12072 case 0xfa: /* blx */
12073 value = -4;
12074 break;
12075
12076 case 0xe0: /* add */
12077 value = -8;
12078 break;
12079
12080 default:
12081 _bfd_error_handler
12082 /* xgettext:c-format */
12083 (_("%pB(%pA+%#" PRIx64 "): "
12084 "unexpected %s instruction '%#lx' "
12085 "referenced by TLS_GOTDESC"),
12086 input_bfd, input_section, (uint64_t) rel->r_offset,
12087 "ARM", insn);
12088 return bfd_reloc_notsupported;
12089 }
12090 }
12091
12092 value += ((globals->root.sgotplt->output_section->vma
12093 + globals->root.sgotplt->output_offset + off)
12094 - (input_section->output_section->vma
12095 + input_section->output_offset
12096 + rel->r_offset)
12097 + globals->sgotplt_jump_table_size);
12098 }
12099 else
12100 value = ((globals->root.sgot->output_section->vma
12101 + globals->root.sgot->output_offset + off)
12102 - (input_section->output_section->vma
12103 + input_section->output_offset + rel->r_offset));
12104
12105 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12106 r_type == R_ARM_TLS_IE32_FDPIC))
12107 {
12108 /* For FDPIC relocations, resolve to the offset of the GOT
12109 entry from the start of GOT. */
12110 bfd_put_32(output_bfd,
12111 globals->root.sgot->output_offset + off,
12112 contents + rel->r_offset);
12113
12114 return bfd_reloc_ok;
12115 }
12116 else
12117 {
12118 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12119 contents, rel->r_offset, value,
12120 rel->r_addend);
12121 }
12122 }
12123
12124 case R_ARM_TLS_LE32:
12125 if (bfd_link_dll (info))
12126 {
12127 _bfd_error_handler
12128 /* xgettext:c-format */
12129 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12130 "in shared object"),
12131 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12132 return bfd_reloc_notsupported;
12133 }
12134 else
12135 value = tpoff (info, value);
12136
12137 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12138 contents, rel->r_offset, value,
12139 rel->r_addend);
12140
12141 case R_ARM_V4BX:
12142 if (globals->fix_v4bx)
12143 {
12144 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12145
12146 /* Ensure that we have a BX instruction. */
12147 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12148
12149 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12150 {
12151 /* Branch to veneer. */
12152 bfd_vma glue_addr;
12153 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12154 glue_addr -= input_section->output_section->vma
12155 + input_section->output_offset
12156 + rel->r_offset + 8;
12157 insn = (insn & 0xf0000000) | 0x0a000000
12158 | ((glue_addr >> 2) & 0x00ffffff);
12159 }
12160 else
12161 {
12162 /* Preserve Rm (lowest four bits) and the condition code
12163 (highest four bits). Other bits encode MOV PC,Rm. */
12164 insn = (insn & 0xf000000f) | 0x01a0f000;
12165 }
12166
12167 bfd_put_32 (input_bfd, insn, hit_data);
12168 }
12169 return bfd_reloc_ok;
12170
12171 case R_ARM_MOVW_ABS_NC:
12172 case R_ARM_MOVT_ABS:
12173 case R_ARM_MOVW_PREL_NC:
12174 case R_ARM_MOVT_PREL:
12175 /* Until we properly support segment-base-relative addressing then
12176 we assume the segment base to be zero, as for the group relocations.
12177 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12178 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12179 case R_ARM_MOVW_BREL_NC:
12180 case R_ARM_MOVW_BREL:
12181 case R_ARM_MOVT_BREL:
12182 {
12183 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12184
12185 if (globals->use_rel)
12186 {
12187 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12188 signed_addend = (addend ^ 0x8000) - 0x8000;
12189 }
12190
12191 value += signed_addend;
12192
12193 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12194 value -= (input_section->output_section->vma
12195 + input_section->output_offset + rel->r_offset);
12196
12197 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12198 return bfd_reloc_overflow;
12199
12200 if (branch_type == ST_BRANCH_TO_THUMB)
12201 value |= 1;
12202
12203 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12204 || r_type == R_ARM_MOVT_BREL)
12205 value >>= 16;
12206
12207 insn &= 0xfff0f000;
12208 insn |= value & 0xfff;
12209 insn |= (value & 0xf000) << 4;
12210 bfd_put_32 (input_bfd, insn, hit_data);
12211 }
12212 return bfd_reloc_ok;
12213
12214 case R_ARM_THM_MOVW_ABS_NC:
12215 case R_ARM_THM_MOVT_ABS:
12216 case R_ARM_THM_MOVW_PREL_NC:
12217 case R_ARM_THM_MOVT_PREL:
12218 /* Until we properly support segment-base-relative addressing then
12219 we assume the segment base to be zero, as for the above relocations.
12220 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12221 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12222 as R_ARM_THM_MOVT_ABS. */
12223 case R_ARM_THM_MOVW_BREL_NC:
12224 case R_ARM_THM_MOVW_BREL:
12225 case R_ARM_THM_MOVT_BREL:
12226 {
12227 bfd_vma insn;
12228
12229 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12230 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12231
12232 if (globals->use_rel)
12233 {
12234 addend = ((insn >> 4) & 0xf000)
12235 | ((insn >> 15) & 0x0800)
12236 | ((insn >> 4) & 0x0700)
12237 | (insn & 0x00ff);
12238 signed_addend = (addend ^ 0x8000) - 0x8000;
12239 }
12240
12241 value += signed_addend;
12242
12243 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12244 value -= (input_section->output_section->vma
12245 + input_section->output_offset + rel->r_offset);
12246
12247 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12248 return bfd_reloc_overflow;
12249
12250 if (branch_type == ST_BRANCH_TO_THUMB)
12251 value |= 1;
12252
12253 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12254 || r_type == R_ARM_THM_MOVT_BREL)
12255 value >>= 16;
12256
12257 insn &= 0xfbf08f00;
12258 insn |= (value & 0xf000) << 4;
12259 insn |= (value & 0x0800) << 15;
12260 insn |= (value & 0x0700) << 4;
12261 insn |= (value & 0x00ff);
12262
12263 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12264 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12265 }
12266 return bfd_reloc_ok;
12267
12268 case R_ARM_ALU_PC_G0_NC:
12269 case R_ARM_ALU_PC_G1_NC:
12270 case R_ARM_ALU_PC_G0:
12271 case R_ARM_ALU_PC_G1:
12272 case R_ARM_ALU_PC_G2:
12273 case R_ARM_ALU_SB_G0_NC:
12274 case R_ARM_ALU_SB_G1_NC:
12275 case R_ARM_ALU_SB_G0:
12276 case R_ARM_ALU_SB_G1:
12277 case R_ARM_ALU_SB_G2:
12278 {
12279 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12280 bfd_vma pc = input_section->output_section->vma
12281 + input_section->output_offset + rel->r_offset;
12282 /* sb is the origin of the *segment* containing the symbol. */
12283 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12284 bfd_vma residual;
12285 bfd_vma g_n;
12286 bfd_signed_vma signed_value;
12287 int group = 0;
12288
12289 /* Determine which group of bits to select. */
12290 switch (r_type)
12291 {
12292 case R_ARM_ALU_PC_G0_NC:
12293 case R_ARM_ALU_PC_G0:
12294 case R_ARM_ALU_SB_G0_NC:
12295 case R_ARM_ALU_SB_G0:
12296 group = 0;
12297 break;
12298
12299 case R_ARM_ALU_PC_G1_NC:
12300 case R_ARM_ALU_PC_G1:
12301 case R_ARM_ALU_SB_G1_NC:
12302 case R_ARM_ALU_SB_G1:
12303 group = 1;
12304 break;
12305
12306 case R_ARM_ALU_PC_G2:
12307 case R_ARM_ALU_SB_G2:
12308 group = 2;
12309 break;
12310
12311 default:
12312 abort ();
12313 }
12314
12315 /* If REL, extract the addend from the insn. If RELA, it will
12316 have already been fetched for us. */
12317 if (globals->use_rel)
12318 {
12319 int negative;
12320 bfd_vma constant = insn & 0xff;
12321 bfd_vma rotation = (insn & 0xf00) >> 8;
12322
12323 if (rotation == 0)
12324 signed_addend = constant;
12325 else
12326 {
12327 /* Compensate for the fact that in the instruction, the
12328 rotation is stored in multiples of 2 bits. */
12329 rotation *= 2;
12330
12331 /* Rotate "constant" right by "rotation" bits. */
12332 signed_addend = (constant >> rotation) |
12333 (constant << (8 * sizeof (bfd_vma) - rotation));
12334 }
12335
12336 /* Determine if the instruction is an ADD or a SUB.
12337 (For REL, this determines the sign of the addend.) */
12338 negative = identify_add_or_sub (insn);
12339 if (negative == 0)
12340 {
12341 _bfd_error_handler
12342 /* xgettext:c-format */
12343 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12344 "are allowed for ALU group relocations"),
12345 input_bfd, input_section, (uint64_t) rel->r_offset);
12346 return bfd_reloc_overflow;
12347 }
12348
12349 signed_addend *= negative;
12350 }
12351
12352 /* Compute the value (X) to go in the place. */
12353 if (r_type == R_ARM_ALU_PC_G0_NC
12354 || r_type == R_ARM_ALU_PC_G1_NC
12355 || r_type == R_ARM_ALU_PC_G0
12356 || r_type == R_ARM_ALU_PC_G1
12357 || r_type == R_ARM_ALU_PC_G2)
12358 /* PC relative. */
12359 signed_value = value - pc + signed_addend;
12360 else
12361 /* Section base relative. */
12362 signed_value = value - sb + signed_addend;
12363
12364 /* If the target symbol is a Thumb function, then set the
12365 Thumb bit in the address. */
12366 if (branch_type == ST_BRANCH_TO_THUMB)
12367 signed_value |= 1;
12368
12369 /* Calculate the value of the relevant G_n, in encoded
12370 constant-with-rotation format. */
12371 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12372 group, &residual);
12373
12374 /* Check for overflow if required. */
12375 if ((r_type == R_ARM_ALU_PC_G0
12376 || r_type == R_ARM_ALU_PC_G1
12377 || r_type == R_ARM_ALU_PC_G2
12378 || r_type == R_ARM_ALU_SB_G0
12379 || r_type == R_ARM_ALU_SB_G1
12380 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12381 {
12382 _bfd_error_handler
12383 /* xgettext:c-format */
12384 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12385 "splitting %#" PRIx64 " for group relocation %s"),
12386 input_bfd, input_section, (uint64_t) rel->r_offset,
12387 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12388 howto->name);
12389 return bfd_reloc_overflow;
12390 }
12391
12392 /* Mask out the value and the ADD/SUB part of the opcode; take care
12393 not to destroy the S bit. */
12394 insn &= 0xff1ff000;
12395
12396 /* Set the opcode according to whether the value to go in the
12397 place is negative. */
12398 if (signed_value < 0)
12399 insn |= 1 << 22;
12400 else
12401 insn |= 1 << 23;
12402
12403 /* Encode the offset. */
12404 insn |= g_n;
12405
12406 bfd_put_32 (input_bfd, insn, hit_data);
12407 }
12408 return bfd_reloc_ok;
12409
12410 case R_ARM_LDR_PC_G0:
12411 case R_ARM_LDR_PC_G1:
12412 case R_ARM_LDR_PC_G2:
12413 case R_ARM_LDR_SB_G0:
12414 case R_ARM_LDR_SB_G1:
12415 case R_ARM_LDR_SB_G2:
12416 {
12417 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12418 bfd_vma pc = input_section->output_section->vma
12419 + input_section->output_offset + rel->r_offset;
12420 /* sb is the origin of the *segment* containing the symbol. */
12421 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12422 bfd_vma residual;
12423 bfd_signed_vma signed_value;
12424 int group = 0;
12425
12426 /* Determine which groups of bits to calculate. */
12427 switch (r_type)
12428 {
12429 case R_ARM_LDR_PC_G0:
12430 case R_ARM_LDR_SB_G0:
12431 group = 0;
12432 break;
12433
12434 case R_ARM_LDR_PC_G1:
12435 case R_ARM_LDR_SB_G1:
12436 group = 1;
12437 break;
12438
12439 case R_ARM_LDR_PC_G2:
12440 case R_ARM_LDR_SB_G2:
12441 group = 2;
12442 break;
12443
12444 default:
12445 abort ();
12446 }
12447
12448 /* If REL, extract the addend from the insn. If RELA, it will
12449 have already been fetched for us. */
12450 if (globals->use_rel)
12451 {
12452 int negative = (insn & (1 << 23)) ? 1 : -1;
12453 signed_addend = negative * (insn & 0xfff);
12454 }
12455
12456 /* Compute the value (X) to go in the place. */
12457 if (r_type == R_ARM_LDR_PC_G0
12458 || r_type == R_ARM_LDR_PC_G1
12459 || r_type == R_ARM_LDR_PC_G2)
12460 /* PC relative. */
12461 signed_value = value - pc + signed_addend;
12462 else
12463 /* Section base relative. */
12464 signed_value = value - sb + signed_addend;
12465
12466 /* Calculate the value of the relevant G_{n-1} to obtain
12467 the residual at that stage. */
12468 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12469 group - 1, &residual);
12470
12471 /* Check for overflow. */
12472 if (residual >= 0x1000)
12473 {
12474 _bfd_error_handler
12475 /* xgettext:c-format */
12476 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12477 "splitting %#" PRIx64 " for group relocation %s"),
12478 input_bfd, input_section, (uint64_t) rel->r_offset,
12479 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12480 howto->name);
12481 return bfd_reloc_overflow;
12482 }
12483
12484 /* Mask out the value and U bit. */
12485 insn &= 0xff7ff000;
12486
12487 /* Set the U bit if the value to go in the place is non-negative. */
12488 if (signed_value >= 0)
12489 insn |= 1 << 23;
12490
12491 /* Encode the offset. */
12492 insn |= residual;
12493
12494 bfd_put_32 (input_bfd, insn, hit_data);
12495 }
12496 return bfd_reloc_ok;
12497
12498 case R_ARM_LDRS_PC_G0:
12499 case R_ARM_LDRS_PC_G1:
12500 case R_ARM_LDRS_PC_G2:
12501 case R_ARM_LDRS_SB_G0:
12502 case R_ARM_LDRS_SB_G1:
12503 case R_ARM_LDRS_SB_G2:
12504 {
12505 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12506 bfd_vma pc = input_section->output_section->vma
12507 + input_section->output_offset + rel->r_offset;
12508 /* sb is the origin of the *segment* containing the symbol. */
12509 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12510 bfd_vma residual;
12511 bfd_signed_vma signed_value;
12512 int group = 0;
12513
12514 /* Determine which groups of bits to calculate. */
12515 switch (r_type)
12516 {
12517 case R_ARM_LDRS_PC_G0:
12518 case R_ARM_LDRS_SB_G0:
12519 group = 0;
12520 break;
12521
12522 case R_ARM_LDRS_PC_G1:
12523 case R_ARM_LDRS_SB_G1:
12524 group = 1;
12525 break;
12526
12527 case R_ARM_LDRS_PC_G2:
12528 case R_ARM_LDRS_SB_G2:
12529 group = 2;
12530 break;
12531
12532 default:
12533 abort ();
12534 }
12535
12536 /* If REL, extract the addend from the insn. If RELA, it will
12537 have already been fetched for us. */
12538 if (globals->use_rel)
12539 {
12540 int negative = (insn & (1 << 23)) ? 1 : -1;
12541 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12542 }
12543
12544 /* Compute the value (X) to go in the place. */
12545 if (r_type == R_ARM_LDRS_PC_G0
12546 || r_type == R_ARM_LDRS_PC_G1
12547 || r_type == R_ARM_LDRS_PC_G2)
12548 /* PC relative. */
12549 signed_value = value - pc + signed_addend;
12550 else
12551 /* Section base relative. */
12552 signed_value = value - sb + signed_addend;
12553
12554 /* Calculate the value of the relevant G_{n-1} to obtain
12555 the residual at that stage. */
12556 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12557 group - 1, &residual);
12558
12559 /* Check for overflow. */
12560 if (residual >= 0x100)
12561 {
12562 _bfd_error_handler
12563 /* xgettext:c-format */
12564 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12565 "splitting %#" PRIx64 " for group relocation %s"),
12566 input_bfd, input_section, (uint64_t) rel->r_offset,
12567 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12568 howto->name);
12569 return bfd_reloc_overflow;
12570 }
12571
12572 /* Mask out the value and U bit. */
12573 insn &= 0xff7ff0f0;
12574
12575 /* Set the U bit if the value to go in the place is non-negative. */
12576 if (signed_value >= 0)
12577 insn |= 1 << 23;
12578
12579 /* Encode the offset. */
12580 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12581
12582 bfd_put_32 (input_bfd, insn, hit_data);
12583 }
12584 return bfd_reloc_ok;
12585
12586 case R_ARM_LDC_PC_G0:
12587 case R_ARM_LDC_PC_G1:
12588 case R_ARM_LDC_PC_G2:
12589 case R_ARM_LDC_SB_G0:
12590 case R_ARM_LDC_SB_G1:
12591 case R_ARM_LDC_SB_G2:
12592 {
12593 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12594 bfd_vma pc = input_section->output_section->vma
12595 + input_section->output_offset + rel->r_offset;
12596 /* sb is the origin of the *segment* containing the symbol. */
12597 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12598 bfd_vma residual;
12599 bfd_signed_vma signed_value;
12600 int group = 0;
12601
12602 /* Determine which groups of bits to calculate. */
12603 switch (r_type)
12604 {
12605 case R_ARM_LDC_PC_G0:
12606 case R_ARM_LDC_SB_G0:
12607 group = 0;
12608 break;
12609
12610 case R_ARM_LDC_PC_G1:
12611 case R_ARM_LDC_SB_G1:
12612 group = 1;
12613 break;
12614
12615 case R_ARM_LDC_PC_G2:
12616 case R_ARM_LDC_SB_G2:
12617 group = 2;
12618 break;
12619
12620 default:
12621 abort ();
12622 }
12623
12624 /* If REL, extract the addend from the insn. If RELA, it will
12625 have already been fetched for us. */
12626 if (globals->use_rel)
12627 {
12628 int negative = (insn & (1 << 23)) ? 1 : -1;
12629 signed_addend = negative * ((insn & 0xff) << 2);
12630 }
12631
12632 /* Compute the value (X) to go in the place. */
12633 if (r_type == R_ARM_LDC_PC_G0
12634 || r_type == R_ARM_LDC_PC_G1
12635 || r_type == R_ARM_LDC_PC_G2)
12636 /* PC relative. */
12637 signed_value = value - pc + signed_addend;
12638 else
12639 /* Section base relative. */
12640 signed_value = value - sb + signed_addend;
12641
12642 /* Calculate the value of the relevant G_{n-1} to obtain
12643 the residual at that stage. */
12644 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12645 group - 1, &residual);
12646
12647 /* Check for overflow. (The absolute value to go in the place must be
12648 divisible by four and, after having been divided by four, must
12649 fit in eight bits.) */
12650 if ((residual & 0x3) != 0 || residual >= 0x400)
12651 {
12652 _bfd_error_handler
12653 /* xgettext:c-format */
12654 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12655 "splitting %#" PRIx64 " for group relocation %s"),
12656 input_bfd, input_section, (uint64_t) rel->r_offset,
12657 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12658 howto->name);
12659 return bfd_reloc_overflow;
12660 }
12661
12662 /* Mask out the value and U bit. */
12663 insn &= 0xff7fff00;
12664
12665 /* Set the U bit if the value to go in the place is non-negative. */
12666 if (signed_value >= 0)
12667 insn |= 1 << 23;
12668
12669 /* Encode the offset. */
12670 insn |= residual >> 2;
12671
12672 bfd_put_32 (input_bfd, insn, hit_data);
12673 }
12674 return bfd_reloc_ok;
12675
12676 case R_ARM_THM_ALU_ABS_G0_NC:
12677 case R_ARM_THM_ALU_ABS_G1_NC:
12678 case R_ARM_THM_ALU_ABS_G2_NC:
12679 case R_ARM_THM_ALU_ABS_G3_NC:
12680 {
12681 const int shift_array[4] = {0, 8, 16, 24};
12682 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12683 bfd_vma addr = value;
12684 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12685
12686 /* Compute address. */
12687 if (globals->use_rel)
12688 signed_addend = insn & 0xff;
12689 addr += signed_addend;
12690 if (branch_type == ST_BRANCH_TO_THUMB)
12691 addr |= 1;
12692 /* Clean imm8 insn. */
12693 insn &= 0xff00;
12694 /* And update with correct part of address. */
12695 insn |= (addr >> shift) & 0xff;
12696 /* Update insn. */
12697 bfd_put_16 (input_bfd, insn, hit_data);
12698 }
12699
12700 *unresolved_reloc_p = FALSE;
12701 return bfd_reloc_ok;
12702
12703 case R_ARM_GOTOFFFUNCDESC:
12704 {
12705 if (h == NULL)
12706 {
12707 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12708 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12709 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12710 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12711 bfd_vma seg = -1;
12712
12713 if (bfd_link_pic(info) && dynindx == 0)
12714 abort();
12715
12716 /* Resolve relocation. */
12717 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12718 , contents + rel->r_offset);
12719 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12720 not done yet. */
12721 arm_elf_fill_funcdesc(output_bfd, info,
12722 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12723 dynindx, offset, addr, dynreloc_value, seg);
12724 }
12725 else
12726 {
12727 int dynindx;
12728 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12729 bfd_vma addr;
12730 bfd_vma seg = -1;
12731
12732 /* For static binaries, sym_sec can be null. */
12733 if (sym_sec)
12734 {
12735 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12736 addr = dynreloc_value - sym_sec->output_section->vma;
12737 }
12738 else
12739 {
12740 dynindx = 0;
12741 addr = 0;
12742 }
12743
12744 if (bfd_link_pic(info) && dynindx == 0)
12745 abort();
12746
12747 /* This case cannot occur since funcdesc is allocated by
12748 the dynamic loader so we cannot resolve the relocation. */
12749 if (h->dynindx != -1)
12750 abort();
12751
12752 /* Resolve relocation. */
12753 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12754 contents + rel->r_offset);
12755 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12756 arm_elf_fill_funcdesc(output_bfd, info,
12757 &eh->fdpic_cnts.funcdesc_offset,
12758 dynindx, offset, addr, dynreloc_value, seg);
12759 }
12760 }
12761 *unresolved_reloc_p = FALSE;
12762 return bfd_reloc_ok;
12763
12764 case R_ARM_GOTFUNCDESC:
12765 {
12766 if (h != NULL)
12767 {
12768 Elf_Internal_Rela outrel;
12769
12770 /* Resolve relocation. */
12771 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12772 + sgot->output_offset),
12773 contents + rel->r_offset);
12774 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12775 if(h->dynindx == -1)
12776 {
12777 int dynindx;
12778 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12779 bfd_vma addr;
12780 bfd_vma seg = -1;
12781
12782 /* For static binaries sym_sec can be null. */
12783 if (sym_sec)
12784 {
12785 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12786 addr = dynreloc_value - sym_sec->output_section->vma;
12787 }
12788 else
12789 {
12790 dynindx = 0;
12791 addr = 0;
12792 }
12793
12794 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12795 arm_elf_fill_funcdesc(output_bfd, info,
12796 &eh->fdpic_cnts.funcdesc_offset,
12797 dynindx, offset, addr, dynreloc_value, seg);
12798 }
12799
12800 /* Add a dynamic relocation on GOT entry if not already done. */
12801 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12802 {
12803 if (h->dynindx == -1)
12804 {
12805 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12806 if (h->root.type == bfd_link_hash_undefweak)
12807 bfd_put_32(output_bfd, 0, sgot->contents
12808 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12809 else
12810 bfd_put_32(output_bfd, sgot->output_section->vma
12811 + sgot->output_offset
12812 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12813 sgot->contents
12814 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12815 }
12816 else
12817 {
12818 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12819 }
12820 outrel.r_offset = sgot->output_section->vma
12821 + sgot->output_offset
12822 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12823 outrel.r_addend = 0;
12824 if (h->dynindx == -1 && !bfd_link_pic(info))
12825 if (h->root.type == bfd_link_hash_undefweak)
12826 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12827 else
12828 arm_elf_add_rofixup(output_bfd, globals->srofixup,
12829 outrel.r_offset);
12830 else
12831 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12832 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12833 }
12834 }
12835 else
12836 {
12837 /* Such relocation on static function should not have been
12838 emitted by the compiler. */
12839 abort();
12840 }
12841 }
12842 *unresolved_reloc_p = FALSE;
12843 return bfd_reloc_ok;
12844
12845 case R_ARM_FUNCDESC:
12846 {
12847 if (h == NULL)
12848 {
12849 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12850 Elf_Internal_Rela outrel;
12851 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12852 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12853 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12854 bfd_vma seg = -1;
12855
12856 if (bfd_link_pic(info) && dynindx == 0)
12857 abort();
12858
12859 /* Replace static FUNCDESC relocation with a
12860 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12861 executable. */
12862 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12863 outrel.r_offset = input_section->output_section->vma
12864 + input_section->output_offset + rel->r_offset;
12865 outrel.r_addend = 0;
12866 if (bfd_link_pic(info))
12867 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12868 else
12869 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12870
12871 bfd_put_32 (input_bfd, sgot->output_section->vma
12872 + sgot->output_offset + offset, hit_data);
12873
12874 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12875 arm_elf_fill_funcdesc(output_bfd, info,
12876 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12877 dynindx, offset, addr, dynreloc_value, seg);
12878 }
12879 else
12880 {
12881 if (h->dynindx == -1)
12882 {
12883 int dynindx;
12884 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12885 bfd_vma addr;
12886 bfd_vma seg = -1;
12887 Elf_Internal_Rela outrel;
12888
12889 /* For static binaries sym_sec can be null. */
12890 if (sym_sec)
12891 {
12892 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12893 addr = dynreloc_value - sym_sec->output_section->vma;
12894 }
12895 else
12896 {
12897 dynindx = 0;
12898 addr = 0;
12899 }
12900
12901 if (bfd_link_pic(info) && dynindx == 0)
12902 abort();
12903
12904 /* Replace static FUNCDESC relocation with a
12905 R_ARM_RELATIVE dynamic relocation. */
12906 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12907 outrel.r_offset = input_section->output_section->vma
12908 + input_section->output_offset + rel->r_offset;
12909 outrel.r_addend = 0;
12910 if (bfd_link_pic(info))
12911 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12912 else
12913 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12914
12915 bfd_put_32 (input_bfd, sgot->output_section->vma
12916 + sgot->output_offset + offset, hit_data);
12917
12918 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12919 arm_elf_fill_funcdesc(output_bfd, info,
12920 &eh->fdpic_cnts.funcdesc_offset,
12921 dynindx, offset, addr, dynreloc_value, seg);
12922 }
12923 else
12924 {
12925 Elf_Internal_Rela outrel;
12926
12927 /* Add a dynamic relocation. */
12928 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12929 outrel.r_offset = input_section->output_section->vma
12930 + input_section->output_offset + rel->r_offset;
12931 outrel.r_addend = 0;
12932 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12933 }
12934 }
12935 }
12936 *unresolved_reloc_p = FALSE;
12937 return bfd_reloc_ok;
12938
12939 case R_ARM_THM_BF16:
12940 {
12941 bfd_vma relocation;
12942 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12943 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12944
12945 if (globals->use_rel)
12946 {
12947 bfd_vma immA = (upper_insn & 0x001f);
12948 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12949 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12950 addend = (immA << 12);
12951 addend |= (immB << 2);
12952 addend |= (immC << 1);
12953 addend |= 1;
12954 /* Sign extend. */
12955 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12956 }
12957
12958 relocation = value + signed_addend;
12959 relocation -= (input_section->output_section->vma
12960 + input_section->output_offset
12961 + rel->r_offset);
12962
12963 /* Put RELOCATION back into the insn. */
12964 {
12965 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12966 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12967 bfd_vma immC = (relocation & 0x00000002) >> 1;
12968
12969 upper_insn = (upper_insn & 0xffe0) | immA;
12970 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12971 }
12972
12973 /* Put the relocated value back in the object file: */
12974 bfd_put_16 (input_bfd, upper_insn, hit_data);
12975 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12976
12977 return bfd_reloc_ok;
12978 }
12979
12980 case R_ARM_THM_BF12:
12981 {
12982 bfd_vma relocation;
12983 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12984 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12985
12986 if (globals->use_rel)
12987 {
12988 bfd_vma immA = (upper_insn & 0x0001);
12989 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12990 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12991 addend = (immA << 12);
12992 addend |= (immB << 2);
12993 addend |= (immC << 1);
12994 addend |= 1;
12995 /* Sign extend. */
12996 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12997 signed_addend = addend;
12998 }
12999
13000 relocation = value + signed_addend;
13001 relocation -= (input_section->output_section->vma
13002 + input_section->output_offset
13003 + rel->r_offset);
13004
13005 /* Put RELOCATION back into the insn. */
13006 {
13007 bfd_vma immA = (relocation & 0x00001000) >> 12;
13008 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
13009 bfd_vma immC = (relocation & 0x00000002) >> 1;
13010
13011 upper_insn = (upper_insn & 0xfffe) | immA;
13012 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
13013 }
13014
13015 /* Put the relocated value back in the object file: */
13016 bfd_put_16 (input_bfd, upper_insn, hit_data);
13017 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13018
13019 return bfd_reloc_ok;
13020 }
13021
13022 case R_ARM_THM_BF18:
13023 {
13024 bfd_vma relocation;
13025 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
13026 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
13027
13028 if (globals->use_rel)
13029 {
13030 bfd_vma immA = (upper_insn & 0x007f);
13031 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
13032 bfd_vma immC = (lower_insn & 0x0800) >> 11;
13033 addend = (immA << 12);
13034 addend |= (immB << 2);
13035 addend |= (immC << 1);
13036 addend |= 1;
13037 /* Sign extend. */
13038 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
13039 signed_addend = addend;
13040 }
13041
13042 relocation = value + signed_addend;
13043 relocation -= (input_section->output_section->vma
13044 + input_section->output_offset
13045 + rel->r_offset);
13046
13047 /* Put RELOCATION back into the insn. */
13048 {
13049 bfd_vma immA = (relocation & 0x0007f000) >> 12;
13050 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
13051 bfd_vma immC = (relocation & 0x00000002) >> 1;
13052
13053 upper_insn = (upper_insn & 0xff80) | immA;
13054 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
13055 }
13056
13057 /* Put the relocated value back in the object file: */
13058 bfd_put_16 (input_bfd, upper_insn, hit_data);
13059 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13060
13061 return bfd_reloc_ok;
13062 }
13063
13064 default:
13065 return bfd_reloc_notsupported;
13066 }
13067 }
13068
13069 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13070 static void
13071 arm_add_to_rel (bfd * abfd,
13072 bfd_byte * address,
13073 reloc_howto_type * howto,
13074 bfd_signed_vma increment)
13075 {
13076 bfd_signed_vma addend;
13077
13078 if (howto->type == R_ARM_THM_CALL
13079 || howto->type == R_ARM_THM_JUMP24)
13080 {
13081 int upper_insn, lower_insn;
13082 int upper, lower;
13083
13084 upper_insn = bfd_get_16 (abfd, address);
13085 lower_insn = bfd_get_16 (abfd, address + 2);
13086 upper = upper_insn & 0x7ff;
13087 lower = lower_insn & 0x7ff;
13088
13089 addend = (upper << 12) | (lower << 1);
13090 addend += increment;
13091 addend >>= 1;
13092
13093 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13094 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13095
13096 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13097 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13098 }
13099 else
13100 {
13101 bfd_vma contents;
13102
13103 contents = bfd_get_32 (abfd, address);
13104
13105 /* Get the (signed) value from the instruction. */
13106 addend = contents & howto->src_mask;
13107 if (addend & ((howto->src_mask + 1) >> 1))
13108 {
13109 bfd_signed_vma mask;
13110
13111 mask = -1;
13112 mask &= ~ howto->src_mask;
13113 addend |= mask;
13114 }
13115
13116 /* Add in the increment, (which is a byte value). */
13117 switch (howto->type)
13118 {
13119 default:
13120 addend += increment;
13121 break;
13122
13123 case R_ARM_PC24:
13124 case R_ARM_PLT32:
13125 case R_ARM_CALL:
13126 case R_ARM_JUMP24:
13127 addend <<= howto->size;
13128 addend += increment;
13129
13130 /* Should we check for overflow here ? */
13131
13132 /* Drop any undesired bits. */
13133 addend >>= howto->rightshift;
13134 break;
13135 }
13136
13137 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13138
13139 bfd_put_32 (abfd, contents, address);
13140 }
13141 }
13142
13143 #define IS_ARM_TLS_RELOC(R_TYPE) \
13144 ((R_TYPE) == R_ARM_TLS_GD32 \
13145 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13146 || (R_TYPE) == R_ARM_TLS_LDO32 \
13147 || (R_TYPE) == R_ARM_TLS_LDM32 \
13148 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13149 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13150 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13151 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13152 || (R_TYPE) == R_ARM_TLS_LE32 \
13153 || (R_TYPE) == R_ARM_TLS_IE32 \
13154 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13155 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13156
13157 /* Specific set of relocations for the gnu tls dialect. */
13158 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13159 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13160 || (R_TYPE) == R_ARM_TLS_CALL \
13161 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13162 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13163 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13164
13165 /* Relocate an ARM ELF section. */
13166
13167 static bfd_boolean
13168 elf32_arm_relocate_section (bfd * output_bfd,
13169 struct bfd_link_info * info,
13170 bfd * input_bfd,
13171 asection * input_section,
13172 bfd_byte * contents,
13173 Elf_Internal_Rela * relocs,
13174 Elf_Internal_Sym * local_syms,
13175 asection ** local_sections)
13176 {
13177 Elf_Internal_Shdr *symtab_hdr;
13178 struct elf_link_hash_entry **sym_hashes;
13179 Elf_Internal_Rela *rel;
13180 Elf_Internal_Rela *relend;
13181 const char *name;
13182 struct elf32_arm_link_hash_table * globals;
13183
13184 globals = elf32_arm_hash_table (info);
13185 if (globals == NULL)
13186 return FALSE;
13187
13188 symtab_hdr = & elf_symtab_hdr (input_bfd);
13189 sym_hashes = elf_sym_hashes (input_bfd);
13190
13191 rel = relocs;
13192 relend = relocs + input_section->reloc_count;
13193 for (; rel < relend; rel++)
13194 {
13195 int r_type;
13196 reloc_howto_type * howto;
13197 unsigned long r_symndx;
13198 Elf_Internal_Sym * sym;
13199 asection * sec;
13200 struct elf_link_hash_entry * h;
13201 bfd_vma relocation;
13202 bfd_reloc_status_type r;
13203 arelent bfd_reloc;
13204 char sym_type;
13205 bfd_boolean unresolved_reloc = FALSE;
13206 char *error_message = NULL;
13207
13208 r_symndx = ELF32_R_SYM (rel->r_info);
13209 r_type = ELF32_R_TYPE (rel->r_info);
13210 r_type = arm_real_reloc_type (globals, r_type);
13211
13212 if ( r_type == R_ARM_GNU_VTENTRY
13213 || r_type == R_ARM_GNU_VTINHERIT)
13214 continue;
13215
13216 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13217
13218 if (howto == NULL)
13219 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13220
13221 h = NULL;
13222 sym = NULL;
13223 sec = NULL;
13224
13225 if (r_symndx < symtab_hdr->sh_info)
13226 {
13227 sym = local_syms + r_symndx;
13228 sym_type = ELF32_ST_TYPE (sym->st_info);
13229 sec = local_sections[r_symndx];
13230
13231 /* An object file might have a reference to a local
13232 undefined symbol. This is a daft object file, but we
13233 should at least do something about it. V4BX & NONE
13234 relocations do not use the symbol and are explicitly
13235 allowed to use the undefined symbol, so allow those.
13236 Likewise for relocations against STN_UNDEF. */
13237 if (r_type != R_ARM_V4BX
13238 && r_type != R_ARM_NONE
13239 && r_symndx != STN_UNDEF
13240 && bfd_is_und_section (sec)
13241 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13242 (*info->callbacks->undefined_symbol)
13243 (info, bfd_elf_string_from_elf_section
13244 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13245 input_bfd, input_section,
13246 rel->r_offset, TRUE);
13247
13248 if (globals->use_rel)
13249 {
13250 relocation = (sec->output_section->vma
13251 + sec->output_offset
13252 + sym->st_value);
13253 if (!bfd_link_relocatable (info)
13254 && (sec->flags & SEC_MERGE)
13255 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13256 {
13257 asection *msec;
13258 bfd_vma addend, value;
13259
13260 switch (r_type)
13261 {
13262 case R_ARM_MOVW_ABS_NC:
13263 case R_ARM_MOVT_ABS:
13264 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13265 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13266 addend = (addend ^ 0x8000) - 0x8000;
13267 break;
13268
13269 case R_ARM_THM_MOVW_ABS_NC:
13270 case R_ARM_THM_MOVT_ABS:
13271 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13272 << 16;
13273 value |= bfd_get_16 (input_bfd,
13274 contents + rel->r_offset + 2);
13275 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13276 | ((value & 0x04000000) >> 15);
13277 addend = (addend ^ 0x8000) - 0x8000;
13278 break;
13279
13280 default:
13281 if (howto->rightshift
13282 || (howto->src_mask & (howto->src_mask + 1)))
13283 {
13284 _bfd_error_handler
13285 /* xgettext:c-format */
13286 (_("%pB(%pA+%#" PRIx64 "): "
13287 "%s relocation against SEC_MERGE section"),
13288 input_bfd, input_section,
13289 (uint64_t) rel->r_offset, howto->name);
13290 return FALSE;
13291 }
13292
13293 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13294
13295 /* Get the (signed) value from the instruction. */
13296 addend = value & howto->src_mask;
13297 if (addend & ((howto->src_mask + 1) >> 1))
13298 {
13299 bfd_signed_vma mask;
13300
13301 mask = -1;
13302 mask &= ~ howto->src_mask;
13303 addend |= mask;
13304 }
13305 break;
13306 }
13307
13308 msec = sec;
13309 addend =
13310 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13311 - relocation;
13312 addend += msec->output_section->vma + msec->output_offset;
13313
13314 /* Cases here must match those in the preceding
13315 switch statement. */
13316 switch (r_type)
13317 {
13318 case R_ARM_MOVW_ABS_NC:
13319 case R_ARM_MOVT_ABS:
13320 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13321 | (addend & 0xfff);
13322 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13323 break;
13324
13325 case R_ARM_THM_MOVW_ABS_NC:
13326 case R_ARM_THM_MOVT_ABS:
13327 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13328 | (addend & 0xff) | ((addend & 0x0800) << 15);
13329 bfd_put_16 (input_bfd, value >> 16,
13330 contents + rel->r_offset);
13331 bfd_put_16 (input_bfd, value,
13332 contents + rel->r_offset + 2);
13333 break;
13334
13335 default:
13336 value = (value & ~ howto->dst_mask)
13337 | (addend & howto->dst_mask);
13338 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13339 break;
13340 }
13341 }
13342 }
13343 else
13344 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13345 }
13346 else
13347 {
13348 bfd_boolean warned, ignored;
13349
13350 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13351 r_symndx, symtab_hdr, sym_hashes,
13352 h, sec, relocation,
13353 unresolved_reloc, warned, ignored);
13354
13355 sym_type = h->type;
13356 }
13357
13358 if (sec != NULL && discarded_section (sec))
13359 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13360 rel, 1, relend, howto, 0, contents);
13361
13362 if (bfd_link_relocatable (info))
13363 {
13364 /* This is a relocatable link. We don't have to change
13365 anything, unless the reloc is against a section symbol,
13366 in which case we have to adjust according to where the
13367 section symbol winds up in the output section. */
13368 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13369 {
13370 if (globals->use_rel)
13371 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13372 howto, (bfd_signed_vma) sec->output_offset);
13373 else
13374 rel->r_addend += sec->output_offset;
13375 }
13376 continue;
13377 }
13378
13379 if (h != NULL)
13380 name = h->root.root.string;
13381 else
13382 {
13383 name = (bfd_elf_string_from_elf_section
13384 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13385 if (name == NULL || *name == '\0')
13386 name = bfd_section_name (sec);
13387 }
13388
13389 if (r_symndx != STN_UNDEF
13390 && r_type != R_ARM_NONE
13391 && (h == NULL
13392 || h->root.type == bfd_link_hash_defined
13393 || h->root.type == bfd_link_hash_defweak)
13394 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13395 {
13396 _bfd_error_handler
13397 ((sym_type == STT_TLS
13398 /* xgettext:c-format */
13399 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13400 /* xgettext:c-format */
13401 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13402 input_bfd,
13403 input_section,
13404 (uint64_t) rel->r_offset,
13405 howto->name,
13406 name);
13407 }
13408
13409 /* We call elf32_arm_final_link_relocate unless we're completely
13410 done, i.e., the relaxation produced the final output we want,
13411 and we won't let anybody mess with it. Also, we have to do
13412 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13413 both in relaxed and non-relaxed cases. */
13414 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13415 || (IS_ARM_TLS_GNU_RELOC (r_type)
13416 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13417 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13418 & GOT_TLS_GDESC)))
13419 {
13420 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13421 contents, rel, h == NULL);
13422 /* This may have been marked unresolved because it came from
13423 a shared library. But we've just dealt with that. */
13424 unresolved_reloc = 0;
13425 }
13426 else
13427 r = bfd_reloc_continue;
13428
13429 if (r == bfd_reloc_continue)
13430 {
13431 unsigned char branch_type =
13432 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13433 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13434
13435 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13436 input_section, contents, rel,
13437 relocation, info, sec, name,
13438 sym_type, branch_type, h,
13439 &unresolved_reloc,
13440 &error_message);
13441 }
13442
13443 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13444 because such sections are not SEC_ALLOC and thus ld.so will
13445 not process them. */
13446 if (unresolved_reloc
13447 && !((input_section->flags & SEC_DEBUGGING) != 0
13448 && h->def_dynamic)
13449 && _bfd_elf_section_offset (output_bfd, info, input_section,
13450 rel->r_offset) != (bfd_vma) -1)
13451 {
13452 _bfd_error_handler
13453 /* xgettext:c-format */
13454 (_("%pB(%pA+%#" PRIx64 "): "
13455 "unresolvable %s relocation against symbol `%s'"),
13456 input_bfd,
13457 input_section,
13458 (uint64_t) rel->r_offset,
13459 howto->name,
13460 h->root.root.string);
13461 return FALSE;
13462 }
13463
13464 if (r != bfd_reloc_ok)
13465 {
13466 switch (r)
13467 {
13468 case bfd_reloc_overflow:
13469 /* If the overflowing reloc was to an undefined symbol,
13470 we have already printed one error message and there
13471 is no point complaining again. */
13472 if (!h || h->root.type != bfd_link_hash_undefined)
13473 (*info->callbacks->reloc_overflow)
13474 (info, (h ? &h->root : NULL), name, howto->name,
13475 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13476 break;
13477
13478 case bfd_reloc_undefined:
13479 (*info->callbacks->undefined_symbol)
13480 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13481 break;
13482
13483 case bfd_reloc_outofrange:
13484 error_message = _("out of range");
13485 goto common_error;
13486
13487 case bfd_reloc_notsupported:
13488 error_message = _("unsupported relocation");
13489 goto common_error;
13490
13491 case bfd_reloc_dangerous:
13492 /* error_message should already be set. */
13493 goto common_error;
13494
13495 default:
13496 error_message = _("unknown error");
13497 /* Fall through. */
13498
13499 common_error:
13500 BFD_ASSERT (error_message != NULL);
13501 (*info->callbacks->reloc_dangerous)
13502 (info, error_message, input_bfd, input_section, rel->r_offset);
13503 break;
13504 }
13505 }
13506 }
13507
13508 return TRUE;
13509 }
13510
13511 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13512 adds the edit to the start of the list. (The list must be built in order of
13513 ascending TINDEX: the function's callers are primarily responsible for
13514 maintaining that condition). */
13515
13516 static void
13517 add_unwind_table_edit (arm_unwind_table_edit **head,
13518 arm_unwind_table_edit **tail,
13519 arm_unwind_edit_type type,
13520 asection *linked_section,
13521 unsigned int tindex)
13522 {
13523 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13524 xmalloc (sizeof (arm_unwind_table_edit));
13525
13526 new_edit->type = type;
13527 new_edit->linked_section = linked_section;
13528 new_edit->index = tindex;
13529
13530 if (tindex > 0)
13531 {
13532 new_edit->next = NULL;
13533
13534 if (*tail)
13535 (*tail)->next = new_edit;
13536
13537 (*tail) = new_edit;
13538
13539 if (!*head)
13540 (*head) = new_edit;
13541 }
13542 else
13543 {
13544 new_edit->next = *head;
13545
13546 if (!*tail)
13547 *tail = new_edit;
13548
13549 *head = new_edit;
13550 }
13551 }
13552
13553 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13554
13555 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13556 static void
13557 adjust_exidx_size(asection *exidx_sec, int adjust)
13558 {
13559 asection *out_sec;
13560
13561 if (!exidx_sec->rawsize)
13562 exidx_sec->rawsize = exidx_sec->size;
13563
13564 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13565 out_sec = exidx_sec->output_section;
13566 /* Adjust size of output section. */
13567 bfd_set_section_size (out_sec, out_sec->size +adjust);
13568 }
13569
13570 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13571 static void
13572 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13573 {
13574 struct _arm_elf_section_data *exidx_arm_data;
13575
13576 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13577 add_unwind_table_edit (
13578 &exidx_arm_data->u.exidx.unwind_edit_list,
13579 &exidx_arm_data->u.exidx.unwind_edit_tail,
13580 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13581
13582 exidx_arm_data->additional_reloc_count++;
13583
13584 adjust_exidx_size(exidx_sec, 8);
13585 }
13586
13587 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13588 made to those tables, such that:
13589
13590 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13591 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13592 codes which have been inlined into the index).
13593
13594 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13595
13596 The edits are applied when the tables are written
13597 (in elf32_arm_write_section). */
13598
13599 bfd_boolean
13600 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13601 unsigned int num_text_sections,
13602 struct bfd_link_info *info,
13603 bfd_boolean merge_exidx_entries)
13604 {
13605 bfd *inp;
13606 unsigned int last_second_word = 0, i;
13607 asection *last_exidx_sec = NULL;
13608 asection *last_text_sec = NULL;
13609 int last_unwind_type = -1;
13610
13611 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13612 text sections. */
13613 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13614 {
13615 asection *sec;
13616
13617 for (sec = inp->sections; sec != NULL; sec = sec->next)
13618 {
13619 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13620 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13621
13622 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13623 continue;
13624
13625 if (elf_sec->linked_to)
13626 {
13627 Elf_Internal_Shdr *linked_hdr
13628 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13629 struct _arm_elf_section_data *linked_sec_arm_data
13630 = get_arm_elf_section_data (linked_hdr->bfd_section);
13631
13632 if (linked_sec_arm_data == NULL)
13633 continue;
13634
13635 /* Link this .ARM.exidx section back from the text section it
13636 describes. */
13637 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13638 }
13639 }
13640 }
13641
13642 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13643 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13644 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13645
13646 for (i = 0; i < num_text_sections; i++)
13647 {
13648 asection *sec = text_section_order[i];
13649 asection *exidx_sec;
13650 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13651 struct _arm_elf_section_data *exidx_arm_data;
13652 bfd_byte *contents = NULL;
13653 int deleted_exidx_bytes = 0;
13654 bfd_vma j;
13655 arm_unwind_table_edit *unwind_edit_head = NULL;
13656 arm_unwind_table_edit *unwind_edit_tail = NULL;
13657 Elf_Internal_Shdr *hdr;
13658 bfd *ibfd;
13659
13660 if (arm_data == NULL)
13661 continue;
13662
13663 exidx_sec = arm_data->u.text.arm_exidx_sec;
13664 if (exidx_sec == NULL)
13665 {
13666 /* Section has no unwind data. */
13667 if (last_unwind_type == 0 || !last_exidx_sec)
13668 continue;
13669
13670 /* Ignore zero sized sections. */
13671 if (sec->size == 0)
13672 continue;
13673
13674 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13675 last_unwind_type = 0;
13676 continue;
13677 }
13678
13679 /* Skip /DISCARD/ sections. */
13680 if (bfd_is_abs_section (exidx_sec->output_section))
13681 continue;
13682
13683 hdr = &elf_section_data (exidx_sec)->this_hdr;
13684 if (hdr->sh_type != SHT_ARM_EXIDX)
13685 continue;
13686
13687 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13688 if (exidx_arm_data == NULL)
13689 continue;
13690
13691 ibfd = exidx_sec->owner;
13692
13693 if (hdr->contents != NULL)
13694 contents = hdr->contents;
13695 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13696 /* An error? */
13697 continue;
13698
13699 if (last_unwind_type > 0)
13700 {
13701 unsigned int first_word = bfd_get_32 (ibfd, contents);
13702 /* Add cantunwind if first unwind item does not match section
13703 start. */
13704 if (first_word != sec->vma)
13705 {
13706 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13707 last_unwind_type = 0;
13708 }
13709 }
13710
13711 for (j = 0; j < hdr->sh_size; j += 8)
13712 {
13713 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13714 int unwind_type;
13715 int elide = 0;
13716
13717 /* An EXIDX_CANTUNWIND entry. */
13718 if (second_word == 1)
13719 {
13720 if (last_unwind_type == 0)
13721 elide = 1;
13722 unwind_type = 0;
13723 }
13724 /* Inlined unwinding data. Merge if equal to previous. */
13725 else if ((second_word & 0x80000000) != 0)
13726 {
13727 if (merge_exidx_entries
13728 && last_second_word == second_word && last_unwind_type == 1)
13729 elide = 1;
13730 unwind_type = 1;
13731 last_second_word = second_word;
13732 }
13733 /* Normal table entry. In theory we could merge these too,
13734 but duplicate entries are likely to be much less common. */
13735 else
13736 unwind_type = 2;
13737
13738 if (elide && !bfd_link_relocatable (info))
13739 {
13740 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13741 DELETE_EXIDX_ENTRY, NULL, j / 8);
13742
13743 deleted_exidx_bytes += 8;
13744 }
13745
13746 last_unwind_type = unwind_type;
13747 }
13748
13749 /* Free contents if we allocated it ourselves. */
13750 if (contents != hdr->contents)
13751 free (contents);
13752
13753 /* Record edits to be applied later (in elf32_arm_write_section). */
13754 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13755 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13756
13757 if (deleted_exidx_bytes > 0)
13758 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13759
13760 last_exidx_sec = exidx_sec;
13761 last_text_sec = sec;
13762 }
13763
13764 /* Add terminating CANTUNWIND entry. */
13765 if (!bfd_link_relocatable (info) && last_exidx_sec
13766 && last_unwind_type != 0)
13767 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13768
13769 return TRUE;
13770 }
13771
13772 static bfd_boolean
13773 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13774 bfd *ibfd, const char *name)
13775 {
13776 asection *sec, *osec;
13777
13778 sec = bfd_get_linker_section (ibfd, name);
13779 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13780 return TRUE;
13781
13782 osec = sec->output_section;
13783 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13784 return TRUE;
13785
13786 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13787 sec->output_offset, sec->size))
13788 return FALSE;
13789
13790 return TRUE;
13791 }
13792
13793 static bfd_boolean
13794 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13795 {
13796 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13797 asection *sec, *osec;
13798
13799 if (globals == NULL)
13800 return FALSE;
13801
13802 /* Invoke the regular ELF backend linker to do all the work. */
13803 if (!bfd_elf_final_link (abfd, info))
13804 return FALSE;
13805
13806 /* Process stub sections (eg BE8 encoding, ...). */
13807 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13808 unsigned int i;
13809 for (i=0; i<htab->top_id; i++)
13810 {
13811 sec = htab->stub_group[i].stub_sec;
13812 /* Only process it once, in its link_sec slot. */
13813 if (sec && i == htab->stub_group[i].link_sec->id)
13814 {
13815 osec = sec->output_section;
13816 elf32_arm_write_section (abfd, info, sec, sec->contents);
13817 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13818 sec->output_offset, sec->size))
13819 return FALSE;
13820 }
13821 }
13822
13823 /* Write out any glue sections now that we have created all the
13824 stubs. */
13825 if (globals->bfd_of_glue_owner != NULL)
13826 {
13827 if (! elf32_arm_output_glue_section (info, abfd,
13828 globals->bfd_of_glue_owner,
13829 ARM2THUMB_GLUE_SECTION_NAME))
13830 return FALSE;
13831
13832 if (! elf32_arm_output_glue_section (info, abfd,
13833 globals->bfd_of_glue_owner,
13834 THUMB2ARM_GLUE_SECTION_NAME))
13835 return FALSE;
13836
13837 if (! elf32_arm_output_glue_section (info, abfd,
13838 globals->bfd_of_glue_owner,
13839 VFP11_ERRATUM_VENEER_SECTION_NAME))
13840 return FALSE;
13841
13842 if (! elf32_arm_output_glue_section (info, abfd,
13843 globals->bfd_of_glue_owner,
13844 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13845 return FALSE;
13846
13847 if (! elf32_arm_output_glue_section (info, abfd,
13848 globals->bfd_of_glue_owner,
13849 ARM_BX_GLUE_SECTION_NAME))
13850 return FALSE;
13851 }
13852
13853 return TRUE;
13854 }
13855
13856 /* Return a best guess for the machine number based on the attributes. */
13857
13858 static unsigned int
13859 bfd_arm_get_mach_from_attributes (bfd * abfd)
13860 {
13861 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13862
13863 switch (arch)
13864 {
13865 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13866 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13867 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13868 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13869
13870 case TAG_CPU_ARCH_V5TE:
13871 {
13872 char * name;
13873
13874 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13875 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13876
13877 if (name)
13878 {
13879 if (strcmp (name, "IWMMXT2") == 0)
13880 return bfd_mach_arm_iWMMXt2;
13881
13882 if (strcmp (name, "IWMMXT") == 0)
13883 return bfd_mach_arm_iWMMXt;
13884
13885 if (strcmp (name, "XSCALE") == 0)
13886 {
13887 int wmmx;
13888
13889 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13890 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13891 switch (wmmx)
13892 {
13893 case 1: return bfd_mach_arm_iWMMXt;
13894 case 2: return bfd_mach_arm_iWMMXt2;
13895 default: return bfd_mach_arm_XScale;
13896 }
13897 }
13898 }
13899
13900 return bfd_mach_arm_5TE;
13901 }
13902
13903 case TAG_CPU_ARCH_V5TEJ:
13904 return bfd_mach_arm_5TEJ;
13905 case TAG_CPU_ARCH_V6:
13906 return bfd_mach_arm_6;
13907 case TAG_CPU_ARCH_V6KZ:
13908 return bfd_mach_arm_6KZ;
13909 case TAG_CPU_ARCH_V6T2:
13910 return bfd_mach_arm_6T2;
13911 case TAG_CPU_ARCH_V6K:
13912 return bfd_mach_arm_6K;
13913 case TAG_CPU_ARCH_V7:
13914 return bfd_mach_arm_7;
13915 case TAG_CPU_ARCH_V6_M:
13916 return bfd_mach_arm_6M;
13917 case TAG_CPU_ARCH_V6S_M:
13918 return bfd_mach_arm_6SM;
13919 case TAG_CPU_ARCH_V7E_M:
13920 return bfd_mach_arm_7EM;
13921 case TAG_CPU_ARCH_V8:
13922 return bfd_mach_arm_8;
13923 case TAG_CPU_ARCH_V8R:
13924 return bfd_mach_arm_8R;
13925 case TAG_CPU_ARCH_V8M_BASE:
13926 return bfd_mach_arm_8M_BASE;
13927 case TAG_CPU_ARCH_V8M_MAIN:
13928 return bfd_mach_arm_8M_MAIN;
13929 case TAG_CPU_ARCH_V8_1M_MAIN:
13930 return bfd_mach_arm_8_1M_MAIN;
13931
13932 default:
13933 /* Force entry to be added for any new known Tag_CPU_arch value. */
13934 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13935
13936 /* Unknown Tag_CPU_arch value. */
13937 return bfd_mach_arm_unknown;
13938 }
13939 }
13940
13941 /* Set the right machine number. */
13942
13943 static bfd_boolean
13944 elf32_arm_object_p (bfd *abfd)
13945 {
13946 unsigned int mach;
13947
13948 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13949
13950 if (mach == bfd_mach_arm_unknown)
13951 {
13952 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13953 mach = bfd_mach_arm_ep9312;
13954 else
13955 mach = bfd_arm_get_mach_from_attributes (abfd);
13956 }
13957
13958 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13959 return TRUE;
13960 }
13961
13962 /* Function to keep ARM specific flags in the ELF header. */
13963
13964 static bfd_boolean
13965 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13966 {
13967 if (elf_flags_init (abfd)
13968 && elf_elfheader (abfd)->e_flags != flags)
13969 {
13970 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13971 {
13972 if (flags & EF_ARM_INTERWORK)
13973 _bfd_error_handler
13974 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13975 abfd);
13976 else
13977 _bfd_error_handler
13978 (_("warning: clearing the interworking flag of %pB due to outside request"),
13979 abfd);
13980 }
13981 }
13982 else
13983 {
13984 elf_elfheader (abfd)->e_flags = flags;
13985 elf_flags_init (abfd) = TRUE;
13986 }
13987
13988 return TRUE;
13989 }
13990
13991 /* Copy backend specific data from one object module to another. */
13992
13993 static bfd_boolean
13994 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13995 {
13996 flagword in_flags;
13997 flagword out_flags;
13998
13999 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14000 return TRUE;
14001
14002 in_flags = elf_elfheader (ibfd)->e_flags;
14003 out_flags = elf_elfheader (obfd)->e_flags;
14004
14005 if (elf_flags_init (obfd)
14006 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
14007 && in_flags != out_flags)
14008 {
14009 /* Cannot mix APCS26 and APCS32 code. */
14010 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14011 return FALSE;
14012
14013 /* Cannot mix float APCS and non-float APCS code. */
14014 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14015 return FALSE;
14016
14017 /* If the src and dest have different interworking flags
14018 then turn off the interworking bit. */
14019 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14020 {
14021 if (out_flags & EF_ARM_INTERWORK)
14022 _bfd_error_handler
14023 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
14024 obfd, ibfd);
14025
14026 in_flags &= ~EF_ARM_INTERWORK;
14027 }
14028
14029 /* Likewise for PIC, though don't warn for this case. */
14030 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
14031 in_flags &= ~EF_ARM_PIC;
14032 }
14033
14034 elf_elfheader (obfd)->e_flags = in_flags;
14035 elf_flags_init (obfd) = TRUE;
14036
14037 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
14038 }
14039
14040 /* Values for Tag_ABI_PCS_R9_use. */
14041 enum
14042 {
14043 AEABI_R9_V6,
14044 AEABI_R9_SB,
14045 AEABI_R9_TLS,
14046 AEABI_R9_unused
14047 };
14048
14049 /* Values for Tag_ABI_PCS_RW_data. */
14050 enum
14051 {
14052 AEABI_PCS_RW_data_absolute,
14053 AEABI_PCS_RW_data_PCrel,
14054 AEABI_PCS_RW_data_SBrel,
14055 AEABI_PCS_RW_data_unused
14056 };
14057
14058 /* Values for Tag_ABI_enum_size. */
14059 enum
14060 {
14061 AEABI_enum_unused,
14062 AEABI_enum_short,
14063 AEABI_enum_wide,
14064 AEABI_enum_forced_wide
14065 };
14066
14067 /* Determine whether an object attribute tag takes an integer, a
14068 string or both. */
14069
14070 static int
14071 elf32_arm_obj_attrs_arg_type (int tag)
14072 {
14073 if (tag == Tag_compatibility)
14074 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14075 else if (tag == Tag_nodefaults)
14076 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14077 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14078 return ATTR_TYPE_FLAG_STR_VAL;
14079 else if (tag < 32)
14080 return ATTR_TYPE_FLAG_INT_VAL;
14081 else
14082 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14083 }
14084
14085 /* The ABI defines that Tag_conformance should be emitted first, and that
14086 Tag_nodefaults should be second (if either is defined). This sets those
14087 two positions, and bumps up the position of all the remaining tags to
14088 compensate. */
14089 static int
14090 elf32_arm_obj_attrs_order (int num)
14091 {
14092 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14093 return Tag_conformance;
14094 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14095 return Tag_nodefaults;
14096 if ((num - 2) < Tag_nodefaults)
14097 return num - 2;
14098 if ((num - 1) < Tag_conformance)
14099 return num - 1;
14100 return num;
14101 }
14102
14103 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14104 static bfd_boolean
14105 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14106 {
14107 if ((tag & 127) < 64)
14108 {
14109 _bfd_error_handler
14110 (_("%pB: unknown mandatory EABI object attribute %d"),
14111 abfd, tag);
14112 bfd_set_error (bfd_error_bad_value);
14113 return FALSE;
14114 }
14115 else
14116 {
14117 _bfd_error_handler
14118 (_("warning: %pB: unknown EABI object attribute %d"),
14119 abfd, tag);
14120 return TRUE;
14121 }
14122 }
14123
14124 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14125 Returns -1 if no architecture could be read. */
14126
14127 static int
14128 get_secondary_compatible_arch (bfd *abfd)
14129 {
14130 obj_attribute *attr =
14131 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14132
14133 /* Note: the tag and its argument below are uleb128 values, though
14134 currently-defined values fit in one byte for each. */
14135 if (attr->s
14136 && attr->s[0] == Tag_CPU_arch
14137 && (attr->s[1] & 128) != 128
14138 && attr->s[2] == 0)
14139 return attr->s[1];
14140
14141 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14142 return -1;
14143 }
14144
14145 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14146 The tag is removed if ARCH is -1. */
14147
14148 static void
14149 set_secondary_compatible_arch (bfd *abfd, int arch)
14150 {
14151 obj_attribute *attr =
14152 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14153
14154 if (arch == -1)
14155 {
14156 attr->s = NULL;
14157 return;
14158 }
14159
14160 /* Note: the tag and its argument below are uleb128 values, though
14161 currently-defined values fit in one byte for each. */
14162 if (!attr->s)
14163 attr->s = (char *) bfd_alloc (abfd, 3);
14164 attr->s[0] = Tag_CPU_arch;
14165 attr->s[1] = arch;
14166 attr->s[2] = '\0';
14167 }
14168
14169 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14170 into account. */
14171
14172 static int
14173 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14174 int newtag, int secondary_compat)
14175 {
14176 #define T(X) TAG_CPU_ARCH_##X
14177 int tagl, tagh, result;
14178 const int v6t2[] =
14179 {
14180 T(V6T2), /* PRE_V4. */
14181 T(V6T2), /* V4. */
14182 T(V6T2), /* V4T. */
14183 T(V6T2), /* V5T. */
14184 T(V6T2), /* V5TE. */
14185 T(V6T2), /* V5TEJ. */
14186 T(V6T2), /* V6. */
14187 T(V7), /* V6KZ. */
14188 T(V6T2) /* V6T2. */
14189 };
14190 const int v6k[] =
14191 {
14192 T(V6K), /* PRE_V4. */
14193 T(V6K), /* V4. */
14194 T(V6K), /* V4T. */
14195 T(V6K), /* V5T. */
14196 T(V6K), /* V5TE. */
14197 T(V6K), /* V5TEJ. */
14198 T(V6K), /* V6. */
14199 T(V6KZ), /* V6KZ. */
14200 T(V7), /* V6T2. */
14201 T(V6K) /* V6K. */
14202 };
14203 const int v7[] =
14204 {
14205 T(V7), /* PRE_V4. */
14206 T(V7), /* V4. */
14207 T(V7), /* V4T. */
14208 T(V7), /* V5T. */
14209 T(V7), /* V5TE. */
14210 T(V7), /* V5TEJ. */
14211 T(V7), /* V6. */
14212 T(V7), /* V6KZ. */
14213 T(V7), /* V6T2. */
14214 T(V7), /* V6K. */
14215 T(V7) /* V7. */
14216 };
14217 const int v6_m[] =
14218 {
14219 -1, /* PRE_V4. */
14220 -1, /* V4. */
14221 T(V6K), /* V4T. */
14222 T(V6K), /* V5T. */
14223 T(V6K), /* V5TE. */
14224 T(V6K), /* V5TEJ. */
14225 T(V6K), /* V6. */
14226 T(V6KZ), /* V6KZ. */
14227 T(V7), /* V6T2. */
14228 T(V6K), /* V6K. */
14229 T(V7), /* V7. */
14230 T(V6_M) /* V6_M. */
14231 };
14232 const int v6s_m[] =
14233 {
14234 -1, /* PRE_V4. */
14235 -1, /* V4. */
14236 T(V6K), /* V4T. */
14237 T(V6K), /* V5T. */
14238 T(V6K), /* V5TE. */
14239 T(V6K), /* V5TEJ. */
14240 T(V6K), /* V6. */
14241 T(V6KZ), /* V6KZ. */
14242 T(V7), /* V6T2. */
14243 T(V6K), /* V6K. */
14244 T(V7), /* V7. */
14245 T(V6S_M), /* V6_M. */
14246 T(V6S_M) /* V6S_M. */
14247 };
14248 const int v7e_m[] =
14249 {
14250 -1, /* PRE_V4. */
14251 -1, /* V4. */
14252 T(V7E_M), /* V4T. */
14253 T(V7E_M), /* V5T. */
14254 T(V7E_M), /* V5TE. */
14255 T(V7E_M), /* V5TEJ. */
14256 T(V7E_M), /* V6. */
14257 T(V7E_M), /* V6KZ. */
14258 T(V7E_M), /* V6T2. */
14259 T(V7E_M), /* V6K. */
14260 T(V7E_M), /* V7. */
14261 T(V7E_M), /* V6_M. */
14262 T(V7E_M), /* V6S_M. */
14263 T(V7E_M) /* V7E_M. */
14264 };
14265 const int v8[] =
14266 {
14267 T(V8), /* PRE_V4. */
14268 T(V8), /* V4. */
14269 T(V8), /* V4T. */
14270 T(V8), /* V5T. */
14271 T(V8), /* V5TE. */
14272 T(V8), /* V5TEJ. */
14273 T(V8), /* V6. */
14274 T(V8), /* V6KZ. */
14275 T(V8), /* V6T2. */
14276 T(V8), /* V6K. */
14277 T(V8), /* V7. */
14278 T(V8), /* V6_M. */
14279 T(V8), /* V6S_M. */
14280 T(V8), /* V7E_M. */
14281 T(V8) /* V8. */
14282 };
14283 const int v8r[] =
14284 {
14285 T(V8R), /* PRE_V4. */
14286 T(V8R), /* V4. */
14287 T(V8R), /* V4T. */
14288 T(V8R), /* V5T. */
14289 T(V8R), /* V5TE. */
14290 T(V8R), /* V5TEJ. */
14291 T(V8R), /* V6. */
14292 T(V8R), /* V6KZ. */
14293 T(V8R), /* V6T2. */
14294 T(V8R), /* V6K. */
14295 T(V8R), /* V7. */
14296 T(V8R), /* V6_M. */
14297 T(V8R), /* V6S_M. */
14298 T(V8R), /* V7E_M. */
14299 T(V8), /* V8. */
14300 T(V8R), /* V8R. */
14301 };
14302 const int v8m_baseline[] =
14303 {
14304 -1, /* PRE_V4. */
14305 -1, /* V4. */
14306 -1, /* V4T. */
14307 -1, /* V5T. */
14308 -1, /* V5TE. */
14309 -1, /* V5TEJ. */
14310 -1, /* V6. */
14311 -1, /* V6KZ. */
14312 -1, /* V6T2. */
14313 -1, /* V6K. */
14314 -1, /* V7. */
14315 T(V8M_BASE), /* V6_M. */
14316 T(V8M_BASE), /* V6S_M. */
14317 -1, /* V7E_M. */
14318 -1, /* V8. */
14319 -1, /* V8R. */
14320 T(V8M_BASE) /* V8-M BASELINE. */
14321 };
14322 const int v8m_mainline[] =
14323 {
14324 -1, /* PRE_V4. */
14325 -1, /* V4. */
14326 -1, /* V4T. */
14327 -1, /* V5T. */
14328 -1, /* V5TE. */
14329 -1, /* V5TEJ. */
14330 -1, /* V6. */
14331 -1, /* V6KZ. */
14332 -1, /* V6T2. */
14333 -1, /* V6K. */
14334 T(V8M_MAIN), /* V7. */
14335 T(V8M_MAIN), /* V6_M. */
14336 T(V8M_MAIN), /* V6S_M. */
14337 T(V8M_MAIN), /* V7E_M. */
14338 -1, /* V8. */
14339 -1, /* V8R. */
14340 T(V8M_MAIN), /* V8-M BASELINE. */
14341 T(V8M_MAIN) /* V8-M MAINLINE. */
14342 };
14343 const int v8_1m_mainline[] =
14344 {
14345 -1, /* PRE_V4. */
14346 -1, /* V4. */
14347 -1, /* V4T. */
14348 -1, /* V5T. */
14349 -1, /* V5TE. */
14350 -1, /* V5TEJ. */
14351 -1, /* V6. */
14352 -1, /* V6KZ. */
14353 -1, /* V6T2. */
14354 -1, /* V6K. */
14355 T(V8_1M_MAIN), /* V7. */
14356 T(V8_1M_MAIN), /* V6_M. */
14357 T(V8_1M_MAIN), /* V6S_M. */
14358 T(V8_1M_MAIN), /* V7E_M. */
14359 -1, /* V8. */
14360 -1, /* V8R. */
14361 T(V8_1M_MAIN), /* V8-M BASELINE. */
14362 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14363 -1, /* Unused (18). */
14364 -1, /* Unused (19). */
14365 -1, /* Unused (20). */
14366 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14367 };
14368 const int v4t_plus_v6_m[] =
14369 {
14370 -1, /* PRE_V4. */
14371 -1, /* V4. */
14372 T(V4T), /* V4T. */
14373 T(V5T), /* V5T. */
14374 T(V5TE), /* V5TE. */
14375 T(V5TEJ), /* V5TEJ. */
14376 T(V6), /* V6. */
14377 T(V6KZ), /* V6KZ. */
14378 T(V6T2), /* V6T2. */
14379 T(V6K), /* V6K. */
14380 T(V7), /* V7. */
14381 T(V6_M), /* V6_M. */
14382 T(V6S_M), /* V6S_M. */
14383 T(V7E_M), /* V7E_M. */
14384 T(V8), /* V8. */
14385 -1, /* V8R. */
14386 T(V8M_BASE), /* V8-M BASELINE. */
14387 T(V8M_MAIN), /* V8-M MAINLINE. */
14388 -1, /* Unused (18). */
14389 -1, /* Unused (19). */
14390 -1, /* Unused (20). */
14391 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14392 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14393 };
14394 const int *comb[] =
14395 {
14396 v6t2,
14397 v6k,
14398 v7,
14399 v6_m,
14400 v6s_m,
14401 v7e_m,
14402 v8,
14403 v8r,
14404 v8m_baseline,
14405 v8m_mainline,
14406 NULL,
14407 NULL,
14408 NULL,
14409 v8_1m_mainline,
14410 /* Pseudo-architecture. */
14411 v4t_plus_v6_m
14412 };
14413
14414 /* Check we've not got a higher architecture than we know about. */
14415
14416 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14417 {
14418 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14419 return -1;
14420 }
14421
14422 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14423
14424 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14425 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14426 oldtag = T(V4T_PLUS_V6_M);
14427
14428 /* And override the new tag if we have a Tag_also_compatible_with on the
14429 input. */
14430
14431 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14432 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14433 newtag = T(V4T_PLUS_V6_M);
14434
14435 tagl = (oldtag < newtag) ? oldtag : newtag;
14436 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14437
14438 /* Architectures before V6KZ add features monotonically. */
14439 if (tagh <= TAG_CPU_ARCH_V6KZ)
14440 return result;
14441
14442 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14443
14444 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14445 as the canonical version. */
14446 if (result == T(V4T_PLUS_V6_M))
14447 {
14448 result = T(V4T);
14449 *secondary_compat_out = T(V6_M);
14450 }
14451 else
14452 *secondary_compat_out = -1;
14453
14454 if (result == -1)
14455 {
14456 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14457 ibfd, oldtag, newtag);
14458 return -1;
14459 }
14460
14461 return result;
14462 #undef T
14463 }
14464
14465 /* Query attributes object to see if integer divide instructions may be
14466 present in an object. */
14467 static bfd_boolean
14468 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14469 {
14470 int arch = attr[Tag_CPU_arch].i;
14471 int profile = attr[Tag_CPU_arch_profile].i;
14472
14473 switch (attr[Tag_DIV_use].i)
14474 {
14475 case 0:
14476 /* Integer divide allowed if instruction contained in archetecture. */
14477 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14478 return TRUE;
14479 else if (arch >= TAG_CPU_ARCH_V7E_M)
14480 return TRUE;
14481 else
14482 return FALSE;
14483
14484 case 1:
14485 /* Integer divide explicitly prohibited. */
14486 return FALSE;
14487
14488 default:
14489 /* Unrecognised case - treat as allowing divide everywhere. */
14490 case 2:
14491 /* Integer divide allowed in ARM state. */
14492 return TRUE;
14493 }
14494 }
14495
14496 /* Query attributes object to see if integer divide instructions are
14497 forbidden to be in the object. This is not the inverse of
14498 elf32_arm_attributes_accept_div. */
14499 static bfd_boolean
14500 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14501 {
14502 return attr[Tag_DIV_use].i == 1;
14503 }
14504
14505 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14506 are conflicting attributes. */
14507
14508 static bfd_boolean
14509 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14510 {
14511 bfd *obfd = info->output_bfd;
14512 obj_attribute *in_attr;
14513 obj_attribute *out_attr;
14514 /* Some tags have 0 = don't care, 1 = strong requirement,
14515 2 = weak requirement. */
14516 static const int order_021[3] = {0, 2, 1};
14517 int i;
14518 bfd_boolean result = TRUE;
14519 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14520
14521 /* Skip the linker stubs file. This preserves previous behavior
14522 of accepting unknown attributes in the first input file - but
14523 is that a bug? */
14524 if (ibfd->flags & BFD_LINKER_CREATED)
14525 return TRUE;
14526
14527 /* Skip any input that hasn't attribute section.
14528 This enables to link object files without attribute section with
14529 any others. */
14530 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14531 return TRUE;
14532
14533 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14534 {
14535 /* This is the first object. Copy the attributes. */
14536 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14537
14538 out_attr = elf_known_obj_attributes_proc (obfd);
14539
14540 /* Use the Tag_null value to indicate the attributes have been
14541 initialized. */
14542 out_attr[0].i = 1;
14543
14544 /* We do not output objects with Tag_MPextension_use_legacy - we move
14545 the attribute's value to Tag_MPextension_use. */
14546 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14547 {
14548 if (out_attr[Tag_MPextension_use].i != 0
14549 && out_attr[Tag_MPextension_use_legacy].i
14550 != out_attr[Tag_MPextension_use].i)
14551 {
14552 _bfd_error_handler
14553 (_("Error: %pB has both the current and legacy "
14554 "Tag_MPextension_use attributes"), ibfd);
14555 result = FALSE;
14556 }
14557
14558 out_attr[Tag_MPextension_use] =
14559 out_attr[Tag_MPextension_use_legacy];
14560 out_attr[Tag_MPextension_use_legacy].type = 0;
14561 out_attr[Tag_MPextension_use_legacy].i = 0;
14562 }
14563
14564 return result;
14565 }
14566
14567 in_attr = elf_known_obj_attributes_proc (ibfd);
14568 out_attr = elf_known_obj_attributes_proc (obfd);
14569 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14570 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14571 {
14572 /* Ignore mismatches if the object doesn't use floating point or is
14573 floating point ABI independent. */
14574 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14575 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14576 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14577 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14578 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14579 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14580 {
14581 _bfd_error_handler
14582 (_("error: %pB uses VFP register arguments, %pB does not"),
14583 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14584 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14585 result = FALSE;
14586 }
14587 }
14588
14589 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14590 {
14591 /* Merge this attribute with existing attributes. */
14592 switch (i)
14593 {
14594 case Tag_CPU_raw_name:
14595 case Tag_CPU_name:
14596 /* These are merged after Tag_CPU_arch. */
14597 break;
14598
14599 case Tag_ABI_optimization_goals:
14600 case Tag_ABI_FP_optimization_goals:
14601 /* Use the first value seen. */
14602 break;
14603
14604 case Tag_CPU_arch:
14605 {
14606 int secondary_compat = -1, secondary_compat_out = -1;
14607 unsigned int saved_out_attr = out_attr[i].i;
14608 int arch_attr;
14609 static const char *name_table[] =
14610 {
14611 /* These aren't real CPU names, but we can't guess
14612 that from the architecture version alone. */
14613 "Pre v4",
14614 "ARM v4",
14615 "ARM v4T",
14616 "ARM v5T",
14617 "ARM v5TE",
14618 "ARM v5TEJ",
14619 "ARM v6",
14620 "ARM v6KZ",
14621 "ARM v6T2",
14622 "ARM v6K",
14623 "ARM v7",
14624 "ARM v6-M",
14625 "ARM v6S-M",
14626 "ARM v8",
14627 "",
14628 "ARM v8-M.baseline",
14629 "ARM v8-M.mainline",
14630 };
14631
14632 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14633 secondary_compat = get_secondary_compatible_arch (ibfd);
14634 secondary_compat_out = get_secondary_compatible_arch (obfd);
14635 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14636 &secondary_compat_out,
14637 in_attr[i].i,
14638 secondary_compat);
14639
14640 /* Return with error if failed to merge. */
14641 if (arch_attr == -1)
14642 return FALSE;
14643
14644 out_attr[i].i = arch_attr;
14645
14646 set_secondary_compatible_arch (obfd, secondary_compat_out);
14647
14648 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14649 if (out_attr[i].i == saved_out_attr)
14650 ; /* Leave the names alone. */
14651 else if (out_attr[i].i == in_attr[i].i)
14652 {
14653 /* The output architecture has been changed to match the
14654 input architecture. Use the input names. */
14655 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14656 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14657 : NULL;
14658 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14659 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14660 : NULL;
14661 }
14662 else
14663 {
14664 out_attr[Tag_CPU_name].s = NULL;
14665 out_attr[Tag_CPU_raw_name].s = NULL;
14666 }
14667
14668 /* If we still don't have a value for Tag_CPU_name,
14669 make one up now. Tag_CPU_raw_name remains blank. */
14670 if (out_attr[Tag_CPU_name].s == NULL
14671 && out_attr[i].i < ARRAY_SIZE (name_table))
14672 out_attr[Tag_CPU_name].s =
14673 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14674 }
14675 break;
14676
14677 case Tag_ARM_ISA_use:
14678 case Tag_THUMB_ISA_use:
14679 case Tag_WMMX_arch:
14680 case Tag_Advanced_SIMD_arch:
14681 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14682 case Tag_ABI_FP_rounding:
14683 case Tag_ABI_FP_exceptions:
14684 case Tag_ABI_FP_user_exceptions:
14685 case Tag_ABI_FP_number_model:
14686 case Tag_FP_HP_extension:
14687 case Tag_CPU_unaligned_access:
14688 case Tag_T2EE_use:
14689 case Tag_MPextension_use:
14690 case Tag_MVE_arch:
14691 /* Use the largest value specified. */
14692 if (in_attr[i].i > out_attr[i].i)
14693 out_attr[i].i = in_attr[i].i;
14694 break;
14695
14696 case Tag_ABI_align_preserved:
14697 case Tag_ABI_PCS_RO_data:
14698 /* Use the smallest value specified. */
14699 if (in_attr[i].i < out_attr[i].i)
14700 out_attr[i].i = in_attr[i].i;
14701 break;
14702
14703 case Tag_ABI_align_needed:
14704 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14705 && (in_attr[Tag_ABI_align_preserved].i == 0
14706 || out_attr[Tag_ABI_align_preserved].i == 0))
14707 {
14708 /* This error message should be enabled once all non-conformant
14709 binaries in the toolchain have had the attributes set
14710 properly.
14711 _bfd_error_handler
14712 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14713 obfd, ibfd);
14714 result = FALSE; */
14715 }
14716 /* Fall through. */
14717 case Tag_ABI_FP_denormal:
14718 case Tag_ABI_PCS_GOT_use:
14719 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14720 value if greater than 2 (for future-proofing). */
14721 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14722 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14723 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14724 out_attr[i].i = in_attr[i].i;
14725 break;
14726
14727 case Tag_Virtualization_use:
14728 /* The virtualization tag effectively stores two bits of
14729 information: the intended use of TrustZone (in bit 0), and the
14730 intended use of Virtualization (in bit 1). */
14731 if (out_attr[i].i == 0)
14732 out_attr[i].i = in_attr[i].i;
14733 else if (in_attr[i].i != 0
14734 && in_attr[i].i != out_attr[i].i)
14735 {
14736 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14737 out_attr[i].i = 3;
14738 else
14739 {
14740 _bfd_error_handler
14741 (_("error: %pB: unable to merge virtualization attributes "
14742 "with %pB"),
14743 obfd, ibfd);
14744 result = FALSE;
14745 }
14746 }
14747 break;
14748
14749 case Tag_CPU_arch_profile:
14750 if (out_attr[i].i != in_attr[i].i)
14751 {
14752 /* 0 will merge with anything.
14753 'A' and 'S' merge to 'A'.
14754 'R' and 'S' merge to 'R'.
14755 'M' and 'A|R|S' is an error. */
14756 if (out_attr[i].i == 0
14757 || (out_attr[i].i == 'S'
14758 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14759 out_attr[i].i = in_attr[i].i;
14760 else if (in_attr[i].i == 0
14761 || (in_attr[i].i == 'S'
14762 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14763 ; /* Do nothing. */
14764 else
14765 {
14766 _bfd_error_handler
14767 (_("error: %pB: conflicting architecture profiles %c/%c"),
14768 ibfd,
14769 in_attr[i].i ? in_attr[i].i : '0',
14770 out_attr[i].i ? out_attr[i].i : '0');
14771 result = FALSE;
14772 }
14773 }
14774 break;
14775
14776 case Tag_DSP_extension:
14777 /* No need to change output value if any of:
14778 - pre (<=) ARMv5T input architecture (do not have DSP)
14779 - M input profile not ARMv7E-M and do not have DSP. */
14780 if (in_attr[Tag_CPU_arch].i <= 3
14781 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14782 && in_attr[Tag_CPU_arch].i != 13
14783 && in_attr[i].i == 0))
14784 ; /* Do nothing. */
14785 /* Output value should be 0 if DSP part of architecture, ie.
14786 - post (>=) ARMv5te architecture output
14787 - A, R or S profile output or ARMv7E-M output architecture. */
14788 else if (out_attr[Tag_CPU_arch].i >= 4
14789 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14790 || out_attr[Tag_CPU_arch_profile].i == 'R'
14791 || out_attr[Tag_CPU_arch_profile].i == 'S'
14792 || out_attr[Tag_CPU_arch].i == 13))
14793 out_attr[i].i = 0;
14794 /* Otherwise, DSP instructions are added and not part of output
14795 architecture. */
14796 else
14797 out_attr[i].i = 1;
14798 break;
14799
14800 case Tag_FP_arch:
14801 {
14802 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14803 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14804 when it's 0. It might mean absence of FP hardware if
14805 Tag_FP_arch is zero. */
14806
14807 #define VFP_VERSION_COUNT 9
14808 static const struct
14809 {
14810 int ver;
14811 int regs;
14812 } vfp_versions[VFP_VERSION_COUNT] =
14813 {
14814 {0, 0},
14815 {1, 16},
14816 {2, 16},
14817 {3, 32},
14818 {3, 16},
14819 {4, 32},
14820 {4, 16},
14821 {8, 32},
14822 {8, 16}
14823 };
14824 int ver;
14825 int regs;
14826 int newval;
14827
14828 /* If the output has no requirement about FP hardware,
14829 follow the requirement of the input. */
14830 if (out_attr[i].i == 0)
14831 {
14832 /* This assert is still reasonable, we shouldn't
14833 produce the suspicious build attribute
14834 combination (See below for in_attr). */
14835 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14836 out_attr[i].i = in_attr[i].i;
14837 out_attr[Tag_ABI_HardFP_use].i
14838 = in_attr[Tag_ABI_HardFP_use].i;
14839 break;
14840 }
14841 /* If the input has no requirement about FP hardware, do
14842 nothing. */
14843 else if (in_attr[i].i == 0)
14844 {
14845 /* We used to assert that Tag_ABI_HardFP_use was
14846 zero here, but we should never assert when
14847 consuming an object file that has suspicious
14848 build attributes. The single precision variant
14849 of 'no FP architecture' is still 'no FP
14850 architecture', so we just ignore the tag in this
14851 case. */
14852 break;
14853 }
14854
14855 /* Both the input and the output have nonzero Tag_FP_arch.
14856 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14857
14858 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14859 do nothing. */
14860 if (in_attr[Tag_ABI_HardFP_use].i == 0
14861 && out_attr[Tag_ABI_HardFP_use].i == 0)
14862 ;
14863 /* If the input and the output have different Tag_ABI_HardFP_use,
14864 the combination of them is 0 (implied by Tag_FP_arch). */
14865 else if (in_attr[Tag_ABI_HardFP_use].i
14866 != out_attr[Tag_ABI_HardFP_use].i)
14867 out_attr[Tag_ABI_HardFP_use].i = 0;
14868
14869 /* Now we can handle Tag_FP_arch. */
14870
14871 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14872 pick the biggest. */
14873 if (in_attr[i].i >= VFP_VERSION_COUNT
14874 && in_attr[i].i > out_attr[i].i)
14875 {
14876 out_attr[i] = in_attr[i];
14877 break;
14878 }
14879 /* The output uses the superset of input features
14880 (ISA version) and registers. */
14881 ver = vfp_versions[in_attr[i].i].ver;
14882 if (ver < vfp_versions[out_attr[i].i].ver)
14883 ver = vfp_versions[out_attr[i].i].ver;
14884 regs = vfp_versions[in_attr[i].i].regs;
14885 if (regs < vfp_versions[out_attr[i].i].regs)
14886 regs = vfp_versions[out_attr[i].i].regs;
14887 /* This assumes all possible supersets are also a valid
14888 options. */
14889 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14890 {
14891 if (regs == vfp_versions[newval].regs
14892 && ver == vfp_versions[newval].ver)
14893 break;
14894 }
14895 out_attr[i].i = newval;
14896 }
14897 break;
14898 case Tag_PCS_config:
14899 if (out_attr[i].i == 0)
14900 out_attr[i].i = in_attr[i].i;
14901 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14902 {
14903 /* It's sometimes ok to mix different configs, so this is only
14904 a warning. */
14905 _bfd_error_handler
14906 (_("warning: %pB: conflicting platform configuration"), ibfd);
14907 }
14908 break;
14909 case Tag_ABI_PCS_R9_use:
14910 if (in_attr[i].i != out_attr[i].i
14911 && out_attr[i].i != AEABI_R9_unused
14912 && in_attr[i].i != AEABI_R9_unused)
14913 {
14914 _bfd_error_handler
14915 (_("error: %pB: conflicting use of R9"), ibfd);
14916 result = FALSE;
14917 }
14918 if (out_attr[i].i == AEABI_R9_unused)
14919 out_attr[i].i = in_attr[i].i;
14920 break;
14921 case Tag_ABI_PCS_RW_data:
14922 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14923 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14924 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14925 {
14926 _bfd_error_handler
14927 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14928 ibfd);
14929 result = FALSE;
14930 }
14931 /* Use the smallest value specified. */
14932 if (in_attr[i].i < out_attr[i].i)
14933 out_attr[i].i = in_attr[i].i;
14934 break;
14935 case Tag_ABI_PCS_wchar_t:
14936 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14937 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14938 {
14939 _bfd_error_handler
14940 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14941 ibfd, in_attr[i].i, out_attr[i].i);
14942 }
14943 else if (in_attr[i].i && !out_attr[i].i)
14944 out_attr[i].i = in_attr[i].i;
14945 break;
14946 case Tag_ABI_enum_size:
14947 if (in_attr[i].i != AEABI_enum_unused)
14948 {
14949 if (out_attr[i].i == AEABI_enum_unused
14950 || out_attr[i].i == AEABI_enum_forced_wide)
14951 {
14952 /* The existing object is compatible with anything.
14953 Use whatever requirements the new object has. */
14954 out_attr[i].i = in_attr[i].i;
14955 }
14956 else if (in_attr[i].i != AEABI_enum_forced_wide
14957 && out_attr[i].i != in_attr[i].i
14958 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14959 {
14960 static const char *aeabi_enum_names[] =
14961 { "", "variable-size", "32-bit", "" };
14962 const char *in_name =
14963 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14964 ? aeabi_enum_names[in_attr[i].i]
14965 : "<unknown>";
14966 const char *out_name =
14967 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14968 ? aeabi_enum_names[out_attr[i].i]
14969 : "<unknown>";
14970 _bfd_error_handler
14971 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14972 ibfd, in_name, out_name);
14973 }
14974 }
14975 break;
14976 case Tag_ABI_VFP_args:
14977 /* Aready done. */
14978 break;
14979 case Tag_ABI_WMMX_args:
14980 if (in_attr[i].i != out_attr[i].i)
14981 {
14982 _bfd_error_handler
14983 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14984 ibfd, obfd);
14985 result = FALSE;
14986 }
14987 break;
14988 case Tag_compatibility:
14989 /* Merged in target-independent code. */
14990 break;
14991 case Tag_ABI_HardFP_use:
14992 /* This is handled along with Tag_FP_arch. */
14993 break;
14994 case Tag_ABI_FP_16bit_format:
14995 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14996 {
14997 if (in_attr[i].i != out_attr[i].i)
14998 {
14999 _bfd_error_handler
15000 (_("error: fp16 format mismatch between %pB and %pB"),
15001 ibfd, obfd);
15002 result = FALSE;
15003 }
15004 }
15005 if (in_attr[i].i != 0)
15006 out_attr[i].i = in_attr[i].i;
15007 break;
15008
15009 case Tag_DIV_use:
15010 /* A value of zero on input means that the divide instruction may
15011 be used if available in the base architecture as specified via
15012 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
15013 the user did not want divide instructions. A value of 2
15014 explicitly means that divide instructions were allowed in ARM
15015 and Thumb state. */
15016 if (in_attr[i].i == out_attr[i].i)
15017 /* Do nothing. */ ;
15018 else if (elf32_arm_attributes_forbid_div (in_attr)
15019 && !elf32_arm_attributes_accept_div (out_attr))
15020 out_attr[i].i = 1;
15021 else if (elf32_arm_attributes_forbid_div (out_attr)
15022 && elf32_arm_attributes_accept_div (in_attr))
15023 out_attr[i].i = in_attr[i].i;
15024 else if (in_attr[i].i == 2)
15025 out_attr[i].i = in_attr[i].i;
15026 break;
15027
15028 case Tag_MPextension_use_legacy:
15029 /* We don't output objects with Tag_MPextension_use_legacy - we
15030 move the value to Tag_MPextension_use. */
15031 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
15032 {
15033 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
15034 {
15035 _bfd_error_handler
15036 (_("%pB has both the current and legacy "
15037 "Tag_MPextension_use attributes"),
15038 ibfd);
15039 result = FALSE;
15040 }
15041 }
15042
15043 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15044 out_attr[Tag_MPextension_use] = in_attr[i];
15045
15046 break;
15047
15048 case Tag_nodefaults:
15049 /* This tag is set if it exists, but the value is unused (and is
15050 typically zero). We don't actually need to do anything here -
15051 the merge happens automatically when the type flags are merged
15052 below. */
15053 break;
15054 case Tag_also_compatible_with:
15055 /* Already done in Tag_CPU_arch. */
15056 break;
15057 case Tag_conformance:
15058 /* Keep the attribute if it matches. Throw it away otherwise.
15059 No attribute means no claim to conform. */
15060 if (!in_attr[i].s || !out_attr[i].s
15061 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15062 out_attr[i].s = NULL;
15063 break;
15064
15065 default:
15066 result
15067 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15068 }
15069
15070 /* If out_attr was copied from in_attr then it won't have a type yet. */
15071 if (in_attr[i].type && !out_attr[i].type)
15072 out_attr[i].type = in_attr[i].type;
15073 }
15074
15075 /* Merge Tag_compatibility attributes and any common GNU ones. */
15076 if (!_bfd_elf_merge_object_attributes (ibfd, info))
15077 return FALSE;
15078
15079 /* Check for any attributes not known on ARM. */
15080 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15081
15082 return result;
15083 }
15084
15085
15086 /* Return TRUE if the two EABI versions are incompatible. */
15087
15088 static bfd_boolean
15089 elf32_arm_versions_compatible (unsigned iver, unsigned over)
15090 {
15091 /* v4 and v5 are the same spec before and after it was released,
15092 so allow mixing them. */
15093 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15094 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15095 return TRUE;
15096
15097 return (iver == over);
15098 }
15099
15100 /* Merge backend specific data from an object file to the output
15101 object file when linking. */
15102
15103 static bfd_boolean
15104 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15105
15106 /* Display the flags field. */
15107
15108 static bfd_boolean
15109 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15110 {
15111 FILE * file = (FILE *) ptr;
15112 unsigned long flags;
15113
15114 BFD_ASSERT (abfd != NULL && ptr != NULL);
15115
15116 /* Print normal ELF private data. */
15117 _bfd_elf_print_private_bfd_data (abfd, ptr);
15118
15119 flags = elf_elfheader (abfd)->e_flags;
15120 /* Ignore init flag - it may not be set, despite the flags field
15121 containing valid data. */
15122
15123 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
15124
15125 switch (EF_ARM_EABI_VERSION (flags))
15126 {
15127 case EF_ARM_EABI_UNKNOWN:
15128 /* The following flag bits are GNU extensions and not part of the
15129 official ARM ELF extended ABI. Hence they are only decoded if
15130 the EABI version is not set. */
15131 if (flags & EF_ARM_INTERWORK)
15132 fprintf (file, _(" [interworking enabled]"));
15133
15134 if (flags & EF_ARM_APCS_26)
15135 fprintf (file, " [APCS-26]");
15136 else
15137 fprintf (file, " [APCS-32]");
15138
15139 if (flags & EF_ARM_VFP_FLOAT)
15140 fprintf (file, _(" [VFP float format]"));
15141 else if (flags & EF_ARM_MAVERICK_FLOAT)
15142 fprintf (file, _(" [Maverick float format]"));
15143 else
15144 fprintf (file, _(" [FPA float format]"));
15145
15146 if (flags & EF_ARM_APCS_FLOAT)
15147 fprintf (file, _(" [floats passed in float registers]"));
15148
15149 if (flags & EF_ARM_PIC)
15150 fprintf (file, _(" [position independent]"));
15151
15152 if (flags & EF_ARM_NEW_ABI)
15153 fprintf (file, _(" [new ABI]"));
15154
15155 if (flags & EF_ARM_OLD_ABI)
15156 fprintf (file, _(" [old ABI]"));
15157
15158 if (flags & EF_ARM_SOFT_FLOAT)
15159 fprintf (file, _(" [software FP]"));
15160
15161 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15162 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15163 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15164 | EF_ARM_MAVERICK_FLOAT);
15165 break;
15166
15167 case EF_ARM_EABI_VER1:
15168 fprintf (file, _(" [Version1 EABI]"));
15169
15170 if (flags & EF_ARM_SYMSARESORTED)
15171 fprintf (file, _(" [sorted symbol table]"));
15172 else
15173 fprintf (file, _(" [unsorted symbol table]"));
15174
15175 flags &= ~ EF_ARM_SYMSARESORTED;
15176 break;
15177
15178 case EF_ARM_EABI_VER2:
15179 fprintf (file, _(" [Version2 EABI]"));
15180
15181 if (flags & EF_ARM_SYMSARESORTED)
15182 fprintf (file, _(" [sorted symbol table]"));
15183 else
15184 fprintf (file, _(" [unsorted symbol table]"));
15185
15186 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15187 fprintf (file, _(" [dynamic symbols use segment index]"));
15188
15189 if (flags & EF_ARM_MAPSYMSFIRST)
15190 fprintf (file, _(" [mapping symbols precede others]"));
15191
15192 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15193 | EF_ARM_MAPSYMSFIRST);
15194 break;
15195
15196 case EF_ARM_EABI_VER3:
15197 fprintf (file, _(" [Version3 EABI]"));
15198 break;
15199
15200 case EF_ARM_EABI_VER4:
15201 fprintf (file, _(" [Version4 EABI]"));
15202 goto eabi;
15203
15204 case EF_ARM_EABI_VER5:
15205 fprintf (file, _(" [Version5 EABI]"));
15206
15207 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15208 fprintf (file, _(" [soft-float ABI]"));
15209
15210 if (flags & EF_ARM_ABI_FLOAT_HARD)
15211 fprintf (file, _(" [hard-float ABI]"));
15212
15213 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15214
15215 eabi:
15216 if (flags & EF_ARM_BE8)
15217 fprintf (file, _(" [BE8]"));
15218
15219 if (flags & EF_ARM_LE8)
15220 fprintf (file, _(" [LE8]"));
15221
15222 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15223 break;
15224
15225 default:
15226 fprintf (file, _(" <EABI version unrecognised>"));
15227 break;
15228 }
15229
15230 flags &= ~ EF_ARM_EABIMASK;
15231
15232 if (flags & EF_ARM_RELEXEC)
15233 fprintf (file, _(" [relocatable executable]"));
15234
15235 if (flags & EF_ARM_PIC)
15236 fprintf (file, _(" [position independent]"));
15237
15238 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15239 fprintf (file, _(" [FDPIC ABI supplement]"));
15240
15241 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15242
15243 if (flags)
15244 fprintf (file, _("<Unrecognised flag bits set>"));
15245
15246 fputc ('\n', file);
15247
15248 return TRUE;
15249 }
15250
15251 static int
15252 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15253 {
15254 switch (ELF_ST_TYPE (elf_sym->st_info))
15255 {
15256 case STT_ARM_TFUNC:
15257 return ELF_ST_TYPE (elf_sym->st_info);
15258
15259 case STT_ARM_16BIT:
15260 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15261 This allows us to distinguish between data used by Thumb instructions
15262 and non-data (which is probably code) inside Thumb regions of an
15263 executable. */
15264 if (type != STT_OBJECT && type != STT_TLS)
15265 return ELF_ST_TYPE (elf_sym->st_info);
15266 break;
15267
15268 default:
15269 break;
15270 }
15271
15272 return type;
15273 }
15274
15275 static asection *
15276 elf32_arm_gc_mark_hook (asection *sec,
15277 struct bfd_link_info *info,
15278 Elf_Internal_Rela *rel,
15279 struct elf_link_hash_entry *h,
15280 Elf_Internal_Sym *sym)
15281 {
15282 if (h != NULL)
15283 switch (ELF32_R_TYPE (rel->r_info))
15284 {
15285 case R_ARM_GNU_VTINHERIT:
15286 case R_ARM_GNU_VTENTRY:
15287 return NULL;
15288 }
15289
15290 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15291 }
15292
15293 /* Look through the relocs for a section during the first phase. */
15294
15295 static bfd_boolean
15296 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15297 asection *sec, const Elf_Internal_Rela *relocs)
15298 {
15299 Elf_Internal_Shdr *symtab_hdr;
15300 struct elf_link_hash_entry **sym_hashes;
15301 const Elf_Internal_Rela *rel;
15302 const Elf_Internal_Rela *rel_end;
15303 bfd *dynobj;
15304 asection *sreloc;
15305 struct elf32_arm_link_hash_table *htab;
15306 bfd_boolean call_reloc_p;
15307 bfd_boolean may_become_dynamic_p;
15308 bfd_boolean may_need_local_target_p;
15309 unsigned long nsyms;
15310
15311 if (bfd_link_relocatable (info))
15312 return TRUE;
15313
15314 BFD_ASSERT (is_arm_elf (abfd));
15315
15316 htab = elf32_arm_hash_table (info);
15317 if (htab == NULL)
15318 return FALSE;
15319
15320 sreloc = NULL;
15321
15322 /* Create dynamic sections for relocatable executables so that we can
15323 copy relocations. */
15324 if (htab->root.is_relocatable_executable
15325 && ! htab->root.dynamic_sections_created)
15326 {
15327 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15328 return FALSE;
15329 }
15330
15331 if (htab->root.dynobj == NULL)
15332 htab->root.dynobj = abfd;
15333 if (!create_ifunc_sections (info))
15334 return FALSE;
15335
15336 dynobj = htab->root.dynobj;
15337
15338 symtab_hdr = & elf_symtab_hdr (abfd);
15339 sym_hashes = elf_sym_hashes (abfd);
15340 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15341
15342 rel_end = relocs + sec->reloc_count;
15343 for (rel = relocs; rel < rel_end; rel++)
15344 {
15345 Elf_Internal_Sym *isym;
15346 struct elf_link_hash_entry *h;
15347 struct elf32_arm_link_hash_entry *eh;
15348 unsigned int r_symndx;
15349 int r_type;
15350
15351 r_symndx = ELF32_R_SYM (rel->r_info);
15352 r_type = ELF32_R_TYPE (rel->r_info);
15353 r_type = arm_real_reloc_type (htab, r_type);
15354
15355 if (r_symndx >= nsyms
15356 /* PR 9934: It is possible to have relocations that do not
15357 refer to symbols, thus it is also possible to have an
15358 object file containing relocations but no symbol table. */
15359 && (r_symndx > STN_UNDEF || nsyms > 0))
15360 {
15361 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15362 r_symndx);
15363 return FALSE;
15364 }
15365
15366 h = NULL;
15367 isym = NULL;
15368 if (nsyms > 0)
15369 {
15370 if (r_symndx < symtab_hdr->sh_info)
15371 {
15372 /* A local symbol. */
15373 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15374 abfd, r_symndx);
15375 if (isym == NULL)
15376 return FALSE;
15377 }
15378 else
15379 {
15380 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15381 while (h->root.type == bfd_link_hash_indirect
15382 || h->root.type == bfd_link_hash_warning)
15383 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15384 }
15385 }
15386
15387 eh = (struct elf32_arm_link_hash_entry *) h;
15388
15389 call_reloc_p = FALSE;
15390 may_become_dynamic_p = FALSE;
15391 may_need_local_target_p = FALSE;
15392
15393 /* Could be done earlier, if h were already available. */
15394 r_type = elf32_arm_tls_transition (info, r_type, h);
15395 switch (r_type)
15396 {
15397 case R_ARM_GOTOFFFUNCDESC:
15398 {
15399 if (h == NULL)
15400 {
15401 if (!elf32_arm_allocate_local_sym_info (abfd))
15402 return FALSE;
15403 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15404 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15405 }
15406 else
15407 {
15408 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15409 }
15410 }
15411 break;
15412
15413 case R_ARM_GOTFUNCDESC:
15414 {
15415 if (h == NULL)
15416 {
15417 /* Such a relocation is not supposed to be generated
15418 by gcc on a static function. */
15419 /* Anyway if needed it could be handled. */
15420 abort();
15421 }
15422 else
15423 {
15424 eh->fdpic_cnts.gotfuncdesc_cnt++;
15425 }
15426 }
15427 break;
15428
15429 case R_ARM_FUNCDESC:
15430 {
15431 if (h == NULL)
15432 {
15433 if (!elf32_arm_allocate_local_sym_info (abfd))
15434 return FALSE;
15435 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15436 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15437 }
15438 else
15439 {
15440 eh->fdpic_cnts.funcdesc_cnt++;
15441 }
15442 }
15443 break;
15444
15445 case R_ARM_GOT32:
15446 case R_ARM_GOT_PREL:
15447 case R_ARM_TLS_GD32:
15448 case R_ARM_TLS_GD32_FDPIC:
15449 case R_ARM_TLS_IE32:
15450 case R_ARM_TLS_IE32_FDPIC:
15451 case R_ARM_TLS_GOTDESC:
15452 case R_ARM_TLS_DESCSEQ:
15453 case R_ARM_THM_TLS_DESCSEQ:
15454 case R_ARM_TLS_CALL:
15455 case R_ARM_THM_TLS_CALL:
15456 /* This symbol requires a global offset table entry. */
15457 {
15458 int tls_type, old_tls_type;
15459
15460 switch (r_type)
15461 {
15462 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15463 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15464
15465 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15466 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15467
15468 case R_ARM_TLS_GOTDESC:
15469 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15470 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15471 tls_type = GOT_TLS_GDESC; break;
15472
15473 default: tls_type = GOT_NORMAL; break;
15474 }
15475
15476 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15477 info->flags |= DF_STATIC_TLS;
15478
15479 if (h != NULL)
15480 {
15481 h->got.refcount++;
15482 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15483 }
15484 else
15485 {
15486 /* This is a global offset table entry for a local symbol. */
15487 if (!elf32_arm_allocate_local_sym_info (abfd))
15488 return FALSE;
15489 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15490 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15491 }
15492
15493 /* If a variable is accessed with both tls methods, two
15494 slots may be created. */
15495 if (GOT_TLS_GD_ANY_P (old_tls_type)
15496 && GOT_TLS_GD_ANY_P (tls_type))
15497 tls_type |= old_tls_type;
15498
15499 /* We will already have issued an error message if there
15500 is a TLS/non-TLS mismatch, based on the symbol
15501 type. So just combine any TLS types needed. */
15502 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15503 && tls_type != GOT_NORMAL)
15504 tls_type |= old_tls_type;
15505
15506 /* If the symbol is accessed in both IE and GDESC
15507 method, we're able to relax. Turn off the GDESC flag,
15508 without messing up with any other kind of tls types
15509 that may be involved. */
15510 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15511 tls_type &= ~GOT_TLS_GDESC;
15512
15513 if (old_tls_type != tls_type)
15514 {
15515 if (h != NULL)
15516 elf32_arm_hash_entry (h)->tls_type = tls_type;
15517 else
15518 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15519 }
15520 }
15521 /* Fall through. */
15522
15523 case R_ARM_TLS_LDM32:
15524 case R_ARM_TLS_LDM32_FDPIC:
15525 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15526 htab->tls_ldm_got.refcount++;
15527 /* Fall through. */
15528
15529 case R_ARM_GOTOFF32:
15530 case R_ARM_GOTPC:
15531 if (htab->root.sgot == NULL
15532 && !create_got_section (htab->root.dynobj, info))
15533 return FALSE;
15534 break;
15535
15536 case R_ARM_PC24:
15537 case R_ARM_PLT32:
15538 case R_ARM_CALL:
15539 case R_ARM_JUMP24:
15540 case R_ARM_PREL31:
15541 case R_ARM_THM_CALL:
15542 case R_ARM_THM_JUMP24:
15543 case R_ARM_THM_JUMP19:
15544 call_reloc_p = TRUE;
15545 may_need_local_target_p = TRUE;
15546 break;
15547
15548 case R_ARM_ABS12:
15549 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15550 ldr __GOTT_INDEX__ offsets. */
15551 if (!htab->vxworks_p)
15552 {
15553 may_need_local_target_p = TRUE;
15554 break;
15555 }
15556 else goto jump_over;
15557
15558 /* Fall through. */
15559
15560 case R_ARM_MOVW_ABS_NC:
15561 case R_ARM_MOVT_ABS:
15562 case R_ARM_THM_MOVW_ABS_NC:
15563 case R_ARM_THM_MOVT_ABS:
15564 if (bfd_link_pic (info))
15565 {
15566 _bfd_error_handler
15567 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15568 abfd, elf32_arm_howto_table_1[r_type].name,
15569 (h) ? h->root.root.string : "a local symbol");
15570 bfd_set_error (bfd_error_bad_value);
15571 return FALSE;
15572 }
15573
15574 /* Fall through. */
15575 case R_ARM_ABS32:
15576 case R_ARM_ABS32_NOI:
15577 jump_over:
15578 if (h != NULL && bfd_link_executable (info))
15579 {
15580 h->pointer_equality_needed = 1;
15581 }
15582 /* Fall through. */
15583 case R_ARM_REL32:
15584 case R_ARM_REL32_NOI:
15585 case R_ARM_MOVW_PREL_NC:
15586 case R_ARM_MOVT_PREL:
15587 case R_ARM_THM_MOVW_PREL_NC:
15588 case R_ARM_THM_MOVT_PREL:
15589
15590 /* Should the interworking branches be listed here? */
15591 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15592 || htab->fdpic_p)
15593 && (sec->flags & SEC_ALLOC) != 0)
15594 {
15595 if (h == NULL
15596 && elf32_arm_howto_from_type (r_type)->pc_relative)
15597 {
15598 /* In shared libraries and relocatable executables,
15599 we treat local relative references as calls;
15600 see the related SYMBOL_CALLS_LOCAL code in
15601 allocate_dynrelocs. */
15602 call_reloc_p = TRUE;
15603 may_need_local_target_p = TRUE;
15604 }
15605 else
15606 /* We are creating a shared library or relocatable
15607 executable, and this is a reloc against a global symbol,
15608 or a non-PC-relative reloc against a local symbol.
15609 We may need to copy the reloc into the output. */
15610 may_become_dynamic_p = TRUE;
15611 }
15612 else
15613 may_need_local_target_p = TRUE;
15614 break;
15615
15616 /* This relocation describes the C++ object vtable hierarchy.
15617 Reconstruct it for later use during GC. */
15618 case R_ARM_GNU_VTINHERIT:
15619 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15620 return FALSE;
15621 break;
15622
15623 /* This relocation describes which C++ vtable entries are actually
15624 used. Record for later use during GC. */
15625 case R_ARM_GNU_VTENTRY:
15626 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15627 return FALSE;
15628 break;
15629 }
15630
15631 if (h != NULL)
15632 {
15633 if (call_reloc_p)
15634 /* We may need a .plt entry if the function this reloc
15635 refers to is in a different object, regardless of the
15636 symbol's type. We can't tell for sure yet, because
15637 something later might force the symbol local. */
15638 h->needs_plt = 1;
15639 else if (may_need_local_target_p)
15640 /* If this reloc is in a read-only section, we might
15641 need a copy reloc. We can't check reliably at this
15642 stage whether the section is read-only, as input
15643 sections have not yet been mapped to output sections.
15644 Tentatively set the flag for now, and correct in
15645 adjust_dynamic_symbol. */
15646 h->non_got_ref = 1;
15647 }
15648
15649 if (may_need_local_target_p
15650 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15651 {
15652 union gotplt_union *root_plt;
15653 struct arm_plt_info *arm_plt;
15654 struct arm_local_iplt_info *local_iplt;
15655
15656 if (h != NULL)
15657 {
15658 root_plt = &h->plt;
15659 arm_plt = &eh->plt;
15660 }
15661 else
15662 {
15663 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15664 if (local_iplt == NULL)
15665 return FALSE;
15666 root_plt = &local_iplt->root;
15667 arm_plt = &local_iplt->arm;
15668 }
15669
15670 /* If the symbol is a function that doesn't bind locally,
15671 this relocation will need a PLT entry. */
15672 if (root_plt->refcount != -1)
15673 root_plt->refcount += 1;
15674
15675 if (!call_reloc_p)
15676 arm_plt->noncall_refcount++;
15677
15678 /* It's too early to use htab->use_blx here, so we have to
15679 record possible blx references separately from
15680 relocs that definitely need a thumb stub. */
15681
15682 if (r_type == R_ARM_THM_CALL)
15683 arm_plt->maybe_thumb_refcount += 1;
15684
15685 if (r_type == R_ARM_THM_JUMP24
15686 || r_type == R_ARM_THM_JUMP19)
15687 arm_plt->thumb_refcount += 1;
15688 }
15689
15690 if (may_become_dynamic_p)
15691 {
15692 struct elf_dyn_relocs *p, **head;
15693
15694 /* Create a reloc section in dynobj. */
15695 if (sreloc == NULL)
15696 {
15697 sreloc = _bfd_elf_make_dynamic_reloc_section
15698 (sec, dynobj, 2, abfd, ! htab->use_rel);
15699
15700 if (sreloc == NULL)
15701 return FALSE;
15702
15703 /* BPABI objects never have dynamic relocations mapped. */
15704 if (htab->symbian_p)
15705 {
15706 flagword flags;
15707
15708 flags = bfd_section_flags (sreloc);
15709 flags &= ~(SEC_LOAD | SEC_ALLOC);
15710 bfd_set_section_flags (sreloc, flags);
15711 }
15712 }
15713
15714 /* If this is a global symbol, count the number of
15715 relocations we need for this symbol. */
15716 if (h != NULL)
15717 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15718 else
15719 {
15720 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15721 if (head == NULL)
15722 return FALSE;
15723 }
15724
15725 p = *head;
15726 if (p == NULL || p->sec != sec)
15727 {
15728 size_t amt = sizeof *p;
15729
15730 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15731 if (p == NULL)
15732 return FALSE;
15733 p->next = *head;
15734 *head = p;
15735 p->sec = sec;
15736 p->count = 0;
15737 p->pc_count = 0;
15738 }
15739
15740 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15741 p->pc_count += 1;
15742 p->count += 1;
15743 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15744 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15745 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15746 that will become rofixup. */
15747 /* This is due to the fact that we suppose all will become rofixup. */
15748 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15749 _bfd_error_handler
15750 (_("FDPIC does not yet support %s relocation"
15751 " to become dynamic for executable"),
15752 elf32_arm_howto_table_1[r_type].name);
15753 abort();
15754 }
15755 }
15756 }
15757
15758 return TRUE;
15759 }
15760
15761 static void
15762 elf32_arm_update_relocs (asection *o,
15763 struct bfd_elf_section_reloc_data *reldata)
15764 {
15765 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15766 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15767 const struct elf_backend_data *bed;
15768 _arm_elf_section_data *eado;
15769 struct bfd_link_order *p;
15770 bfd_byte *erela_head, *erela;
15771 Elf_Internal_Rela *irela_head, *irela;
15772 Elf_Internal_Shdr *rel_hdr;
15773 bfd *abfd;
15774 unsigned int count;
15775
15776 eado = get_arm_elf_section_data (o);
15777
15778 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15779 return;
15780
15781 abfd = o->owner;
15782 bed = get_elf_backend_data (abfd);
15783 rel_hdr = reldata->hdr;
15784
15785 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15786 {
15787 swap_in = bed->s->swap_reloc_in;
15788 swap_out = bed->s->swap_reloc_out;
15789 }
15790 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15791 {
15792 swap_in = bed->s->swap_reloca_in;
15793 swap_out = bed->s->swap_reloca_out;
15794 }
15795 else
15796 abort ();
15797
15798 erela_head = rel_hdr->contents;
15799 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15800 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15801
15802 erela = erela_head;
15803 irela = irela_head;
15804 count = 0;
15805
15806 for (p = o->map_head.link_order; p; p = p->next)
15807 {
15808 if (p->type == bfd_section_reloc_link_order
15809 || p->type == bfd_symbol_reloc_link_order)
15810 {
15811 (*swap_in) (abfd, erela, irela);
15812 erela += rel_hdr->sh_entsize;
15813 irela++;
15814 count++;
15815 }
15816 else if (p->type == bfd_indirect_link_order)
15817 {
15818 struct bfd_elf_section_reloc_data *input_reldata;
15819 arm_unwind_table_edit *edit_list, *edit_tail;
15820 _arm_elf_section_data *eadi;
15821 bfd_size_type j;
15822 bfd_vma offset;
15823 asection *i;
15824
15825 i = p->u.indirect.section;
15826
15827 eadi = get_arm_elf_section_data (i);
15828 edit_list = eadi->u.exidx.unwind_edit_list;
15829 edit_tail = eadi->u.exidx.unwind_edit_tail;
15830 offset = i->output_offset;
15831
15832 if (eadi->elf.rel.hdr &&
15833 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15834 input_reldata = &eadi->elf.rel;
15835 else if (eadi->elf.rela.hdr &&
15836 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15837 input_reldata = &eadi->elf.rela;
15838 else
15839 abort ();
15840
15841 if (edit_list)
15842 {
15843 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15844 {
15845 arm_unwind_table_edit *edit_node, *edit_next;
15846 bfd_vma bias;
15847 bfd_vma reloc_index;
15848
15849 (*swap_in) (abfd, erela, irela);
15850 reloc_index = (irela->r_offset - offset) / 8;
15851
15852 bias = 0;
15853 edit_node = edit_list;
15854 for (edit_next = edit_list;
15855 edit_next && edit_next->index <= reloc_index;
15856 edit_next = edit_node->next)
15857 {
15858 bias++;
15859 edit_node = edit_next;
15860 }
15861
15862 if (edit_node->type != DELETE_EXIDX_ENTRY
15863 || edit_node->index != reloc_index)
15864 {
15865 irela->r_offset -= bias * 8;
15866 irela++;
15867 count++;
15868 }
15869
15870 erela += rel_hdr->sh_entsize;
15871 }
15872
15873 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15874 {
15875 /* New relocation entity. */
15876 asection *text_sec = edit_tail->linked_section;
15877 asection *text_out = text_sec->output_section;
15878 bfd_vma exidx_offset = offset + i->size - 8;
15879
15880 irela->r_addend = 0;
15881 irela->r_offset = exidx_offset;
15882 irela->r_info = ELF32_R_INFO
15883 (text_out->target_index, R_ARM_PREL31);
15884 irela++;
15885 count++;
15886 }
15887 }
15888 else
15889 {
15890 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15891 {
15892 (*swap_in) (abfd, erela, irela);
15893 erela += rel_hdr->sh_entsize;
15894 irela++;
15895 }
15896
15897 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15898 }
15899 }
15900 }
15901
15902 reldata->count = count;
15903 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15904
15905 erela = erela_head;
15906 irela = irela_head;
15907 while (count > 0)
15908 {
15909 (*swap_out) (abfd, irela, erela);
15910 erela += rel_hdr->sh_entsize;
15911 irela++;
15912 count--;
15913 }
15914
15915 free (irela_head);
15916
15917 /* Hashes are no longer valid. */
15918 free (reldata->hashes);
15919 reldata->hashes = NULL;
15920 }
15921
15922 /* Unwinding tables are not referenced directly. This pass marks them as
15923 required if the corresponding code section is marked. Similarly, ARMv8-M
15924 secure entry functions can only be referenced by SG veneers which are
15925 created after the GC process. They need to be marked in case they reside in
15926 their own section (as would be the case if code was compiled with
15927 -ffunction-sections). */
15928
15929 static bfd_boolean
15930 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15931 elf_gc_mark_hook_fn gc_mark_hook)
15932 {
15933 bfd *sub;
15934 Elf_Internal_Shdr **elf_shdrp;
15935 asection *cmse_sec;
15936 obj_attribute *out_attr;
15937 Elf_Internal_Shdr *symtab_hdr;
15938 unsigned i, sym_count, ext_start;
15939 const struct elf_backend_data *bed;
15940 struct elf_link_hash_entry **sym_hashes;
15941 struct elf32_arm_link_hash_entry *cmse_hash;
15942 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15943 bfd_boolean debug_sec_need_to_be_marked = FALSE;
15944 asection *isec;
15945
15946 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15947
15948 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15949 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15950 && out_attr[Tag_CPU_arch_profile].i == 'M';
15951
15952 /* Marking EH data may cause additional code sections to be marked,
15953 requiring multiple passes. */
15954 again = TRUE;
15955 while (again)
15956 {
15957 again = FALSE;
15958 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15959 {
15960 asection *o;
15961
15962 if (! is_arm_elf (sub))
15963 continue;
15964
15965 elf_shdrp = elf_elfsections (sub);
15966 for (o = sub->sections; o != NULL; o = o->next)
15967 {
15968 Elf_Internal_Shdr *hdr;
15969
15970 hdr = &elf_section_data (o)->this_hdr;
15971 if (hdr->sh_type == SHT_ARM_EXIDX
15972 && hdr->sh_link
15973 && hdr->sh_link < elf_numsections (sub)
15974 && !o->gc_mark
15975 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15976 {
15977 again = TRUE;
15978 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15979 return FALSE;
15980 }
15981 }
15982
15983 /* Mark section holding ARMv8-M secure entry functions. We mark all
15984 of them so no need for a second browsing. */
15985 if (is_v8m && first_bfd_browse)
15986 {
15987 sym_hashes = elf_sym_hashes (sub);
15988 bed = get_elf_backend_data (sub);
15989 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15990 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15991 ext_start = symtab_hdr->sh_info;
15992
15993 /* Scan symbols. */
15994 for (i = ext_start; i < sym_count; i++)
15995 {
15996 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15997
15998 /* Assume it is a special symbol. If not, cmse_scan will
15999 warn about it and user can do something about it. */
16000 if (CONST_STRNEQ (cmse_hash->root.root.root.string,
16001 CMSE_PREFIX))
16002 {
16003 cmse_sec = cmse_hash->root.root.u.def.section;
16004 if (!cmse_sec->gc_mark
16005 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
16006 return FALSE;
16007 /* The debug sections related to these secure entry
16008 functions are marked on enabling below flag. */
16009 debug_sec_need_to_be_marked = TRUE;
16010 }
16011 }
16012
16013 if (debug_sec_need_to_be_marked)
16014 {
16015 /* Looping over all the sections of the object file containing
16016 Armv8-M secure entry functions and marking all the debug
16017 sections. */
16018 for (isec = sub->sections; isec != NULL; isec = isec->next)
16019 {
16020 /* If not a debug sections, skip it. */
16021 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
16022 isec->gc_mark = 1 ;
16023 }
16024 debug_sec_need_to_be_marked = FALSE;
16025 }
16026 }
16027 }
16028 first_bfd_browse = FALSE;
16029 }
16030
16031 return TRUE;
16032 }
16033
16034 /* Treat mapping symbols as special target symbols. */
16035
16036 static bfd_boolean
16037 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
16038 {
16039 return bfd_is_arm_special_symbol_name (sym->name,
16040 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
16041 }
16042
16043 /* If the ELF symbol SYM might be a function in SEC, return the
16044 function size and set *CODE_OFF to the function's entry point,
16045 otherwise return zero. */
16046
16047 static bfd_size_type
16048 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
16049 bfd_vma *code_off)
16050 {
16051 bfd_size_type size;
16052
16053 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
16054 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
16055 || sym->section != sec)
16056 return 0;
16057
16058 if (!(sym->flags & BSF_SYNTHETIC))
16059 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
16060 {
16061 case STT_FUNC:
16062 case STT_ARM_TFUNC:
16063 case STT_NOTYPE:
16064 break;
16065 default:
16066 return 0;
16067 }
16068
16069 if ((sym->flags & BSF_LOCAL)
16070 && bfd_is_arm_special_symbol_name (sym->name,
16071 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16072 return 0;
16073
16074 *code_off = sym->value;
16075 size = 0;
16076 if (!(sym->flags & BSF_SYNTHETIC))
16077 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
16078 if (size == 0)
16079 size = 1;
16080 return size;
16081 }
16082
16083 static bfd_boolean
16084 elf32_arm_find_inliner_info (bfd * abfd,
16085 const char ** filename_ptr,
16086 const char ** functionname_ptr,
16087 unsigned int * line_ptr)
16088 {
16089 bfd_boolean found;
16090 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16091 functionname_ptr, line_ptr,
16092 & elf_tdata (abfd)->dwarf2_find_line_info);
16093 return found;
16094 }
16095
16096 /* Find dynamic relocs for H that apply to read-only sections. */
16097
16098 static asection *
16099 readonly_dynrelocs (struct elf_link_hash_entry *h)
16100 {
16101 struct elf_dyn_relocs *p;
16102
16103 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
16104 {
16105 asection *s = p->sec->output_section;
16106
16107 if (s != NULL && (s->flags & SEC_READONLY) != 0)
16108 return p->sec;
16109 }
16110 return NULL;
16111 }
16112
16113 /* Adjust a symbol defined by a dynamic object and referenced by a
16114 regular object. The current definition is in some section of the
16115 dynamic object, but we're not including those sections. We have to
16116 change the definition to something the rest of the link can
16117 understand. */
16118
16119 static bfd_boolean
16120 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16121 struct elf_link_hash_entry * h)
16122 {
16123 bfd * dynobj;
16124 asection *s, *srel;
16125 struct elf32_arm_link_hash_entry * eh;
16126 struct elf32_arm_link_hash_table *globals;
16127
16128 globals = elf32_arm_hash_table (info);
16129 if (globals == NULL)
16130 return FALSE;
16131
16132 dynobj = elf_hash_table (info)->dynobj;
16133
16134 /* Make sure we know what is going on here. */
16135 BFD_ASSERT (dynobj != NULL
16136 && (h->needs_plt
16137 || h->type == STT_GNU_IFUNC
16138 || h->is_weakalias
16139 || (h->def_dynamic
16140 && h->ref_regular
16141 && !h->def_regular)));
16142
16143 eh = (struct elf32_arm_link_hash_entry *) h;
16144
16145 /* If this is a function, put it in the procedure linkage table. We
16146 will fill in the contents of the procedure linkage table later,
16147 when we know the address of the .got section. */
16148 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16149 {
16150 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16151 symbol binds locally. */
16152 if (h->plt.refcount <= 0
16153 || (h->type != STT_GNU_IFUNC
16154 && (SYMBOL_CALLS_LOCAL (info, h)
16155 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16156 && h->root.type == bfd_link_hash_undefweak))))
16157 {
16158 /* This case can occur if we saw a PLT32 reloc in an input
16159 file, but the symbol was never referred to by a dynamic
16160 object, or if all references were garbage collected. In
16161 such a case, we don't actually need to build a procedure
16162 linkage table, and we can just do a PC24 reloc instead. */
16163 h->plt.offset = (bfd_vma) -1;
16164 eh->plt.thumb_refcount = 0;
16165 eh->plt.maybe_thumb_refcount = 0;
16166 eh->plt.noncall_refcount = 0;
16167 h->needs_plt = 0;
16168 }
16169
16170 return TRUE;
16171 }
16172 else
16173 {
16174 /* It's possible that we incorrectly decided a .plt reloc was
16175 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16176 in check_relocs. We can't decide accurately between function
16177 and non-function syms in check-relocs; Objects loaded later in
16178 the link may change h->type. So fix it now. */
16179 h->plt.offset = (bfd_vma) -1;
16180 eh->plt.thumb_refcount = 0;
16181 eh->plt.maybe_thumb_refcount = 0;
16182 eh->plt.noncall_refcount = 0;
16183 }
16184
16185 /* If this is a weak symbol, and there is a real definition, the
16186 processor independent code will have arranged for us to see the
16187 real definition first, and we can just use the same value. */
16188 if (h->is_weakalias)
16189 {
16190 struct elf_link_hash_entry *def = weakdef (h);
16191 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16192 h->root.u.def.section = def->root.u.def.section;
16193 h->root.u.def.value = def->root.u.def.value;
16194 return TRUE;
16195 }
16196
16197 /* If there are no non-GOT references, we do not need a copy
16198 relocation. */
16199 if (!h->non_got_ref)
16200 return TRUE;
16201
16202 /* This is a reference to a symbol defined by a dynamic object which
16203 is not a function. */
16204
16205 /* If we are creating a shared library, we must presume that the
16206 only references to the symbol are via the global offset table.
16207 For such cases we need not do anything here; the relocations will
16208 be handled correctly by relocate_section. Relocatable executables
16209 can reference data in shared objects directly, so we don't need to
16210 do anything here. */
16211 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16212 return TRUE;
16213
16214 /* We must allocate the symbol in our .dynbss section, which will
16215 become part of the .bss section of the executable. There will be
16216 an entry for this symbol in the .dynsym section. The dynamic
16217 object will contain position independent code, so all references
16218 from the dynamic object to this symbol will go through the global
16219 offset table. The dynamic linker will use the .dynsym entry to
16220 determine the address it must put in the global offset table, so
16221 both the dynamic object and the regular object will refer to the
16222 same memory location for the variable. */
16223 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16224 linker to copy the initial value out of the dynamic object and into
16225 the runtime process image. We need to remember the offset into the
16226 .rel(a).bss section we are going to use. */
16227 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16228 {
16229 s = globals->root.sdynrelro;
16230 srel = globals->root.sreldynrelro;
16231 }
16232 else
16233 {
16234 s = globals->root.sdynbss;
16235 srel = globals->root.srelbss;
16236 }
16237 if (info->nocopyreloc == 0
16238 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16239 && h->size != 0)
16240 {
16241 elf32_arm_allocate_dynrelocs (info, srel, 1);
16242 h->needs_copy = 1;
16243 }
16244
16245 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16246 }
16247
16248 /* Allocate space in .plt, .got and associated reloc sections for
16249 dynamic relocs. */
16250
16251 static bfd_boolean
16252 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16253 {
16254 struct bfd_link_info *info;
16255 struct elf32_arm_link_hash_table *htab;
16256 struct elf32_arm_link_hash_entry *eh;
16257 struct elf_dyn_relocs *p;
16258
16259 if (h->root.type == bfd_link_hash_indirect)
16260 return TRUE;
16261
16262 eh = (struct elf32_arm_link_hash_entry *) h;
16263
16264 info = (struct bfd_link_info *) inf;
16265 htab = elf32_arm_hash_table (info);
16266 if (htab == NULL)
16267 return FALSE;
16268
16269 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16270 && h->plt.refcount > 0)
16271 {
16272 /* Make sure this symbol is output as a dynamic symbol.
16273 Undefined weak syms won't yet be marked as dynamic. */
16274 if (h->dynindx == -1 && !h->forced_local
16275 && h->root.type == bfd_link_hash_undefweak)
16276 {
16277 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16278 return FALSE;
16279 }
16280
16281 /* If the call in the PLT entry binds locally, the associated
16282 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16283 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16284 than the .plt section. */
16285 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16286 {
16287 eh->is_iplt = 1;
16288 if (eh->plt.noncall_refcount == 0
16289 && SYMBOL_REFERENCES_LOCAL (info, h))
16290 /* All non-call references can be resolved directly.
16291 This means that they can (and in some cases, must)
16292 resolve directly to the run-time target, rather than
16293 to the PLT. That in turns means that any .got entry
16294 would be equal to the .igot.plt entry, so there's
16295 no point having both. */
16296 h->got.refcount = 0;
16297 }
16298
16299 if (bfd_link_pic (info)
16300 || eh->is_iplt
16301 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16302 {
16303 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16304
16305 /* If this symbol is not defined in a regular file, and we are
16306 not generating a shared library, then set the symbol to this
16307 location in the .plt. This is required to make function
16308 pointers compare as equal between the normal executable and
16309 the shared library. */
16310 if (! bfd_link_pic (info)
16311 && !h->def_regular)
16312 {
16313 h->root.u.def.section = htab->root.splt;
16314 h->root.u.def.value = h->plt.offset;
16315
16316 /* Make sure the function is not marked as Thumb, in case
16317 it is the target of an ABS32 relocation, which will
16318 point to the PLT entry. */
16319 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16320 }
16321
16322 /* VxWorks executables have a second set of relocations for
16323 each PLT entry. They go in a separate relocation section,
16324 which is processed by the kernel loader. */
16325 if (htab->vxworks_p && !bfd_link_pic (info))
16326 {
16327 /* There is a relocation for the initial PLT entry:
16328 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16329 if (h->plt.offset == htab->plt_header_size)
16330 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16331
16332 /* There are two extra relocations for each subsequent
16333 PLT entry: an R_ARM_32 relocation for the GOT entry,
16334 and an R_ARM_32 relocation for the PLT entry. */
16335 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16336 }
16337 }
16338 else
16339 {
16340 h->plt.offset = (bfd_vma) -1;
16341 h->needs_plt = 0;
16342 }
16343 }
16344 else
16345 {
16346 h->plt.offset = (bfd_vma) -1;
16347 h->needs_plt = 0;
16348 }
16349
16350 eh = (struct elf32_arm_link_hash_entry *) h;
16351 eh->tlsdesc_got = (bfd_vma) -1;
16352
16353 if (h->got.refcount > 0)
16354 {
16355 asection *s;
16356 bfd_boolean dyn;
16357 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16358 int indx;
16359
16360 /* Make sure this symbol is output as a dynamic symbol.
16361 Undefined weak syms won't yet be marked as dynamic. */
16362 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16363 && h->root.type == bfd_link_hash_undefweak)
16364 {
16365 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16366 return FALSE;
16367 }
16368
16369 if (!htab->symbian_p)
16370 {
16371 s = htab->root.sgot;
16372 h->got.offset = s->size;
16373
16374 if (tls_type == GOT_UNKNOWN)
16375 abort ();
16376
16377 if (tls_type == GOT_NORMAL)
16378 /* Non-TLS symbols need one GOT slot. */
16379 s->size += 4;
16380 else
16381 {
16382 if (tls_type & GOT_TLS_GDESC)
16383 {
16384 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16385 eh->tlsdesc_got
16386 = (htab->root.sgotplt->size
16387 - elf32_arm_compute_jump_table_size (htab));
16388 htab->root.sgotplt->size += 8;
16389 h->got.offset = (bfd_vma) -2;
16390 /* plt.got_offset needs to know there's a TLS_DESC
16391 reloc in the middle of .got.plt. */
16392 htab->num_tls_desc++;
16393 }
16394
16395 if (tls_type & GOT_TLS_GD)
16396 {
16397 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16398 consecutive GOT slots. If the symbol is both GD
16399 and GDESC, got.offset may have been
16400 overwritten. */
16401 h->got.offset = s->size;
16402 s->size += 8;
16403 }
16404
16405 if (tls_type & GOT_TLS_IE)
16406 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16407 slot. */
16408 s->size += 4;
16409 }
16410
16411 dyn = htab->root.dynamic_sections_created;
16412
16413 indx = 0;
16414 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16415 bfd_link_pic (info),
16416 h)
16417 && (!bfd_link_pic (info)
16418 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16419 indx = h->dynindx;
16420
16421 if (tls_type != GOT_NORMAL
16422 && (bfd_link_dll (info) || indx != 0)
16423 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16424 || h->root.type != bfd_link_hash_undefweak))
16425 {
16426 if (tls_type & GOT_TLS_IE)
16427 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16428
16429 if (tls_type & GOT_TLS_GD)
16430 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16431
16432 if (tls_type & GOT_TLS_GDESC)
16433 {
16434 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16435 /* GDESC needs a trampoline to jump to. */
16436 htab->tls_trampoline = -1;
16437 }
16438
16439 /* Only GD needs it. GDESC just emits one relocation per
16440 2 entries. */
16441 if ((tls_type & GOT_TLS_GD) && indx != 0)
16442 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16443 }
16444 else if (((indx != -1) || htab->fdpic_p)
16445 && !SYMBOL_REFERENCES_LOCAL (info, h))
16446 {
16447 if (htab->root.dynamic_sections_created)
16448 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16449 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16450 }
16451 else if (h->type == STT_GNU_IFUNC
16452 && eh->plt.noncall_refcount == 0)
16453 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16454 they all resolve dynamically instead. Reserve room for the
16455 GOT entry's R_ARM_IRELATIVE relocation. */
16456 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16457 else if (bfd_link_pic (info)
16458 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16459 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16460 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16461 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16462 /* Reserve room for rofixup for FDPIC executable. */
16463 /* TLS relocs do not need space since they are completely
16464 resolved. */
16465 htab->srofixup->size += 4;
16466 }
16467 }
16468 else
16469 h->got.offset = (bfd_vma) -1;
16470
16471 /* FDPIC support. */
16472 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16473 {
16474 /* Symbol musn't be exported. */
16475 if (h->dynindx != -1)
16476 abort();
16477
16478 /* We only allocate one function descriptor with its associated relocation. */
16479 if (eh->fdpic_cnts.funcdesc_offset == -1)
16480 {
16481 asection *s = htab->root.sgot;
16482
16483 eh->fdpic_cnts.funcdesc_offset = s->size;
16484 s->size += 8;
16485 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16486 if (bfd_link_pic(info))
16487 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16488 else
16489 htab->srofixup->size += 8;
16490 }
16491 }
16492
16493 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16494 {
16495 asection *s = htab->root.sgot;
16496
16497 if (htab->root.dynamic_sections_created && h->dynindx == -1
16498 && !h->forced_local)
16499 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16500 return FALSE;
16501
16502 if (h->dynindx == -1)
16503 {
16504 /* We only allocate one function descriptor with its associated relocation. q */
16505 if (eh->fdpic_cnts.funcdesc_offset == -1)
16506 {
16507
16508 eh->fdpic_cnts.funcdesc_offset = s->size;
16509 s->size += 8;
16510 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16511 if (bfd_link_pic(info))
16512 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16513 else
16514 htab->srofixup->size += 8;
16515 }
16516 }
16517
16518 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16519 R_ARM_RELATIVE/rofixup relocation on it. */
16520 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16521 s->size += 4;
16522 if (h->dynindx == -1 && !bfd_link_pic(info))
16523 htab->srofixup->size += 4;
16524 else
16525 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16526 }
16527
16528 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16529 {
16530 if (htab->root.dynamic_sections_created && h->dynindx == -1
16531 && !h->forced_local)
16532 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16533 return FALSE;
16534
16535 if (h->dynindx == -1)
16536 {
16537 /* We only allocate one function descriptor with its associated relocation. */
16538 if (eh->fdpic_cnts.funcdesc_offset == -1)
16539 {
16540 asection *s = htab->root.sgot;
16541
16542 eh->fdpic_cnts.funcdesc_offset = s->size;
16543 s->size += 8;
16544 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16545 if (bfd_link_pic(info))
16546 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16547 else
16548 htab->srofixup->size += 8;
16549 }
16550 }
16551 if (h->dynindx == -1 && !bfd_link_pic(info))
16552 {
16553 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16554 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16555 }
16556 else
16557 {
16558 /* Will need one dynamic reloc per reference. will be either
16559 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16560 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16561 eh->fdpic_cnts.funcdesc_cnt);
16562 }
16563 }
16564
16565 /* Allocate stubs for exported Thumb functions on v4t. */
16566 if (!htab->use_blx && h->dynindx != -1
16567 && h->def_regular
16568 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16569 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16570 {
16571 struct elf_link_hash_entry * th;
16572 struct bfd_link_hash_entry * bh;
16573 struct elf_link_hash_entry * myh;
16574 char name[1024];
16575 asection *s;
16576 bh = NULL;
16577 /* Create a new symbol to regist the real location of the function. */
16578 s = h->root.u.def.section;
16579 sprintf (name, "__real_%s", h->root.root.string);
16580 _bfd_generic_link_add_one_symbol (info, s->owner,
16581 name, BSF_GLOBAL, s,
16582 h->root.u.def.value,
16583 NULL, TRUE, FALSE, &bh);
16584
16585 myh = (struct elf_link_hash_entry *) bh;
16586 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16587 myh->forced_local = 1;
16588 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16589 eh->export_glue = myh;
16590 th = record_arm_to_thumb_glue (info, h);
16591 /* Point the symbol at the stub. */
16592 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16593 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16594 h->root.u.def.section = th->root.u.def.section;
16595 h->root.u.def.value = th->root.u.def.value & ~1;
16596 }
16597
16598 if (eh->dyn_relocs == NULL)
16599 return TRUE;
16600
16601 /* In the shared -Bsymbolic case, discard space allocated for
16602 dynamic pc-relative relocs against symbols which turn out to be
16603 defined in regular objects. For the normal shared case, discard
16604 space for pc-relative relocs that have become local due to symbol
16605 visibility changes. */
16606
16607 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16608 {
16609 /* Relocs that use pc_count are PC-relative forms, which will appear
16610 on something like ".long foo - ." or "movw REG, foo - .". We want
16611 calls to protected symbols to resolve directly to the function
16612 rather than going via the plt. If people want function pointer
16613 comparisons to work as expected then they should avoid writing
16614 assembly like ".long foo - .". */
16615 if (SYMBOL_CALLS_LOCAL (info, h))
16616 {
16617 struct elf_dyn_relocs **pp;
16618
16619 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16620 {
16621 p->count -= p->pc_count;
16622 p->pc_count = 0;
16623 if (p->count == 0)
16624 *pp = p->next;
16625 else
16626 pp = &p->next;
16627 }
16628 }
16629
16630 if (htab->vxworks_p)
16631 {
16632 struct elf_dyn_relocs **pp;
16633
16634 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16635 {
16636 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16637 *pp = p->next;
16638 else
16639 pp = &p->next;
16640 }
16641 }
16642
16643 /* Also discard relocs on undefined weak syms with non-default
16644 visibility. */
16645 if (eh->dyn_relocs != NULL
16646 && h->root.type == bfd_link_hash_undefweak)
16647 {
16648 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16649 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16650 eh->dyn_relocs = NULL;
16651
16652 /* Make sure undefined weak symbols are output as a dynamic
16653 symbol in PIEs. */
16654 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16655 && !h->forced_local)
16656 {
16657 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16658 return FALSE;
16659 }
16660 }
16661
16662 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16663 && h->root.type == bfd_link_hash_new)
16664 {
16665 /* Output absolute symbols so that we can create relocations
16666 against them. For normal symbols we output a relocation
16667 against the section that contains them. */
16668 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16669 return FALSE;
16670 }
16671
16672 }
16673 else
16674 {
16675 /* For the non-shared case, discard space for relocs against
16676 symbols which turn out to need copy relocs or are not
16677 dynamic. */
16678
16679 if (!h->non_got_ref
16680 && ((h->def_dynamic
16681 && !h->def_regular)
16682 || (htab->root.dynamic_sections_created
16683 && (h->root.type == bfd_link_hash_undefweak
16684 || h->root.type == bfd_link_hash_undefined))))
16685 {
16686 /* Make sure this symbol is output as a dynamic symbol.
16687 Undefined weak syms won't yet be marked as dynamic. */
16688 if (h->dynindx == -1 && !h->forced_local
16689 && h->root.type == bfd_link_hash_undefweak)
16690 {
16691 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16692 return FALSE;
16693 }
16694
16695 /* If that succeeded, we know we'll be keeping all the
16696 relocs. */
16697 if (h->dynindx != -1)
16698 goto keep;
16699 }
16700
16701 eh->dyn_relocs = NULL;
16702
16703 keep: ;
16704 }
16705
16706 /* Finally, allocate space. */
16707 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16708 {
16709 asection *sreloc = elf_section_data (p->sec)->sreloc;
16710
16711 if (h->type == STT_GNU_IFUNC
16712 && eh->plt.noncall_refcount == 0
16713 && SYMBOL_REFERENCES_LOCAL (info, h))
16714 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16715 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16716 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16717 else if (htab->fdpic_p && !bfd_link_pic(info))
16718 htab->srofixup->size += 4 * p->count;
16719 else
16720 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16721 }
16722
16723 return TRUE;
16724 }
16725
16726 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16727 read-only sections. */
16728
16729 static bfd_boolean
16730 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16731 {
16732 asection *sec;
16733
16734 if (h->root.type == bfd_link_hash_indirect)
16735 return TRUE;
16736
16737 sec = readonly_dynrelocs (h);
16738 if (sec != NULL)
16739 {
16740 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16741
16742 info->flags |= DF_TEXTREL;
16743 info->callbacks->minfo
16744 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16745 sec->owner, h->root.root.string, sec);
16746
16747 /* Not an error, just cut short the traversal. */
16748 return FALSE;
16749 }
16750
16751 return TRUE;
16752 }
16753
16754 void
16755 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16756 int byteswap_code)
16757 {
16758 struct elf32_arm_link_hash_table *globals;
16759
16760 globals = elf32_arm_hash_table (info);
16761 if (globals == NULL)
16762 return;
16763
16764 globals->byteswap_code = byteswap_code;
16765 }
16766
16767 /* Set the sizes of the dynamic sections. */
16768
16769 static bfd_boolean
16770 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16771 struct bfd_link_info * info)
16772 {
16773 bfd * dynobj;
16774 asection * s;
16775 bfd_boolean plt;
16776 bfd_boolean relocs;
16777 bfd *ibfd;
16778 struct elf32_arm_link_hash_table *htab;
16779
16780 htab = elf32_arm_hash_table (info);
16781 if (htab == NULL)
16782 return FALSE;
16783
16784 dynobj = elf_hash_table (info)->dynobj;
16785 BFD_ASSERT (dynobj != NULL);
16786 check_use_blx (htab);
16787
16788 if (elf_hash_table (info)->dynamic_sections_created)
16789 {
16790 /* Set the contents of the .interp section to the interpreter. */
16791 if (bfd_link_executable (info) && !info->nointerp)
16792 {
16793 s = bfd_get_linker_section (dynobj, ".interp");
16794 BFD_ASSERT (s != NULL);
16795 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16796 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16797 }
16798 }
16799
16800 /* Set up .got offsets for local syms, and space for local dynamic
16801 relocs. */
16802 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16803 {
16804 bfd_signed_vma *local_got;
16805 bfd_signed_vma *end_local_got;
16806 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16807 char *local_tls_type;
16808 bfd_vma *local_tlsdesc_gotent;
16809 bfd_size_type locsymcount;
16810 Elf_Internal_Shdr *symtab_hdr;
16811 asection *srel;
16812 bfd_boolean is_vxworks = htab->vxworks_p;
16813 unsigned int symndx;
16814 struct fdpic_local *local_fdpic_cnts;
16815
16816 if (! is_arm_elf (ibfd))
16817 continue;
16818
16819 for (s = ibfd->sections; s != NULL; s = s->next)
16820 {
16821 struct elf_dyn_relocs *p;
16822
16823 for (p = (struct elf_dyn_relocs *)
16824 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16825 {
16826 if (!bfd_is_abs_section (p->sec)
16827 && bfd_is_abs_section (p->sec->output_section))
16828 {
16829 /* Input section has been discarded, either because
16830 it is a copy of a linkonce section or due to
16831 linker script /DISCARD/, so we'll be discarding
16832 the relocs too. */
16833 }
16834 else if (is_vxworks
16835 && strcmp (p->sec->output_section->name,
16836 ".tls_vars") == 0)
16837 {
16838 /* Relocations in vxworks .tls_vars sections are
16839 handled specially by the loader. */
16840 }
16841 else if (p->count != 0)
16842 {
16843 srel = elf_section_data (p->sec)->sreloc;
16844 if (htab->fdpic_p && !bfd_link_pic(info))
16845 htab->srofixup->size += 4 * p->count;
16846 else
16847 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16848 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16849 info->flags |= DF_TEXTREL;
16850 }
16851 }
16852 }
16853
16854 local_got = elf_local_got_refcounts (ibfd);
16855 if (!local_got)
16856 continue;
16857
16858 symtab_hdr = & elf_symtab_hdr (ibfd);
16859 locsymcount = symtab_hdr->sh_info;
16860 end_local_got = local_got + locsymcount;
16861 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16862 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16863 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16864 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16865 symndx = 0;
16866 s = htab->root.sgot;
16867 srel = htab->root.srelgot;
16868 for (; local_got < end_local_got;
16869 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16870 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16871 {
16872 *local_tlsdesc_gotent = (bfd_vma) -1;
16873 local_iplt = *local_iplt_ptr;
16874
16875 /* FDPIC support. */
16876 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16877 {
16878 if (local_fdpic_cnts->funcdesc_offset == -1)
16879 {
16880 local_fdpic_cnts->funcdesc_offset = s->size;
16881 s->size += 8;
16882
16883 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16884 if (bfd_link_pic(info))
16885 elf32_arm_allocate_dynrelocs (info, srel, 1);
16886 else
16887 htab->srofixup->size += 8;
16888 }
16889 }
16890
16891 if (local_fdpic_cnts->funcdesc_cnt > 0)
16892 {
16893 if (local_fdpic_cnts->funcdesc_offset == -1)
16894 {
16895 local_fdpic_cnts->funcdesc_offset = s->size;
16896 s->size += 8;
16897
16898 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16899 if (bfd_link_pic(info))
16900 elf32_arm_allocate_dynrelocs (info, srel, 1);
16901 else
16902 htab->srofixup->size += 8;
16903 }
16904
16905 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16906 if (bfd_link_pic(info))
16907 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16908 else
16909 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16910 }
16911
16912 if (local_iplt != NULL)
16913 {
16914 struct elf_dyn_relocs *p;
16915
16916 if (local_iplt->root.refcount > 0)
16917 {
16918 elf32_arm_allocate_plt_entry (info, TRUE,
16919 &local_iplt->root,
16920 &local_iplt->arm);
16921 if (local_iplt->arm.noncall_refcount == 0)
16922 /* All references to the PLT are calls, so all
16923 non-call references can resolve directly to the
16924 run-time target. This means that the .got entry
16925 would be the same as the .igot.plt entry, so there's
16926 no point creating both. */
16927 *local_got = 0;
16928 }
16929 else
16930 {
16931 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16932 local_iplt->root.offset = (bfd_vma) -1;
16933 }
16934
16935 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16936 {
16937 asection *psrel;
16938
16939 psrel = elf_section_data (p->sec)->sreloc;
16940 if (local_iplt->arm.noncall_refcount == 0)
16941 elf32_arm_allocate_irelocs (info, psrel, p->count);
16942 else
16943 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16944 }
16945 }
16946 if (*local_got > 0)
16947 {
16948 Elf_Internal_Sym *isym;
16949
16950 *local_got = s->size;
16951 if (*local_tls_type & GOT_TLS_GD)
16952 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16953 s->size += 8;
16954 if (*local_tls_type & GOT_TLS_GDESC)
16955 {
16956 *local_tlsdesc_gotent = htab->root.sgotplt->size
16957 - elf32_arm_compute_jump_table_size (htab);
16958 htab->root.sgotplt->size += 8;
16959 *local_got = (bfd_vma) -2;
16960 /* plt.got_offset needs to know there's a TLS_DESC
16961 reloc in the middle of .got.plt. */
16962 htab->num_tls_desc++;
16963 }
16964 if (*local_tls_type & GOT_TLS_IE)
16965 s->size += 4;
16966
16967 if (*local_tls_type & GOT_NORMAL)
16968 {
16969 /* If the symbol is both GD and GDESC, *local_got
16970 may have been overwritten. */
16971 *local_got = s->size;
16972 s->size += 4;
16973 }
16974
16975 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16976 if (isym == NULL)
16977 return FALSE;
16978
16979 /* If all references to an STT_GNU_IFUNC PLT are calls,
16980 then all non-call references, including this GOT entry,
16981 resolve directly to the run-time target. */
16982 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16983 && (local_iplt == NULL
16984 || local_iplt->arm.noncall_refcount == 0))
16985 elf32_arm_allocate_irelocs (info, srel, 1);
16986 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16987 {
16988 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16989 elf32_arm_allocate_dynrelocs (info, srel, 1);
16990 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16991 htab->srofixup->size += 4;
16992
16993 if ((bfd_link_pic (info) || htab->fdpic_p)
16994 && *local_tls_type & GOT_TLS_GDESC)
16995 {
16996 elf32_arm_allocate_dynrelocs (info,
16997 htab->root.srelplt, 1);
16998 htab->tls_trampoline = -1;
16999 }
17000 }
17001 }
17002 else
17003 *local_got = (bfd_vma) -1;
17004 }
17005 }
17006
17007 if (htab->tls_ldm_got.refcount > 0)
17008 {
17009 /* Allocate two GOT entries and one dynamic relocation (if necessary)
17010 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
17011 htab->tls_ldm_got.offset = htab->root.sgot->size;
17012 htab->root.sgot->size += 8;
17013 if (bfd_link_pic (info))
17014 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
17015 }
17016 else
17017 htab->tls_ldm_got.offset = -1;
17018
17019 /* At the very end of the .rofixup section is a pointer to the GOT,
17020 reserve space for it. */
17021 if (htab->fdpic_p && htab->srofixup != NULL)
17022 htab->srofixup->size += 4;
17023
17024 /* Allocate global sym .plt and .got entries, and space for global
17025 sym dynamic relocs. */
17026 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
17027
17028 /* Here we rummage through the found bfds to collect glue information. */
17029 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
17030 {
17031 if (! is_arm_elf (ibfd))
17032 continue;
17033
17034 /* Initialise mapping tables for code/data. */
17035 bfd_elf32_arm_init_maps (ibfd);
17036
17037 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
17038 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
17039 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
17040 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
17041 }
17042
17043 /* Allocate space for the glue sections now that we've sized them. */
17044 bfd_elf32_arm_allocate_interworking_sections (info);
17045
17046 /* For every jump slot reserved in the sgotplt, reloc_count is
17047 incremented. However, when we reserve space for TLS descriptors,
17048 it's not incremented, so in order to compute the space reserved
17049 for them, it suffices to multiply the reloc count by the jump
17050 slot size. */
17051 if (htab->root.srelplt)
17052 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
17053
17054 if (htab->tls_trampoline)
17055 {
17056 if (htab->root.splt->size == 0)
17057 htab->root.splt->size += htab->plt_header_size;
17058
17059 htab->tls_trampoline = htab->root.splt->size;
17060 htab->root.splt->size += htab->plt_entry_size;
17061
17062 /* If we're not using lazy TLS relocations, don't generate the
17063 PLT and GOT entries they require. */
17064 if (!(info->flags & DF_BIND_NOW))
17065 {
17066 htab->dt_tlsdesc_got = htab->root.sgot->size;
17067 htab->root.sgot->size += 4;
17068
17069 htab->dt_tlsdesc_plt = htab->root.splt->size;
17070 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
17071 }
17072 }
17073
17074 /* The check_relocs and adjust_dynamic_symbol entry points have
17075 determined the sizes of the various dynamic sections. Allocate
17076 memory for them. */
17077 plt = FALSE;
17078 relocs = FALSE;
17079 for (s = dynobj->sections; s != NULL; s = s->next)
17080 {
17081 const char * name;
17082
17083 if ((s->flags & SEC_LINKER_CREATED) == 0)
17084 continue;
17085
17086 /* It's OK to base decisions on the section name, because none
17087 of the dynobj section names depend upon the input files. */
17088 name = bfd_section_name (s);
17089
17090 if (s == htab->root.splt)
17091 {
17092 /* Remember whether there is a PLT. */
17093 plt = s->size != 0;
17094 }
17095 else if (CONST_STRNEQ (name, ".rel"))
17096 {
17097 if (s->size != 0)
17098 {
17099 /* Remember whether there are any reloc sections other
17100 than .rel(a).plt and .rela.plt.unloaded. */
17101 if (s != htab->root.srelplt && s != htab->srelplt2)
17102 relocs = TRUE;
17103
17104 /* We use the reloc_count field as a counter if we need
17105 to copy relocs into the output file. */
17106 s->reloc_count = 0;
17107 }
17108 }
17109 else if (s != htab->root.sgot
17110 && s != htab->root.sgotplt
17111 && s != htab->root.iplt
17112 && s != htab->root.igotplt
17113 && s != htab->root.sdynbss
17114 && s != htab->root.sdynrelro
17115 && s != htab->srofixup)
17116 {
17117 /* It's not one of our sections, so don't allocate space. */
17118 continue;
17119 }
17120
17121 if (s->size == 0)
17122 {
17123 /* If we don't need this section, strip it from the
17124 output file. This is mostly to handle .rel(a).bss and
17125 .rel(a).plt. We must create both sections in
17126 create_dynamic_sections, because they must be created
17127 before the linker maps input sections to output
17128 sections. The linker does that before
17129 adjust_dynamic_symbol is called, and it is that
17130 function which decides whether anything needs to go
17131 into these sections. */
17132 s->flags |= SEC_EXCLUDE;
17133 continue;
17134 }
17135
17136 if ((s->flags & SEC_HAS_CONTENTS) == 0)
17137 continue;
17138
17139 /* Allocate memory for the section contents. */
17140 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17141 if (s->contents == NULL)
17142 return FALSE;
17143 }
17144
17145 if (elf_hash_table (info)->dynamic_sections_created)
17146 {
17147 /* Add some entries to the .dynamic section. We fill in the
17148 values later, in elf32_arm_finish_dynamic_sections, but we
17149 must add the entries now so that we get the correct size for
17150 the .dynamic section. The DT_DEBUG entry is filled in by the
17151 dynamic linker and used by the debugger. */
17152 #define add_dynamic_entry(TAG, VAL) \
17153 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17154
17155 if (bfd_link_executable (info))
17156 {
17157 if (!add_dynamic_entry (DT_DEBUG, 0))
17158 return FALSE;
17159 }
17160
17161 if (plt)
17162 {
17163 if ( !add_dynamic_entry (DT_PLTGOT, 0)
17164 || !add_dynamic_entry (DT_PLTRELSZ, 0)
17165 || !add_dynamic_entry (DT_PLTREL,
17166 htab->use_rel ? DT_REL : DT_RELA)
17167 || !add_dynamic_entry (DT_JMPREL, 0))
17168 return FALSE;
17169
17170 if (htab->dt_tlsdesc_plt
17171 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
17172 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
17173 return FALSE;
17174 }
17175
17176 if (relocs)
17177 {
17178 if (htab->use_rel)
17179 {
17180 if (!add_dynamic_entry (DT_REL, 0)
17181 || !add_dynamic_entry (DT_RELSZ, 0)
17182 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
17183 return FALSE;
17184 }
17185 else
17186 {
17187 if (!add_dynamic_entry (DT_RELA, 0)
17188 || !add_dynamic_entry (DT_RELASZ, 0)
17189 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
17190 return FALSE;
17191 }
17192 }
17193
17194 /* If any dynamic relocs apply to a read-only section,
17195 then we need a DT_TEXTREL entry. */
17196 if ((info->flags & DF_TEXTREL) == 0)
17197 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
17198
17199 if ((info->flags & DF_TEXTREL) != 0)
17200 {
17201 if (!add_dynamic_entry (DT_TEXTREL, 0))
17202 return FALSE;
17203 }
17204 if (htab->vxworks_p
17205 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
17206 return FALSE;
17207 }
17208 #undef add_dynamic_entry
17209
17210 return TRUE;
17211 }
17212
17213 /* Size sections even though they're not dynamic. We use it to setup
17214 _TLS_MODULE_BASE_, if needed. */
17215
17216 static bfd_boolean
17217 elf32_arm_always_size_sections (bfd *output_bfd,
17218 struct bfd_link_info *info)
17219 {
17220 asection *tls_sec;
17221 struct elf32_arm_link_hash_table *htab;
17222
17223 htab = elf32_arm_hash_table (info);
17224
17225 if (bfd_link_relocatable (info))
17226 return TRUE;
17227
17228 tls_sec = elf_hash_table (info)->tls_sec;
17229
17230 if (tls_sec)
17231 {
17232 struct elf_link_hash_entry *tlsbase;
17233
17234 tlsbase = elf_link_hash_lookup
17235 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
17236
17237 if (tlsbase)
17238 {
17239 struct bfd_link_hash_entry *bh = NULL;
17240 const struct elf_backend_data *bed
17241 = get_elf_backend_data (output_bfd);
17242
17243 if (!(_bfd_generic_link_add_one_symbol
17244 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17245 tls_sec, 0, NULL, FALSE,
17246 bed->collect, &bh)))
17247 return FALSE;
17248
17249 tlsbase->type = STT_TLS;
17250 tlsbase = (struct elf_link_hash_entry *)bh;
17251 tlsbase->def_regular = 1;
17252 tlsbase->other = STV_HIDDEN;
17253 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
17254 }
17255 }
17256
17257 if (htab->fdpic_p && !bfd_link_relocatable (info)
17258 && !bfd_elf_stack_segment_size (output_bfd, info,
17259 "__stacksize", DEFAULT_STACK_SIZE))
17260 return FALSE;
17261
17262 return TRUE;
17263 }
17264
17265 /* Finish up dynamic symbol handling. We set the contents of various
17266 dynamic sections here. */
17267
17268 static bfd_boolean
17269 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17270 struct bfd_link_info * info,
17271 struct elf_link_hash_entry * h,
17272 Elf_Internal_Sym * sym)
17273 {
17274 struct elf32_arm_link_hash_table *htab;
17275 struct elf32_arm_link_hash_entry *eh;
17276
17277 htab = elf32_arm_hash_table (info);
17278 if (htab == NULL)
17279 return FALSE;
17280
17281 eh = (struct elf32_arm_link_hash_entry *) h;
17282
17283 if (h->plt.offset != (bfd_vma) -1)
17284 {
17285 if (!eh->is_iplt)
17286 {
17287 BFD_ASSERT (h->dynindx != -1);
17288 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17289 h->dynindx, 0))
17290 return FALSE;
17291 }
17292
17293 if (!h->def_regular)
17294 {
17295 /* Mark the symbol as undefined, rather than as defined in
17296 the .plt section. */
17297 sym->st_shndx = SHN_UNDEF;
17298 /* If the symbol is weak we need to clear the value.
17299 Otherwise, the PLT entry would provide a definition for
17300 the symbol even if the symbol wasn't defined anywhere,
17301 and so the symbol would never be NULL. Leave the value if
17302 there were any relocations where pointer equality matters
17303 (this is a clue for the dynamic linker, to make function
17304 pointer comparisons work between an application and shared
17305 library). */
17306 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17307 sym->st_value = 0;
17308 }
17309 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17310 {
17311 /* At least one non-call relocation references this .iplt entry,
17312 so the .iplt entry is the function's canonical address. */
17313 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17314 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17315 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17316 (output_bfd, htab->root.iplt->output_section));
17317 sym->st_value = (h->plt.offset
17318 + htab->root.iplt->output_section->vma
17319 + htab->root.iplt->output_offset);
17320 }
17321 }
17322
17323 if (h->needs_copy)
17324 {
17325 asection * s;
17326 Elf_Internal_Rela rel;
17327
17328 /* This symbol needs a copy reloc. Set it up. */
17329 BFD_ASSERT (h->dynindx != -1
17330 && (h->root.type == bfd_link_hash_defined
17331 || h->root.type == bfd_link_hash_defweak));
17332
17333 rel.r_addend = 0;
17334 rel.r_offset = (h->root.u.def.value
17335 + h->root.u.def.section->output_section->vma
17336 + h->root.u.def.section->output_offset);
17337 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17338 if (h->root.u.def.section == htab->root.sdynrelro)
17339 s = htab->root.sreldynrelro;
17340 else
17341 s = htab->root.srelbss;
17342 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17343 }
17344
17345 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17346 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17347 it is relative to the ".got" section. */
17348 if (h == htab->root.hdynamic
17349 || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot))
17350 sym->st_shndx = SHN_ABS;
17351
17352 return TRUE;
17353 }
17354
17355 static void
17356 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17357 void *contents,
17358 const unsigned long *template, unsigned count)
17359 {
17360 unsigned ix;
17361
17362 for (ix = 0; ix != count; ix++)
17363 {
17364 unsigned long insn = template[ix];
17365
17366 /* Emit mov pc,rx if bx is not permitted. */
17367 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17368 insn = (insn & 0xf000000f) | 0x01a0f000;
17369 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17370 }
17371 }
17372
17373 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17374 other variants, NaCl needs this entry in a static executable's
17375 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17376 zero. For .iplt really only the last bundle is useful, and .iplt
17377 could have a shorter first entry, with each individual PLT entry's
17378 relative branch calculated differently so it targets the last
17379 bundle instead of the instruction before it (labelled .Lplt_tail
17380 above). But it's simpler to keep the size and layout of PLT0
17381 consistent with the dynamic case, at the cost of some dead code at
17382 the start of .iplt and the one dead store to the stack at the start
17383 of .Lplt_tail. */
17384 static void
17385 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17386 asection *plt, bfd_vma got_displacement)
17387 {
17388 unsigned int i;
17389
17390 put_arm_insn (htab, output_bfd,
17391 elf32_arm_nacl_plt0_entry[0]
17392 | arm_movw_immediate (got_displacement),
17393 plt->contents + 0);
17394 put_arm_insn (htab, output_bfd,
17395 elf32_arm_nacl_plt0_entry[1]
17396 | arm_movt_immediate (got_displacement),
17397 plt->contents + 4);
17398
17399 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17400 put_arm_insn (htab, output_bfd,
17401 elf32_arm_nacl_plt0_entry[i],
17402 plt->contents + (i * 4));
17403 }
17404
17405 /* Finish up the dynamic sections. */
17406
17407 static bfd_boolean
17408 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17409 {
17410 bfd * dynobj;
17411 asection * sgot;
17412 asection * sdyn;
17413 struct elf32_arm_link_hash_table *htab;
17414
17415 htab = elf32_arm_hash_table (info);
17416 if (htab == NULL)
17417 return FALSE;
17418
17419 dynobj = elf_hash_table (info)->dynobj;
17420
17421 sgot = htab->root.sgotplt;
17422 /* A broken linker script might have discarded the dynamic sections.
17423 Catch this here so that we do not seg-fault later on. */
17424 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17425 return FALSE;
17426 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17427
17428 if (elf_hash_table (info)->dynamic_sections_created)
17429 {
17430 asection *splt;
17431 Elf32_External_Dyn *dyncon, *dynconend;
17432
17433 splt = htab->root.splt;
17434 BFD_ASSERT (splt != NULL && sdyn != NULL);
17435 BFD_ASSERT (htab->symbian_p || sgot != NULL);
17436
17437 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17438 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17439
17440 for (; dyncon < dynconend; dyncon++)
17441 {
17442 Elf_Internal_Dyn dyn;
17443 const char * name;
17444 asection * s;
17445
17446 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17447
17448 switch (dyn.d_tag)
17449 {
17450 unsigned int type;
17451
17452 default:
17453 if (htab->vxworks_p
17454 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17455 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17456 break;
17457
17458 case DT_HASH:
17459 name = ".hash";
17460 goto get_vma_if_bpabi;
17461 case DT_STRTAB:
17462 name = ".dynstr";
17463 goto get_vma_if_bpabi;
17464 case DT_SYMTAB:
17465 name = ".dynsym";
17466 goto get_vma_if_bpabi;
17467 case DT_VERSYM:
17468 name = ".gnu.version";
17469 goto get_vma_if_bpabi;
17470 case DT_VERDEF:
17471 name = ".gnu.version_d";
17472 goto get_vma_if_bpabi;
17473 case DT_VERNEED:
17474 name = ".gnu.version_r";
17475 goto get_vma_if_bpabi;
17476
17477 case DT_PLTGOT:
17478 name = htab->symbian_p ? ".got" : ".got.plt";
17479 goto get_vma;
17480 case DT_JMPREL:
17481 name = RELOC_SECTION (htab, ".plt");
17482 get_vma:
17483 s = bfd_get_linker_section (dynobj, name);
17484 if (s == NULL)
17485 {
17486 _bfd_error_handler
17487 (_("could not find section %s"), name);
17488 bfd_set_error (bfd_error_invalid_operation);
17489 return FALSE;
17490 }
17491 if (!htab->symbian_p)
17492 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17493 else
17494 /* In the BPABI, tags in the PT_DYNAMIC section point
17495 at the file offset, not the memory address, for the
17496 convenience of the post linker. */
17497 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17498 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17499 break;
17500
17501 get_vma_if_bpabi:
17502 if (htab->symbian_p)
17503 goto get_vma;
17504 break;
17505
17506 case DT_PLTRELSZ:
17507 s = htab->root.srelplt;
17508 BFD_ASSERT (s != NULL);
17509 dyn.d_un.d_val = s->size;
17510 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17511 break;
17512
17513 case DT_RELSZ:
17514 case DT_RELASZ:
17515 case DT_REL:
17516 case DT_RELA:
17517 /* In the BPABI, the DT_REL tag must point at the file
17518 offset, not the VMA, of the first relocation
17519 section. So, we use code similar to that in
17520 elflink.c, but do not check for SHF_ALLOC on the
17521 relocation section, since relocation sections are
17522 never allocated under the BPABI. PLT relocs are also
17523 included. */
17524 if (htab->symbian_p)
17525 {
17526 unsigned int i;
17527 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17528 ? SHT_REL : SHT_RELA);
17529 dyn.d_un.d_val = 0;
17530 for (i = 1; i < elf_numsections (output_bfd); i++)
17531 {
17532 Elf_Internal_Shdr *hdr
17533 = elf_elfsections (output_bfd)[i];
17534 if (hdr->sh_type == type)
17535 {
17536 if (dyn.d_tag == DT_RELSZ
17537 || dyn.d_tag == DT_RELASZ)
17538 dyn.d_un.d_val += hdr->sh_size;
17539 else if ((ufile_ptr) hdr->sh_offset
17540 <= dyn.d_un.d_val - 1)
17541 dyn.d_un.d_val = hdr->sh_offset;
17542 }
17543 }
17544 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17545 }
17546 break;
17547
17548 case DT_TLSDESC_PLT:
17549 s = htab->root.splt;
17550 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17551 + htab->dt_tlsdesc_plt);
17552 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17553 break;
17554
17555 case DT_TLSDESC_GOT:
17556 s = htab->root.sgot;
17557 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17558 + htab->dt_tlsdesc_got);
17559 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17560 break;
17561
17562 /* Set the bottom bit of DT_INIT/FINI if the
17563 corresponding function is Thumb. */
17564 case DT_INIT:
17565 name = info->init_function;
17566 goto get_sym;
17567 case DT_FINI:
17568 name = info->fini_function;
17569 get_sym:
17570 /* If it wasn't set by elf_bfd_final_link
17571 then there is nothing to adjust. */
17572 if (dyn.d_un.d_val != 0)
17573 {
17574 struct elf_link_hash_entry * eh;
17575
17576 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17577 FALSE, FALSE, TRUE);
17578 if (eh != NULL
17579 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17580 == ST_BRANCH_TO_THUMB)
17581 {
17582 dyn.d_un.d_val |= 1;
17583 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17584 }
17585 }
17586 break;
17587 }
17588 }
17589
17590 /* Fill in the first entry in the procedure linkage table. */
17591 if (splt->size > 0 && htab->plt_header_size)
17592 {
17593 const bfd_vma *plt0_entry;
17594 bfd_vma got_address, plt_address, got_displacement;
17595
17596 /* Calculate the addresses of the GOT and PLT. */
17597 got_address = sgot->output_section->vma + sgot->output_offset;
17598 plt_address = splt->output_section->vma + splt->output_offset;
17599
17600 if (htab->vxworks_p)
17601 {
17602 /* The VxWorks GOT is relocated by the dynamic linker.
17603 Therefore, we must emit relocations rather than simply
17604 computing the values now. */
17605 Elf_Internal_Rela rel;
17606
17607 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17608 put_arm_insn (htab, output_bfd, plt0_entry[0],
17609 splt->contents + 0);
17610 put_arm_insn (htab, output_bfd, plt0_entry[1],
17611 splt->contents + 4);
17612 put_arm_insn (htab, output_bfd, plt0_entry[2],
17613 splt->contents + 8);
17614 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17615
17616 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17617 rel.r_offset = plt_address + 12;
17618 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17619 rel.r_addend = 0;
17620 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17621 htab->srelplt2->contents);
17622 }
17623 else if (htab->nacl_p)
17624 arm_nacl_put_plt0 (htab, output_bfd, splt,
17625 got_address + 8 - (plt_address + 16));
17626 else if (using_thumb_only (htab))
17627 {
17628 got_displacement = got_address - (plt_address + 12);
17629
17630 plt0_entry = elf32_thumb2_plt0_entry;
17631 put_arm_insn (htab, output_bfd, plt0_entry[0],
17632 splt->contents + 0);
17633 put_arm_insn (htab, output_bfd, plt0_entry[1],
17634 splt->contents + 4);
17635 put_arm_insn (htab, output_bfd, plt0_entry[2],
17636 splt->contents + 8);
17637
17638 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17639 }
17640 else
17641 {
17642 got_displacement = got_address - (plt_address + 16);
17643
17644 plt0_entry = elf32_arm_plt0_entry;
17645 put_arm_insn (htab, output_bfd, plt0_entry[0],
17646 splt->contents + 0);
17647 put_arm_insn (htab, output_bfd, plt0_entry[1],
17648 splt->contents + 4);
17649 put_arm_insn (htab, output_bfd, plt0_entry[2],
17650 splt->contents + 8);
17651 put_arm_insn (htab, output_bfd, plt0_entry[3],
17652 splt->contents + 12);
17653
17654 #ifdef FOUR_WORD_PLT
17655 /* The displacement value goes in the otherwise-unused
17656 last word of the second entry. */
17657 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17658 #else
17659 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17660 #endif
17661 }
17662 }
17663
17664 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17665 really seem like the right value. */
17666 if (splt->output_section->owner == output_bfd)
17667 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17668
17669 if (htab->dt_tlsdesc_plt)
17670 {
17671 bfd_vma got_address
17672 = sgot->output_section->vma + sgot->output_offset;
17673 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17674 + htab->root.sgot->output_offset);
17675 bfd_vma plt_address
17676 = splt->output_section->vma + splt->output_offset;
17677
17678 arm_put_trampoline (htab, output_bfd,
17679 splt->contents + htab->dt_tlsdesc_plt,
17680 dl_tlsdesc_lazy_trampoline, 6);
17681
17682 bfd_put_32 (output_bfd,
17683 gotplt_address + htab->dt_tlsdesc_got
17684 - (plt_address + htab->dt_tlsdesc_plt)
17685 - dl_tlsdesc_lazy_trampoline[6],
17686 splt->contents + htab->dt_tlsdesc_plt + 24);
17687 bfd_put_32 (output_bfd,
17688 got_address - (plt_address + htab->dt_tlsdesc_plt)
17689 - dl_tlsdesc_lazy_trampoline[7],
17690 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17691 }
17692
17693 if (htab->tls_trampoline)
17694 {
17695 arm_put_trampoline (htab, output_bfd,
17696 splt->contents + htab->tls_trampoline,
17697 tls_trampoline, 3);
17698 #ifdef FOUR_WORD_PLT
17699 bfd_put_32 (output_bfd, 0x00000000,
17700 splt->contents + htab->tls_trampoline + 12);
17701 #endif
17702 }
17703
17704 if (htab->vxworks_p
17705 && !bfd_link_pic (info)
17706 && htab->root.splt->size > 0)
17707 {
17708 /* Correct the .rel(a).plt.unloaded relocations. They will have
17709 incorrect symbol indexes. */
17710 int num_plts;
17711 unsigned char *p;
17712
17713 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17714 / htab->plt_entry_size);
17715 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17716
17717 for (; num_plts; num_plts--)
17718 {
17719 Elf_Internal_Rela rel;
17720
17721 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17722 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17723 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17724 p += RELOC_SIZE (htab);
17725
17726 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17727 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17728 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17729 p += RELOC_SIZE (htab);
17730 }
17731 }
17732 }
17733
17734 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17735 /* NaCl uses a special first entry in .iplt too. */
17736 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17737
17738 /* Fill in the first three entries in the global offset table. */
17739 if (sgot)
17740 {
17741 if (sgot->size > 0)
17742 {
17743 if (sdyn == NULL)
17744 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17745 else
17746 bfd_put_32 (output_bfd,
17747 sdyn->output_section->vma + sdyn->output_offset,
17748 sgot->contents);
17749 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17750 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17751 }
17752
17753 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17754 }
17755
17756 /* At the very end of the .rofixup section is a pointer to the GOT. */
17757 if (htab->fdpic_p && htab->srofixup != NULL)
17758 {
17759 struct elf_link_hash_entry *hgot = htab->root.hgot;
17760
17761 bfd_vma got_value = hgot->root.u.def.value
17762 + hgot->root.u.def.section->output_section->vma
17763 + hgot->root.u.def.section->output_offset;
17764
17765 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17766
17767 /* Make sure we allocated and generated the same number of fixups. */
17768 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17769 }
17770
17771 return TRUE;
17772 }
17773
17774 static bfd_boolean
17775 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17776 {
17777 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17778 struct elf32_arm_link_hash_table *globals;
17779 struct elf_segment_map *m;
17780
17781 if (!_bfd_elf_init_file_header (abfd, link_info))
17782 return FALSE;
17783
17784 i_ehdrp = elf_elfheader (abfd);
17785
17786 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17787 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17788 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17789
17790 if (link_info)
17791 {
17792 globals = elf32_arm_hash_table (link_info);
17793 if (globals != NULL && globals->byteswap_code)
17794 i_ehdrp->e_flags |= EF_ARM_BE8;
17795
17796 if (globals->fdpic_p)
17797 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17798 }
17799
17800 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17801 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17802 {
17803 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17804 if (abi == AEABI_VFP_args_vfp)
17805 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17806 else
17807 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17808 }
17809
17810 /* Scan segment to set p_flags attribute if it contains only sections with
17811 SHF_ARM_PURECODE flag. */
17812 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17813 {
17814 unsigned int j;
17815
17816 if (m->count == 0)
17817 continue;
17818 for (j = 0; j < m->count; j++)
17819 {
17820 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17821 break;
17822 }
17823 if (j == m->count)
17824 {
17825 m->p_flags = PF_X;
17826 m->p_flags_valid = 1;
17827 }
17828 }
17829 return TRUE;
17830 }
17831
17832 static enum elf_reloc_type_class
17833 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17834 const asection *rel_sec ATTRIBUTE_UNUSED,
17835 const Elf_Internal_Rela *rela)
17836 {
17837 switch ((int) ELF32_R_TYPE (rela->r_info))
17838 {
17839 case R_ARM_RELATIVE:
17840 return reloc_class_relative;
17841 case R_ARM_JUMP_SLOT:
17842 return reloc_class_plt;
17843 case R_ARM_COPY:
17844 return reloc_class_copy;
17845 case R_ARM_IRELATIVE:
17846 return reloc_class_ifunc;
17847 default:
17848 return reloc_class_normal;
17849 }
17850 }
17851
17852 static void
17853 arm_final_write_processing (bfd *abfd)
17854 {
17855 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17856 }
17857
17858 static bfd_boolean
17859 elf32_arm_final_write_processing (bfd *abfd)
17860 {
17861 arm_final_write_processing (abfd);
17862 return _bfd_elf_final_write_processing (abfd);
17863 }
17864
17865 /* Return TRUE if this is an unwinding table entry. */
17866
17867 static bfd_boolean
17868 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17869 {
17870 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17871 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17872 }
17873
17874
17875 /* Set the type and flags for an ARM section. We do this by
17876 the section name, which is a hack, but ought to work. */
17877
17878 static bfd_boolean
17879 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17880 {
17881 const char * name;
17882
17883 name = bfd_section_name (sec);
17884
17885 if (is_arm_elf_unwind_section_name (abfd, name))
17886 {
17887 hdr->sh_type = SHT_ARM_EXIDX;
17888 hdr->sh_flags |= SHF_LINK_ORDER;
17889 }
17890
17891 if (sec->flags & SEC_ELF_PURECODE)
17892 hdr->sh_flags |= SHF_ARM_PURECODE;
17893
17894 return TRUE;
17895 }
17896
17897 /* Handle an ARM specific section when reading an object file. This is
17898 called when bfd_section_from_shdr finds a section with an unknown
17899 type. */
17900
17901 static bfd_boolean
17902 elf32_arm_section_from_shdr (bfd *abfd,
17903 Elf_Internal_Shdr * hdr,
17904 const char *name,
17905 int shindex)
17906 {
17907 /* There ought to be a place to keep ELF backend specific flags, but
17908 at the moment there isn't one. We just keep track of the
17909 sections by their name, instead. Fortunately, the ABI gives
17910 names for all the ARM specific sections, so we will probably get
17911 away with this. */
17912 switch (hdr->sh_type)
17913 {
17914 case SHT_ARM_EXIDX:
17915 case SHT_ARM_PREEMPTMAP:
17916 case SHT_ARM_ATTRIBUTES:
17917 break;
17918
17919 default:
17920 return FALSE;
17921 }
17922
17923 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17924 return FALSE;
17925
17926 return TRUE;
17927 }
17928
17929 static _arm_elf_section_data *
17930 get_arm_elf_section_data (asection * sec)
17931 {
17932 if (sec && sec->owner && is_arm_elf (sec->owner))
17933 return elf32_arm_section_data (sec);
17934 else
17935 return NULL;
17936 }
17937
17938 typedef struct
17939 {
17940 void *flaginfo;
17941 struct bfd_link_info *info;
17942 asection *sec;
17943 int sec_shndx;
17944 int (*func) (void *, const char *, Elf_Internal_Sym *,
17945 asection *, struct elf_link_hash_entry *);
17946 } output_arch_syminfo;
17947
17948 enum map_symbol_type
17949 {
17950 ARM_MAP_ARM,
17951 ARM_MAP_THUMB,
17952 ARM_MAP_DATA
17953 };
17954
17955
17956 /* Output a single mapping symbol. */
17957
17958 static bfd_boolean
17959 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17960 enum map_symbol_type type,
17961 bfd_vma offset)
17962 {
17963 static const char *names[3] = {"$a", "$t", "$d"};
17964 Elf_Internal_Sym sym;
17965
17966 sym.st_value = osi->sec->output_section->vma
17967 + osi->sec->output_offset
17968 + offset;
17969 sym.st_size = 0;
17970 sym.st_other = 0;
17971 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17972 sym.st_shndx = osi->sec_shndx;
17973 sym.st_target_internal = 0;
17974 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17975 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17976 }
17977
17978 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17979 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17980
17981 static bfd_boolean
17982 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17983 bfd_boolean is_iplt_entry_p,
17984 union gotplt_union *root_plt,
17985 struct arm_plt_info *arm_plt)
17986 {
17987 struct elf32_arm_link_hash_table *htab;
17988 bfd_vma addr, plt_header_size;
17989
17990 if (root_plt->offset == (bfd_vma) -1)
17991 return TRUE;
17992
17993 htab = elf32_arm_hash_table (osi->info);
17994 if (htab == NULL)
17995 return FALSE;
17996
17997 if (is_iplt_entry_p)
17998 {
17999 osi->sec = htab->root.iplt;
18000 plt_header_size = 0;
18001 }
18002 else
18003 {
18004 osi->sec = htab->root.splt;
18005 plt_header_size = htab->plt_header_size;
18006 }
18007 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
18008 (osi->info->output_bfd, osi->sec->output_section));
18009
18010 addr = root_plt->offset & -2;
18011 if (htab->symbian_p)
18012 {
18013 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18014 return FALSE;
18015 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
18016 return FALSE;
18017 }
18018 else if (htab->vxworks_p)
18019 {
18020 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18021 return FALSE;
18022 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
18023 return FALSE;
18024 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
18025 return FALSE;
18026 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
18027 return FALSE;
18028 }
18029 else if (htab->nacl_p)
18030 {
18031 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18032 return FALSE;
18033 }
18034 else if (htab->fdpic_p)
18035 {
18036 enum map_symbol_type type = using_thumb_only(htab)
18037 ? ARM_MAP_THUMB
18038 : ARM_MAP_ARM;
18039
18040 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
18041 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
18042 return FALSE;
18043 if (!elf32_arm_output_map_sym (osi, type, addr))
18044 return FALSE;
18045 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
18046 return FALSE;
18047 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
18048 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
18049 return FALSE;
18050 }
18051 else if (using_thumb_only (htab))
18052 {
18053 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
18054 return FALSE;
18055 }
18056 else
18057 {
18058 bfd_boolean thumb_stub_p;
18059
18060 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
18061 if (thumb_stub_p)
18062 {
18063 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
18064 return FALSE;
18065 }
18066 #ifdef FOUR_WORD_PLT
18067 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18068 return FALSE;
18069 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
18070 return FALSE;
18071 #else
18072 /* A three-word PLT with no Thumb thunk contains only Arm code,
18073 so only need to output a mapping symbol for the first PLT entry and
18074 entries with thumb thunks. */
18075 if (thumb_stub_p || addr == plt_header_size)
18076 {
18077 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18078 return FALSE;
18079 }
18080 #endif
18081 }
18082
18083 return TRUE;
18084 }
18085
18086 /* Output mapping symbols for PLT entries associated with H. */
18087
18088 static bfd_boolean
18089 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
18090 {
18091 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
18092 struct elf32_arm_link_hash_entry *eh;
18093
18094 if (h->root.type == bfd_link_hash_indirect)
18095 return TRUE;
18096
18097 if (h->root.type == bfd_link_hash_warning)
18098 /* When warning symbols are created, they **replace** the "real"
18099 entry in the hash table, thus we never get to see the real
18100 symbol in a hash traversal. So look at it now. */
18101 h = (struct elf_link_hash_entry *) h->root.u.i.link;
18102
18103 eh = (struct elf32_arm_link_hash_entry *) h;
18104 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
18105 &h->plt, &eh->plt);
18106 }
18107
18108 /* Bind a veneered symbol to its veneer identified by its hash entry
18109 STUB_ENTRY. The veneered location thus loose its symbol. */
18110
18111 static void
18112 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
18113 {
18114 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
18115
18116 BFD_ASSERT (hash);
18117 hash->root.root.u.def.section = stub_entry->stub_sec;
18118 hash->root.root.u.def.value = stub_entry->stub_offset;
18119 hash->root.size = stub_entry->stub_size;
18120 }
18121
18122 /* Output a single local symbol for a generated stub. */
18123
18124 static bfd_boolean
18125 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
18126 bfd_vma offset, bfd_vma size)
18127 {
18128 Elf_Internal_Sym sym;
18129
18130 sym.st_value = osi->sec->output_section->vma
18131 + osi->sec->output_offset
18132 + offset;
18133 sym.st_size = size;
18134 sym.st_other = 0;
18135 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
18136 sym.st_shndx = osi->sec_shndx;
18137 sym.st_target_internal = 0;
18138 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
18139 }
18140
18141 static bfd_boolean
18142 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
18143 void * in_arg)
18144 {
18145 struct elf32_arm_stub_hash_entry *stub_entry;
18146 asection *stub_sec;
18147 bfd_vma addr;
18148 char *stub_name;
18149 output_arch_syminfo *osi;
18150 const insn_sequence *template_sequence;
18151 enum stub_insn_type prev_type;
18152 int size;
18153 int i;
18154 enum map_symbol_type sym_type;
18155
18156 /* Massage our args to the form they really have. */
18157 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18158 osi = (output_arch_syminfo *) in_arg;
18159
18160 stub_sec = stub_entry->stub_sec;
18161
18162 /* Ensure this stub is attached to the current section being
18163 processed. */
18164 if (stub_sec != osi->sec)
18165 return TRUE;
18166
18167 addr = (bfd_vma) stub_entry->stub_offset;
18168 template_sequence = stub_entry->stub_template;
18169
18170 if (arm_stub_sym_claimed (stub_entry->stub_type))
18171 arm_stub_claim_sym (stub_entry);
18172 else
18173 {
18174 stub_name = stub_entry->output_name;
18175 switch (template_sequence[0].type)
18176 {
18177 case ARM_TYPE:
18178 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18179 stub_entry->stub_size))
18180 return FALSE;
18181 break;
18182 case THUMB16_TYPE:
18183 case THUMB32_TYPE:
18184 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18185 stub_entry->stub_size))
18186 return FALSE;
18187 break;
18188 default:
18189 BFD_FAIL ();
18190 return 0;
18191 }
18192 }
18193
18194 prev_type = DATA_TYPE;
18195 size = 0;
18196 for (i = 0; i < stub_entry->stub_template_size; i++)
18197 {
18198 switch (template_sequence[i].type)
18199 {
18200 case ARM_TYPE:
18201 sym_type = ARM_MAP_ARM;
18202 break;
18203
18204 case THUMB16_TYPE:
18205 case THUMB32_TYPE:
18206 sym_type = ARM_MAP_THUMB;
18207 break;
18208
18209 case DATA_TYPE:
18210 sym_type = ARM_MAP_DATA;
18211 break;
18212
18213 default:
18214 BFD_FAIL ();
18215 return FALSE;
18216 }
18217
18218 if (template_sequence[i].type != prev_type)
18219 {
18220 prev_type = template_sequence[i].type;
18221 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18222 return FALSE;
18223 }
18224
18225 switch (template_sequence[i].type)
18226 {
18227 case ARM_TYPE:
18228 case THUMB32_TYPE:
18229 size += 4;
18230 break;
18231
18232 case THUMB16_TYPE:
18233 size += 2;
18234 break;
18235
18236 case DATA_TYPE:
18237 size += 4;
18238 break;
18239
18240 default:
18241 BFD_FAIL ();
18242 return FALSE;
18243 }
18244 }
18245
18246 return TRUE;
18247 }
18248
18249 /* Output mapping symbols for linker generated sections,
18250 and for those data-only sections that do not have a
18251 $d. */
18252
18253 static bfd_boolean
18254 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18255 struct bfd_link_info *info,
18256 void *flaginfo,
18257 int (*func) (void *, const char *,
18258 Elf_Internal_Sym *,
18259 asection *,
18260 struct elf_link_hash_entry *))
18261 {
18262 output_arch_syminfo osi;
18263 struct elf32_arm_link_hash_table *htab;
18264 bfd_vma offset;
18265 bfd_size_type size;
18266 bfd *input_bfd;
18267
18268 htab = elf32_arm_hash_table (info);
18269 if (htab == NULL)
18270 return FALSE;
18271
18272 check_use_blx (htab);
18273
18274 osi.flaginfo = flaginfo;
18275 osi.info = info;
18276 osi.func = func;
18277
18278 /* Add a $d mapping symbol to data-only sections that
18279 don't have any mapping symbol. This may result in (harmless) redundant
18280 mapping symbols. */
18281 for (input_bfd = info->input_bfds;
18282 input_bfd != NULL;
18283 input_bfd = input_bfd->link.next)
18284 {
18285 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18286 for (osi.sec = input_bfd->sections;
18287 osi.sec != NULL;
18288 osi.sec = osi.sec->next)
18289 {
18290 if (osi.sec->output_section != NULL
18291 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18292 != 0)
18293 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18294 == SEC_HAS_CONTENTS
18295 && get_arm_elf_section_data (osi.sec) != NULL
18296 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18297 && osi.sec->size > 0
18298 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18299 {
18300 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18301 (output_bfd, osi.sec->output_section);
18302 if (osi.sec_shndx != (int)SHN_BAD)
18303 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18304 }
18305 }
18306 }
18307
18308 /* ARM->Thumb glue. */
18309 if (htab->arm_glue_size > 0)
18310 {
18311 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18312 ARM2THUMB_GLUE_SECTION_NAME);
18313
18314 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18315 (output_bfd, osi.sec->output_section);
18316 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18317 || htab->pic_veneer)
18318 size = ARM2THUMB_PIC_GLUE_SIZE;
18319 else if (htab->use_blx)
18320 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18321 else
18322 size = ARM2THUMB_STATIC_GLUE_SIZE;
18323
18324 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18325 {
18326 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18327 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18328 }
18329 }
18330
18331 /* Thumb->ARM glue. */
18332 if (htab->thumb_glue_size > 0)
18333 {
18334 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18335 THUMB2ARM_GLUE_SECTION_NAME);
18336
18337 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18338 (output_bfd, osi.sec->output_section);
18339 size = THUMB2ARM_GLUE_SIZE;
18340
18341 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18342 {
18343 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18344 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18345 }
18346 }
18347
18348 /* ARMv4 BX veneers. */
18349 if (htab->bx_glue_size > 0)
18350 {
18351 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18352 ARM_BX_GLUE_SECTION_NAME);
18353
18354 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18355 (output_bfd, osi.sec->output_section);
18356
18357 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18358 }
18359
18360 /* Long calls stubs. */
18361 if (htab->stub_bfd && htab->stub_bfd->sections)
18362 {
18363 asection* stub_sec;
18364
18365 for (stub_sec = htab->stub_bfd->sections;
18366 stub_sec != NULL;
18367 stub_sec = stub_sec->next)
18368 {
18369 /* Ignore non-stub sections. */
18370 if (!strstr (stub_sec->name, STUB_SUFFIX))
18371 continue;
18372
18373 osi.sec = stub_sec;
18374
18375 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18376 (output_bfd, osi.sec->output_section);
18377
18378 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18379 }
18380 }
18381
18382 /* Finally, output mapping symbols for the PLT. */
18383 if (htab->root.splt && htab->root.splt->size > 0)
18384 {
18385 osi.sec = htab->root.splt;
18386 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18387 (output_bfd, osi.sec->output_section));
18388
18389 /* Output mapping symbols for the plt header. SymbianOS does not have a
18390 plt header. */
18391 if (htab->vxworks_p)
18392 {
18393 /* VxWorks shared libraries have no PLT header. */
18394 if (!bfd_link_pic (info))
18395 {
18396 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18397 return FALSE;
18398 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18399 return FALSE;
18400 }
18401 }
18402 else if (htab->nacl_p)
18403 {
18404 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18405 return FALSE;
18406 }
18407 else if (using_thumb_only (htab) && !htab->fdpic_p)
18408 {
18409 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18410 return FALSE;
18411 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18412 return FALSE;
18413 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18414 return FALSE;
18415 }
18416 else if (!htab->symbian_p && !htab->fdpic_p)
18417 {
18418 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18419 return FALSE;
18420 #ifndef FOUR_WORD_PLT
18421 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18422 return FALSE;
18423 #endif
18424 }
18425 }
18426 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
18427 {
18428 /* NaCl uses a special first entry in .iplt too. */
18429 osi.sec = htab->root.iplt;
18430 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18431 (output_bfd, osi.sec->output_section));
18432 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18433 return FALSE;
18434 }
18435 if ((htab->root.splt && htab->root.splt->size > 0)
18436 || (htab->root.iplt && htab->root.iplt->size > 0))
18437 {
18438 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18439 for (input_bfd = info->input_bfds;
18440 input_bfd != NULL;
18441 input_bfd = input_bfd->link.next)
18442 {
18443 struct arm_local_iplt_info **local_iplt;
18444 unsigned int i, num_syms;
18445
18446 local_iplt = elf32_arm_local_iplt (input_bfd);
18447 if (local_iplt != NULL)
18448 {
18449 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18450 for (i = 0; i < num_syms; i++)
18451 if (local_iplt[i] != NULL
18452 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18453 &local_iplt[i]->root,
18454 &local_iplt[i]->arm))
18455 return FALSE;
18456 }
18457 }
18458 }
18459 if (htab->dt_tlsdesc_plt != 0)
18460 {
18461 /* Mapping symbols for the lazy tls trampoline. */
18462 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18463 return FALSE;
18464
18465 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18466 htab->dt_tlsdesc_plt + 24))
18467 return FALSE;
18468 }
18469 if (htab->tls_trampoline != 0)
18470 {
18471 /* Mapping symbols for the tls trampoline. */
18472 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18473 return FALSE;
18474 #ifdef FOUR_WORD_PLT
18475 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18476 htab->tls_trampoline + 12))
18477 return FALSE;
18478 #endif
18479 }
18480
18481 return TRUE;
18482 }
18483
18484 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18485 the import library. All SYMCOUNT symbols of ABFD can be examined
18486 from their pointers in SYMS. Pointers of symbols to keep should be
18487 stored continuously at the beginning of that array.
18488
18489 Returns the number of symbols to keep. */
18490
18491 static unsigned int
18492 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18493 struct bfd_link_info *info,
18494 asymbol **syms, long symcount)
18495 {
18496 size_t maxnamelen;
18497 char *cmse_name;
18498 long src_count, dst_count = 0;
18499 struct elf32_arm_link_hash_table *htab;
18500
18501 htab = elf32_arm_hash_table (info);
18502 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18503 symcount = 0;
18504
18505 maxnamelen = 128;
18506 cmse_name = (char *) bfd_malloc (maxnamelen);
18507 BFD_ASSERT (cmse_name);
18508
18509 for (src_count = 0; src_count < symcount; src_count++)
18510 {
18511 struct elf32_arm_link_hash_entry *cmse_hash;
18512 asymbol *sym;
18513 flagword flags;
18514 char *name;
18515 size_t namelen;
18516
18517 sym = syms[src_count];
18518 flags = sym->flags;
18519 name = (char *) bfd_asymbol_name (sym);
18520
18521 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18522 continue;
18523 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18524 continue;
18525
18526 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18527 if (namelen > maxnamelen)
18528 {
18529 cmse_name = (char *)
18530 bfd_realloc (cmse_name, namelen);
18531 maxnamelen = namelen;
18532 }
18533 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18534 cmse_hash = (struct elf32_arm_link_hash_entry *)
18535 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18536
18537 if (!cmse_hash
18538 || (cmse_hash->root.root.type != bfd_link_hash_defined
18539 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18540 || cmse_hash->root.type != STT_FUNC)
18541 continue;
18542
18543 syms[dst_count++] = sym;
18544 }
18545 free (cmse_name);
18546
18547 syms[dst_count] = NULL;
18548
18549 return dst_count;
18550 }
18551
18552 /* Filter symbols of ABFD to include in the import library. All
18553 SYMCOUNT symbols of ABFD can be examined from their pointers in
18554 SYMS. Pointers of symbols to keep should be stored continuously at
18555 the beginning of that array.
18556
18557 Returns the number of symbols to keep. */
18558
18559 static unsigned int
18560 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18561 struct bfd_link_info *info,
18562 asymbol **syms, long symcount)
18563 {
18564 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18565
18566 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18567 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18568 library to be a relocatable object file. */
18569 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18570 if (globals->cmse_implib)
18571 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18572 else
18573 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18574 }
18575
18576 /* Allocate target specific section data. */
18577
18578 static bfd_boolean
18579 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18580 {
18581 if (!sec->used_by_bfd)
18582 {
18583 _arm_elf_section_data *sdata;
18584 size_t amt = sizeof (*sdata);
18585
18586 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18587 if (sdata == NULL)
18588 return FALSE;
18589 sec->used_by_bfd = sdata;
18590 }
18591
18592 return _bfd_elf_new_section_hook (abfd, sec);
18593 }
18594
18595
18596 /* Used to order a list of mapping symbols by address. */
18597
18598 static int
18599 elf32_arm_compare_mapping (const void * a, const void * b)
18600 {
18601 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18602 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18603
18604 if (amap->vma > bmap->vma)
18605 return 1;
18606 else if (amap->vma < bmap->vma)
18607 return -1;
18608 else if (amap->type > bmap->type)
18609 /* Ensure results do not depend on the host qsort for objects with
18610 multiple mapping symbols at the same address by sorting on type
18611 after vma. */
18612 return 1;
18613 else if (amap->type < bmap->type)
18614 return -1;
18615 else
18616 return 0;
18617 }
18618
18619 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18620
18621 static unsigned long
18622 offset_prel31 (unsigned long addr, bfd_vma offset)
18623 {
18624 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18625 }
18626
18627 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18628 relocations. */
18629
18630 static void
18631 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18632 {
18633 unsigned long first_word = bfd_get_32 (output_bfd, from);
18634 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18635
18636 /* High bit of first word is supposed to be zero. */
18637 if ((first_word & 0x80000000ul) == 0)
18638 first_word = offset_prel31 (first_word, offset);
18639
18640 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18641 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18642 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18643 second_word = offset_prel31 (second_word, offset);
18644
18645 bfd_put_32 (output_bfd, first_word, to);
18646 bfd_put_32 (output_bfd, second_word, to + 4);
18647 }
18648
18649 /* Data for make_branch_to_a8_stub(). */
18650
18651 struct a8_branch_to_stub_data
18652 {
18653 asection *writing_section;
18654 bfd_byte *contents;
18655 };
18656
18657
18658 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18659 places for a particular section. */
18660
18661 static bfd_boolean
18662 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18663 void *in_arg)
18664 {
18665 struct elf32_arm_stub_hash_entry *stub_entry;
18666 struct a8_branch_to_stub_data *data;
18667 bfd_byte *contents;
18668 unsigned long branch_insn;
18669 bfd_vma veneered_insn_loc, veneer_entry_loc;
18670 bfd_signed_vma branch_offset;
18671 bfd *abfd;
18672 unsigned int loc;
18673
18674 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18675 data = (struct a8_branch_to_stub_data *) in_arg;
18676
18677 if (stub_entry->target_section != data->writing_section
18678 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18679 return TRUE;
18680
18681 contents = data->contents;
18682
18683 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18684 generated when both source and target are in the same section. */
18685 veneered_insn_loc = stub_entry->target_section->output_section->vma
18686 + stub_entry->target_section->output_offset
18687 + stub_entry->source_value;
18688
18689 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18690 + stub_entry->stub_sec->output_offset
18691 + stub_entry->stub_offset;
18692
18693 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18694 veneered_insn_loc &= ~3u;
18695
18696 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18697
18698 abfd = stub_entry->target_section->owner;
18699 loc = stub_entry->source_value;
18700
18701 /* We attempt to avoid this condition by setting stubs_always_after_branch
18702 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18703 This check is just to be on the safe side... */
18704 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18705 {
18706 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18707 "allocated in unsafe location"), abfd);
18708 return FALSE;
18709 }
18710
18711 switch (stub_entry->stub_type)
18712 {
18713 case arm_stub_a8_veneer_b:
18714 case arm_stub_a8_veneer_b_cond:
18715 branch_insn = 0xf0009000;
18716 goto jump24;
18717
18718 case arm_stub_a8_veneer_blx:
18719 branch_insn = 0xf000e800;
18720 goto jump24;
18721
18722 case arm_stub_a8_veneer_bl:
18723 {
18724 unsigned int i1, j1, i2, j2, s;
18725
18726 branch_insn = 0xf000d000;
18727
18728 jump24:
18729 if (branch_offset < -16777216 || branch_offset > 16777214)
18730 {
18731 /* There's not much we can do apart from complain if this
18732 happens. */
18733 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18734 "of range (input file too large)"), abfd);
18735 return FALSE;
18736 }
18737
18738 /* i1 = not(j1 eor s), so:
18739 not i1 = j1 eor s
18740 j1 = (not i1) eor s. */
18741
18742 branch_insn |= (branch_offset >> 1) & 0x7ff;
18743 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18744 i2 = (branch_offset >> 22) & 1;
18745 i1 = (branch_offset >> 23) & 1;
18746 s = (branch_offset >> 24) & 1;
18747 j1 = (!i1) ^ s;
18748 j2 = (!i2) ^ s;
18749 branch_insn |= j2 << 11;
18750 branch_insn |= j1 << 13;
18751 branch_insn |= s << 26;
18752 }
18753 break;
18754
18755 default:
18756 BFD_FAIL ();
18757 return FALSE;
18758 }
18759
18760 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18761 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18762
18763 return TRUE;
18764 }
18765
18766 /* Beginning of stm32l4xx work-around. */
18767
18768 /* Functions encoding instructions necessary for the emission of the
18769 fix-stm32l4xx-629360.
18770 Encoding is extracted from the
18771 ARM (C) Architecture Reference Manual
18772 ARMv7-A and ARMv7-R edition
18773 ARM DDI 0406C.b (ID072512). */
18774
18775 static inline bfd_vma
18776 create_instruction_branch_absolute (int branch_offset)
18777 {
18778 /* A8.8.18 B (A8-334)
18779 B target_address (Encoding T4). */
18780 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18781 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18782 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18783
18784 int s = ((branch_offset & 0x1000000) >> 24);
18785 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18786 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18787
18788 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18789 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18790
18791 bfd_vma patched_inst = 0xf0009000
18792 | s << 26 /* S. */
18793 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18794 | j1 << 13 /* J1. */
18795 | j2 << 11 /* J2. */
18796 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18797
18798 return patched_inst;
18799 }
18800
18801 static inline bfd_vma
18802 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18803 {
18804 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18805 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18806 bfd_vma patched_inst = 0xe8900000
18807 | (/*W=*/wback << 21)
18808 | (base_reg << 16)
18809 | (reg_mask & 0x0000ffff);
18810
18811 return patched_inst;
18812 }
18813
18814 static inline bfd_vma
18815 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18816 {
18817 /* A8.8.60 LDMDB/LDMEA (A8-402)
18818 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18819 bfd_vma patched_inst = 0xe9100000
18820 | (/*W=*/wback << 21)
18821 | (base_reg << 16)
18822 | (reg_mask & 0x0000ffff);
18823
18824 return patched_inst;
18825 }
18826
18827 static inline bfd_vma
18828 create_instruction_mov (int target_reg, int source_reg)
18829 {
18830 /* A8.8.103 MOV (register) (A8-486)
18831 MOV Rd, Rm (Encoding T1). */
18832 bfd_vma patched_inst = 0x4600
18833 | (target_reg & 0x7)
18834 | ((target_reg & 0x8) >> 3) << 7
18835 | (source_reg << 3);
18836
18837 return patched_inst;
18838 }
18839
18840 static inline bfd_vma
18841 create_instruction_sub (int target_reg, int source_reg, int value)
18842 {
18843 /* A8.8.221 SUB (immediate) (A8-708)
18844 SUB Rd, Rn, #value (Encoding T3). */
18845 bfd_vma patched_inst = 0xf1a00000
18846 | (target_reg << 8)
18847 | (source_reg << 16)
18848 | (/*S=*/0 << 20)
18849 | ((value & 0x800) >> 11) << 26
18850 | ((value & 0x700) >> 8) << 12
18851 | (value & 0x0ff);
18852
18853 return patched_inst;
18854 }
18855
18856 static inline bfd_vma
18857 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18858 int first_reg)
18859 {
18860 /* A8.8.332 VLDM (A8-922)
18861 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18862 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18863 | (/*W=*/wback << 21)
18864 | (base_reg << 16)
18865 | (num_words & 0x000000ff)
18866 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18867 | (first_reg & 0x00000001) << 22;
18868
18869 return patched_inst;
18870 }
18871
18872 static inline bfd_vma
18873 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18874 int first_reg)
18875 {
18876 /* A8.8.332 VLDM (A8-922)
18877 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18878 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18879 | (base_reg << 16)
18880 | (num_words & 0x000000ff)
18881 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18882 | (first_reg & 0x00000001) << 22;
18883
18884 return patched_inst;
18885 }
18886
18887 static inline bfd_vma
18888 create_instruction_udf_w (int value)
18889 {
18890 /* A8.8.247 UDF (A8-758)
18891 Undefined (Encoding T2). */
18892 bfd_vma patched_inst = 0xf7f0a000
18893 | (value & 0x00000fff)
18894 | (value & 0x000f0000) << 16;
18895
18896 return patched_inst;
18897 }
18898
18899 static inline bfd_vma
18900 create_instruction_udf (int value)
18901 {
18902 /* A8.8.247 UDF (A8-758)
18903 Undefined (Encoding T1). */
18904 bfd_vma patched_inst = 0xde00
18905 | (value & 0xff);
18906
18907 return patched_inst;
18908 }
18909
18910 /* Functions writing an instruction in memory, returning the next
18911 memory position to write to. */
18912
18913 static inline bfd_byte *
18914 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18915 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18916 {
18917 put_thumb2_insn (htab, output_bfd, insn, pt);
18918 return pt + 4;
18919 }
18920
18921 static inline bfd_byte *
18922 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18923 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18924 {
18925 put_thumb_insn (htab, output_bfd, insn, pt);
18926 return pt + 2;
18927 }
18928
18929 /* Function filling up a region in memory with T1 and T2 UDFs taking
18930 care of alignment. */
18931
18932 static bfd_byte *
18933 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18934 bfd * output_bfd,
18935 const bfd_byte * const base_stub_contents,
18936 bfd_byte * const from_stub_contents,
18937 const bfd_byte * const end_stub_contents)
18938 {
18939 bfd_byte *current_stub_contents = from_stub_contents;
18940
18941 /* Fill the remaining of the stub with deterministic contents : UDF
18942 instructions.
18943 Check if realignment is needed on modulo 4 frontier using T1, to
18944 further use T2. */
18945 if ((current_stub_contents < end_stub_contents)
18946 && !((current_stub_contents - base_stub_contents) % 2)
18947 && ((current_stub_contents - base_stub_contents) % 4))
18948 current_stub_contents =
18949 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18950 create_instruction_udf (0));
18951
18952 for (; current_stub_contents < end_stub_contents;)
18953 current_stub_contents =
18954 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18955 create_instruction_udf_w (0));
18956
18957 return current_stub_contents;
18958 }
18959
18960 /* Functions writing the stream of instructions equivalent to the
18961 derived sequence for ldmia, ldmdb, vldm respectively. */
18962
18963 static void
18964 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18965 bfd * output_bfd,
18966 const insn32 initial_insn,
18967 const bfd_byte *const initial_insn_addr,
18968 bfd_byte *const base_stub_contents)
18969 {
18970 int wback = (initial_insn & 0x00200000) >> 21;
18971 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18972 int insn_all_registers = initial_insn & 0x0000ffff;
18973 int insn_low_registers, insn_high_registers;
18974 int usable_register_mask;
18975 int nb_registers = elf32_arm_popcount (insn_all_registers);
18976 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18977 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18978 bfd_byte *current_stub_contents = base_stub_contents;
18979
18980 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18981
18982 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18983 smaller than 8 registers load sequences that do not cause the
18984 hardware issue. */
18985 if (nb_registers <= 8)
18986 {
18987 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18988 current_stub_contents =
18989 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18990 initial_insn);
18991
18992 /* B initial_insn_addr+4. */
18993 if (!restore_pc)
18994 current_stub_contents =
18995 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18996 create_instruction_branch_absolute
18997 (initial_insn_addr - current_stub_contents));
18998
18999 /* Fill the remaining of the stub with deterministic contents. */
19000 current_stub_contents =
19001 stm32l4xx_fill_stub_udf (htab, output_bfd,
19002 base_stub_contents, current_stub_contents,
19003 base_stub_contents +
19004 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19005
19006 return;
19007 }
19008
19009 /* - reg_list[13] == 0. */
19010 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
19011
19012 /* - reg_list[14] & reg_list[15] != 1. */
19013 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19014
19015 /* - if (wback==1) reg_list[rn] == 0. */
19016 BFD_ASSERT (!wback || !restore_rn);
19017
19018 /* - nb_registers > 8. */
19019 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19020
19021 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19022
19023 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
19024 - One with the 7 lowest registers (register mask 0x007F)
19025 This LDM will finally contain between 2 and 7 registers
19026 - One with the 7 highest registers (register mask 0xDF80)
19027 This ldm will finally contain between 2 and 7 registers. */
19028 insn_low_registers = insn_all_registers & 0x007F;
19029 insn_high_registers = insn_all_registers & 0xDF80;
19030
19031 /* A spare register may be needed during this veneer to temporarily
19032 handle the base register. This register will be restored with the
19033 last LDM operation.
19034 The usable register may be any general purpose register (that
19035 excludes PC, SP, LR : register mask is 0x1FFF). */
19036 usable_register_mask = 0x1FFF;
19037
19038 /* Generate the stub function. */
19039 if (wback)
19040 {
19041 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
19042 current_stub_contents =
19043 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19044 create_instruction_ldmia
19045 (rn, /*wback=*/1, insn_low_registers));
19046
19047 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
19048 current_stub_contents =
19049 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19050 create_instruction_ldmia
19051 (rn, /*wback=*/1, insn_high_registers));
19052 if (!restore_pc)
19053 {
19054 /* B initial_insn_addr+4. */
19055 current_stub_contents =
19056 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19057 create_instruction_branch_absolute
19058 (initial_insn_addr - current_stub_contents));
19059 }
19060 }
19061 else /* if (!wback). */
19062 {
19063 ri = rn;
19064
19065 /* If Rn is not part of the high-register-list, move it there. */
19066 if (!(insn_high_registers & (1 << rn)))
19067 {
19068 /* Choose a Ri in the high-register-list that will be restored. */
19069 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19070
19071 /* MOV Ri, Rn. */
19072 current_stub_contents =
19073 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19074 create_instruction_mov (ri, rn));
19075 }
19076
19077 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
19078 current_stub_contents =
19079 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19080 create_instruction_ldmia
19081 (ri, /*wback=*/1, insn_low_registers));
19082
19083 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19084 current_stub_contents =
19085 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19086 create_instruction_ldmia
19087 (ri, /*wback=*/0, insn_high_registers));
19088
19089 if (!restore_pc)
19090 {
19091 /* B initial_insn_addr+4. */
19092 current_stub_contents =
19093 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19094 create_instruction_branch_absolute
19095 (initial_insn_addr - current_stub_contents));
19096 }
19097 }
19098
19099 /* Fill the remaining of the stub with deterministic contents. */
19100 current_stub_contents =
19101 stm32l4xx_fill_stub_udf (htab, output_bfd,
19102 base_stub_contents, current_stub_contents,
19103 base_stub_contents +
19104 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19105 }
19106
19107 static void
19108 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
19109 bfd * output_bfd,
19110 const insn32 initial_insn,
19111 const bfd_byte *const initial_insn_addr,
19112 bfd_byte *const base_stub_contents)
19113 {
19114 int wback = (initial_insn & 0x00200000) >> 21;
19115 int ri, rn = (initial_insn & 0x000f0000) >> 16;
19116 int insn_all_registers = initial_insn & 0x0000ffff;
19117 int insn_low_registers, insn_high_registers;
19118 int usable_register_mask;
19119 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
19120 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
19121 int nb_registers = elf32_arm_popcount (insn_all_registers);
19122 bfd_byte *current_stub_contents = base_stub_contents;
19123
19124 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
19125
19126 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19127 smaller than 8 registers load sequences that do not cause the
19128 hardware issue. */
19129 if (nb_registers <= 8)
19130 {
19131 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19132 current_stub_contents =
19133 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19134 initial_insn);
19135
19136 /* B initial_insn_addr+4. */
19137 current_stub_contents =
19138 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19139 create_instruction_branch_absolute
19140 (initial_insn_addr - current_stub_contents));
19141
19142 /* Fill the remaining of the stub with deterministic contents. */
19143 current_stub_contents =
19144 stm32l4xx_fill_stub_udf (htab, output_bfd,
19145 base_stub_contents, current_stub_contents,
19146 base_stub_contents +
19147 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19148
19149 return;
19150 }
19151
19152 /* - reg_list[13] == 0. */
19153 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19154
19155 /* - reg_list[14] & reg_list[15] != 1. */
19156 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19157
19158 /* - if (wback==1) reg_list[rn] == 0. */
19159 BFD_ASSERT (!wback || !restore_rn);
19160
19161 /* - nb_registers > 8. */
19162 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19163
19164 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19165
19166 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19167 - One with the 7 lowest registers (register mask 0x007F)
19168 This LDM will finally contain between 2 and 7 registers
19169 - One with the 7 highest registers (register mask 0xDF80)
19170 This ldm will finally contain between 2 and 7 registers. */
19171 insn_low_registers = insn_all_registers & 0x007F;
19172 insn_high_registers = insn_all_registers & 0xDF80;
19173
19174 /* A spare register may be needed during this veneer to temporarily
19175 handle the base register. This register will be restored with
19176 the last LDM operation.
19177 The usable register may be any general purpose register (that excludes
19178 PC, SP, LR : register mask is 0x1FFF). */
19179 usable_register_mask = 0x1FFF;
19180
19181 /* Generate the stub function. */
19182 if (!wback && !restore_pc && !restore_rn)
19183 {
19184 /* Choose a Ri in the low-register-list that will be restored. */
19185 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19186
19187 /* MOV Ri, Rn. */
19188 current_stub_contents =
19189 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19190 create_instruction_mov (ri, rn));
19191
19192 /* LDMDB Ri!, {R-high-register-list}. */
19193 current_stub_contents =
19194 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19195 create_instruction_ldmdb
19196 (ri, /*wback=*/1, insn_high_registers));
19197
19198 /* LDMDB Ri, {R-low-register-list}. */
19199 current_stub_contents =
19200 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19201 create_instruction_ldmdb
19202 (ri, /*wback=*/0, insn_low_registers));
19203
19204 /* B initial_insn_addr+4. */
19205 current_stub_contents =
19206 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19207 create_instruction_branch_absolute
19208 (initial_insn_addr - current_stub_contents));
19209 }
19210 else if (wback && !restore_pc && !restore_rn)
19211 {
19212 /* LDMDB Rn!, {R-high-register-list}. */
19213 current_stub_contents =
19214 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19215 create_instruction_ldmdb
19216 (rn, /*wback=*/1, insn_high_registers));
19217
19218 /* LDMDB Rn!, {R-low-register-list}. */
19219 current_stub_contents =
19220 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19221 create_instruction_ldmdb
19222 (rn, /*wback=*/1, insn_low_registers));
19223
19224 /* B initial_insn_addr+4. */
19225 current_stub_contents =
19226 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19227 create_instruction_branch_absolute
19228 (initial_insn_addr - current_stub_contents));
19229 }
19230 else if (!wback && restore_pc && !restore_rn)
19231 {
19232 /* Choose a Ri in the high-register-list that will be restored. */
19233 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19234
19235 /* SUB Ri, Rn, #(4*nb_registers). */
19236 current_stub_contents =
19237 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19238 create_instruction_sub (ri, rn, (4 * nb_registers)));
19239
19240 /* LDMIA Ri!, {R-low-register-list}. */
19241 current_stub_contents =
19242 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19243 create_instruction_ldmia
19244 (ri, /*wback=*/1, insn_low_registers));
19245
19246 /* LDMIA Ri, {R-high-register-list}. */
19247 current_stub_contents =
19248 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19249 create_instruction_ldmia
19250 (ri, /*wback=*/0, insn_high_registers));
19251 }
19252 else if (wback && restore_pc && !restore_rn)
19253 {
19254 /* Choose a Ri in the high-register-list that will be restored. */
19255 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19256
19257 /* SUB Rn, Rn, #(4*nb_registers) */
19258 current_stub_contents =
19259 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19260 create_instruction_sub (rn, rn, (4 * nb_registers)));
19261
19262 /* MOV Ri, Rn. */
19263 current_stub_contents =
19264 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19265 create_instruction_mov (ri, rn));
19266
19267 /* LDMIA Ri!, {R-low-register-list}. */
19268 current_stub_contents =
19269 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19270 create_instruction_ldmia
19271 (ri, /*wback=*/1, insn_low_registers));
19272
19273 /* LDMIA Ri, {R-high-register-list}. */
19274 current_stub_contents =
19275 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19276 create_instruction_ldmia
19277 (ri, /*wback=*/0, insn_high_registers));
19278 }
19279 else if (!wback && !restore_pc && restore_rn)
19280 {
19281 ri = rn;
19282 if (!(insn_low_registers & (1 << rn)))
19283 {
19284 /* Choose a Ri in the low-register-list that will be restored. */
19285 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19286
19287 /* MOV Ri, Rn. */
19288 current_stub_contents =
19289 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19290 create_instruction_mov (ri, rn));
19291 }
19292
19293 /* LDMDB Ri!, {R-high-register-list}. */
19294 current_stub_contents =
19295 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19296 create_instruction_ldmdb
19297 (ri, /*wback=*/1, insn_high_registers));
19298
19299 /* LDMDB Ri, {R-low-register-list}. */
19300 current_stub_contents =
19301 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19302 create_instruction_ldmdb
19303 (ri, /*wback=*/0, insn_low_registers));
19304
19305 /* B initial_insn_addr+4. */
19306 current_stub_contents =
19307 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19308 create_instruction_branch_absolute
19309 (initial_insn_addr - current_stub_contents));
19310 }
19311 else if (!wback && restore_pc && restore_rn)
19312 {
19313 ri = rn;
19314 if (!(insn_high_registers & (1 << rn)))
19315 {
19316 /* Choose a Ri in the high-register-list that will be restored. */
19317 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19318 }
19319
19320 /* SUB Ri, Rn, #(4*nb_registers). */
19321 current_stub_contents =
19322 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19323 create_instruction_sub (ri, rn, (4 * nb_registers)));
19324
19325 /* LDMIA Ri!, {R-low-register-list}. */
19326 current_stub_contents =
19327 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19328 create_instruction_ldmia
19329 (ri, /*wback=*/1, insn_low_registers));
19330
19331 /* LDMIA Ri, {R-high-register-list}. */
19332 current_stub_contents =
19333 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19334 create_instruction_ldmia
19335 (ri, /*wback=*/0, insn_high_registers));
19336 }
19337 else if (wback && restore_rn)
19338 {
19339 /* The assembler should not have accepted to encode this. */
19340 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19341 "undefined behavior.\n");
19342 }
19343
19344 /* Fill the remaining of the stub with deterministic contents. */
19345 current_stub_contents =
19346 stm32l4xx_fill_stub_udf (htab, output_bfd,
19347 base_stub_contents, current_stub_contents,
19348 base_stub_contents +
19349 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19350
19351 }
19352
19353 static void
19354 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19355 bfd * output_bfd,
19356 const insn32 initial_insn,
19357 const bfd_byte *const initial_insn_addr,
19358 bfd_byte *const base_stub_contents)
19359 {
19360 int num_words = initial_insn & 0xff;
19361 bfd_byte *current_stub_contents = base_stub_contents;
19362
19363 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19364
19365 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19366 smaller than 8 words load sequences that do not cause the
19367 hardware issue. */
19368 if (num_words <= 8)
19369 {
19370 /* Untouched instruction. */
19371 current_stub_contents =
19372 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19373 initial_insn);
19374
19375 /* B initial_insn_addr+4. */
19376 current_stub_contents =
19377 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19378 create_instruction_branch_absolute
19379 (initial_insn_addr - current_stub_contents));
19380 }
19381 else
19382 {
19383 bfd_boolean is_dp = /* DP encoding. */
19384 (initial_insn & 0xfe100f00) == 0xec100b00;
19385 bfd_boolean is_ia_nobang = /* (IA without !). */
19386 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19387 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19388 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19389 bfd_boolean is_db_bang = /* (DB with !). */
19390 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19391 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19392 /* d = UInt (Vd:D);. */
19393 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19394 | (((unsigned int)initial_insn << 9) >> 31);
19395
19396 /* Compute the number of 8-words chunks needed to split. */
19397 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19398 int chunk;
19399
19400 /* The test coverage has been done assuming the following
19401 hypothesis that exactly one of the previous is_ predicates is
19402 true. */
19403 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19404 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19405
19406 /* We treat the cutting of the words in one pass for all
19407 cases, then we emit the adjustments:
19408
19409 vldm rx, {...}
19410 -> vldm rx!, {8_words_or_less} for each needed 8_word
19411 -> sub rx, rx, #size (list)
19412
19413 vldm rx!, {...}
19414 -> vldm rx!, {8_words_or_less} for each needed 8_word
19415 This also handles vpop instruction (when rx is sp)
19416
19417 vldmd rx!, {...}
19418 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19419 for (chunk = 0; chunk < chunks; ++chunk)
19420 {
19421 bfd_vma new_insn = 0;
19422
19423 if (is_ia_nobang || is_ia_bang)
19424 {
19425 new_insn = create_instruction_vldmia
19426 (base_reg,
19427 is_dp,
19428 /*wback= . */1,
19429 chunks - (chunk + 1) ?
19430 8 : num_words - chunk * 8,
19431 first_reg + chunk * 8);
19432 }
19433 else if (is_db_bang)
19434 {
19435 new_insn = create_instruction_vldmdb
19436 (base_reg,
19437 is_dp,
19438 chunks - (chunk + 1) ?
19439 8 : num_words - chunk * 8,
19440 first_reg + chunk * 8);
19441 }
19442
19443 if (new_insn)
19444 current_stub_contents =
19445 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19446 new_insn);
19447 }
19448
19449 /* Only this case requires the base register compensation
19450 subtract. */
19451 if (is_ia_nobang)
19452 {
19453 current_stub_contents =
19454 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19455 create_instruction_sub
19456 (base_reg, base_reg, 4*num_words));
19457 }
19458
19459 /* B initial_insn_addr+4. */
19460 current_stub_contents =
19461 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19462 create_instruction_branch_absolute
19463 (initial_insn_addr - current_stub_contents));
19464 }
19465
19466 /* Fill the remaining of the stub with deterministic contents. */
19467 current_stub_contents =
19468 stm32l4xx_fill_stub_udf (htab, output_bfd,
19469 base_stub_contents, current_stub_contents,
19470 base_stub_contents +
19471 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19472 }
19473
19474 static void
19475 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19476 bfd * output_bfd,
19477 const insn32 wrong_insn,
19478 const bfd_byte *const wrong_insn_addr,
19479 bfd_byte *const stub_contents)
19480 {
19481 if (is_thumb2_ldmia (wrong_insn))
19482 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19483 wrong_insn, wrong_insn_addr,
19484 stub_contents);
19485 else if (is_thumb2_ldmdb (wrong_insn))
19486 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19487 wrong_insn, wrong_insn_addr,
19488 stub_contents);
19489 else if (is_thumb2_vldm (wrong_insn))
19490 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19491 wrong_insn, wrong_insn_addr,
19492 stub_contents);
19493 }
19494
19495 /* End of stm32l4xx work-around. */
19496
19497
19498 /* Do code byteswapping. Return FALSE afterwards so that the section is
19499 written out as normal. */
19500
19501 static bfd_boolean
19502 elf32_arm_write_section (bfd *output_bfd,
19503 struct bfd_link_info *link_info,
19504 asection *sec,
19505 bfd_byte *contents)
19506 {
19507 unsigned int mapcount, errcount;
19508 _arm_elf_section_data *arm_data;
19509 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19510 elf32_arm_section_map *map;
19511 elf32_vfp11_erratum_list *errnode;
19512 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19513 bfd_vma ptr;
19514 bfd_vma end;
19515 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19516 bfd_byte tmp;
19517 unsigned int i;
19518
19519 if (globals == NULL)
19520 return FALSE;
19521
19522 /* If this section has not been allocated an _arm_elf_section_data
19523 structure then we cannot record anything. */
19524 arm_data = get_arm_elf_section_data (sec);
19525 if (arm_data == NULL)
19526 return FALSE;
19527
19528 mapcount = arm_data->mapcount;
19529 map = arm_data->map;
19530 errcount = arm_data->erratumcount;
19531
19532 if (errcount != 0)
19533 {
19534 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19535
19536 for (errnode = arm_data->erratumlist; errnode != 0;
19537 errnode = errnode->next)
19538 {
19539 bfd_vma target = errnode->vma - offset;
19540
19541 switch (errnode->type)
19542 {
19543 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19544 {
19545 bfd_vma branch_to_veneer;
19546 /* Original condition code of instruction, plus bit mask for
19547 ARM B instruction. */
19548 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19549 | 0x0a000000;
19550
19551 /* The instruction is before the label. */
19552 target -= 4;
19553
19554 /* Above offset included in -4 below. */
19555 branch_to_veneer = errnode->u.b.veneer->vma
19556 - errnode->vma - 4;
19557
19558 if ((signed) branch_to_veneer < -(1 << 25)
19559 || (signed) branch_to_veneer >= (1 << 25))
19560 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19561 "range"), output_bfd);
19562
19563 insn |= (branch_to_veneer >> 2) & 0xffffff;
19564 contents[endianflip ^ target] = insn & 0xff;
19565 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19566 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19567 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19568 }
19569 break;
19570
19571 case VFP11_ERRATUM_ARM_VENEER:
19572 {
19573 bfd_vma branch_from_veneer;
19574 unsigned int insn;
19575
19576 /* Take size of veneer into account. */
19577 branch_from_veneer = errnode->u.v.branch->vma
19578 - errnode->vma - 12;
19579
19580 if ((signed) branch_from_veneer < -(1 << 25)
19581 || (signed) branch_from_veneer >= (1 << 25))
19582 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19583 "range"), output_bfd);
19584
19585 /* Original instruction. */
19586 insn = errnode->u.v.branch->u.b.vfp_insn;
19587 contents[endianflip ^ target] = insn & 0xff;
19588 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19589 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19590 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19591
19592 /* Branch back to insn after original insn. */
19593 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19594 contents[endianflip ^ (target + 4)] = insn & 0xff;
19595 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19596 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19597 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19598 }
19599 break;
19600
19601 default:
19602 abort ();
19603 }
19604 }
19605 }
19606
19607 if (arm_data->stm32l4xx_erratumcount != 0)
19608 {
19609 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19610 stm32l4xx_errnode != 0;
19611 stm32l4xx_errnode = stm32l4xx_errnode->next)
19612 {
19613 bfd_vma target = stm32l4xx_errnode->vma - offset;
19614
19615 switch (stm32l4xx_errnode->type)
19616 {
19617 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19618 {
19619 unsigned int insn;
19620 bfd_vma branch_to_veneer =
19621 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19622
19623 if ((signed) branch_to_veneer < -(1 << 24)
19624 || (signed) branch_to_veneer >= (1 << 24))
19625 {
19626 bfd_vma out_of_range =
19627 ((signed) branch_to_veneer < -(1 << 24)) ?
19628 - branch_to_veneer - (1 << 24) :
19629 ((signed) branch_to_veneer >= (1 << 24)) ?
19630 branch_to_veneer - (1 << 24) : 0;
19631
19632 _bfd_error_handler
19633 (_("%pB(%#" PRIx64 "): error: "
19634 "cannot create STM32L4XX veneer; "
19635 "jump out of range by %" PRId64 " bytes; "
19636 "cannot encode branch instruction"),
19637 output_bfd,
19638 (uint64_t) (stm32l4xx_errnode->vma - 4),
19639 (int64_t) out_of_range);
19640 continue;
19641 }
19642
19643 insn = create_instruction_branch_absolute
19644 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19645
19646 /* The instruction is before the label. */
19647 target -= 4;
19648
19649 put_thumb2_insn (globals, output_bfd,
19650 (bfd_vma) insn, contents + target);
19651 }
19652 break;
19653
19654 case STM32L4XX_ERRATUM_VENEER:
19655 {
19656 bfd_byte * veneer;
19657 bfd_byte * veneer_r;
19658 unsigned int insn;
19659
19660 veneer = contents + target;
19661 veneer_r = veneer
19662 + stm32l4xx_errnode->u.b.veneer->vma
19663 - stm32l4xx_errnode->vma - 4;
19664
19665 if ((signed) (veneer_r - veneer -
19666 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19667 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19668 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19669 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19670 || (signed) (veneer_r - veneer) >= (1 << 24))
19671 {
19672 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19673 "veneer"), output_bfd);
19674 continue;
19675 }
19676
19677 /* Original instruction. */
19678 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19679
19680 stm32l4xx_create_replacing_stub
19681 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19682 }
19683 break;
19684
19685 default:
19686 abort ();
19687 }
19688 }
19689 }
19690
19691 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19692 {
19693 arm_unwind_table_edit *edit_node
19694 = arm_data->u.exidx.unwind_edit_list;
19695 /* Now, sec->size is the size of the section we will write. The original
19696 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19697 markers) was sec->rawsize. (This isn't the case if we perform no
19698 edits, then rawsize will be zero and we should use size). */
19699 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19700 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19701 unsigned int in_index, out_index;
19702 bfd_vma add_to_offsets = 0;
19703
19704 if (edited_contents == NULL)
19705 return FALSE;
19706 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19707 {
19708 if (edit_node)
19709 {
19710 unsigned int edit_index = edit_node->index;
19711
19712 if (in_index < edit_index && in_index * 8 < input_size)
19713 {
19714 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19715 contents + in_index * 8, add_to_offsets);
19716 out_index++;
19717 in_index++;
19718 }
19719 else if (in_index == edit_index
19720 || (in_index * 8 >= input_size
19721 && edit_index == UINT_MAX))
19722 {
19723 switch (edit_node->type)
19724 {
19725 case DELETE_EXIDX_ENTRY:
19726 in_index++;
19727 add_to_offsets += 8;
19728 break;
19729
19730 case INSERT_EXIDX_CANTUNWIND_AT_END:
19731 {
19732 asection *text_sec = edit_node->linked_section;
19733 bfd_vma text_offset = text_sec->output_section->vma
19734 + text_sec->output_offset
19735 + text_sec->size;
19736 bfd_vma exidx_offset = offset + out_index * 8;
19737 unsigned long prel31_offset;
19738
19739 /* Note: this is meant to be equivalent to an
19740 R_ARM_PREL31 relocation. These synthetic
19741 EXIDX_CANTUNWIND markers are not relocated by the
19742 usual BFD method. */
19743 prel31_offset = (text_offset - exidx_offset)
19744 & 0x7ffffffful;
19745 if (bfd_link_relocatable (link_info))
19746 {
19747 /* Here relocation for new EXIDX_CANTUNWIND is
19748 created, so there is no need to
19749 adjust offset by hand. */
19750 prel31_offset = text_sec->output_offset
19751 + text_sec->size;
19752 }
19753
19754 /* First address we can't unwind. */
19755 bfd_put_32 (output_bfd, prel31_offset,
19756 &edited_contents[out_index * 8]);
19757
19758 /* Code for EXIDX_CANTUNWIND. */
19759 bfd_put_32 (output_bfd, 0x1,
19760 &edited_contents[out_index * 8 + 4]);
19761
19762 out_index++;
19763 add_to_offsets -= 8;
19764 }
19765 break;
19766 }
19767
19768 edit_node = edit_node->next;
19769 }
19770 }
19771 else
19772 {
19773 /* No more edits, copy remaining entries verbatim. */
19774 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19775 contents + in_index * 8, add_to_offsets);
19776 out_index++;
19777 in_index++;
19778 }
19779 }
19780
19781 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19782 bfd_set_section_contents (output_bfd, sec->output_section,
19783 edited_contents,
19784 (file_ptr) sec->output_offset, sec->size);
19785
19786 return TRUE;
19787 }
19788
19789 /* Fix code to point to Cortex-A8 erratum stubs. */
19790 if (globals->fix_cortex_a8)
19791 {
19792 struct a8_branch_to_stub_data data;
19793
19794 data.writing_section = sec;
19795 data.contents = contents;
19796
19797 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19798 & data);
19799 }
19800
19801 if (mapcount == 0)
19802 return FALSE;
19803
19804 if (globals->byteswap_code)
19805 {
19806 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19807
19808 ptr = map[0].vma;
19809 for (i = 0; i < mapcount; i++)
19810 {
19811 if (i == mapcount - 1)
19812 end = sec->size;
19813 else
19814 end = map[i + 1].vma;
19815
19816 switch (map[i].type)
19817 {
19818 case 'a':
19819 /* Byte swap code words. */
19820 while (ptr + 3 < end)
19821 {
19822 tmp = contents[ptr];
19823 contents[ptr] = contents[ptr + 3];
19824 contents[ptr + 3] = tmp;
19825 tmp = contents[ptr + 1];
19826 contents[ptr + 1] = contents[ptr + 2];
19827 contents[ptr + 2] = tmp;
19828 ptr += 4;
19829 }
19830 break;
19831
19832 case 't':
19833 /* Byte swap code halfwords. */
19834 while (ptr + 1 < end)
19835 {
19836 tmp = contents[ptr];
19837 contents[ptr] = contents[ptr + 1];
19838 contents[ptr + 1] = tmp;
19839 ptr += 2;
19840 }
19841 break;
19842
19843 case 'd':
19844 /* Leave data alone. */
19845 break;
19846 }
19847 ptr = end;
19848 }
19849 }
19850
19851 free (map);
19852 arm_data->mapcount = -1;
19853 arm_data->mapsize = 0;
19854 arm_data->map = NULL;
19855
19856 return FALSE;
19857 }
19858
19859 /* Mangle thumb function symbols as we read them in. */
19860
19861 static bfd_boolean
19862 elf32_arm_swap_symbol_in (bfd * abfd,
19863 const void *psrc,
19864 const void *pshn,
19865 Elf_Internal_Sym *dst)
19866 {
19867 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19868 return FALSE;
19869 dst->st_target_internal = 0;
19870
19871 /* New EABI objects mark thumb function symbols by setting the low bit of
19872 the address. */
19873 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19874 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19875 {
19876 if (dst->st_value & 1)
19877 {
19878 dst->st_value &= ~(bfd_vma) 1;
19879 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19880 ST_BRANCH_TO_THUMB);
19881 }
19882 else
19883 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19884 }
19885 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19886 {
19887 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19888 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19889 }
19890 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19891 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19892 else
19893 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19894
19895 return TRUE;
19896 }
19897
19898
19899 /* Mangle thumb function symbols as we write them out. */
19900
19901 static void
19902 elf32_arm_swap_symbol_out (bfd *abfd,
19903 const Elf_Internal_Sym *src,
19904 void *cdst,
19905 void *shndx)
19906 {
19907 Elf_Internal_Sym newsym;
19908
19909 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19910 of the address set, as per the new EABI. We do this unconditionally
19911 because objcopy does not set the elf header flags until after
19912 it writes out the symbol table. */
19913 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19914 {
19915 newsym = *src;
19916 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19917 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19918 if (newsym.st_shndx != SHN_UNDEF)
19919 {
19920 /* Do this only for defined symbols. At link type, the static
19921 linker will simulate the work of dynamic linker of resolving
19922 symbols and will carry over the thumbness of found symbols to
19923 the output symbol table. It's not clear how it happens, but
19924 the thumbness of undefined symbols can well be different at
19925 runtime, and writing '1' for them will be confusing for users
19926 and possibly for dynamic linker itself.
19927 */
19928 newsym.st_value |= 1;
19929 }
19930
19931 src = &newsym;
19932 }
19933 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19934 }
19935
19936 /* Add the PT_ARM_EXIDX program header. */
19937
19938 static bfd_boolean
19939 elf32_arm_modify_segment_map (bfd *abfd,
19940 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19941 {
19942 struct elf_segment_map *m;
19943 asection *sec;
19944
19945 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19946 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19947 {
19948 /* If there is already a PT_ARM_EXIDX header, then we do not
19949 want to add another one. This situation arises when running
19950 "strip"; the input binary already has the header. */
19951 m = elf_seg_map (abfd);
19952 while (m && m->p_type != PT_ARM_EXIDX)
19953 m = m->next;
19954 if (!m)
19955 {
19956 m = (struct elf_segment_map *)
19957 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19958 if (m == NULL)
19959 return FALSE;
19960 m->p_type = PT_ARM_EXIDX;
19961 m->count = 1;
19962 m->sections[0] = sec;
19963
19964 m->next = elf_seg_map (abfd);
19965 elf_seg_map (abfd) = m;
19966 }
19967 }
19968
19969 return TRUE;
19970 }
19971
19972 /* We may add a PT_ARM_EXIDX program header. */
19973
19974 static int
19975 elf32_arm_additional_program_headers (bfd *abfd,
19976 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19977 {
19978 asection *sec;
19979
19980 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19981 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19982 return 1;
19983 else
19984 return 0;
19985 }
19986
19987 /* Hook called by the linker routine which adds symbols from an object
19988 file. */
19989
19990 static bfd_boolean
19991 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19992 Elf_Internal_Sym *sym, const char **namep,
19993 flagword *flagsp, asection **secp, bfd_vma *valp)
19994 {
19995 if (elf32_arm_hash_table (info) == NULL)
19996 return FALSE;
19997
19998 if (elf32_arm_hash_table (info)->vxworks_p
19999 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
20000 flagsp, secp, valp))
20001 return FALSE;
20002
20003 return TRUE;
20004 }
20005
20006 /* We use this to override swap_symbol_in and swap_symbol_out. */
20007 const struct elf_size_info elf32_arm_size_info =
20008 {
20009 sizeof (Elf32_External_Ehdr),
20010 sizeof (Elf32_External_Phdr),
20011 sizeof (Elf32_External_Shdr),
20012 sizeof (Elf32_External_Rel),
20013 sizeof (Elf32_External_Rela),
20014 sizeof (Elf32_External_Sym),
20015 sizeof (Elf32_External_Dyn),
20016 sizeof (Elf_External_Note),
20017 4,
20018 1,
20019 32, 2,
20020 ELFCLASS32, EV_CURRENT,
20021 bfd_elf32_write_out_phdrs,
20022 bfd_elf32_write_shdrs_and_ehdr,
20023 bfd_elf32_checksum_contents,
20024 bfd_elf32_write_relocs,
20025 elf32_arm_swap_symbol_in,
20026 elf32_arm_swap_symbol_out,
20027 bfd_elf32_slurp_reloc_table,
20028 bfd_elf32_slurp_symbol_table,
20029 bfd_elf32_swap_dyn_in,
20030 bfd_elf32_swap_dyn_out,
20031 bfd_elf32_swap_reloc_in,
20032 bfd_elf32_swap_reloc_out,
20033 bfd_elf32_swap_reloca_in,
20034 bfd_elf32_swap_reloca_out
20035 };
20036
20037 static bfd_vma
20038 read_code32 (const bfd *abfd, const bfd_byte *addr)
20039 {
20040 /* V7 BE8 code is always little endian. */
20041 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
20042 return bfd_getl32 (addr);
20043
20044 return bfd_get_32 (abfd, addr);
20045 }
20046
20047 static bfd_vma
20048 read_code16 (const bfd *abfd, const bfd_byte *addr)
20049 {
20050 /* V7 BE8 code is always little endian. */
20051 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
20052 return bfd_getl16 (addr);
20053
20054 return bfd_get_16 (abfd, addr);
20055 }
20056
20057 /* Return size of plt0 entry starting at ADDR
20058 or (bfd_vma) -1 if size can not be determined. */
20059
20060 static bfd_vma
20061 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
20062 {
20063 bfd_vma first_word;
20064 bfd_vma plt0_size;
20065
20066 first_word = read_code32 (abfd, addr);
20067
20068 if (first_word == elf32_arm_plt0_entry[0])
20069 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
20070 else if (first_word == elf32_thumb2_plt0_entry[0])
20071 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
20072 else
20073 /* We don't yet handle this PLT format. */
20074 return (bfd_vma) -1;
20075
20076 return plt0_size;
20077 }
20078
20079 /* Return size of plt entry starting at offset OFFSET
20080 of plt section located at address START
20081 or (bfd_vma) -1 if size can not be determined. */
20082
20083 static bfd_vma
20084 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
20085 {
20086 bfd_vma first_insn;
20087 bfd_vma plt_size = 0;
20088 const bfd_byte *addr = start + offset;
20089
20090 /* PLT entry size if fixed on Thumb-only platforms. */
20091 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
20092 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
20093
20094 /* Respect Thumb stub if necessary. */
20095 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
20096 {
20097 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
20098 }
20099
20100 /* Strip immediate from first add. */
20101 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
20102
20103 #ifdef FOUR_WORD_PLT
20104 if (first_insn == elf32_arm_plt_entry[0])
20105 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
20106 #else
20107 if (first_insn == elf32_arm_plt_entry_long[0])
20108 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
20109 else if (first_insn == elf32_arm_plt_entry_short[0])
20110 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
20111 #endif
20112 else
20113 /* We don't yet handle this PLT format. */
20114 return (bfd_vma) -1;
20115
20116 return plt_size;
20117 }
20118
20119 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20120
20121 static long
20122 elf32_arm_get_synthetic_symtab (bfd *abfd,
20123 long symcount ATTRIBUTE_UNUSED,
20124 asymbol **syms ATTRIBUTE_UNUSED,
20125 long dynsymcount,
20126 asymbol **dynsyms,
20127 asymbol **ret)
20128 {
20129 asection *relplt;
20130 asymbol *s;
20131 arelent *p;
20132 long count, i, n;
20133 size_t size;
20134 Elf_Internal_Shdr *hdr;
20135 char *names;
20136 asection *plt;
20137 bfd_vma offset;
20138 bfd_byte *data;
20139
20140 *ret = NULL;
20141
20142 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
20143 return 0;
20144
20145 if (dynsymcount <= 0)
20146 return 0;
20147
20148 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20149 if (relplt == NULL)
20150 return 0;
20151
20152 hdr = &elf_section_data (relplt)->this_hdr;
20153 if (hdr->sh_link != elf_dynsymtab (abfd)
20154 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20155 return 0;
20156
20157 plt = bfd_get_section_by_name (abfd, ".plt");
20158 if (plt == NULL)
20159 return 0;
20160
20161 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
20162 return -1;
20163
20164 data = plt->contents;
20165 if (data == NULL)
20166 {
20167 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
20168 return -1;
20169 bfd_cache_section_contents((asection *) plt, data);
20170 }
20171
20172 count = relplt->size / hdr->sh_entsize;
20173 size = count * sizeof (asymbol);
20174 p = relplt->relocation;
20175 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20176 {
20177 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20178 if (p->addend != 0)
20179 size += sizeof ("+0x") - 1 + 8;
20180 }
20181
20182 s = *ret = (asymbol *) bfd_malloc (size);
20183 if (s == NULL)
20184 return -1;
20185
20186 offset = elf32_arm_plt0_size (abfd, data);
20187 if (offset == (bfd_vma) -1)
20188 return -1;
20189
20190 names = (char *) (s + count);
20191 p = relplt->relocation;
20192 n = 0;
20193 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20194 {
20195 size_t len;
20196
20197 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20198 if (plt_size == (bfd_vma) -1)
20199 break;
20200
20201 *s = **p->sym_ptr_ptr;
20202 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20203 we are defining a symbol, ensure one of them is set. */
20204 if ((s->flags & BSF_LOCAL) == 0)
20205 s->flags |= BSF_GLOBAL;
20206 s->flags |= BSF_SYNTHETIC;
20207 s->section = plt;
20208 s->value = offset;
20209 s->name = names;
20210 s->udata.p = NULL;
20211 len = strlen ((*p->sym_ptr_ptr)->name);
20212 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20213 names += len;
20214 if (p->addend != 0)
20215 {
20216 char buf[30], *a;
20217
20218 memcpy (names, "+0x", sizeof ("+0x") - 1);
20219 names += sizeof ("+0x") - 1;
20220 bfd_sprintf_vma (abfd, buf, p->addend);
20221 for (a = buf; *a == '0'; ++a)
20222 ;
20223 len = strlen (a);
20224 memcpy (names, a, len);
20225 names += len;
20226 }
20227 memcpy (names, "@plt", sizeof ("@plt"));
20228 names += sizeof ("@plt");
20229 ++s, ++n;
20230 offset += plt_size;
20231 }
20232
20233 return n;
20234 }
20235
20236 static bfd_boolean
20237 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
20238 {
20239 if (hdr->sh_flags & SHF_ARM_PURECODE)
20240 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
20241 return TRUE;
20242 }
20243
20244 static flagword
20245 elf32_arm_lookup_section_flags (char *flag_name)
20246 {
20247 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20248 return SHF_ARM_PURECODE;
20249
20250 return SEC_NO_FLAGS;
20251 }
20252
20253 static unsigned int
20254 elf32_arm_count_additional_relocs (asection *sec)
20255 {
20256 struct _arm_elf_section_data *arm_data;
20257 arm_data = get_arm_elf_section_data (sec);
20258
20259 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20260 }
20261
20262 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20263 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20264 FALSE otherwise. ISECTION is the best guess matching section from the
20265 input bfd IBFD, but it might be NULL. */
20266
20267 static bfd_boolean
20268 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20269 bfd *obfd ATTRIBUTE_UNUSED,
20270 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20271 Elf_Internal_Shdr *osection)
20272 {
20273 switch (osection->sh_type)
20274 {
20275 case SHT_ARM_EXIDX:
20276 {
20277 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20278 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20279 unsigned i = 0;
20280
20281 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20282 osection->sh_info = 0;
20283
20284 /* The sh_link field must be set to the text section associated with
20285 this index section. Unfortunately the ARM EHABI does not specify
20286 exactly how to determine this association. Our caller does try
20287 to match up OSECTION with its corresponding input section however
20288 so that is a good first guess. */
20289 if (isection != NULL
20290 && osection->bfd_section != NULL
20291 && isection->bfd_section != NULL
20292 && isection->bfd_section->output_section != NULL
20293 && isection->bfd_section->output_section == osection->bfd_section
20294 && iheaders != NULL
20295 && isection->sh_link > 0
20296 && isection->sh_link < elf_numsections (ibfd)
20297 && iheaders[isection->sh_link]->bfd_section != NULL
20298 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20299 )
20300 {
20301 for (i = elf_numsections (obfd); i-- > 0;)
20302 if (oheaders[i]->bfd_section
20303 == iheaders[isection->sh_link]->bfd_section->output_section)
20304 break;
20305 }
20306
20307 if (i == 0)
20308 {
20309 /* Failing that we have to find a matching section ourselves. If
20310 we had the output section name available we could compare that
20311 with input section names. Unfortunately we don't. So instead
20312 we use a simple heuristic and look for the nearest executable
20313 section before this one. */
20314 for (i = elf_numsections (obfd); i-- > 0;)
20315 if (oheaders[i] == osection)
20316 break;
20317 if (i == 0)
20318 break;
20319
20320 while (i-- > 0)
20321 if (oheaders[i]->sh_type == SHT_PROGBITS
20322 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20323 == (SHF_ALLOC | SHF_EXECINSTR))
20324 break;
20325 }
20326
20327 if (i)
20328 {
20329 osection->sh_link = i;
20330 /* If the text section was part of a group
20331 then the index section should be too. */
20332 if (oheaders[i]->sh_flags & SHF_GROUP)
20333 osection->sh_flags |= SHF_GROUP;
20334 return TRUE;
20335 }
20336 }
20337 break;
20338
20339 case SHT_ARM_PREEMPTMAP:
20340 osection->sh_flags = SHF_ALLOC;
20341 break;
20342
20343 case SHT_ARM_ATTRIBUTES:
20344 case SHT_ARM_DEBUGOVERLAY:
20345 case SHT_ARM_OVERLAYSECTION:
20346 default:
20347 break;
20348 }
20349
20350 return FALSE;
20351 }
20352
20353 /* Returns TRUE if NAME is an ARM mapping symbol.
20354 Traditionally the symbols $a, $d and $t have been used.
20355 The ARM ELF standard also defines $x (for A64 code). It also allows a
20356 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20357 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20358 not support them here. $t.x indicates the start of ThumbEE instructions. */
20359
20360 static bfd_boolean
20361 is_arm_mapping_symbol (const char * name)
20362 {
20363 return name != NULL /* Paranoia. */
20364 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20365 the mapping symbols could have acquired a prefix.
20366 We do not support this here, since such symbols no
20367 longer conform to the ARM ELF ABI. */
20368 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20369 && (name[2] == 0 || name[2] == '.');
20370 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20371 any characters that follow the period are legal characters for the body
20372 of a symbol's name. For now we just assume that this is the case. */
20373 }
20374
20375 /* Make sure that mapping symbols in object files are not removed via the
20376 "strip --strip-unneeded" tool. These symbols are needed in order to
20377 correctly generate interworking veneers, and for byte swapping code
20378 regions. Once an object file has been linked, it is safe to remove the
20379 symbols as they will no longer be needed. */
20380
20381 static void
20382 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20383 {
20384 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20385 && sym->section != bfd_abs_section_ptr
20386 && is_arm_mapping_symbol (sym->name))
20387 sym->flags |= BSF_KEEP;
20388 }
20389
20390 #undef elf_backend_copy_special_section_fields
20391 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20392
20393 #define ELF_ARCH bfd_arch_arm
20394 #define ELF_TARGET_ID ARM_ELF_DATA
20395 #define ELF_MACHINE_CODE EM_ARM
20396 #ifdef __QNXTARGET__
20397 #define ELF_MAXPAGESIZE 0x1000
20398 #else
20399 #define ELF_MAXPAGESIZE 0x10000
20400 #endif
20401 #define ELF_MINPAGESIZE 0x1000
20402 #define ELF_COMMONPAGESIZE 0x1000
20403
20404 #define bfd_elf32_mkobject elf32_arm_mkobject
20405
20406 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20407 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20408 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20409 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20410 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20411 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20412 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20413 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20414 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20415 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20416 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20417 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20418
20419 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20420 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20421 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20422 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20423 #define elf_backend_check_relocs elf32_arm_check_relocs
20424 #define elf_backend_update_relocs elf32_arm_update_relocs
20425 #define elf_backend_relocate_section elf32_arm_relocate_section
20426 #define elf_backend_write_section elf32_arm_write_section
20427 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20428 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20429 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20430 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20431 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20432 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20433 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20434 #define elf_backend_init_file_header elf32_arm_init_file_header
20435 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20436 #define elf_backend_object_p elf32_arm_object_p
20437 #define elf_backend_fake_sections elf32_arm_fake_sections
20438 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20439 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20440 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20441 #define elf_backend_size_info elf32_arm_size_info
20442 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20443 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20444 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20445 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20446 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20447 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20448 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20449 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20450
20451 #define elf_backend_can_refcount 1
20452 #define elf_backend_can_gc_sections 1
20453 #define elf_backend_plt_readonly 1
20454 #define elf_backend_want_got_plt 1
20455 #define elf_backend_want_plt_sym 0
20456 #define elf_backend_want_dynrelro 1
20457 #define elf_backend_may_use_rel_p 1
20458 #define elf_backend_may_use_rela_p 0
20459 #define elf_backend_default_use_rela_p 0
20460 #define elf_backend_dtrel_excludes_plt 1
20461
20462 #define elf_backend_got_header_size 12
20463 #define elf_backend_extern_protected_data 1
20464
20465 #undef elf_backend_obj_attrs_vendor
20466 #define elf_backend_obj_attrs_vendor "aeabi"
20467 #undef elf_backend_obj_attrs_section
20468 #define elf_backend_obj_attrs_section ".ARM.attributes"
20469 #undef elf_backend_obj_attrs_arg_type
20470 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20471 #undef elf_backend_obj_attrs_section_type
20472 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20473 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20474 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20475
20476 #undef elf_backend_section_flags
20477 #define elf_backend_section_flags elf32_arm_section_flags
20478 #undef elf_backend_lookup_section_flags_hook
20479 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20480
20481 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20482
20483 #include "elf32-target.h"
20484
20485 /* Native Client targets. */
20486
20487 #undef TARGET_LITTLE_SYM
20488 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20489 #undef TARGET_LITTLE_NAME
20490 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20491 #undef TARGET_BIG_SYM
20492 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20493 #undef TARGET_BIG_NAME
20494 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20495
20496 /* Like elf32_arm_link_hash_table_create -- but overrides
20497 appropriately for NaCl. */
20498
20499 static struct bfd_link_hash_table *
20500 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20501 {
20502 struct bfd_link_hash_table *ret;
20503
20504 ret = elf32_arm_link_hash_table_create (abfd);
20505 if (ret)
20506 {
20507 struct elf32_arm_link_hash_table *htab
20508 = (struct elf32_arm_link_hash_table *) ret;
20509
20510 htab->nacl_p = 1;
20511
20512 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20513 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20514 }
20515 return ret;
20516 }
20517
20518 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20519 really need to use elf32_arm_modify_segment_map. But we do it
20520 anyway just to reduce gratuitous differences with the stock ARM backend. */
20521
20522 static bfd_boolean
20523 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20524 {
20525 return (elf32_arm_modify_segment_map (abfd, info)
20526 && nacl_modify_segment_map (abfd, info));
20527 }
20528
20529 static bfd_boolean
20530 elf32_arm_nacl_final_write_processing (bfd *abfd)
20531 {
20532 arm_final_write_processing (abfd);
20533 return nacl_final_write_processing (abfd);
20534 }
20535
20536 static bfd_vma
20537 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20538 const arelent *rel ATTRIBUTE_UNUSED)
20539 {
20540 return plt->vma
20541 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20542 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20543 }
20544
20545 #undef elf32_bed
20546 #define elf32_bed elf32_arm_nacl_bed
20547 #undef bfd_elf32_bfd_link_hash_table_create
20548 #define bfd_elf32_bfd_link_hash_table_create \
20549 elf32_arm_nacl_link_hash_table_create
20550 #undef elf_backend_plt_alignment
20551 #define elf_backend_plt_alignment 4
20552 #undef elf_backend_modify_segment_map
20553 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20554 #undef elf_backend_modify_headers
20555 #define elf_backend_modify_headers nacl_modify_headers
20556 #undef elf_backend_final_write_processing
20557 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20558 #undef bfd_elf32_get_synthetic_symtab
20559 #undef elf_backend_plt_sym_val
20560 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20561 #undef elf_backend_copy_special_section_fields
20562
20563 #undef ELF_MINPAGESIZE
20564 #undef ELF_COMMONPAGESIZE
20565
20566
20567 #include "elf32-target.h"
20568
20569 /* Reset to defaults. */
20570 #undef elf_backend_plt_alignment
20571 #undef elf_backend_modify_segment_map
20572 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20573 #undef elf_backend_modify_headers
20574 #undef elf_backend_final_write_processing
20575 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20576 #undef ELF_MINPAGESIZE
20577 #define ELF_MINPAGESIZE 0x1000
20578 #undef ELF_COMMONPAGESIZE
20579 #define ELF_COMMONPAGESIZE 0x1000
20580
20581
20582 /* FDPIC Targets. */
20583
20584 #undef TARGET_LITTLE_SYM
20585 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20586 #undef TARGET_LITTLE_NAME
20587 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20588 #undef TARGET_BIG_SYM
20589 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20590 #undef TARGET_BIG_NAME
20591 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20592 #undef elf_match_priority
20593 #define elf_match_priority 128
20594 #undef ELF_OSABI
20595 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20596
20597 /* Like elf32_arm_link_hash_table_create -- but overrides
20598 appropriately for FDPIC. */
20599
20600 static struct bfd_link_hash_table *
20601 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20602 {
20603 struct bfd_link_hash_table *ret;
20604
20605 ret = elf32_arm_link_hash_table_create (abfd);
20606 if (ret)
20607 {
20608 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20609
20610 htab->fdpic_p = 1;
20611 }
20612 return ret;
20613 }
20614
20615 /* We need dynamic symbols for every section, since segments can
20616 relocate independently. */
20617 static bfd_boolean
20618 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20619 struct bfd_link_info *info
20620 ATTRIBUTE_UNUSED,
20621 asection *p ATTRIBUTE_UNUSED)
20622 {
20623 switch (elf_section_data (p)->this_hdr.sh_type)
20624 {
20625 case SHT_PROGBITS:
20626 case SHT_NOBITS:
20627 /* If sh_type is yet undecided, assume it could be
20628 SHT_PROGBITS/SHT_NOBITS. */
20629 case SHT_NULL:
20630 return FALSE;
20631
20632 /* There shouldn't be section relative relocations
20633 against any other section. */
20634 default:
20635 return TRUE;
20636 }
20637 }
20638
20639 #undef elf32_bed
20640 #define elf32_bed elf32_arm_fdpic_bed
20641
20642 #undef bfd_elf32_bfd_link_hash_table_create
20643 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20644
20645 #undef elf_backend_omit_section_dynsym
20646 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20647
20648 #include "elf32-target.h"
20649
20650 #undef elf_match_priority
20651 #undef ELF_OSABI
20652 #undef elf_backend_omit_section_dynsym
20653
20654 /* VxWorks Targets. */
20655
20656 #undef TARGET_LITTLE_SYM
20657 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20658 #undef TARGET_LITTLE_NAME
20659 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20660 #undef TARGET_BIG_SYM
20661 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20662 #undef TARGET_BIG_NAME
20663 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20664
20665 /* Like elf32_arm_link_hash_table_create -- but overrides
20666 appropriately for VxWorks. */
20667
20668 static struct bfd_link_hash_table *
20669 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20670 {
20671 struct bfd_link_hash_table *ret;
20672
20673 ret = elf32_arm_link_hash_table_create (abfd);
20674 if (ret)
20675 {
20676 struct elf32_arm_link_hash_table *htab
20677 = (struct elf32_arm_link_hash_table *) ret;
20678 htab->use_rel = 0;
20679 htab->vxworks_p = 1;
20680 }
20681 return ret;
20682 }
20683
20684 static bfd_boolean
20685 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20686 {
20687 arm_final_write_processing (abfd);
20688 return elf_vxworks_final_write_processing (abfd);
20689 }
20690
20691 #undef elf32_bed
20692 #define elf32_bed elf32_arm_vxworks_bed
20693
20694 #undef bfd_elf32_bfd_link_hash_table_create
20695 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20696 #undef elf_backend_final_write_processing
20697 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20698 #undef elf_backend_emit_relocs
20699 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20700
20701 #undef elf_backend_may_use_rel_p
20702 #define elf_backend_may_use_rel_p 0
20703 #undef elf_backend_may_use_rela_p
20704 #define elf_backend_may_use_rela_p 1
20705 #undef elf_backend_default_use_rela_p
20706 #define elf_backend_default_use_rela_p 1
20707 #undef elf_backend_want_plt_sym
20708 #define elf_backend_want_plt_sym 1
20709 #undef ELF_MAXPAGESIZE
20710 #define ELF_MAXPAGESIZE 0x1000
20711
20712 #include "elf32-target.h"
20713
20714
20715 /* Merge backend specific data from an object file to the output
20716 object file when linking. */
20717
20718 static bfd_boolean
20719 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20720 {
20721 bfd *obfd = info->output_bfd;
20722 flagword out_flags;
20723 flagword in_flags;
20724 bfd_boolean flags_compatible = TRUE;
20725 asection *sec;
20726
20727 /* Check if we have the same endianness. */
20728 if (! _bfd_generic_verify_endian_match (ibfd, info))
20729 return FALSE;
20730
20731 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20732 return TRUE;
20733
20734 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20735 return FALSE;
20736
20737 /* The input BFD must have had its flags initialised. */
20738 /* The following seems bogus to me -- The flags are initialized in
20739 the assembler but I don't think an elf_flags_init field is
20740 written into the object. */
20741 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20742
20743 in_flags = elf_elfheader (ibfd)->e_flags;
20744 out_flags = elf_elfheader (obfd)->e_flags;
20745
20746 /* In theory there is no reason why we couldn't handle this. However
20747 in practice it isn't even close to working and there is no real
20748 reason to want it. */
20749 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20750 && !(ibfd->flags & DYNAMIC)
20751 && (in_flags & EF_ARM_BE8))
20752 {
20753 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20754 ibfd);
20755 return FALSE;
20756 }
20757
20758 if (!elf_flags_init (obfd))
20759 {
20760 /* If the input is the default architecture and had the default
20761 flags then do not bother setting the flags for the output
20762 architecture, instead allow future merges to do this. If no
20763 future merges ever set these flags then they will retain their
20764 uninitialised values, which surprise surprise, correspond
20765 to the default values. */
20766 if (bfd_get_arch_info (ibfd)->the_default
20767 && elf_elfheader (ibfd)->e_flags == 0)
20768 return TRUE;
20769
20770 elf_flags_init (obfd) = TRUE;
20771 elf_elfheader (obfd)->e_flags = in_flags;
20772
20773 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20774 && bfd_get_arch_info (obfd)->the_default)
20775 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20776
20777 return TRUE;
20778 }
20779
20780 /* Determine what should happen if the input ARM architecture
20781 does not match the output ARM architecture. */
20782 if (! bfd_arm_merge_machines (ibfd, obfd))
20783 return FALSE;
20784
20785 /* Identical flags must be compatible. */
20786 if (in_flags == out_flags)
20787 return TRUE;
20788
20789 /* Check to see if the input BFD actually contains any sections. If
20790 not, its flags may not have been initialised either, but it
20791 cannot actually cause any incompatiblity. Do not short-circuit
20792 dynamic objects; their section list may be emptied by
20793 elf_link_add_object_symbols.
20794
20795 Also check to see if there are no code sections in the input.
20796 In this case there is no need to check for code specific flags.
20797 XXX - do we need to worry about floating-point format compatability
20798 in data sections ? */
20799 if (!(ibfd->flags & DYNAMIC))
20800 {
20801 bfd_boolean null_input_bfd = TRUE;
20802 bfd_boolean only_data_sections = TRUE;
20803
20804 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20805 {
20806 /* Ignore synthetic glue sections. */
20807 if (strcmp (sec->name, ".glue_7")
20808 && strcmp (sec->name, ".glue_7t"))
20809 {
20810 if ((bfd_section_flags (sec)
20811 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20812 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20813 only_data_sections = FALSE;
20814
20815 null_input_bfd = FALSE;
20816 break;
20817 }
20818 }
20819
20820 if (null_input_bfd || only_data_sections)
20821 return TRUE;
20822 }
20823
20824 /* Complain about various flag mismatches. */
20825 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20826 EF_ARM_EABI_VERSION (out_flags)))
20827 {
20828 _bfd_error_handler
20829 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20830 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20831 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20832 return FALSE;
20833 }
20834
20835 /* Not sure what needs to be checked for EABI versions >= 1. */
20836 /* VxWorks libraries do not use these flags. */
20837 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20838 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20839 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20840 {
20841 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20842 {
20843 _bfd_error_handler
20844 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20845 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20846 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20847 flags_compatible = FALSE;
20848 }
20849
20850 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20851 {
20852 if (in_flags & EF_ARM_APCS_FLOAT)
20853 _bfd_error_handler
20854 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20855 ibfd, obfd);
20856 else
20857 _bfd_error_handler
20858 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20859 ibfd, obfd);
20860
20861 flags_compatible = FALSE;
20862 }
20863
20864 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20865 {
20866 if (in_flags & EF_ARM_VFP_FLOAT)
20867 _bfd_error_handler
20868 (_("error: %pB uses %s instructions, whereas %pB does not"),
20869 ibfd, "VFP", obfd);
20870 else
20871 _bfd_error_handler
20872 (_("error: %pB uses %s instructions, whereas %pB does not"),
20873 ibfd, "FPA", obfd);
20874
20875 flags_compatible = FALSE;
20876 }
20877
20878 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20879 {
20880 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20881 _bfd_error_handler
20882 (_("error: %pB uses %s instructions, whereas %pB does not"),
20883 ibfd, "Maverick", obfd);
20884 else
20885 _bfd_error_handler
20886 (_("error: %pB does not use %s instructions, whereas %pB does"),
20887 ibfd, "Maverick", obfd);
20888
20889 flags_compatible = FALSE;
20890 }
20891
20892 #ifdef EF_ARM_SOFT_FLOAT
20893 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20894 {
20895 /* We can allow interworking between code that is VFP format
20896 layout, and uses either soft float or integer regs for
20897 passing floating point arguments and results. We already
20898 know that the APCS_FLOAT flags match; similarly for VFP
20899 flags. */
20900 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20901 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20902 {
20903 if (in_flags & EF_ARM_SOFT_FLOAT)
20904 _bfd_error_handler
20905 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20906 ibfd, obfd);
20907 else
20908 _bfd_error_handler
20909 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20910 ibfd, obfd);
20911
20912 flags_compatible = FALSE;
20913 }
20914 }
20915 #endif
20916
20917 /* Interworking mismatch is only a warning. */
20918 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20919 {
20920 if (in_flags & EF_ARM_INTERWORK)
20921 {
20922 _bfd_error_handler
20923 (_("warning: %pB supports interworking, whereas %pB does not"),
20924 ibfd, obfd);
20925 }
20926 else
20927 {
20928 _bfd_error_handler
20929 (_("warning: %pB does not support interworking, whereas %pB does"),
20930 ibfd, obfd);
20931 }
20932 }
20933 }
20934
20935 return flags_compatible;
20936 }
20937
20938
20939 /* Symbian OS Targets. */
20940
20941 #undef TARGET_LITTLE_SYM
20942 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20943 #undef TARGET_LITTLE_NAME
20944 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20945 #undef TARGET_BIG_SYM
20946 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20947 #undef TARGET_BIG_NAME
20948 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20949
20950 /* Like elf32_arm_link_hash_table_create -- but overrides
20951 appropriately for Symbian OS. */
20952
20953 static struct bfd_link_hash_table *
20954 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20955 {
20956 struct bfd_link_hash_table *ret;
20957
20958 ret = elf32_arm_link_hash_table_create (abfd);
20959 if (ret)
20960 {
20961 struct elf32_arm_link_hash_table *htab
20962 = (struct elf32_arm_link_hash_table *)ret;
20963 /* There is no PLT header for Symbian OS. */
20964 htab->plt_header_size = 0;
20965 /* The PLT entries are each one instruction and one word. */
20966 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20967 htab->symbian_p = 1;
20968 /* Symbian uses armv5t or above, so use_blx is always true. */
20969 htab->use_blx = 1;
20970 htab->root.is_relocatable_executable = 1;
20971 }
20972 return ret;
20973 }
20974
20975 static const struct bfd_elf_special_section
20976 elf32_arm_symbian_special_sections[] =
20977 {
20978 /* In a BPABI executable, the dynamic linking sections do not go in
20979 the loadable read-only segment. The post-linker may wish to
20980 refer to these sections, but they are not part of the final
20981 program image. */
20982 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20983 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20984 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20985 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20986 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20987 /* These sections do not need to be writable as the SymbianOS
20988 postlinker will arrange things so that no dynamic relocation is
20989 required. */
20990 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20991 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20992 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20993 { NULL, 0, 0, 0, 0 }
20994 };
20995
20996 static void
20997 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20998 struct bfd_link_info *link_info)
20999 {
21000 /* BPABI objects are never loaded directly by an OS kernel; they are
21001 processed by a postlinker first, into an OS-specific format. If
21002 the D_PAGED bit is set on the file, BFD will align segments on
21003 page boundaries, so that an OS can directly map the file. With
21004 BPABI objects, that just results in wasted space. In addition,
21005 because we clear the D_PAGED bit, map_sections_to_segments will
21006 recognize that the program headers should not be mapped into any
21007 loadable segment. */
21008 abfd->flags &= ~D_PAGED;
21009 elf32_arm_begin_write_processing (abfd, link_info);
21010 }
21011
21012 static bfd_boolean
21013 elf32_arm_symbian_modify_segment_map (bfd *abfd,
21014 struct bfd_link_info *info)
21015 {
21016 struct elf_segment_map *m;
21017 asection *dynsec;
21018
21019 /* BPABI shared libraries and executables should have a PT_DYNAMIC
21020 segment. However, because the .dynamic section is not marked
21021 with SEC_LOAD, the generic ELF code will not create such a
21022 segment. */
21023 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
21024 if (dynsec)
21025 {
21026 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
21027 if (m->p_type == PT_DYNAMIC)
21028 break;
21029
21030 if (m == NULL)
21031 {
21032 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
21033 m->next = elf_seg_map (abfd);
21034 elf_seg_map (abfd) = m;
21035 }
21036 }
21037
21038 /* Also call the generic arm routine. */
21039 return elf32_arm_modify_segment_map (abfd, info);
21040 }
21041
21042 /* Return address for Ith PLT stub in section PLT, for relocation REL
21043 or (bfd_vma) -1 if it should not be included. */
21044
21045 static bfd_vma
21046 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
21047 const arelent *rel ATTRIBUTE_UNUSED)
21048 {
21049 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
21050 }
21051
21052 #undef elf32_bed
21053 #define elf32_bed elf32_arm_symbian_bed
21054
21055 /* The dynamic sections are not allocated on SymbianOS; the postlinker
21056 will process them and then discard them. */
21057 #undef ELF_DYNAMIC_SEC_FLAGS
21058 #define ELF_DYNAMIC_SEC_FLAGS \
21059 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
21060
21061 #undef elf_backend_emit_relocs
21062
21063 #undef bfd_elf32_bfd_link_hash_table_create
21064 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
21065 #undef elf_backend_special_sections
21066 #define elf_backend_special_sections elf32_arm_symbian_special_sections
21067 #undef elf_backend_begin_write_processing
21068 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
21069 #undef elf_backend_final_write_processing
21070 #define elf_backend_final_write_processing elf32_arm_final_write_processing
21071
21072 #undef elf_backend_modify_segment_map
21073 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
21074
21075 /* There is no .got section for BPABI objects, and hence no header. */
21076 #undef elf_backend_got_header_size
21077 #define elf_backend_got_header_size 0
21078
21079 /* Similarly, there is no .got.plt section. */
21080 #undef elf_backend_want_got_plt
21081 #define elf_backend_want_got_plt 0
21082
21083 #undef elf_backend_plt_sym_val
21084 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21085
21086 #undef elf_backend_may_use_rel_p
21087 #define elf_backend_may_use_rel_p 1
21088 #undef elf_backend_may_use_rela_p
21089 #define elf_backend_may_use_rela_p 0
21090 #undef elf_backend_default_use_rela_p
21091 #define elf_backend_default_use_rela_p 0
21092 #undef elf_backend_want_plt_sym
21093 #define elf_backend_want_plt_sym 0
21094 #undef elf_backend_dtrel_excludes_plt
21095 #define elf_backend_dtrel_excludes_plt 0
21096 #undef ELF_MAXPAGESIZE
21097 #define ELF_MAXPAGESIZE 0x8000
21098
21099 #include "elf32-target.h"
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