cpu/ChangeLog

   1 2019-06-13  Stafford Horne  <shorne@gmail.com>
   2
   3         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
   4         (l-adrp): Improve comment.
   5
   6 2019-06-13  Stafford Horne  <shorne@gmail.com>
   7
   8         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
   9         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  10         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  11         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  12         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  13         float-setflag-unordered-symantics): New pmacro for instruction
  14         symantics.
  15         (float-setflag-insn): Update to use float-setflag-insn-base.
  16         (float-setflag-unordered-insn): New pmacro for generating instructions.
  17
  18 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
  19             Stafford Horne  <shorne@gmail.com>
  20
  21         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
  22         (ORFPX-MACHS): Removed pmacro.
  23         * or1k.opc (or1k_cgen_insn_supported): New function.
  24         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
  25         (parse_regpair, print_regpair): New functions.
  26         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  27         and add comments.
  28         (h-fdr): Update comment to indicate or64.
  29         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  30         (h-fd32r): New hardware for 64-bit fpu registers.
  31         (h-i64r): New hardware for 64-bit int registers.
  32         * or1korbis.cpu (f-resv-8-1): New field.
  33         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  34         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  35         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  36         (h-roff1): New hardware.
  37         (double-field-and-ops mnemonic): New pmacro to generate operations
  38         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  39         (float-regreg-insn): Update single precision generator to MACH
  40         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  41         (float-setflag-insn): Update single precision generator to MACH
  42         ORFPX32-MACHS.  Fix double instructions from single to double
  43         precision.  Add generator for or32 64-bit instructions.
  44         (float-cust-insn cust-num): Update single precision generator to MACH
  45         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  46         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  47         ORFPX32-MACHS.
  48         (lf-rem-d): Fix operation from mod to rem.
  49         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
  50         (lf-itof-d): Fix operands from single to double.
  51         (lf-ftoi-d): Update operand mode from DI to WI.
  52
  53 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
  54
  55         * bpf.cpu: New file.
  56         * bpf.opc: Likewise.
  57
  58 2018-06-24  Nick Clifton  <nickc@redhat.com>
  59
  60         2.32 branch created.
  61
  62 2018-10-05  Richard Henderson  <rth@twiddle.net>
  63             Stafford Horne  <shorne@gmail.com>
  64
  65         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
  66         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
  67         (l-mul): Fix overflow support and indentation.
  68         (l-mulu): Fix overflow support and indentation.
  69         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
  70         (l-div); Remove incorrect carry behavior.
  71         (l-divu): Fix carry and overflow behavior.
  72         (l-mac): Add overflow support.
  73         (l-msb, l-msbu): Add carry and overflow support.
  74
  75 2018-10-05  Richard Henderson  <rth@twiddle.net>
  76
  77         * or1k.opc (parse_disp26): Add support for plta() relocations.
  78         (parse_disp21): New function.
  79         (or1k_rclass): New enum.
  80         (or1k_rtype): New enum.
  81         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
  82         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
  83         (parse_imm16): Add support for the new 21bit and 13bit relocations.
  84         * or1korbis.cpu (f-disp26): Don't assume SI.
  85         (f-disp21): New pc-relative 21-bit 13 shifted to right.
  86         (insn-opcode): Add ADRP.
  87         (l-adrp): New instruction.
  88
  89 2018-10-05  Richard Henderson  <rth@twiddle.net>
  90
  91         * or1k.opc: Add RTYPE_ enum.
  92         (INVALID_STORE_RELOC): New string.
  93         (or1k_imm16_relocs): New array array.
  94         (parse_reloc): New static function that just does the parsing.
  95         (parse_imm16): New static function for generic parsing.
  96         (parse_simm16): Change to just call parse_imm16.
  97         (parse_simm16_split): New function.
  98         (parse_uimm16): Change to call parse_imm16.
  99         (parse_uimm16_split): New function.
 100         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 101         (uimm16-split): Change to use new uimm16_split.
 102
 103 2018-07-24  Alan Modra  <amodra@gmail.com>
 104
 105         PR 23430
 106         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 107
 108 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 109
 110         * or1kcommon.cpu (spr-reg-info): Typo fix.
 111
 112 2018-03-03  Alan Modra  <amodra@gmail.com>
 113
 114         * frv.opc: Include opintl.h.
 115         (add_next_to_vliw): Use opcodes_error_handler to print error.
 116         Standardize error message.
 117         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 118
 119 2018-01-13  Nick Clifton  <nickc@redhat.com>
 120
 121         2.30 branch created.
 122
 123 2017-03-15  Stafford Horne  <shorne@gmail.com>
 124
 125         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 126
 127 2016-10-06  Alan Modra  <amodra@gmail.com>
 128
 129         * mep.opc (expand_string): Add fall through comment.
 130
 131 2016-03-03  Alan Modra  <amodra@gmail.com>
 132
 133         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 134         at what is really going on.
 135
 136 2016-03-02  Alan Modra  <amodra@gmail.com>
 137
 138         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 139
 140 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 141
 142         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 143         a constant to better align disassembler output.
 144
 145 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 146
 147         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 148
 149 2014-06-12  Alan Modra  <amodra@gmail.com>
 150
 151         * or1k.opc: Whitespace fixes.
 152
 153 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 154
 155         * or1korbis.cpu (h-atomic-reserve): New hardware.
 156         (h-atomic-address): Likewise.
 157         (insn-opcode): Add opcodes for LWA and SWA.
 158         (atomic-reserve): New operand.
 159         (atomic-address): Likewise.
 160         (l-lwa, l-swa): New instructions.
 161         (l-lbs): Fix typo in comment.
 162         (store-insn): Clear atomic reserve on store to atomic-address.
 163         Fix register names in fmt field.
 164
 165 2014-04-22  Christian Svensson  <blue@cmd.nu>
 166
 167         * openrisc.cpu: Delete.
 168         * openrisc.opc: Delete.
 169         * or1k.cpu: New file.
 170         * or1k.opc: New file.
 171         * or1kcommon.cpu: New file.
 172         * or1korbis.cpu: New file.
 173         * or1korfpx.cpu: New file.
 174
 175 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 176
 177         * epiphany.opc: Remove +x file mode.
 178
 179 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 180
 181         PR binutils/15241
 182         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 183         TLBVADDR, TLBPADDR and TLBBADVADDR.
 184
 185 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 186             Joern Rennecke  <joern.rennecke@embecosm.com>
 187
 188         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 189         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 190         (testset-insn): Add NO_DIS attribute to t.l.
 191         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 192         (move-insns): Add NO-DIS attribute to cmov.l.
 193         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 194         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 195         (op-rrr): Add NO-DIS attribute to .l.
 196         (shift-rrr): Add NO-DIS attribute to .l.
 197         (op-shift-rri): Add NO-DIS attribute to i32.l.
 198         (bitrl, movtl): Add NO-DIS attribute.
 199         (op-iextrrr): Add NO-DIS attribute to .l
 200         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 201         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 202
 203 2012-02-27  Alan Modra  <amodra@gmail.com>
 204
 205         * mt.opc (print_dollarhex): Trim values to 32 bits.
 206
 207 2011-12-15  Nick Clifton  <nickc@redhat.com>
 208
 209         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 210         hosts.
 211
 212 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 213
 214         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 215         Cast value before printing it as a long.
 216         (parse_postindex): Fix type of valuep.
 217
 218 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 219
 220         * cpu/epiphany.cpu: New file.
 221         * cpu/epiphany.opc: New file.
 222
 223 2011-08-22  Nick Clifton  <nickc@redhat.com>
 224
 225         * fr30.cpu: Newly contributed file.
 226         * fr30.opc: Likewise.
 227         * ip2k.cpu: Likewise.
 228         * ip2k.opc: Likewise.
 229         * mep-avc.cpu: Likewise.
 230         * mep-avc2.cpu: Likewise.
 231         * mep-c5.cpu: Likewise.
 232         * mep-core.cpu: Likewise.
 233         * mep-default.cpu: Likewise.
 234         * mep-ext-cop.cpu: Likewise.
 235         * mep-fmax.cpu: Likewise.
 236         * mep-h1.cpu: Likewise.
 237         * mep-ivc2.cpu: Likewise.
 238         * mep-rhcop.cpu: Likewise.
 239         * mep-sample-ucidsp.cpu: Likewise.
 240         * mep.cpu: Likewise.
 241         * mep.opc: Likewise.
 242         * openrisc.cpu: Likewise.
 243         * openrisc.opc: Likewise.
 244         * xstormy16.cpu: Likewise.
 245         * xstormy16.opc: Likewise.
 246
 247 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 248
 249         * frv.opc: #undef DEBUG.
 250
 251 2010-07-03  DJ Delorie  <dj@delorie.com>
 252
 253         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 254
 255 2010-02-11  Doug Evans  <dje@sebabeach.org>
 256
 257         * m32r.cpu (HASH-PREFIX): Delete.
 258         (duhpo, dshpo): New pmacros.
 259         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 260         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 261         attribute, define with dshpo.
 262         (uimm24): Delete HASH-PREFIX attribute.
 263         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 264         (print_signed_with_hash_prefix): New function.
 265         (print_unsigned_with_hash_prefix): New function.
 266         * xc16x.cpu (dowh): New pmacro.
 267         (upof16): Define with dowh, specify print handler.
 268         (qbit, qlobit, qhibit): Ditto.
 269         (upag16): Ditto.
 270         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 271         (print_with_dot_prefix): New functions.
 272         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 273
 274 2010-01-24  Doug Evans  <dje@sebabeach.org>
 275
 276         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 277         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 278         conditional-floating-point-conversion, ne-floating-point-conversion,
 279         float-parallel-mul-add-double-semantics): Ditto.
 280
 281 2010-01-05  Doug Evans  <dje@sebabeach.org>
 282
 283         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 284         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 285
 286 2010-01-02  Doug Evans  <dje@sebabeach.org>
 287
 288         * m32c.opc (parse_signed16): Fix typo.
 289
 290 2009-12-11  Nick Clifton  <nickc@redhat.com>
 291
 292         * frv.opc: Fix shadowed variable warnings.
 293         * m32c.opc: Fix shadowed variable warnings.
 294
 295 2009-11-14  Doug Evans  <dje@sebabeach.org>
 296
 297         Must use VOID expression in VOID context.
 298         * xc16x.cpu (mov4): Fix mode of `sequence'.
 299         (mov9, mov10): Ditto.
 300         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 301         (callr, callseg, calls, trap, rets, reti): Ditto.
 302         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 303         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 304         (exts, exts1, extsr, extsr1, prior): Ditto.
 305
 306 2009-10-23  Doug Evans  <dje@sebabeach.org>
 307
 308         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 309         cgen-ops.h -> cgen/basic-ops.h.
 310
 311 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 312
 313         * m32r.cpu (stb-plus): Typo fix.
 314
 315 2009-09-23  Doug Evans  <dje@sebabeach.org>
 316
 317         * m32r.cpu (sth-plus): Fix address mode and calculation.
 318         (stb-plus): Ditto.
 319         (clrpsw): Fix mask calculation.
 320         (bset, bclr, btst): Make mode in bit calculation match expression.
 321
 322         * xc16x.cpu (rtl-version): Set to 0.8.
 323         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 324         make uppercase.  Remove unnecessary name-prefix spec.
 325         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 326         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 327         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 328         (h-cr): New hardware.
 329         (muls): Comment out parts that won't compile, add fixme.
 330         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 331         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 332         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 333
 334 2009-07-16  Doug Evans  <dje@sebabeach.org>
 335
 336         * cpu/simplify.inc (*): One line doc strings don't need \n.
 337         (df): Invoke define-full-ifield instead of claiming it's an alias.
 338         (dno): Define.
 339         (dnop): Mark as deprecated.
 340
 341 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 342
 343         * m32c.opc (parse_lab_5_3): Use correct enum.
 344
 345 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 346
 347         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 348         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 349         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 350         arguments of "operation" to DI using "mode" and the new pmacros.
 351
 352 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 353
 354         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 355         of number 2, PID.
 356
 357 2008-12-23  Jon Beniston <jon@beniston.com>
 358
 359         * lm32.cpu: New file.
 360         * lm32.opc: New file.
 361
 362 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 363
 364         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 365         to source.
 366
 367 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 368
 369         * cris.cpu (movs, movu): Use result of extension operation when
 370         updating flags.
 371
 372 2007-07-04  Nick Clifton  <nickc@redhat.com>
 373
 374         * cris.cpu: Update copyright notice to refer to GPLv3.
 375         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 376         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 377         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 378         xc16x.opc: Likewise.
 379         * iq2000.cpu: Fix copyright notice to refer to FSF.
 380
 381 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 382
 383         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 384
 385 2007-04-20  Nick Clifton  <nickc@redhat.com>
 386
 387         * xc16x.cpu: Restore after accidentally overwriting this file with
 388         xc16x.opc.
 389
 390 2007-03-29  DJ Delorie  <dj@redhat.com>
 391
 392         * m32c.cpu (Imm-8-s4n): Fix print hook.
 393         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 394         (arith-jnz-imm4-dst-defn): Make relaxable.
 395         (arith-jnz16-imm4-dst-defn): Fix encodings.
 396
 397 2007-03-20  DJ Delorie  <dj@redhat.com>
 398
 399         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 400         mem20): New.
 401         (src16-16-20-An-relative-*): New.
 402         (dst16-*-20-An-relative-*): New.
 403         (dst16-16-16sa-*): New
 404         (dst16-16-16ar-*): New
 405         (dst32-16-16sa-Unprefixed-*): New
 406         (jsri): Fix operands.
 407         (setzx): Fix encoding.
 408
 409 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 410
 411         * m32r.opc: Formatting.
 412
 413 2006-05-22  Nick Clifton  <nickc@redhat.com>
 414
 415         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 416
 417 2006-04-10  DJ Delorie  <dj@redhat.com>
 418
 419         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 420         decides if this function accepts symbolic constants or not.
 421         (parse_signed_bitbase): Likewise.
 422         (parse_unsigned_bitbase8): Pass the new parameter.
 423         (parse_unsigned_bitbase11): Likewise.
 424         (parse_unsigned_bitbase16): Likewise.
 425         (parse_unsigned_bitbase19): Likewise.
 426         (parse_unsigned_bitbase27): Likewise.
 427         (parse_signed_bitbase8): Likewise.
 428         (parse_signed_bitbase11): Likewise.
 429         (parse_signed_bitbase19): Likewise.
 430
 431 2006-03-13  DJ Delorie  <dj@redhat.com>
 432
 433         * m32c.cpu (Bit3-S): New.
 434         (btst:s): New.
 435         * m32c.opc (parse_bit3_S): New.
 436
 437         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 438         (btst): Add optional :G suffix for MACH32.
 439         (or.b:S): New.
 440         (pop.w:G): Add optional :G suffix for MACH16.
 441         (push.b.imm): Fix syntax.
 442
 443 2006-03-10  DJ Delorie  <dj@redhat.com>
 444
 445         * m32c.cpu (mul.l): New.
 446         (mulu.l): New.
 447
 448 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 449
 450         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 451         an error message otherwise.
 452         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 453         Fix up comments to correctly describe the functions.
 454
 455 2006-02-24  DJ Delorie  <dj@redhat.com>
 456
 457         * m32c.cpu (RL_TYPE): New attribute, with macros.
 458         (Lab-8-24): Add RELAX.
 459         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 460         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 461         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 462         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 463         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 464         attribute.
 465         (jsri16, jsri32): Add 1ADDR attribute.
 466         (jsr32.w, jsr32.a): Add JUMP attribute.
 467
 468 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 469             Anil Paranjape   <anilp1@kpitcummins.com>
 470             Shilin Shakti    <shilins@kpitcummins.com>
 471
 472         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 473         description.
 474         * xc16x.opc: New file containing supporting XC16C routines.
 475
 476 2006-02-10  Nick Clifton  <nickc@redhat.com>
 477
 478         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 479
 480 2006-01-06  DJ Delorie  <dj@redhat.com>
 481
 482         * m32c.cpu (mov.w:q): Fix mode.
 483         (push32.b.imm): Likewise, for the comment.
 484
 485 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 486
 487         Second part of ms1 to mt renaming.
 488         * mt.cpu (define-arch, define-isa): Set name to mt.
 489         (define-mach): Adjust.
 490         * mt.opc (CGEN_ASM_HASH): Update.
 491         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 492         (parse_loopsize, parse_imm16): Adjust.
 493
 494 2005-12-13  DJ Delorie  <dj@redhat.com>
 495
 496         * m32c.cpu (jsri): Fix order so register names aren't treated as
 497         symbols.
 498         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 499         indexwd, indexws): Fix encodings.
 500
 501 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 502
 503         * mt.cpu: Rename from ms1.cpu.
 504         * mt.opc: Rename from ms1.opc.
 505
 506 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 507
 508         * cris.cpu (simplecris-common-writable-specregs)
 509         (simplecris-common-readable-specregs): Split from
 510         simplecris-common-specregs.  All users changed.
 511         (cris-implemented-writable-specregs-v0)
 512         (cris-implemented-readable-specregs-v0): Similar from
 513         cris-implemented-specregs-v0.
 514         (cris-implemented-writable-specregs-v3)
 515         (cris-implemented-readable-specregs-v3)
 516         (cris-implemented-writable-specregs-v8)
 517         (cris-implemented-readable-specregs-v8)
 518         (cris-implemented-writable-specregs-v10)
 519         (cris-implemented-readable-specregs-v10)
 520         (cris-implemented-writable-specregs-v32)
 521         (cris-implemented-readable-specregs-v32): Similar.
 522         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 523         insns and specializations.
 524
 525 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 526
 527         Add ms2
 528         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 529         model.
 530         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 531         f-cb2incr, f-rc3): New fields.
 532         (LOOP): New instruction.
 533         (JAL-HAZARD): New hazard.
 534         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 535         New operands.
 536         (mul, muli, dbnz, iflush): Enable for ms2
 537         (jal, reti): Has JAL-HAZARD.
 538         (ldctxt, ldfb, stfb): Only ms1.
 539         (fbcb): Only ms1,ms1-003.
 540         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 541         fbcbincrs, mfbcbincrs): Enable for ms2.
 542         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 543         * ms1.opc (parse_loopsize): New.
 544         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 545         (print_pcrel): New.
 546
 547 2005-10-28  Dave Brolley  <brolley@redhat.com>
 548
 549         Contribute the following change:
 550         2003-09-24  Dave Brolley  <brolley@redhat.com>
 551
 552         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 553         CGEN_ATTR_VALUE_TYPE.
 554         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 555         Use cgen_bitset_intersect_p.
 556
 557 2005-10-27  DJ Delorie  <dj@redhat.com>
 558
 559         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 560         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 561         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 562         imm operand is needed.
 563         (adjnz, sbjnz): Pass the right operands.
 564         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 565         unary-insn): Add -g variants for opcodes that need to support :G.
 566         (not.BW:G, push.BW:G): Call it.
 567         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 568         stzx16-imm8-imm8-abs16): Fix operand typos.
 569         * m32c.opc (m32c_asm_hash): Support bnCND.
 570         (parse_signed4n, print_signed4n): New.
 571
 572 2005-10-26  DJ Delorie  <dj@redhat.com>
 573
 574         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 575         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 576         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 577         dsp8[sp] is signed.
 578         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 579         (mov.BW:S r0,r1): Fix typo r1l->r1.
 580         (tst): Allow :G suffix.
 581         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 582
 583 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 584
 585         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 586
 587 2005-10-25  DJ Delorie  <dj@redhat.com>
 588
 589         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 590         making one a macro of the other.
 591
 592 2005-10-21  DJ Delorie  <dj@redhat.com>
 593
 594         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 595         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 596         indexld, indexls): .w variants have `1' bit.
 597         (rot32.b): QI, not SI.
 598         (rot32.w): HI, not SI.
 599         (xchg16): HI for .w variant.
 600
 601 2005-10-19  Nick Clifton  <nickc@redhat.com>
 602
 603         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 604
 605 2005-10-18  Andreas Schwab  <schwab@suse.de>
 606
 607         * m32r.opc (parse_slo16): Better version of previous patch.
 608
 609 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 610
 611         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 612         size.
 613
 614 2005-07-25  DJ Delorie  <dj@redhat.com>
 615
 616         * m32c.opc (parse_unsigned8): Add %dsp8().
 617         (parse_signed8): Add %hi8().
 618         (parse_unsigned16): Add %dsp16().
 619         (parse_signed16): Add %lo16() and %hi16().
 620         (parse_lab_5_3): Make valuep a bfd_vma *.
 621
 622 2005-07-18  Nick Clifton  <nickc@redhat.com>
 623
 624         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 625         components.
 626         (f-lab32-jmp-s): Fix insertion sequence.
 627         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 628         (Dsp-40-s8): Make parameter be signed.
 629         (Dsp-40-s16): Likewise.
 630         (Dsp-48-s8): Likewise.
 631         (Dsp-48-s16): Likewise.
 632         (Imm-13-u3): Likewise. (Despite its name!)
 633         (BitBase16-16-s8): Make the parameter be unsigned.
 634         (BitBase16-8-u11-S): Likewise.
 635         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 636         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 637         relaxation.
 638
 639         * m32c.opc: Fix formatting.
 640         Use safe-ctype.h instead of ctype.h
 641         Move duplicated code sequences into a macro.
 642         Fix compile time warnings about signedness mismatches.
 643         Remove dead code.
 644         (parse_lab_5_3): New parser function.
 645
 646 2005-07-16  Jim Blandy  <jimb@redhat.com>
 647
 648         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 649         to represent isa sets.
 650
 651 2005-07-15  Jim Blandy  <jimb@redhat.com>
 652
 653         * m32c.cpu, m32c.opc: Fix copyright.
 654
 655 2005-07-14  Jim Blandy  <jimb@redhat.com>
 656
 657         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 658
 659 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 660
 661         * ms1.opc (print_dollarhex): Correct format string.
 662
 663 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 664
 665         * iq2000.cpu: Include from binutils cpu dir.
 666
 667 2005-07-05  Nick Clifton  <nickc@redhat.com>
 668
 669         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 670         unsigned in order to avoid compile time warnings about sign
 671         conflicts.
 672
 673         * ms1.opc (parse_*): Likewise.
 674         (parse_imm16): Use a "void *" as it is passed both signed and
 675         unsigned arguments.
 676
 677 2005-07-01  Nick Clifton  <nickc@redhat.com>
 678
 679         * frv.opc: Update to ISO C90 function declaration style.
 680         * iq2000.opc: Likewise.
 681         * m32r.opc: Likewise.
 682         * sh.opc: Likewise.
 683
 684 2005-06-15  Dave Brolley  <brolley@redhat.com>
 685
 686         Contributed by Red Hat.
 687         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 688         * ms1.opc: New file.  Written by Stan Cox.
 689
 690 2005-05-10  Nick Clifton  <nickc@redhat.com>
 691
 692         * Update the address and phone number of the FSF organization in
 693         the GPL notices in the following files:
 694         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 695         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 696         sh64-media.cpu, simplify.inc
 697
 698 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 699
 700         * frv.opc (parse_A): Warning fix.
 701
 702 2005-02-23  Nick Clifton  <nickc@redhat.com>
 703
 704         * frv.opc: Fixed compile time warnings about differing signed'ness
 705         of pointers passed to functions.
 706         * m32r.opc: Likewise.
 707
 708 2005-02-11  Nick Clifton  <nickc@redhat.com>
 709
 710         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 711         'bfd_vma *' in order avoid compile time warning message.
 712
 713 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 714
 715         * cris.cpu (mstep): Add missing insn.
 716
 717 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 718
 719         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 720         * frv.cpu: Add support for TLS annotations in loads and calll.
 721         * frv.opc (parse_symbolic_address): New.
 722         (parse_ldd_annotation): New.
 723         (parse_call_annotation): New.
 724         (parse_ld_annotation): New.
 725         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 726         Introduce TLS relocations.
 727         (parse_d12, parse_s12, parse_u12): Likewise.
 728         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 729         (parse_call_label, print_at): New.
 730
 731 2004-12-21  Mikael Starvik  <starvik@axis.com>
 732
 733         * cris.cpu (cris-set-mem): Correct integral write semantics.
 734
 735 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 736
 737         * cris.cpu: New file.
 738
 739 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 740
 741         * iq2000.cpu: Added quotes around macro arguments so that they
 742         will work with newer versions of guile.
 743
 744 2004-10-27  Nick Clifton  <nickc@redhat.com>
 745
 746         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 747         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 748         operand.
 749         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 750         with guile.
 751
 752 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 753
 754         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 755
 756 2004-05-15  Nick Clifton  <nickc@redhat.com>
 757
 758         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 759
 760 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 761
 762         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 763
 764 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 765
 766         * frv.cpu (define-arch frv): Add fr450 mach.
 767         (define-mach fr450): New.
 768         (define-model fr450): New.  Add profile units to every fr450 insn.
 769         (define-attr UNIT): Add MDCUTSSI.
 770         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 771         (define-attr AUDIO): New boolean.
 772         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 773         (f-LRA-null, f-TLBPR-null): New fields.
 774         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 775         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 776         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 777         (LRA-null, TLBPR-null): New macros.
 778         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 779         (load-real-address): New macro.
 780         (lrai, lrad, tlbpr): New instructions.
 781         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 782         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 783         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 784         (media-low-clear-semantics, media-scope-limit-semantics)
 785         (media-quad-limit, media-quad-shift): New macros.
 786         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 787         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 788         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 789         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 790         (fr450_unit_mapping): New array.
 791         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 792         for new MDCUTSSI unit.
 793         (fr450_check_insn_major_constraints): New function.
 794         (check_insn_major_constraints): Use it.
 795
 796 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 797
 798         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 799         (scutss): Change unit to I0.
 800         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 801         (mqsaths): Fix FR400-MAJOR categorization.
 802         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 803         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 804         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 805         combinations.
 806
 807 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 808
 809         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 810         (rstb, rsth, rst, rstd, rstq): Delete.
 811         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 812
 813 2004-02-23  Nick Clifton  <nickc@redhat.com>
 814
 815         * Apply these patches from Renesas:
 816
 817         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 818
 819         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 820         disassembling codes for 0x*2 addresses.
 821
 822         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 823
 824         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 825
 826         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 827
 828         * cpu/m32r.cpu : Add new model m32r2.
 829         Add new instructions.
 830         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 831         Changed PIPE attr of push from O to OS.
 832         Care for Little-endian of M32R.
 833         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 834         Care for Little-endian of M32R.
 835         (parse_slo16): signed extension for value.
 836
 837 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 838
 839         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 840         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 841
 842         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 843         written by Ben Elliston.
 844
 845 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 846
 847         * frv.cpu (UNIT): Add IACC.
 848         (iacc-multiply-r-r): Use it.
 849         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 850         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 851
 852 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 853
 854         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 855         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 856         cut&paste errors in shifting/truncating numerical operands.
 857         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 858         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 859         (parse_uslo16): Likewise.
 860         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 861         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 862         (parse_s12): Likewise.
 863         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 864         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 865         (parse_uslo16): Likewise.
 866         (parse_uhi16): Parse gothi and gotfuncdeschi.
 867         (parse_d12): Parse got12 and gotfuncdesc12.
 868         (parse_s12): Likewise.
 869
 870 2003-10-10  Dave Brolley  <brolley@redhat.com>
 871
 872         * frv.cpu (dnpmop): New p-macro.
 873         (GRdoublek): Use dnpmop.
 874         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 875         (store-double-r-r): Use (.sym regtype doublek).
 876         (r-store-double): Ditto.
 877         (store-double-r-r-u): Ditto.
 878         (conditional-store-double): Ditto.
 879         (conditional-store-double-u): Ditto.
 880         (store-double-r-simm): Ditto.
 881         (fmovs): Assign to UNIT FMALL.
 882
 883 2003-10-06  Dave Brolley  <brolley@redhat.com>
 884
 885         * frv.cpu, frv.opc: Add support for fr550.
 886
 887 2003-09-24  Dave Brolley  <brolley@redhat.com>
 888
 889         * frv.cpu (u-commit): New modelling unit for fr500.
 890         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 891         (commit-r): Use u-commit model for fr500.
 892         (commit): Ditto.
 893         (conditional-float-binary-op): Take profiling data as an argument.
 894         Update callers.
 895         (ne-float-binary-op): Ditto.
 896
 897 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 898
 899         * frv.cpu (nldqi): Delete unimplemented instruction.
 900
 901 2003-09-12  Dave Brolley  <brolley@redhat.com>
 902
 903         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 904         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 905         frv_ref_SI to get input register referenced for profiling.
 906         (clear-ne-flag-all): Pass insn profiling in as an argument.
 907         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 908
 909 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 910
 911         * frv.cpu: Typographical corrections.
 912
 913 2003-09-09  Dave Brolley  <brolley@redhat.com>
 914
 915         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 916         (conditional-media-dual-complex, media-quad-complex): Likewise.
 917
 918 2003-09-04  Dave Brolley  <brolley@redhat.com>
 919
 920         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 921         Update all callers.
 922         (conditional-register-transfer): Ditto.
 923         (cache-preload): Ditto.
 924         (floating-point-conversion): Ditto.
 925         (floating-point-neg): Ditto.
 926         (float-abs): Ditto.
 927         (float-binary-op-s): Ditto.
 928         (conditional-float-binary-op): Ditto.
 929         (ne-float-binary-op): Ditto.
 930         (float-dual-arith): Ditto.
 931         (ne-float-dual-arith): Ditto.
 932
 933 2003-09-03  Dave Brolley  <brolley@redhat.com>
 934
 935         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 936         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 937         MCLRACC-1.
 938         (A): Removed operand.
 939         (A0,A1): New operands replace operand A.
 940         (mnop): Now a real insn
 941         (mclracc): Removed insn.
 942         (mclracc-0, mclracc-1): New insns replace mclracc.
 943         (all insns): Use new UNIT attributes.
 944
 945 2003-08-21  Nick Clifton  <nickc@redhat.com>
 946
 947         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 948         and u-media-dual-btoh with output parameter.
 949         (cmbtoh): Add profiling hack.
 950
 951 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 952
 953         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 954
 955 2003-06-10  Doug Evans  <dje@sebabeach.org>
 956
 957         * frv.cpu: Add IDOC attribute.
 958
 959 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 960
 961         Contributed by Red Hat.
 962         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 963         Stan Cox, and Frank Ch. Eigler.
 964         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 965         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 966         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 967         * iq10.cpu: New file.  Written by Jeff Johnston.
 968
 969 2003-06-05  Nick Clifton  <nickc@redhat.com>
 970
 971         * frv.cpu (FRintieven): New operand.  An even-numbered only
 972         version of the FRinti operand.
 973         (FRintjeven): Likewise for FRintj.
 974         (FRintkeven): Likewise for FRintk.
 975         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 976         media-quad-arith-sat-semantics, media-quad-arith-sat,
 977         conditional-media-quad-arith-sat, mdunpackh,
 978         media-quad-multiply-semantics, media-quad-multiply,
 979         conditional-media-quad-multiply, media-quad-complex-i,
 980         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 981         conditional-media-quad-multiply-acc, munpackh,
 982         media-quad-multiply-cross-acc-semantics, mdpackh,
 983         media-quad-multiply-cross-acc, mbtoh-semantics,
 984         media-quad-cross-multiply-cross-acc-semantics,
 985         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 986         media-quad-cross-multiply-acc-semantics, cmbtoh,
 987         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 988         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 989         cmhtob): Use new operands.
 990         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
 991         (parse_even_register): New function.
 992
 993 2003-06-03  Nick Clifton  <nickc@redhat.com>
 994
 995         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
 996         immediate value not unsigned.
 997
 998 2003-06-03  Andrew Cagney  <cagney@redhat.com>
 999
1000         Contributed by Red Hat.
1001         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1002         and Eric Christopher.
1003         * frv.opc: New file.  Written by Catherine Moore, and Dave
1004         Brolley.
1005         * simplify.inc: New file.  Written by Doug Evans.
1006
1007 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1008
1009         * New file.
1010
1011 \f
1012 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1013
1014 Copying and distribution of this file, with or without modification,
1015 are permitted in any medium without royalty provided the copyright
1016 notice and this notice are preserved.
1017
1018 Local Variables:
1019 mode: change-log
1020 left-margin: 8
1021 fill-column: 74
1022 version-control: never
1023 End: