1 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
2 David Faust <david.faust@oracle.com>
4 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
5 (define-alu-insn-mov): Likewise.
7 (define-alu-instructions): Likewise.
8 (define-endian-insn): Likewise.
9 (define-lddw): Likewise.
15 (define-ldstx-insns): Likewise.
16 (define-st-insns): Likewise.
17 (define-cond-jump-insn): Likewise.
19 (define-condjump-insns): Likewise.
20 (define-call-insn): Likewise.
23 (define-atomic-insns): Likewise.
24 (sem-exchange-and-add): New macro.
25 * bpf.cpu ("brkpt"): New instruction.
26 (bpfbf): Set word-bitsize to 32 and insn-endian big.
27 (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
28 (h-pc): Expand definition.
29 * bpf.opc (bpf_print_insn): Set endian_code to BIG.
31 2020-05-21 Alan Modra <amodra@gmail.com>
33 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
34 "if (x) free (x)" with "free (x)".
36 2020-05-19 Stafford Horne <shorne@gmail.com>
39 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
40 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
41 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
42 * or1kcommon.cpu (h-fdr): Remove hardware.
43 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
44 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
45 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
46 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
47 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
49 2020-02-16 David Faust <david.faust@oracle.com>
51 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
52 (dcji) New version with support for JMP32
54 2020-02-03 Alan Modra <amodra@gmail.com>
56 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
58 2020-02-01 Alan Modra <amodra@gmail.com>
60 * frv.cpu (f-u12): Multiply rather than left shift signed values.
61 (f-label16, f-label24): Likewise.
63 2020-01-30 Alan Modra <amodra@gmail.com>
65 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
66 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
67 (f-dst32-rn-prefixed-QI): Likewise.
68 (f-dsp-32-s32): Mask before shifting left.
69 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
70 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
72 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
73 (h-gr-SI): Mask before shifting.
75 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
77 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
78 (neg and neg32) use OP_SRC_K even if they operate only in
81 2020-01-18 Nick Clifton <nickc@redhat.com>
83 Binutils 2.34 branch created.
85 2020-01-13 Alan Modra <amodra@gmail.com>
87 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
88 left shift signed values.
90 2020-01-06 Alan Modra <amodra@gmail.com>
92 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
93 bits before shifting rather than masking after shifting.
94 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
95 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
96 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
97 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
99 2020-01-04 Alan Modra <amodra@gmail.com>
101 * m32r.cpu (f-disp8): Avoid left shift of negative values.
102 (f-disp16, f-disp24): Likewise.
104 2019-12-23 Alan Modra <amodra@gmail.com>
106 * iq2000.cpu (f-offset): Avoid left shift of negative values.
108 2019-12-20 Alan Modra <amodra@gmail.com>
110 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
112 2019-12-17 Alan Modra <amodra@gmail.com>
114 * bpf.cpu (f-imm64): Avoid signed overflow.
116 2019-12-16 Alan Modra <amodra@gmail.com>
118 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
120 2019-12-11 Alan Modra <amodra@gmail.com>
122 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
123 * lm32.cpu (f-branch, f-vall): Likewise.
124 * m32.cpu (f-lab-8-16): Likewise.
126 2019-12-11 Alan Modra <amodra@gmail.com>
128 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
129 shift left to avoid UB on left shift of negative values.
131 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
133 * bpf.cpu: Fix comment describing the 128-bit instruction format.
135 2019-09-09 Phil Blundell <pb@pbcl.net>
137 binutils 2.33 branch created.
139 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
141 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
144 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
146 * bpf.cpu (dlabs): New pmacro.
149 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
151 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
152 explicit 'dst' argument.
154 2019-06-13 Stafford Horne <shorne@gmail.com>
156 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
158 2019-06-13 Stafford Horne <shorne@gmail.com>
160 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
161 (l-adrp): Improve comment.
163 2019-06-13 Stafford Horne <shorne@gmail.com>
165 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
166 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
167 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
168 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
169 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
170 float-setflag-unordered-symantics): New pmacro for instruction
172 (float-setflag-insn): Update to use float-setflag-insn-base.
173 (float-setflag-unordered-insn): New pmacro for generating instructions.
175 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
176 Stafford Horne <shorne@gmail.com>
178 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
179 (ORFPX-MACHS): Removed pmacro.
180 * or1k.opc (or1k_cgen_insn_supported): New function.
181 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
182 (parse_regpair, print_regpair): New functions.
183 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
185 (h-fdr): Update comment to indicate or64.
186 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
187 (h-fd32r): New hardware for 64-bit fpu registers.
188 (h-i64r): New hardware for 64-bit int registers.
189 * or1korbis.cpu (f-resv-8-1): New field.
190 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
191 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
192 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
193 (h-roff1): New hardware.
194 (double-field-and-ops mnemonic): New pmacro to generate operations
195 rDD32F, rAD32F, rBD32F, rDDI and rADI.
196 (float-regreg-insn): Update single precision generator to MACH
197 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
198 (float-setflag-insn): Update single precision generator to MACH
199 ORFPX32-MACHS. Fix double instructions from single to double
200 precision. Add generator for or32 64-bit instructions.
201 (float-cust-insn cust-num): Update single precision generator to MACH
202 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
203 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
205 (lf-rem-d): Fix operation from mod to rem.
206 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
207 (lf-itof-d): Fix operands from single to double.
208 (lf-ftoi-d): Update operand mode from DI to WI.
210 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
215 2018-06-24 Nick Clifton <nickc@redhat.com>
219 2018-10-05 Richard Henderson <rth@twiddle.net>
220 Stafford Horne <shorne@gmail.com>
222 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
223 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
224 (l-mul): Fix overflow support and indentation.
225 (l-mulu): Fix overflow support and indentation.
226 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
227 (l-div); Remove incorrect carry behavior.
228 (l-divu): Fix carry and overflow behavior.
229 (l-mac): Add overflow support.
230 (l-msb, l-msbu): Add carry and overflow support.
232 2018-10-05 Richard Henderson <rth@twiddle.net>
234 * or1k.opc (parse_disp26): Add support for plta() relocations.
235 (parse_disp21): New function.
236 (or1k_rclass): New enum.
237 (or1k_rtype): New enum.
238 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
239 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
240 (parse_imm16): Add support for the new 21bit and 13bit relocations.
241 * or1korbis.cpu (f-disp26): Don't assume SI.
242 (f-disp21): New pc-relative 21-bit 13 shifted to right.
243 (insn-opcode): Add ADRP.
244 (l-adrp): New instruction.
246 2018-10-05 Richard Henderson <rth@twiddle.net>
248 * or1k.opc: Add RTYPE_ enum.
249 (INVALID_STORE_RELOC): New string.
250 (or1k_imm16_relocs): New array array.
251 (parse_reloc): New static function that just does the parsing.
252 (parse_imm16): New static function for generic parsing.
253 (parse_simm16): Change to just call parse_imm16.
254 (parse_simm16_split): New function.
255 (parse_uimm16): Change to call parse_imm16.
256 (parse_uimm16_split): New function.
257 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
258 (uimm16-split): Change to use new uimm16_split.
260 2018-07-24 Alan Modra <amodra@gmail.com>
263 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
265 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
267 * or1kcommon.cpu (spr-reg-info): Typo fix.
269 2018-03-03 Alan Modra <amodra@gmail.com>
271 * frv.opc: Include opintl.h.
272 (add_next_to_vliw): Use opcodes_error_handler to print error.
273 Standardize error message.
274 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
276 2018-01-13 Nick Clifton <nickc@redhat.com>
280 2017-03-15 Stafford Horne <shorne@gmail.com>
282 * or1kcommon.cpu: Add pc set semantics to also update ppc.
284 2016-10-06 Alan Modra <amodra@gmail.com>
286 * mep.opc (expand_string): Add fall through comment.
288 2016-03-03 Alan Modra <amodra@gmail.com>
290 * fr30.cpu (f-m4): Replace bogus comment with a better guess
291 at what is really going on.
293 2016-03-02 Alan Modra <amodra@gmail.com>
295 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
297 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
299 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
300 a constant to better align disassembler output.
302 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
304 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
306 2014-06-12 Alan Modra <amodra@gmail.com>
308 * or1k.opc: Whitespace fixes.
310 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
312 * or1korbis.cpu (h-atomic-reserve): New hardware.
313 (h-atomic-address): Likewise.
314 (insn-opcode): Add opcodes for LWA and SWA.
315 (atomic-reserve): New operand.
316 (atomic-address): Likewise.
317 (l-lwa, l-swa): New instructions.
318 (l-lbs): Fix typo in comment.
319 (store-insn): Clear atomic reserve on store to atomic-address.
320 Fix register names in fmt field.
322 2014-04-22 Christian Svensson <blue@cmd.nu>
324 * openrisc.cpu: Delete.
325 * openrisc.opc: Delete.
326 * or1k.cpu: New file.
327 * or1k.opc: New file.
328 * or1kcommon.cpu: New file.
329 * or1korbis.cpu: New file.
330 * or1korfpx.cpu: New file.
332 2013-12-07 Mike Frysinger <vapier@gentoo.org>
334 * epiphany.opc: Remove +x file mode.
336 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
339 * lm32.cpu (Control and status registers): Add CFG2, PSW,
340 TLBVADDR, TLBPADDR and TLBBADVADDR.
342 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
343 Joern Rennecke <joern.rennecke@embecosm.com>
345 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
346 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
347 (testset-insn): Add NO_DIS attribute to t.l.
348 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
349 (move-insns): Add NO-DIS attribute to cmov.l.
350 (op-mmr-movts): Add NO-DIS attribute to movts.l.
351 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
352 (op-rrr): Add NO-DIS attribute to .l.
353 (shift-rrr): Add NO-DIS attribute to .l.
354 (op-shift-rri): Add NO-DIS attribute to i32.l.
355 (bitrl, movtl): Add NO-DIS attribute.
356 (op-iextrrr): Add NO-DIS attribute to .l
357 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
358 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
360 2012-02-27 Alan Modra <amodra@gmail.com>
362 * mt.opc (print_dollarhex): Trim values to 32 bits.
364 2011-12-15 Nick Clifton <nickc@redhat.com>
366 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
369 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
371 * epiphany.opc (parse_branch_addr): Fix type of valuep.
372 Cast value before printing it as a long.
373 (parse_postindex): Fix type of valuep.
375 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
377 * cpu/epiphany.cpu: New file.
378 * cpu/epiphany.opc: New file.
380 2011-08-22 Nick Clifton <nickc@redhat.com>
382 * fr30.cpu: Newly contributed file.
383 * fr30.opc: Likewise.
384 * ip2k.cpu: Likewise.
385 * ip2k.opc: Likewise.
386 * mep-avc.cpu: Likewise.
387 * mep-avc2.cpu: Likewise.
388 * mep-c5.cpu: Likewise.
389 * mep-core.cpu: Likewise.
390 * mep-default.cpu: Likewise.
391 * mep-ext-cop.cpu: Likewise.
392 * mep-fmax.cpu: Likewise.
393 * mep-h1.cpu: Likewise.
394 * mep-ivc2.cpu: Likewise.
395 * mep-rhcop.cpu: Likewise.
396 * mep-sample-ucidsp.cpu: Likewise.
399 * openrisc.cpu: Likewise.
400 * openrisc.opc: Likewise.
401 * xstormy16.cpu: Likewise.
402 * xstormy16.opc: Likewise.
404 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
406 * frv.opc: #undef DEBUG.
408 2010-07-03 DJ Delorie <dj@delorie.com>
410 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
412 2010-02-11 Doug Evans <dje@sebabeach.org>
414 * m32r.cpu (HASH-PREFIX): Delete.
415 (duhpo, dshpo): New pmacros.
416 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
417 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
418 attribute, define with dshpo.
419 (uimm24): Delete HASH-PREFIX attribute.
420 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
421 (print_signed_with_hash_prefix): New function.
422 (print_unsigned_with_hash_prefix): New function.
423 * xc16x.cpu (dowh): New pmacro.
424 (upof16): Define with dowh, specify print handler.
425 (qbit, qlobit, qhibit): Ditto.
427 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
428 (print_with_dot_prefix): New functions.
429 (print_with_pof_prefix, print_with_pag_prefix): New functions.
431 2010-01-24 Doug Evans <dje@sebabeach.org>
433 * frv.cpu (floating-point-conversion): Update call to fp conv op.
434 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
435 conditional-floating-point-conversion, ne-floating-point-conversion,
436 float-parallel-mul-add-double-semantics): Ditto.
438 2010-01-05 Doug Evans <dje@sebabeach.org>
440 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
441 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
443 2010-01-02 Doug Evans <dje@sebabeach.org>
445 * m32c.opc (parse_signed16): Fix typo.
447 2009-12-11 Nick Clifton <nickc@redhat.com>
449 * frv.opc: Fix shadowed variable warnings.
450 * m32c.opc: Fix shadowed variable warnings.
452 2009-11-14 Doug Evans <dje@sebabeach.org>
454 Must use VOID expression in VOID context.
455 * xc16x.cpu (mov4): Fix mode of `sequence'.
456 (mov9, mov10): Ditto.
457 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
458 (callr, callseg, calls, trap, rets, reti): Ditto.
459 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
460 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
461 (exts, exts1, extsr, extsr1, prior): Ditto.
463 2009-10-23 Doug Evans <dje@sebabeach.org>
465 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
466 cgen-ops.h -> cgen/basic-ops.h.
468 2009-09-25 Alan Modra <amodra@bigpond.net.au>
470 * m32r.cpu (stb-plus): Typo fix.
472 2009-09-23 Doug Evans <dje@sebabeach.org>
474 * m32r.cpu (sth-plus): Fix address mode and calculation.
476 (clrpsw): Fix mask calculation.
477 (bset, bclr, btst): Make mode in bit calculation match expression.
479 * xc16x.cpu (rtl-version): Set to 0.8.
480 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
481 make uppercase. Remove unnecessary name-prefix spec.
482 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
483 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
484 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
485 (h-cr): New hardware.
486 (muls): Comment out parts that won't compile, add fixme.
487 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
488 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
489 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
491 2009-07-16 Doug Evans <dje@sebabeach.org>
493 * cpu/simplify.inc (*): One line doc strings don't need \n.
494 (df): Invoke define-full-ifield instead of claiming it's an alias.
496 (dnop): Mark as deprecated.
498 2009-06-22 Alan Modra <amodra@bigpond.net.au>
500 * m32c.opc (parse_lab_5_3): Use correct enum.
502 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
504 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
505 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
506 (media-arith-sat-semantics): Explicitly sign- or zero-extend
507 arguments of "operation" to DI using "mode" and the new pmacros.
509 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
511 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
514 2008-12-23 Jon Beniston <jon@beniston.com>
516 * lm32.cpu: New file.
517 * lm32.opc: New file.
519 2008-01-29 Alan Modra <amodra@bigpond.net.au>
521 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
524 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
526 * cris.cpu (movs, movu): Use result of extension operation when
529 2007-07-04 Nick Clifton <nickc@redhat.com>
531 * cris.cpu: Update copyright notice to refer to GPLv3.
532 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
533 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
534 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
536 * iq2000.cpu: Fix copyright notice to refer to FSF.
538 2007-04-30 Mark Salter <msalter@sadr.localdomain>
540 * frv.cpu (spr-names): Support new coprocessor SPR registers.
542 2007-04-20 Nick Clifton <nickc@redhat.com>
544 * xc16x.cpu: Restore after accidentally overwriting this file with
547 2007-03-29 DJ Delorie <dj@redhat.com>
549 * m32c.cpu (Imm-8-s4n): Fix print hook.
550 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
551 (arith-jnz-imm4-dst-defn): Make relaxable.
552 (arith-jnz16-imm4-dst-defn): Fix encodings.
554 2007-03-20 DJ Delorie <dj@redhat.com>
556 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
558 (src16-16-20-An-relative-*): New.
559 (dst16-*-20-An-relative-*): New.
560 (dst16-16-16sa-*): New
561 (dst16-16-16ar-*): New
562 (dst32-16-16sa-Unprefixed-*): New
563 (jsri): Fix operands.
564 (setzx): Fix encoding.
566 2007-03-08 Alan Modra <amodra@bigpond.net.au>
568 * m32r.opc: Formatting.
570 2006-05-22 Nick Clifton <nickc@redhat.com>
572 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
574 2006-04-10 DJ Delorie <dj@redhat.com>
576 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
577 decides if this function accepts symbolic constants or not.
578 (parse_signed_bitbase): Likewise.
579 (parse_unsigned_bitbase8): Pass the new parameter.
580 (parse_unsigned_bitbase11): Likewise.
581 (parse_unsigned_bitbase16): Likewise.
582 (parse_unsigned_bitbase19): Likewise.
583 (parse_unsigned_bitbase27): Likewise.
584 (parse_signed_bitbase8): Likewise.
585 (parse_signed_bitbase11): Likewise.
586 (parse_signed_bitbase19): Likewise.
588 2006-03-13 DJ Delorie <dj@redhat.com>
590 * m32c.cpu (Bit3-S): New.
592 * m32c.opc (parse_bit3_S): New.
594 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
595 (btst): Add optional :G suffix for MACH32.
597 (pop.w:G): Add optional :G suffix for MACH16.
598 (push.b.imm): Fix syntax.
600 2006-03-10 DJ Delorie <dj@redhat.com>
602 * m32c.cpu (mul.l): New.
605 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
607 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
608 an error message otherwise.
609 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
610 Fix up comments to correctly describe the functions.
612 2006-02-24 DJ Delorie <dj@redhat.com>
614 * m32c.cpu (RL_TYPE): New attribute, with macros.
615 (Lab-8-24): Add RELAX.
616 (unary-insn-defn-g, binary-arith-imm-dst-defn,
617 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
618 (binary-arith-src-dst-defn): Add 2ADDR attribute.
619 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
620 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
622 (jsri16, jsri32): Add 1ADDR attribute.
623 (jsr32.w, jsr32.a): Add JUMP attribute.
625 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
626 Anil Paranjape <anilp1@kpitcummins.com>
627 Shilin Shakti <shilins@kpitcummins.com>
629 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
631 * xc16x.opc: New file containing supporting XC16C routines.
633 2006-02-10 Nick Clifton <nickc@redhat.com>
635 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
637 2006-01-06 DJ Delorie <dj@redhat.com>
639 * m32c.cpu (mov.w:q): Fix mode.
640 (push32.b.imm): Likewise, for the comment.
642 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
644 Second part of ms1 to mt renaming.
645 * mt.cpu (define-arch, define-isa): Set name to mt.
646 (define-mach): Adjust.
647 * mt.opc (CGEN_ASM_HASH): Update.
648 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
649 (parse_loopsize, parse_imm16): Adjust.
651 2005-12-13 DJ Delorie <dj@redhat.com>
653 * m32c.cpu (jsri): Fix order so register names aren't treated as
655 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
656 indexwd, indexws): Fix encodings.
658 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
660 * mt.cpu: Rename from ms1.cpu.
661 * mt.opc: Rename from ms1.opc.
663 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
665 * cris.cpu (simplecris-common-writable-specregs)
666 (simplecris-common-readable-specregs): Split from
667 simplecris-common-specregs. All users changed.
668 (cris-implemented-writable-specregs-v0)
669 (cris-implemented-readable-specregs-v0): Similar from
670 cris-implemented-specregs-v0.
671 (cris-implemented-writable-specregs-v3)
672 (cris-implemented-readable-specregs-v3)
673 (cris-implemented-writable-specregs-v8)
674 (cris-implemented-readable-specregs-v8)
675 (cris-implemented-writable-specregs-v10)
676 (cris-implemented-readable-specregs-v10)
677 (cris-implemented-writable-specregs-v32)
678 (cris-implemented-readable-specregs-v32): Similar.
679 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
680 insns and specializations.
682 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
685 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
687 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
688 f-cb2incr, f-rc3): New fields.
689 (LOOP): New instruction.
690 (JAL-HAZARD): New hazard.
691 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
693 (mul, muli, dbnz, iflush): Enable for ms2
694 (jal, reti): Has JAL-HAZARD.
695 (ldctxt, ldfb, stfb): Only ms1.
696 (fbcb): Only ms1,ms1-003.
697 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
698 fbcbincrs, mfbcbincrs): Enable for ms2.
699 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
700 * ms1.opc (parse_loopsize): New.
701 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
704 2005-10-28 Dave Brolley <brolley@redhat.com>
706 Contribute the following change:
707 2003-09-24 Dave Brolley <brolley@redhat.com>
709 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
710 CGEN_ATTR_VALUE_TYPE.
711 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
712 Use cgen_bitset_intersect_p.
714 2005-10-27 DJ Delorie <dj@redhat.com>
716 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
717 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
718 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
719 imm operand is needed.
720 (adjnz, sbjnz): Pass the right operands.
721 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
722 unary-insn): Add -g variants for opcodes that need to support :G.
723 (not.BW:G, push.BW:G): Call it.
724 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
725 stzx16-imm8-imm8-abs16): Fix operand typos.
726 * m32c.opc (m32c_asm_hash): Support bnCND.
727 (parse_signed4n, print_signed4n): New.
729 2005-10-26 DJ Delorie <dj@redhat.com>
731 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
732 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
733 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
735 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
736 (mov.BW:S r0,r1): Fix typo r1l->r1.
737 (tst): Allow :G suffix.
738 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
740 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
742 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
744 2005-10-25 DJ Delorie <dj@redhat.com>
746 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
747 making one a macro of the other.
749 2005-10-21 DJ Delorie <dj@redhat.com>
751 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
752 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
753 indexld, indexls): .w variants have `1' bit.
754 (rot32.b): QI, not SI.
755 (rot32.w): HI, not SI.
756 (xchg16): HI for .w variant.
758 2005-10-19 Nick Clifton <nickc@redhat.com>
760 * m32r.opc (parse_slo16): Fix bad application of previous patch.
762 2005-10-18 Andreas Schwab <schwab@suse.de>
764 * m32r.opc (parse_slo16): Better version of previous patch.
766 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
768 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
771 2005-07-25 DJ Delorie <dj@redhat.com>
773 * m32c.opc (parse_unsigned8): Add %dsp8().
774 (parse_signed8): Add %hi8().
775 (parse_unsigned16): Add %dsp16().
776 (parse_signed16): Add %lo16() and %hi16().
777 (parse_lab_5_3): Make valuep a bfd_vma *.
779 2005-07-18 Nick Clifton <nickc@redhat.com>
781 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
783 (f-lab32-jmp-s): Fix insertion sequence.
784 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
785 (Dsp-40-s8): Make parameter be signed.
786 (Dsp-40-s16): Likewise.
787 (Dsp-48-s8): Likewise.
788 (Dsp-48-s16): Likewise.
789 (Imm-13-u3): Likewise. (Despite its name!)
790 (BitBase16-16-s8): Make the parameter be unsigned.
791 (BitBase16-8-u11-S): Likewise.
792 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
793 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
796 * m32c.opc: Fix formatting.
797 Use safe-ctype.h instead of ctype.h
798 Move duplicated code sequences into a macro.
799 Fix compile time warnings about signedness mismatches.
801 (parse_lab_5_3): New parser function.
803 2005-07-16 Jim Blandy <jimb@redhat.com>
805 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
806 to represent isa sets.
808 2005-07-15 Jim Blandy <jimb@redhat.com>
810 * m32c.cpu, m32c.opc: Fix copyright.
812 2005-07-14 Jim Blandy <jimb@redhat.com>
814 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
816 2005-07-14 Alan Modra <amodra@bigpond.net.au>
818 * ms1.opc (print_dollarhex): Correct format string.
820 2005-07-06 Alan Modra <amodra@bigpond.net.au>
822 * iq2000.cpu: Include from binutils cpu dir.
824 2005-07-05 Nick Clifton <nickc@redhat.com>
826 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
827 unsigned in order to avoid compile time warnings about sign
830 * ms1.opc (parse_*): Likewise.
831 (parse_imm16): Use a "void *" as it is passed both signed and
834 2005-07-01 Nick Clifton <nickc@redhat.com>
836 * frv.opc: Update to ISO C90 function declaration style.
837 * iq2000.opc: Likewise.
838 * m32r.opc: Likewise.
841 2005-06-15 Dave Brolley <brolley@redhat.com>
843 Contributed by Red Hat.
844 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
845 * ms1.opc: New file. Written by Stan Cox.
847 2005-05-10 Nick Clifton <nickc@redhat.com>
849 * Update the address and phone number of the FSF organization in
850 the GPL notices in the following files:
851 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
852 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
853 sh64-media.cpu, simplify.inc
855 2005-02-24 Alan Modra <amodra@bigpond.net.au>
857 * frv.opc (parse_A): Warning fix.
859 2005-02-23 Nick Clifton <nickc@redhat.com>
861 * frv.opc: Fixed compile time warnings about differing signed'ness
862 of pointers passed to functions.
863 * m32r.opc: Likewise.
865 2005-02-11 Nick Clifton <nickc@redhat.com>
867 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
868 'bfd_vma *' in order avoid compile time warning message.
870 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
872 * cris.cpu (mstep): Add missing insn.
874 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
876 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
877 * frv.cpu: Add support for TLS annotations in loads and calll.
878 * frv.opc (parse_symbolic_address): New.
879 (parse_ldd_annotation): New.
880 (parse_call_annotation): New.
881 (parse_ld_annotation): New.
882 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
883 Introduce TLS relocations.
884 (parse_d12, parse_s12, parse_u12): Likewise.
885 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
886 (parse_call_label, print_at): New.
888 2004-12-21 Mikael Starvik <starvik@axis.com>
890 * cris.cpu (cris-set-mem): Correct integral write semantics.
892 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
894 * cris.cpu: New file.
896 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
898 * iq2000.cpu: Added quotes around macro arguments so that they
899 will work with newer versions of guile.
901 2004-10-27 Nick Clifton <nickc@redhat.com>
903 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
904 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
906 * iq2000.cpu (dnop index): Rename to _index to avoid complications
909 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
911 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
913 2004-05-15 Nick Clifton <nickc@redhat.com>
915 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
917 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
919 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
921 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
923 * frv.cpu (define-arch frv): Add fr450 mach.
924 (define-mach fr450): New.
925 (define-model fr450): New. Add profile units to every fr450 insn.
926 (define-attr UNIT): Add MDCUTSSI.
927 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
928 (define-attr AUDIO): New boolean.
929 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
930 (f-LRA-null, f-TLBPR-null): New fields.
931 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
932 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
933 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
934 (LRA-null, TLBPR-null): New macros.
935 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
936 (load-real-address): New macro.
937 (lrai, lrad, tlbpr): New instructions.
938 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
939 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
940 (mdcutssi): Change UNIT attribute to MDCUTSSI.
941 (media-low-clear-semantics, media-scope-limit-semantics)
942 (media-quad-limit, media-quad-shift): New macros.
943 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
944 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
945 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
946 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
947 (fr450_unit_mapping): New array.
948 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
949 for new MDCUTSSI unit.
950 (fr450_check_insn_major_constraints): New function.
951 (check_insn_major_constraints): Use it.
953 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
955 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
956 (scutss): Change unit to I0.
957 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
958 (mqsaths): Fix FR400-MAJOR categorization.
959 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
960 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
961 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
964 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
966 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
967 (rstb, rsth, rst, rstd, rstq): Delete.
968 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
970 2004-02-23 Nick Clifton <nickc@redhat.com>
972 * Apply these patches from Renesas:
974 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
976 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
977 disassembling codes for 0x*2 addresses.
979 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
981 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
983 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
985 * cpu/m32r.cpu : Add new model m32r2.
986 Add new instructions.
987 Replace occurrances of 'Mitsubishi' with 'Renesas'.
988 Changed PIPE attr of push from O to OS.
989 Care for Little-endian of M32R.
990 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
991 Care for Little-endian of M32R.
992 (parse_slo16): signed extension for value.
994 2004-02-20 Andrew Cagney <cagney@redhat.com>
996 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
997 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
999 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1000 written by Ben Elliston.
1002 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1004 * frv.cpu (UNIT): Add IACC.
1005 (iacc-multiply-r-r): Use it.
1006 * frv.opc (fr400_unit_mapping): Add entry for IACC.
1007 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1009 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1011 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1012 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1013 cut&paste errors in shifting/truncating numerical operands.
1014 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
1015 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1016 (parse_uslo16): Likewise.
1017 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1018 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1019 (parse_s12): Likewise.
1020 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1021 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1022 (parse_uslo16): Likewise.
1023 (parse_uhi16): Parse gothi and gotfuncdeschi.
1024 (parse_d12): Parse got12 and gotfuncdesc12.
1025 (parse_s12): Likewise.
1027 2003-10-10 Dave Brolley <brolley@redhat.com>
1029 * frv.cpu (dnpmop): New p-macro.
1030 (GRdoublek): Use dnpmop.
1031 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1032 (store-double-r-r): Use (.sym regtype doublek).
1033 (r-store-double): Ditto.
1034 (store-double-r-r-u): Ditto.
1035 (conditional-store-double): Ditto.
1036 (conditional-store-double-u): Ditto.
1037 (store-double-r-simm): Ditto.
1038 (fmovs): Assign to UNIT FMALL.
1040 2003-10-06 Dave Brolley <brolley@redhat.com>
1042 * frv.cpu, frv.opc: Add support for fr550.
1044 2003-09-24 Dave Brolley <brolley@redhat.com>
1046 * frv.cpu (u-commit): New modelling unit for fr500.
1047 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1048 (commit-r): Use u-commit model for fr500.
1050 (conditional-float-binary-op): Take profiling data as an argument.
1052 (ne-float-binary-op): Ditto.
1054 2003-09-19 Michael Snyder <msnyder@redhat.com>
1056 * frv.cpu (nldqi): Delete unimplemented instruction.
1058 2003-09-12 Dave Brolley <brolley@redhat.com>
1060 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1061 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1062 frv_ref_SI to get input register referenced for profiling.
1063 (clear-ne-flag-all): Pass insn profiling in as an argument.
1064 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1066 2003-09-11 Michael Snyder <msnyder@redhat.com>
1068 * frv.cpu: Typographical corrections.
1070 2003-09-09 Dave Brolley <brolley@redhat.com>
1072 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1073 (conditional-media-dual-complex, media-quad-complex): Likewise.
1075 2003-09-04 Dave Brolley <brolley@redhat.com>
1077 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1079 (conditional-register-transfer): Ditto.
1080 (cache-preload): Ditto.
1081 (floating-point-conversion): Ditto.
1082 (floating-point-neg): Ditto.
1084 (float-binary-op-s): Ditto.
1085 (conditional-float-binary-op): Ditto.
1086 (ne-float-binary-op): Ditto.
1087 (float-dual-arith): Ditto.
1088 (ne-float-dual-arith): Ditto.
1090 2003-09-03 Dave Brolley <brolley@redhat.com>
1092 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1093 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1095 (A): Removed operand.
1096 (A0,A1): New operands replace operand A.
1097 (mnop): Now a real insn
1098 (mclracc): Removed insn.
1099 (mclracc-0, mclracc-1): New insns replace mclracc.
1100 (all insns): Use new UNIT attributes.
1102 2003-08-21 Nick Clifton <nickc@redhat.com>
1104 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1105 and u-media-dual-btoh with output parameter.
1106 (cmbtoh): Add profiling hack.
1108 2003-08-19 Michael Snyder <msnyder@redhat.com>
1110 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1112 2003-06-10 Doug Evans <dje@sebabeach.org>
1114 * frv.cpu: Add IDOC attribute.
1116 2003-06-06 Andrew Cagney <cagney@redhat.com>
1118 Contributed by Red Hat.
1119 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1120 Stan Cox, and Frank Ch. Eigler.
1121 * iq2000.opc: New file. Written by Ben Elliston, Frank
1122 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1123 * iq2000m.cpu: New file. Written by Jeff Johnston.
1124 * iq10.cpu: New file. Written by Jeff Johnston.
1126 2003-06-05 Nick Clifton <nickc@redhat.com>
1128 * frv.cpu (FRintieven): New operand. An even-numbered only
1129 version of the FRinti operand.
1130 (FRintjeven): Likewise for FRintj.
1131 (FRintkeven): Likewise for FRintk.
1132 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1133 media-quad-arith-sat-semantics, media-quad-arith-sat,
1134 conditional-media-quad-arith-sat, mdunpackh,
1135 media-quad-multiply-semantics, media-quad-multiply,
1136 conditional-media-quad-multiply, media-quad-complex-i,
1137 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1138 conditional-media-quad-multiply-acc, munpackh,
1139 media-quad-multiply-cross-acc-semantics, mdpackh,
1140 media-quad-multiply-cross-acc, mbtoh-semantics,
1141 media-quad-cross-multiply-cross-acc-semantics,
1142 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1143 media-quad-cross-multiply-acc-semantics, cmbtoh,
1144 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1145 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1146 cmhtob): Use new operands.
1147 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1148 (parse_even_register): New function.
1150 2003-06-03 Nick Clifton <nickc@redhat.com>
1152 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1153 immediate value not unsigned.
1155 2003-06-03 Andrew Cagney <cagney@redhat.com>
1157 Contributed by Red Hat.
1158 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1159 and Eric Christopher.
1160 * frv.opc: New file. Written by Catherine Moore, and Dave
1162 * simplify.inc: New file. Written by Doug Evans.
1164 2003-05-02 Andrew Cagney <cagney@redhat.com>
1169 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1171 Copying and distribution of this file, with or without modification,
1172 are permitted in any medium without royalty provided the copyright
1173 notice and this notice are preserved.
1179 version-control: never