cpu/ChangeLog

   1 2021-01-09  Nick Clifton  <nickc@redhat.com>
   2
   3         * 2.36 release branch crated.
   4
   5 2020-10-05  Samanta Navarro  <ferivoz@riseup.net>
   6
   7         * m32r.cpu: Fix spelling mistakes.
   8
   9 2020-09-18  David Faust  <david.faust@oracle.com>
  10
  11         * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
  12         (define-alu-insn-bin, daib): Take ISAs as an argument.
  13         (define-alu-instructions): Update calls to daib pmacro with
  14         ISAs; add sdiv and smod.
  15
  16 2020-09-08  David Faust  <david.faust@oracle.com>
  17
  18         * bpf.cpu (define-alu-instructions): Correct semantic operators
  19         for div, mod to unsigned versions.
  20
  21 2020-09-01  Alan Modra  <amodra@gmail.com>
  22
  23         * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
  24         value by two rather than shifting left.
  25         (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
  26
  27 2020-08-26  David Faust  <david.faust@oracle.com>
  28
  29         * bpf.cpu (arch bpf): Add xbpf mach and isas.
  30         (define-xbpf-isa) New pmacro.
  31         (all-isas) Add xbpfle,xbpfbe.
  32         (endian-isas): New pmacro.
  33         (mach xbpf): New.
  34         (model xbpf-def): Likewise.
  35         (h-gpr): Add xbpf mach.
  36         (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
  37         (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
  38         (define-alu-insn-un): Use new endian-isas pmacro.
  39         (define-alu-insn-bin, define-alu-insn-mov): Likewise.
  40         (define-endian-insn, define-lddw): Likewise.
  41         (dlind, dxli, dxsi, dsti): Likewise.
  42         (define-cond-jump-insn, define-call-insn): Likewise.
  43         (define-atomic-insns): Likewise.
  44
  45 2020-07-04  Nick Clifton  <nickc@redhat.com>
  46
  47         Binutils 2.35 branch created.
  48
  49 2020-06-25 David Faust  <david.faust@oracle.com>
  50
  51         * bpf.cpu (f-offset16): Change type from INT to HI.
  52         (dxli): Simplify memory access.
  53         (dxsi): Likewise.
  54         (define-endian-insn): Update c-call in semantics.
  55         (dlabs) Likewise.
  56         (dlind) Likewise.
  57
  58 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  59
  60         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  61         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  62
  63 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  64
  65         * mep.opc (print_slot_insn): Pass the insn endianness to
  66         cgen_get_insn_value.
  67
  68 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  69             David Faust <david.faust@oracle.com>
  70
  71         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  72         (define-alu-insn-mov): Likewise.
  73         (daib): Likewise.
  74         (define-alu-instructions): Likewise.
  75         (define-endian-insn): Likewise.
  76         (define-lddw): Likewise.
  77         (dlabs): Likewise.
  78         (dlind): Likewise.
  79         (dxli): Likewise.
  80         (dxsi): Likewise.
  81         (dsti): Likewise.
  82         (define-ldstx-insns): Likewise.
  83         (define-st-insns): Likewise.
  84         (define-cond-jump-insn): Likewise.
  85         (dcji): Likewise.
  86         (define-condjump-insns): Likewise.
  87         (define-call-insn): Likewise.
  88         (ja): Likewise.
  89         ("exit"): Likewise.
  90         (define-atomic-insns): Likewise.
  91         (sem-exchange-and-add): New macro.
  92         * bpf.cpu ("brkpt"): New instruction.
  93         (bpfbf): Set word-bitsize to 32 and insn-endian big.
  94         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
  95         (h-pc): Expand definition.
  96         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
  97
  98 2020-05-21  Alan Modra  <amodra@gmail.com>
  99
 100         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
 101         "if (x) free (x)" with "free (x)".
 102
 103 2020-05-19  Stafford Horne  <shorne@gmail.com>
 104
 105         PR 25184
 106         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
 107         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
 108         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
 109         * or1kcommon.cpu (h-fdr): Remove hardware.
 110         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
 111         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
 112         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
 113         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
 114         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
 115
 116 2020-02-16  David Faust  <david.faust@oracle.com>
 117
 118         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
 119         (dcji) New version with support for JMP32
 120
 121 2020-02-03  Alan Modra  <amodra@gmail.com>
 122
 123         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
 124
 125 2020-02-01  Alan Modra  <amodra@gmail.com>
 126
 127         * frv.cpu (f-u12): Multiply rather than left shift signed values.
 128         (f-label16, f-label24): Likewise.
 129
 130 2020-01-30  Alan Modra  <amodra@gmail.com>
 131
 132         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
 133         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
 134         (f-dst32-rn-prefixed-QI): Likewise.
 135         (f-dsp-32-s32): Mask before shifting left.
 136         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
 137         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
 138         shifting left.
 139         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
 140         (h-gr-SI): Mask before shifting.
 141
 142 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
 143
 144         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 145         (neg and neg32) use OP_SRC_K even if they operate only in
 146         registers.
 147
 148 2020-01-18  Nick Clifton  <nickc@redhat.com>
 149
 150         Binutils 2.34 branch created.
 151
 152 2020-01-13  Alan Modra  <amodra@gmail.com>
 153
 154         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 155         left shift signed values.
 156
 157 2020-01-06  Alan Modra  <amodra@gmail.com>
 158
 159         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 160         bits before shifting rather than masking after shifting.
 161         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 162         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 163         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 164         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 165
 166 2020-01-04  Alan Modra  <amodra@gmail.com>
 167
 168         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 169         (f-disp16, f-disp24): Likewise.
 170
 171 2019-12-23  Alan Modra  <amodra@gmail.com>
 172
 173         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 174
 175 2019-12-20  Alan Modra  <amodra@gmail.com>
 176
 177         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 178
 179 2019-12-17  Alan Modra  <amodra@gmail.com>
 180
 181         * bpf.cpu (f-imm64): Avoid signed overflow.
 182
 183 2019-12-16  Alan Modra  <amodra@gmail.com>
 184
 185         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 186
 187 2019-12-11  Alan Modra  <amodra@gmail.com>
 188
 189         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 190         * lm32.cpu (f-branch, f-vall): Likewise.
 191         * m32.cpu (f-lab-8-16): Likewise.
 192
 193 2019-12-11  Alan Modra  <amodra@gmail.com>
 194
 195         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 196         shift left to avoid UB on left shift of negative values.
 197
 198 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 199
 200         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 201
 202 2019-09-09  Phil Blundell  <pb@pbcl.net>
 203
 204         binutils 2.33 branch created.
 205
 206 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 207
 208         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 209         %a and %ctx.
 210
 211 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 212
 213         * bpf.cpu (dlabs): New pmacro.
 214         (dlind): Likewise.
 215
 216 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 217
 218         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 219         explicit 'dst' argument.
 220
 221 2019-06-13  Stafford Horne  <shorne@gmail.com>
 222
 223         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 224
 225 2019-06-13  Stafford Horne  <shorne@gmail.com>
 226
 227         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 228         (l-adrp): Improve comment.
 229
 230 2019-06-13  Stafford Horne  <shorne@gmail.com>
 231
 232         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 233         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 234         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 235         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 236         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 237         float-setflag-unordered-symantics): New pmacro for instruction
 238         symantics.
 239         (float-setflag-insn): Update to use float-setflag-insn-base.
 240         (float-setflag-unordered-insn): New pmacro for generating instructions.
 241
 242 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 243             Stafford Horne  <shorne@gmail.com>
 244
 245         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 246         (ORFPX-MACHS): Removed pmacro.
 247         * or1k.opc (or1k_cgen_insn_supported): New function.
 248         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 249         (parse_regpair, print_regpair): New functions.
 250         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 251         and add comments.
 252         (h-fdr): Update comment to indicate or64.
 253         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 254         (h-fd32r): New hardware for 64-bit fpu registers.
 255         (h-i64r): New hardware for 64-bit int registers.
 256         * or1korbis.cpu (f-resv-8-1): New field.
 257         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 258         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 259         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 260         (h-roff1): New hardware.
 261         (double-field-and-ops mnemonic): New pmacro to generate operations
 262         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 263         (float-regreg-insn): Update single precision generator to MACH
 264         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 265         (float-setflag-insn): Update single precision generator to MACH
 266         ORFPX32-MACHS.  Fix double instructions from single to double
 267         precision.  Add generator for or32 64-bit instructions.
 268         (float-cust-insn cust-num): Update single precision generator to MACH
 269         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 270         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 271         ORFPX32-MACHS.
 272         (lf-rem-d): Fix operation from mod to rem.
 273         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 274         (lf-itof-d): Fix operands from single to double.
 275         (lf-ftoi-d): Update operand mode from DI to WI.
 276
 277 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 278
 279         * bpf.cpu: New file.
 280         * bpf.opc: Likewise.
 281
 282 2018-06-24  Nick Clifton  <nickc@redhat.com>
 283
 284         2.32 branch created.
 285
 286 2018-10-05  Richard Henderson  <rth@twiddle.net>
 287             Stafford Horne  <shorne@gmail.com>
 288
 289         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 290         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 291         (l-mul): Fix overflow support and indentation.
 292         (l-mulu): Fix overflow support and indentation.
 293         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 294         (l-div); Remove incorrect carry behavior.
 295         (l-divu): Fix carry and overflow behavior.
 296         (l-mac): Add overflow support.
 297         (l-msb, l-msbu): Add carry and overflow support.
 298
 299 2018-10-05  Richard Henderson  <rth@twiddle.net>
 300
 301         * or1k.opc (parse_disp26): Add support for plta() relocations.
 302         (parse_disp21): New function.
 303         (or1k_rclass): New enum.
 304         (or1k_rtype): New enum.
 305         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 306         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 307         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 308         * or1korbis.cpu (f-disp26): Don't assume SI.
 309         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 310         (insn-opcode): Add ADRP.
 311         (l-adrp): New instruction.
 312
 313 2018-10-05  Richard Henderson  <rth@twiddle.net>
 314
 315         * or1k.opc: Add RTYPE_ enum.
 316         (INVALID_STORE_RELOC): New string.
 317         (or1k_imm16_relocs): New array array.
 318         (parse_reloc): New static function that just does the parsing.
 319         (parse_imm16): New static function for generic parsing.
 320         (parse_simm16): Change to just call parse_imm16.
 321         (parse_simm16_split): New function.
 322         (parse_uimm16): Change to call parse_imm16.
 323         (parse_uimm16_split): New function.
 324         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 325         (uimm16-split): Change to use new uimm16_split.
 326
 327 2018-07-24  Alan Modra  <amodra@gmail.com>
 328
 329         PR 23430
 330         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 331
 332 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 333
 334         * or1kcommon.cpu (spr-reg-info): Typo fix.
 335
 336 2018-03-03  Alan Modra  <amodra@gmail.com>
 337
 338         * frv.opc: Include opintl.h.
 339         (add_next_to_vliw): Use opcodes_error_handler to print error.
 340         Standardize error message.
 341         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 342
 343 2018-01-13  Nick Clifton  <nickc@redhat.com>
 344
 345         2.30 branch created.
 346
 347 2017-03-15  Stafford Horne  <shorne@gmail.com>
 348
 349         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 350
 351 2016-10-06  Alan Modra  <amodra@gmail.com>
 352
 353         * mep.opc (expand_string): Add fall through comment.
 354
 355 2016-03-03  Alan Modra  <amodra@gmail.com>
 356
 357         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 358         at what is really going on.
 359
 360 2016-03-02  Alan Modra  <amodra@gmail.com>
 361
 362         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 363
 364 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 365
 366         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 367         a constant to better align disassembler output.
 368
 369 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 370
 371         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 372
 373 2014-06-12  Alan Modra  <amodra@gmail.com>
 374
 375         * or1k.opc: Whitespace fixes.
 376
 377 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 378
 379         * or1korbis.cpu (h-atomic-reserve): New hardware.
 380         (h-atomic-address): Likewise.
 381         (insn-opcode): Add opcodes for LWA and SWA.
 382         (atomic-reserve): New operand.
 383         (atomic-address): Likewise.
 384         (l-lwa, l-swa): New instructions.
 385         (l-lbs): Fix typo in comment.
 386         (store-insn): Clear atomic reserve on store to atomic-address.
 387         Fix register names in fmt field.
 388
 389 2014-04-22  Christian Svensson  <blue@cmd.nu>
 390
 391         * openrisc.cpu: Delete.
 392         * openrisc.opc: Delete.
 393         * or1k.cpu: New file.
 394         * or1k.opc: New file.
 395         * or1kcommon.cpu: New file.
 396         * or1korbis.cpu: New file.
 397         * or1korfpx.cpu: New file.
 398
 399 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 400
 401         * epiphany.opc: Remove +x file mode.
 402
 403 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 404
 405         PR binutils/15241
 406         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 407         TLBVADDR, TLBPADDR and TLBBADVADDR.
 408
 409 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 410             Joern Rennecke  <joern.rennecke@embecosm.com>
 411
 412         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 413         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 414         (testset-insn): Add NO_DIS attribute to t.l.
 415         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 416         (move-insns): Add NO-DIS attribute to cmov.l.
 417         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 418         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 419         (op-rrr): Add NO-DIS attribute to .l.
 420         (shift-rrr): Add NO-DIS attribute to .l.
 421         (op-shift-rri): Add NO-DIS attribute to i32.l.
 422         (bitrl, movtl): Add NO-DIS attribute.
 423         (op-iextrrr): Add NO-DIS attribute to .l
 424         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 425         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 426
 427 2012-02-27  Alan Modra  <amodra@gmail.com>
 428
 429         * mt.opc (print_dollarhex): Trim values to 32 bits.
 430
 431 2011-12-15  Nick Clifton  <nickc@redhat.com>
 432
 433         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 434         hosts.
 435
 436 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 437
 438         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 439         Cast value before printing it as a long.
 440         (parse_postindex): Fix type of valuep.
 441
 442 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 443
 444         * cpu/epiphany.cpu: New file.
 445         * cpu/epiphany.opc: New file.
 446
 447 2011-08-22  Nick Clifton  <nickc@redhat.com>
 448
 449         * fr30.cpu: Newly contributed file.
 450         * fr30.opc: Likewise.
 451         * ip2k.cpu: Likewise.
 452         * ip2k.opc: Likewise.
 453         * mep-avc.cpu: Likewise.
 454         * mep-avc2.cpu: Likewise.
 455         * mep-c5.cpu: Likewise.
 456         * mep-core.cpu: Likewise.
 457         * mep-default.cpu: Likewise.
 458         * mep-ext-cop.cpu: Likewise.
 459         * mep-fmax.cpu: Likewise.
 460         * mep-h1.cpu: Likewise.
 461         * mep-ivc2.cpu: Likewise.
 462         * mep-rhcop.cpu: Likewise.
 463         * mep-sample-ucidsp.cpu: Likewise.
 464         * mep.cpu: Likewise.
 465         * mep.opc: Likewise.
 466         * openrisc.cpu: Likewise.
 467         * openrisc.opc: Likewise.
 468         * xstormy16.cpu: Likewise.
 469         * xstormy16.opc: Likewise.
 470
 471 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 472
 473         * frv.opc: #undef DEBUG.
 474
 475 2010-07-03  DJ Delorie  <dj@delorie.com>
 476
 477         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 478
 479 2010-02-11  Doug Evans  <dje@sebabeach.org>
 480
 481         * m32r.cpu (HASH-PREFIX): Delete.
 482         (duhpo, dshpo): New pmacros.
 483         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 484         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 485         attribute, define with dshpo.
 486         (uimm24): Delete HASH-PREFIX attribute.
 487         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 488         (print_signed_with_hash_prefix): New function.
 489         (print_unsigned_with_hash_prefix): New function.
 490         * xc16x.cpu (dowh): New pmacro.
 491         (upof16): Define with dowh, specify print handler.
 492         (qbit, qlobit, qhibit): Ditto.
 493         (upag16): Ditto.
 494         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 495         (print_with_dot_prefix): New functions.
 496         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 497
 498 2010-01-24  Doug Evans  <dje@sebabeach.org>
 499
 500         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 501         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 502         conditional-floating-point-conversion, ne-floating-point-conversion,
 503         float-parallel-mul-add-double-semantics): Ditto.
 504
 505 2010-01-05  Doug Evans  <dje@sebabeach.org>
 506
 507         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 508         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 509
 510 2010-01-02  Doug Evans  <dje@sebabeach.org>
 511
 512         * m32c.opc (parse_signed16): Fix typo.
 513
 514 2009-12-11  Nick Clifton  <nickc@redhat.com>
 515
 516         * frv.opc: Fix shadowed variable warnings.
 517         * m32c.opc: Fix shadowed variable warnings.
 518
 519 2009-11-14  Doug Evans  <dje@sebabeach.org>
 520
 521         Must use VOID expression in VOID context.
 522         * xc16x.cpu (mov4): Fix mode of `sequence'.
 523         (mov9, mov10): Ditto.
 524         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 525         (callr, callseg, calls, trap, rets, reti): Ditto.
 526         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 527         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 528         (exts, exts1, extsr, extsr1, prior): Ditto.
 529
 530 2009-10-23  Doug Evans  <dje@sebabeach.org>
 531
 532         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 533         cgen-ops.h -> cgen/basic-ops.h.
 534
 535 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 536
 537         * m32r.cpu (stb-plus): Typo fix.
 538
 539 2009-09-23  Doug Evans  <dje@sebabeach.org>
 540
 541         * m32r.cpu (sth-plus): Fix address mode and calculation.
 542         (stb-plus): Ditto.
 543         (clrpsw): Fix mask calculation.
 544         (bset, bclr, btst): Make mode in bit calculation match expression.
 545
 546         * xc16x.cpu (rtl-version): Set to 0.8.
 547         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 548         make uppercase.  Remove unnecessary name-prefix spec.
 549         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 550         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 551         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 552         (h-cr): New hardware.
 553         (muls): Comment out parts that won't compile, add fixme.
 554         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 555         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 556         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 557
 558 2009-07-16  Doug Evans  <dje@sebabeach.org>
 559
 560         * cpu/simplify.inc (*): One line doc strings don't need \n.
 561         (df): Invoke define-full-ifield instead of claiming it's an alias.
 562         (dno): Define.
 563         (dnop): Mark as deprecated.
 564
 565 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 566
 567         * m32c.opc (parse_lab_5_3): Use correct enum.
 568
 569 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 570
 571         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 572         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 573         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 574         arguments of "operation" to DI using "mode" and the new pmacros.
 575
 576 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 577
 578         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 579         of number 2, PID.
 580
 581 2008-12-23  Jon Beniston <jon@beniston.com>
 582
 583         * lm32.cpu: New file.
 584         * lm32.opc: New file.
 585
 586 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 587
 588         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 589         to source.
 590
 591 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 592
 593         * cris.cpu (movs, movu): Use result of extension operation when
 594         updating flags.
 595
 596 2007-07-04  Nick Clifton  <nickc@redhat.com>
 597
 598         * cris.cpu: Update copyright notice to refer to GPLv3.
 599         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 600         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 601         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 602         xc16x.opc: Likewise.
 603         * iq2000.cpu: Fix copyright notice to refer to FSF.
 604
 605 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 606
 607         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 608
 609 2007-04-20  Nick Clifton  <nickc@redhat.com>
 610
 611         * xc16x.cpu: Restore after accidentally overwriting this file with
 612         xc16x.opc.
 613
 614 2007-03-29  DJ Delorie  <dj@redhat.com>
 615
 616         * m32c.cpu (Imm-8-s4n): Fix print hook.
 617         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 618         (arith-jnz-imm4-dst-defn): Make relaxable.
 619         (arith-jnz16-imm4-dst-defn): Fix encodings.
 620
 621 2007-03-20  DJ Delorie  <dj@redhat.com>
 622
 623         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 624         mem20): New.
 625         (src16-16-20-An-relative-*): New.
 626         (dst16-*-20-An-relative-*): New.
 627         (dst16-16-16sa-*): New
 628         (dst16-16-16ar-*): New
 629         (dst32-16-16sa-Unprefixed-*): New
 630         (jsri): Fix operands.
 631         (setzx): Fix encoding.
 632
 633 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 634
 635         * m32r.opc: Formatting.
 636
 637 2006-05-22  Nick Clifton  <nickc@redhat.com>
 638
 639         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 640
 641 2006-04-10  DJ Delorie  <dj@redhat.com>
 642
 643         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 644         decides if this function accepts symbolic constants or not.
 645         (parse_signed_bitbase): Likewise.
 646         (parse_unsigned_bitbase8): Pass the new parameter.
 647         (parse_unsigned_bitbase11): Likewise.
 648         (parse_unsigned_bitbase16): Likewise.
 649         (parse_unsigned_bitbase19): Likewise.
 650         (parse_unsigned_bitbase27): Likewise.
 651         (parse_signed_bitbase8): Likewise.
 652         (parse_signed_bitbase11): Likewise.
 653         (parse_signed_bitbase19): Likewise.
 654
 655 2006-03-13  DJ Delorie  <dj@redhat.com>
 656
 657         * m32c.cpu (Bit3-S): New.
 658         (btst:s): New.
 659         * m32c.opc (parse_bit3_S): New.
 660
 661         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 662         (btst): Add optional :G suffix for MACH32.
 663         (or.b:S): New.
 664         (pop.w:G): Add optional :G suffix for MACH16.
 665         (push.b.imm): Fix syntax.
 666
 667 2006-03-10  DJ Delorie  <dj@redhat.com>
 668
 669         * m32c.cpu (mul.l): New.
 670         (mulu.l): New.
 671
 672 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 673
 674         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 675         an error message otherwise.
 676         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 677         Fix up comments to correctly describe the functions.
 678
 679 2006-02-24  DJ Delorie  <dj@redhat.com>
 680
 681         * m32c.cpu (RL_TYPE): New attribute, with macros.
 682         (Lab-8-24): Add RELAX.
 683         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 684         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 685         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 686         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 687         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 688         attribute.
 689         (jsri16, jsri32): Add 1ADDR attribute.
 690         (jsr32.w, jsr32.a): Add JUMP attribute.
 691
 692 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 693             Anil Paranjape   <anilp1@kpitcummins.com>
 694             Shilin Shakti    <shilins@kpitcummins.com>
 695
 696         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 697         description.
 698         * xc16x.opc: New file containing supporting XC16C routines.
 699
 700 2006-02-10  Nick Clifton  <nickc@redhat.com>
 701
 702         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 703
 704 2006-01-06  DJ Delorie  <dj@redhat.com>
 705
 706         * m32c.cpu (mov.w:q): Fix mode.
 707         (push32.b.imm): Likewise, for the comment.
 708
 709 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 710
 711         Second part of ms1 to mt renaming.
 712         * mt.cpu (define-arch, define-isa): Set name to mt.
 713         (define-mach): Adjust.
 714         * mt.opc (CGEN_ASM_HASH): Update.
 715         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 716         (parse_loopsize, parse_imm16): Adjust.
 717
 718 2005-12-13  DJ Delorie  <dj@redhat.com>
 719
 720         * m32c.cpu (jsri): Fix order so register names aren't treated as
 721         symbols.
 722         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 723         indexwd, indexws): Fix encodings.
 724
 725 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 726
 727         * mt.cpu: Rename from ms1.cpu.
 728         * mt.opc: Rename from ms1.opc.
 729
 730 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 731
 732         * cris.cpu (simplecris-common-writable-specregs)
 733         (simplecris-common-readable-specregs): Split from
 734         simplecris-common-specregs.  All users changed.
 735         (cris-implemented-writable-specregs-v0)
 736         (cris-implemented-readable-specregs-v0): Similar from
 737         cris-implemented-specregs-v0.
 738         (cris-implemented-writable-specregs-v3)
 739         (cris-implemented-readable-specregs-v3)
 740         (cris-implemented-writable-specregs-v8)
 741         (cris-implemented-readable-specregs-v8)
 742         (cris-implemented-writable-specregs-v10)
 743         (cris-implemented-readable-specregs-v10)
 744         (cris-implemented-writable-specregs-v32)
 745         (cris-implemented-readable-specregs-v32): Similar.
 746         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 747         insns and specializations.
 748
 749 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 750
 751         Add ms2
 752         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 753         model.
 754         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 755         f-cb2incr, f-rc3): New fields.
 756         (LOOP): New instruction.
 757         (JAL-HAZARD): New hazard.
 758         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 759         New operands.
 760         (mul, muli, dbnz, iflush): Enable for ms2
 761         (jal, reti): Has JAL-HAZARD.
 762         (ldctxt, ldfb, stfb): Only ms1.
 763         (fbcb): Only ms1,ms1-003.
 764         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 765         fbcbincrs, mfbcbincrs): Enable for ms2.
 766         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 767         * ms1.opc (parse_loopsize): New.
 768         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 769         (print_pcrel): New.
 770
 771 2005-10-28  Dave Brolley  <brolley@redhat.com>
 772
 773         Contribute the following change:
 774         2003-09-24  Dave Brolley  <brolley@redhat.com>
 775
 776         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 777         CGEN_ATTR_VALUE_TYPE.
 778         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 779         Use cgen_bitset_intersect_p.
 780
 781 2005-10-27  DJ Delorie  <dj@redhat.com>
 782
 783         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 784         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 785         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 786         imm operand is needed.
 787         (adjnz, sbjnz): Pass the right operands.
 788         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 789         unary-insn): Add -g variants for opcodes that need to support :G.
 790         (not.BW:G, push.BW:G): Call it.
 791         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 792         stzx16-imm8-imm8-abs16): Fix operand typos.
 793         * m32c.opc (m32c_asm_hash): Support bnCND.
 794         (parse_signed4n, print_signed4n): New.
 795
 796 2005-10-26  DJ Delorie  <dj@redhat.com>
 797
 798         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 799         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 800         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 801         dsp8[sp] is signed.
 802         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 803         (mov.BW:S r0,r1): Fix typo r1l->r1.
 804         (tst): Allow :G suffix.
 805         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 806
 807 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 808
 809         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 810
 811 2005-10-25  DJ Delorie  <dj@redhat.com>
 812
 813         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 814         making one a macro of the other.
 815
 816 2005-10-21  DJ Delorie  <dj@redhat.com>
 817
 818         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 819         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 820         indexld, indexls): .w variants have `1' bit.
 821         (rot32.b): QI, not SI.
 822         (rot32.w): HI, not SI.
 823         (xchg16): HI for .w variant.
 824
 825 2005-10-19  Nick Clifton  <nickc@redhat.com>
 826
 827         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 828
 829 2005-10-18  Andreas Schwab  <schwab@suse.de>
 830
 831         * m32r.opc (parse_slo16): Better version of previous patch.
 832
 833 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 834
 835         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 836         size.
 837
 838 2005-07-25  DJ Delorie  <dj@redhat.com>
 839
 840         * m32c.opc (parse_unsigned8): Add %dsp8().
 841         (parse_signed8): Add %hi8().
 842         (parse_unsigned16): Add %dsp16().
 843         (parse_signed16): Add %lo16() and %hi16().
 844         (parse_lab_5_3): Make valuep a bfd_vma *.
 845
 846 2005-07-18  Nick Clifton  <nickc@redhat.com>
 847
 848         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 849         components.
 850         (f-lab32-jmp-s): Fix insertion sequence.
 851         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 852         (Dsp-40-s8): Make parameter be signed.
 853         (Dsp-40-s16): Likewise.
 854         (Dsp-48-s8): Likewise.
 855         (Dsp-48-s16): Likewise.
 856         (Imm-13-u3): Likewise. (Despite its name!)
 857         (BitBase16-16-s8): Make the parameter be unsigned.
 858         (BitBase16-8-u11-S): Likewise.
 859         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 860         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 861         relaxation.
 862
 863         * m32c.opc: Fix formatting.
 864         Use safe-ctype.h instead of ctype.h
 865         Move duplicated code sequences into a macro.
 866         Fix compile time warnings about signedness mismatches.
 867         Remove dead code.
 868         (parse_lab_5_3): New parser function.
 869
 870 2005-07-16  Jim Blandy  <jimb@redhat.com>
 871
 872         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 873         to represent isa sets.
 874
 875 2005-07-15  Jim Blandy  <jimb@redhat.com>
 876
 877         * m32c.cpu, m32c.opc: Fix copyright.
 878
 879 2005-07-14  Jim Blandy  <jimb@redhat.com>
 880
 881         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 882
 883 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 884
 885         * ms1.opc (print_dollarhex): Correct format string.
 886
 887 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 888
 889         * iq2000.cpu: Include from binutils cpu dir.
 890
 891 2005-07-05  Nick Clifton  <nickc@redhat.com>
 892
 893         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 894         unsigned in order to avoid compile time warnings about sign
 895         conflicts.
 896
 897         * ms1.opc (parse_*): Likewise.
 898         (parse_imm16): Use a "void *" as it is passed both signed and
 899         unsigned arguments.
 900
 901 2005-07-01  Nick Clifton  <nickc@redhat.com>
 902
 903         * frv.opc: Update to ISO C90 function declaration style.
 904         * iq2000.opc: Likewise.
 905         * m32r.opc: Likewise.
 906         * sh.opc: Likewise.
 907
 908 2005-06-15  Dave Brolley  <brolley@redhat.com>
 909
 910         Contributed by Red Hat.
 911         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 912         * ms1.opc: New file.  Written by Stan Cox.
 913
 914 2005-05-10  Nick Clifton  <nickc@redhat.com>
 915
 916         * Update the address and phone number of the FSF organization in
 917         the GPL notices in the following files:
 918         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 919         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 920         sh64-media.cpu, simplify.inc
 921
 922 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 923
 924         * frv.opc (parse_A): Warning fix.
 925
 926 2005-02-23  Nick Clifton  <nickc@redhat.com>
 927
 928         * frv.opc: Fixed compile time warnings about differing signed'ness
 929         of pointers passed to functions.
 930         * m32r.opc: Likewise.
 931
 932 2005-02-11  Nick Clifton  <nickc@redhat.com>
 933
 934         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 935         'bfd_vma *' in order avoid compile time warning message.
 936
 937 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 938
 939         * cris.cpu (mstep): Add missing insn.
 940
 941 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 942
 943         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 944         * frv.cpu: Add support for TLS annotations in loads and calll.
 945         * frv.opc (parse_symbolic_address): New.
 946         (parse_ldd_annotation): New.
 947         (parse_call_annotation): New.
 948         (parse_ld_annotation): New.
 949         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 950         Introduce TLS relocations.
 951         (parse_d12, parse_s12, parse_u12): Likewise.
 952         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 953         (parse_call_label, print_at): New.
 954
 955 2004-12-21  Mikael Starvik  <starvik@axis.com>
 956
 957         * cris.cpu (cris-set-mem): Correct integral write semantics.
 958
 959 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 960
 961         * cris.cpu: New file.
 962
 963 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 964
 965         * iq2000.cpu: Added quotes around macro arguments so that they
 966         will work with newer versions of guile.
 967
 968 2004-10-27  Nick Clifton  <nickc@redhat.com>
 969
 970         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 971         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 972         operand.
 973         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 974         with guile.
 975
 976 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 977
 978         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 979
 980 2004-05-15  Nick Clifton  <nickc@redhat.com>
 981
 982         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 983
 984 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 985
 986         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 987
 988 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 989
 990         * frv.cpu (define-arch frv): Add fr450 mach.
 991         (define-mach fr450): New.
 992         (define-model fr450): New.  Add profile units to every fr450 insn.
 993         (define-attr UNIT): Add MDCUTSSI.
 994         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 995         (define-attr AUDIO): New boolean.
 996         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 997         (f-LRA-null, f-TLBPR-null): New fields.
 998         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 999         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1000         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1001         (LRA-null, TLBPR-null): New macros.
1002         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1003         (load-real-address): New macro.
1004         (lrai, lrad, tlbpr): New instructions.
1005         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1006         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1007         (mdcutssi): Change UNIT attribute to MDCUTSSI.
1008         (media-low-clear-semantics, media-scope-limit-semantics)
1009         (media-quad-limit, media-quad-shift): New macros.
1010         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1011         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1012         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1013         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1014         (fr450_unit_mapping): New array.
1015         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1016         for new MDCUTSSI unit.
1017         (fr450_check_insn_major_constraints): New function.
1018         (check_insn_major_constraints): Use it.
1019
1020 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1021
1022         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1023         (scutss): Change unit to I0.
1024         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1025         (mqsaths): Fix FR400-MAJOR categorization.
1026         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1027         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1028         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1029         combinations.
1030
1031 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1032
1033         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1034         (rstb, rsth, rst, rstd, rstq): Delete.
1035         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1036
1037 2004-02-23  Nick Clifton  <nickc@redhat.com>
1038
1039         * Apply these patches from Renesas:
1040
1041         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1042
1043         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1044         disassembling codes for 0x*2 addresses.
1045
1046         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1047
1048         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1049
1050         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1051
1052         * cpu/m32r.cpu : Add new model m32r2.
1053         Add new instructions.
1054         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1055         Changed PIPE attr of push from O to OS.
1056         Care for Little-endian of M32R.
1057         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1058         Care for Little-endian of M32R.
1059         (parse_slo16): signed extension for value.
1060
1061 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1062
1063         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1064         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1065
1066         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1067         written by Ben Elliston.
1068
1069 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1070
1071         * frv.cpu (UNIT): Add IACC.
1072         (iacc-multiply-r-r): Use it.
1073         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1074         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1075
1076 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1077
1078         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1079         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1080         cut&paste errors in shifting/truncating numerical operands.
1081         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1082         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1083         (parse_uslo16): Likewise.
1084         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1085         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1086         (parse_s12): Likewise.
1087         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1088         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1089         (parse_uslo16): Likewise.
1090         (parse_uhi16): Parse gothi and gotfuncdeschi.
1091         (parse_d12): Parse got12 and gotfuncdesc12.
1092         (parse_s12): Likewise.
1093
1094 2003-10-10  Dave Brolley  <brolley@redhat.com>
1095
1096         * frv.cpu (dnpmop): New p-macro.
1097         (GRdoublek): Use dnpmop.
1098         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1099         (store-double-r-r): Use (.sym regtype doublek).
1100         (r-store-double): Ditto.
1101         (store-double-r-r-u): Ditto.
1102         (conditional-store-double): Ditto.
1103         (conditional-store-double-u): Ditto.
1104         (store-double-r-simm): Ditto.
1105         (fmovs): Assign to UNIT FMALL.
1106
1107 2003-10-06  Dave Brolley  <brolley@redhat.com>
1108
1109         * frv.cpu, frv.opc: Add support for fr550.
1110
1111 2003-09-24  Dave Brolley  <brolley@redhat.com>
1112
1113         * frv.cpu (u-commit): New modelling unit for fr500.
1114         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1115         (commit-r): Use u-commit model for fr500.
1116         (commit): Ditto.
1117         (conditional-float-binary-op): Take profiling data as an argument.
1118         Update callers.
1119         (ne-float-binary-op): Ditto.
1120
1121 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1122
1123         * frv.cpu (nldqi): Delete unimplemented instruction.
1124
1125 2003-09-12  Dave Brolley  <brolley@redhat.com>
1126
1127         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1128         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1129         frv_ref_SI to get input register referenced for profiling.
1130         (clear-ne-flag-all): Pass insn profiling in as an argument.
1131         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1132
1133 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1134
1135         * frv.cpu: Typographical corrections.
1136
1137 2003-09-09  Dave Brolley  <brolley@redhat.com>
1138
1139         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1140         (conditional-media-dual-complex, media-quad-complex): Likewise.
1141
1142 2003-09-04  Dave Brolley  <brolley@redhat.com>
1143
1144         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1145         Update all callers.
1146         (conditional-register-transfer): Ditto.
1147         (cache-preload): Ditto.
1148         (floating-point-conversion): Ditto.
1149         (floating-point-neg): Ditto.
1150         (float-abs): Ditto.
1151         (float-binary-op-s): Ditto.
1152         (conditional-float-binary-op): Ditto.
1153         (ne-float-binary-op): Ditto.
1154         (float-dual-arith): Ditto.
1155         (ne-float-dual-arith): Ditto.
1156
1157 2003-09-03  Dave Brolley  <brolley@redhat.com>
1158
1159         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1160         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1161         MCLRACC-1.
1162         (A): Removed operand.
1163         (A0,A1): New operands replace operand A.
1164         (mnop): Now a real insn
1165         (mclracc): Removed insn.
1166         (mclracc-0, mclracc-1): New insns replace mclracc.
1167         (all insns): Use new UNIT attributes.
1168
1169 2003-08-21  Nick Clifton  <nickc@redhat.com>
1170
1171         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1172         and u-media-dual-btoh with output parameter.
1173         (cmbtoh): Add profiling hack.
1174
1175 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1176
1177         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1178
1179 2003-06-10  Doug Evans  <dje@sebabeach.org>
1180
1181         * frv.cpu: Add IDOC attribute.
1182
1183 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1184
1185         Contributed by Red Hat.
1186         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1187         Stan Cox, and Frank Ch. Eigler.
1188         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1189         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1190         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1191         * iq10.cpu: New file.  Written by Jeff Johnston.
1192
1193 2003-06-05  Nick Clifton  <nickc@redhat.com>
1194
1195         * frv.cpu (FRintieven): New operand.  An even-numbered only
1196         version of the FRinti operand.
1197         (FRintjeven): Likewise for FRintj.
1198         (FRintkeven): Likewise for FRintk.
1199         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1200         media-quad-arith-sat-semantics, media-quad-arith-sat,
1201         conditional-media-quad-arith-sat, mdunpackh,
1202         media-quad-multiply-semantics, media-quad-multiply,
1203         conditional-media-quad-multiply, media-quad-complex-i,
1204         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1205         conditional-media-quad-multiply-acc, munpackh,
1206         media-quad-multiply-cross-acc-semantics, mdpackh,
1207         media-quad-multiply-cross-acc, mbtoh-semantics,
1208         media-quad-cross-multiply-cross-acc-semantics,
1209         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1210         media-quad-cross-multiply-acc-semantics, cmbtoh,
1211         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1212         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1213         cmhtob): Use new operands.
1214         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1215         (parse_even_register): New function.
1216
1217 2003-06-03  Nick Clifton  <nickc@redhat.com>
1218
1219         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1220         immediate value not unsigned.
1221
1222 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1223
1224         Contributed by Red Hat.
1225         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1226         and Eric Christopher.
1227         * frv.opc: New file.  Written by Catherine Moore, and Dave
1228         Brolley.
1229         * simplify.inc: New file.  Written by Doug Evans.
1230
1231 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1232
1233         * New file.
1234
1235 \f
1236 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1237
1238 Copying and distribution of this file, with or without modification,
1239 are permitted in any medium without royalty provided the copyright
1240 notice and this notice are preserved.
1241
1242 Local Variables:
1243 mode: change-log
1244 left-margin: 8
1245 fill-column: 74
1246 version-control: never
1247 End: