cpu/ChangeLog

   1 2020-02-01  Nick Clifton  <nickc@redhat.com>
   2
   3         Binutils 2.34 release.
   4
   5 2020-01-18  Nick Clifton  <nickc@redhat.com>
   6
   7         Binutils 2.34 branch created.
   8
   9 2020-01-13  Alan Modra  <amodra@gmail.com>
  10
  11         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
  12         left shift signed values.
  13
  14 2020-01-06  Alan Modra  <amodra@gmail.com>
  15
  16         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
  17         bits before shifting rather than masking after shifting.
  18         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
  19         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
  20         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
  21         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
  22
  23 2020-01-04  Alan Modra  <amodra@gmail.com>
  24
  25         * m32r.cpu (f-disp8): Avoid left shift of negative values.
  26         (f-disp16, f-disp24): Likewise.
  27
  28 2019-12-23  Alan Modra  <amodra@gmail.com>
  29
  30         * iq2000.cpu (f-offset): Avoid left shift of negative values.
  31
  32 2019-12-20  Alan Modra  <amodra@gmail.com>
  33
  34         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
  35
  36 2019-12-17  Alan Modra  <amodra@gmail.com>
  37
  38         * bpf.cpu (f-imm64): Avoid signed overflow.
  39
  40 2019-12-16  Alan Modra  <amodra@gmail.com>
  41
  42         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
  43
  44 2019-12-11  Alan Modra  <amodra@gmail.com>
  45
  46         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
  47         * lm32.cpu (f-branch, f-vall): Likewise.
  48         * m32.cpu (f-lab-8-16): Likewise.
  49
  50 2019-12-11  Alan Modra  <amodra@gmail.com>
  51
  52         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
  53         shift left to avoid UB on left shift of negative values.
  54
  55 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
  56
  57         * bpf.cpu: Fix comment describing the 128-bit instruction format.
  58
  59 2019-09-09  Phil Blundell  <pb@pbcl.net>
  60
  61         binutils 2.33 branch created.
  62
  63 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
  64
  65         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
  66         %a and %ctx.
  67
  68 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
  69
  70         * bpf.cpu (dlabs): New pmacro.
  71         (dlind): Likewise.
  72
  73 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
  74
  75         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
  76         explicit 'dst' argument.
  77
  78 2019-06-13  Stafford Horne  <shorne@gmail.com>
  79
  80         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
  81
  82 2019-06-13  Stafford Horne  <shorne@gmail.com>
  83
  84         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  85         (l-adrp): Improve comment.
  86
  87 2019-06-13  Stafford Horne  <shorne@gmail.com>
  88
  89         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
  90         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  91         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  92         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  93         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  94         float-setflag-unordered-symantics): New pmacro for instruction
  95         symantics.
  96         (float-setflag-insn): Update to use float-setflag-insn-base.
  97         (float-setflag-unordered-insn): New pmacro for generating instructions.
  98
  99 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 100             Stafford Horne  <shorne@gmail.com>
 101
 102         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 103         (ORFPX-MACHS): Removed pmacro.
 104         * or1k.opc (or1k_cgen_insn_supported): New function.
 105         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 106         (parse_regpair, print_regpair): New functions.
 107         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 108         and add comments.
 109         (h-fdr): Update comment to indicate or64.
 110         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 111         (h-fd32r): New hardware for 64-bit fpu registers.
 112         (h-i64r): New hardware for 64-bit int registers.
 113         * or1korbis.cpu (f-resv-8-1): New field.
 114         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 115         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 116         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 117         (h-roff1): New hardware.
 118         (double-field-and-ops mnemonic): New pmacro to generate operations
 119         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 120         (float-regreg-insn): Update single precision generator to MACH
 121         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 122         (float-setflag-insn): Update single precision generator to MACH
 123         ORFPX32-MACHS.  Fix double instructions from single to double
 124         precision.  Add generator for or32 64-bit instructions.
 125         (float-cust-insn cust-num): Update single precision generator to MACH
 126         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 127         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 128         ORFPX32-MACHS.
 129         (lf-rem-d): Fix operation from mod to rem.
 130         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 131         (lf-itof-d): Fix operands from single to double.
 132         (lf-ftoi-d): Update operand mode from DI to WI.
 133
 134 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 135
 136         * bpf.cpu: New file.
 137         * bpf.opc: Likewise.
 138
 139 2018-06-24  Nick Clifton  <nickc@redhat.com>
 140
 141         2.32 branch created.
 142
 143 2018-10-05  Richard Henderson  <rth@twiddle.net>
 144             Stafford Horne  <shorne@gmail.com>
 145
 146         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 147         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 148         (l-mul): Fix overflow support and indentation.
 149         (l-mulu): Fix overflow support and indentation.
 150         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 151         (l-div); Remove incorrect carry behavior.
 152         (l-divu): Fix carry and overflow behavior.
 153         (l-mac): Add overflow support.
 154         (l-msb, l-msbu): Add carry and overflow support.
 155
 156 2018-10-05  Richard Henderson  <rth@twiddle.net>
 157
 158         * or1k.opc (parse_disp26): Add support for plta() relocations.
 159         (parse_disp21): New function.
 160         (or1k_rclass): New enum.
 161         (or1k_rtype): New enum.
 162         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 163         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 164         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 165         * or1korbis.cpu (f-disp26): Don't assume SI.
 166         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 167         (insn-opcode): Add ADRP.
 168         (l-adrp): New instruction.
 169
 170 2018-10-05  Richard Henderson  <rth@twiddle.net>
 171
 172         * or1k.opc: Add RTYPE_ enum.
 173         (INVALID_STORE_RELOC): New string.
 174         (or1k_imm16_relocs): New array array.
 175         (parse_reloc): New static function that just does the parsing.
 176         (parse_imm16): New static function for generic parsing.
 177         (parse_simm16): Change to just call parse_imm16.
 178         (parse_simm16_split): New function.
 179         (parse_uimm16): Change to call parse_imm16.
 180         (parse_uimm16_split): New function.
 181         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 182         (uimm16-split): Change to use new uimm16_split.
 183
 184 2018-07-24  Alan Modra  <amodra@gmail.com>
 185
 186         PR 23430
 187         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 188
 189 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 190
 191         * or1kcommon.cpu (spr-reg-info): Typo fix.
 192
 193 2018-03-03  Alan Modra  <amodra@gmail.com>
 194
 195         * frv.opc: Include opintl.h.
 196         (add_next_to_vliw): Use opcodes_error_handler to print error.
 197         Standardize error message.
 198         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 199
 200 2018-01-13  Nick Clifton  <nickc@redhat.com>
 201
 202         2.30 branch created.
 203
 204 2017-03-15  Stafford Horne  <shorne@gmail.com>
 205
 206         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 207
 208 2016-10-06  Alan Modra  <amodra@gmail.com>
 209
 210         * mep.opc (expand_string): Add fall through comment.
 211
 212 2016-03-03  Alan Modra  <amodra@gmail.com>
 213
 214         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 215         at what is really going on.
 216
 217 2016-03-02  Alan Modra  <amodra@gmail.com>
 218
 219         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 220
 221 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 222
 223         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 224         a constant to better align disassembler output.
 225
 226 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 227
 228         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 229
 230 2014-06-12  Alan Modra  <amodra@gmail.com>
 231
 232         * or1k.opc: Whitespace fixes.
 233
 234 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 235
 236         * or1korbis.cpu (h-atomic-reserve): New hardware.
 237         (h-atomic-address): Likewise.
 238         (insn-opcode): Add opcodes for LWA and SWA.
 239         (atomic-reserve): New operand.
 240         (atomic-address): Likewise.
 241         (l-lwa, l-swa): New instructions.
 242         (l-lbs): Fix typo in comment.
 243         (store-insn): Clear atomic reserve on store to atomic-address.
 244         Fix register names in fmt field.
 245
 246 2014-04-22  Christian Svensson  <blue@cmd.nu>
 247
 248         * openrisc.cpu: Delete.
 249         * openrisc.opc: Delete.
 250         * or1k.cpu: New file.
 251         * or1k.opc: New file.
 252         * or1kcommon.cpu: New file.
 253         * or1korbis.cpu: New file.
 254         * or1korfpx.cpu: New file.
 255
 256 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 257
 258         * epiphany.opc: Remove +x file mode.
 259
 260 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 261
 262         PR binutils/15241
 263         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 264         TLBVADDR, TLBPADDR and TLBBADVADDR.
 265
 266 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 267             Joern Rennecke  <joern.rennecke@embecosm.com>
 268
 269         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 270         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 271         (testset-insn): Add NO_DIS attribute to t.l.
 272         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 273         (move-insns): Add NO-DIS attribute to cmov.l.
 274         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 275         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 276         (op-rrr): Add NO-DIS attribute to .l.
 277         (shift-rrr): Add NO-DIS attribute to .l.
 278         (op-shift-rri): Add NO-DIS attribute to i32.l.
 279         (bitrl, movtl): Add NO-DIS attribute.
 280         (op-iextrrr): Add NO-DIS attribute to .l
 281         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 282         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 283
 284 2012-02-27  Alan Modra  <amodra@gmail.com>
 285
 286         * mt.opc (print_dollarhex): Trim values to 32 bits.
 287
 288 2011-12-15  Nick Clifton  <nickc@redhat.com>
 289
 290         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 291         hosts.
 292
 293 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 294
 295         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 296         Cast value before printing it as a long.
 297         (parse_postindex): Fix type of valuep.
 298
 299 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 300
 301         * cpu/epiphany.cpu: New file.
 302         * cpu/epiphany.opc: New file.
 303
 304 2011-08-22  Nick Clifton  <nickc@redhat.com>
 305
 306         * fr30.cpu: Newly contributed file.
 307         * fr30.opc: Likewise.
 308         * ip2k.cpu: Likewise.
 309         * ip2k.opc: Likewise.
 310         * mep-avc.cpu: Likewise.
 311         * mep-avc2.cpu: Likewise.
 312         * mep-c5.cpu: Likewise.
 313         * mep-core.cpu: Likewise.
 314         * mep-default.cpu: Likewise.
 315         * mep-ext-cop.cpu: Likewise.
 316         * mep-fmax.cpu: Likewise.
 317         * mep-h1.cpu: Likewise.
 318         * mep-ivc2.cpu: Likewise.
 319         * mep-rhcop.cpu: Likewise.
 320         * mep-sample-ucidsp.cpu: Likewise.
 321         * mep.cpu: Likewise.
 322         * mep.opc: Likewise.
 323         * openrisc.cpu: Likewise.
 324         * openrisc.opc: Likewise.
 325         * xstormy16.cpu: Likewise.
 326         * xstormy16.opc: Likewise.
 327
 328 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 329
 330         * frv.opc: #undef DEBUG.
 331
 332 2010-07-03  DJ Delorie  <dj@delorie.com>
 333
 334         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 335
 336 2010-02-11  Doug Evans  <dje@sebabeach.org>
 337
 338         * m32r.cpu (HASH-PREFIX): Delete.
 339         (duhpo, dshpo): New pmacros.
 340         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 341         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 342         attribute, define with dshpo.
 343         (uimm24): Delete HASH-PREFIX attribute.
 344         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 345         (print_signed_with_hash_prefix): New function.
 346         (print_unsigned_with_hash_prefix): New function.
 347         * xc16x.cpu (dowh): New pmacro.
 348         (upof16): Define with dowh, specify print handler.
 349         (qbit, qlobit, qhibit): Ditto.
 350         (upag16): Ditto.
 351         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 352         (print_with_dot_prefix): New functions.
 353         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 354
 355 2010-01-24  Doug Evans  <dje@sebabeach.org>
 356
 357         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 358         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 359         conditional-floating-point-conversion, ne-floating-point-conversion,
 360         float-parallel-mul-add-double-semantics): Ditto.
 361
 362 2010-01-05  Doug Evans  <dje@sebabeach.org>
 363
 364         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 365         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 366
 367 2010-01-02  Doug Evans  <dje@sebabeach.org>
 368
 369         * m32c.opc (parse_signed16): Fix typo.
 370
 371 2009-12-11  Nick Clifton  <nickc@redhat.com>
 372
 373         * frv.opc: Fix shadowed variable warnings.
 374         * m32c.opc: Fix shadowed variable warnings.
 375
 376 2009-11-14  Doug Evans  <dje@sebabeach.org>
 377
 378         Must use VOID expression in VOID context.
 379         * xc16x.cpu (mov4): Fix mode of `sequence'.
 380         (mov9, mov10): Ditto.
 381         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 382         (callr, callseg, calls, trap, rets, reti): Ditto.
 383         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 384         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 385         (exts, exts1, extsr, extsr1, prior): Ditto.
 386
 387 2009-10-23  Doug Evans  <dje@sebabeach.org>
 388
 389         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 390         cgen-ops.h -> cgen/basic-ops.h.
 391
 392 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 393
 394         * m32r.cpu (stb-plus): Typo fix.
 395
 396 2009-09-23  Doug Evans  <dje@sebabeach.org>
 397
 398         * m32r.cpu (sth-plus): Fix address mode and calculation.
 399         (stb-plus): Ditto.
 400         (clrpsw): Fix mask calculation.
 401         (bset, bclr, btst): Make mode in bit calculation match expression.
 402
 403         * xc16x.cpu (rtl-version): Set to 0.8.
 404         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 405         make uppercase.  Remove unnecessary name-prefix spec.
 406         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 407         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 408         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 409         (h-cr): New hardware.
 410         (muls): Comment out parts that won't compile, add fixme.
 411         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 412         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 413         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 414
 415 2009-07-16  Doug Evans  <dje@sebabeach.org>
 416
 417         * cpu/simplify.inc (*): One line doc strings don't need \n.
 418         (df): Invoke define-full-ifield instead of claiming it's an alias.
 419         (dno): Define.
 420         (dnop): Mark as deprecated.
 421
 422 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 423
 424         * m32c.opc (parse_lab_5_3): Use correct enum.
 425
 426 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 427
 428         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 429         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 430         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 431         arguments of "operation" to DI using "mode" and the new pmacros.
 432
 433 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 434
 435         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 436         of number 2, PID.
 437
 438 2008-12-23  Jon Beniston <jon@beniston.com>
 439
 440         * lm32.cpu: New file.
 441         * lm32.opc: New file.
 442
 443 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 444
 445         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 446         to source.
 447
 448 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 449
 450         * cris.cpu (movs, movu): Use result of extension operation when
 451         updating flags.
 452
 453 2007-07-04  Nick Clifton  <nickc@redhat.com>
 454
 455         * cris.cpu: Update copyright notice to refer to GPLv3.
 456         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 457         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 458         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 459         xc16x.opc: Likewise.
 460         * iq2000.cpu: Fix copyright notice to refer to FSF.
 461
 462 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 463
 464         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 465
 466 2007-04-20  Nick Clifton  <nickc@redhat.com>
 467
 468         * xc16x.cpu: Restore after accidentally overwriting this file with
 469         xc16x.opc.
 470
 471 2007-03-29  DJ Delorie  <dj@redhat.com>
 472
 473         * m32c.cpu (Imm-8-s4n): Fix print hook.
 474         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 475         (arith-jnz-imm4-dst-defn): Make relaxable.
 476         (arith-jnz16-imm4-dst-defn): Fix encodings.
 477
 478 2007-03-20  DJ Delorie  <dj@redhat.com>
 479
 480         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 481         mem20): New.
 482         (src16-16-20-An-relative-*): New.
 483         (dst16-*-20-An-relative-*): New.
 484         (dst16-16-16sa-*): New
 485         (dst16-16-16ar-*): New
 486         (dst32-16-16sa-Unprefixed-*): New
 487         (jsri): Fix operands.
 488         (setzx): Fix encoding.
 489
 490 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 491
 492         * m32r.opc: Formatting.
 493
 494 2006-05-22  Nick Clifton  <nickc@redhat.com>
 495
 496         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 497
 498 2006-04-10  DJ Delorie  <dj@redhat.com>
 499
 500         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 501         decides if this function accepts symbolic constants or not.
 502         (parse_signed_bitbase): Likewise.
 503         (parse_unsigned_bitbase8): Pass the new parameter.
 504         (parse_unsigned_bitbase11): Likewise.
 505         (parse_unsigned_bitbase16): Likewise.
 506         (parse_unsigned_bitbase19): Likewise.
 507         (parse_unsigned_bitbase27): Likewise.
 508         (parse_signed_bitbase8): Likewise.
 509         (parse_signed_bitbase11): Likewise.
 510         (parse_signed_bitbase19): Likewise.
 511
 512 2006-03-13  DJ Delorie  <dj@redhat.com>
 513
 514         * m32c.cpu (Bit3-S): New.
 515         (btst:s): New.
 516         * m32c.opc (parse_bit3_S): New.
 517
 518         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 519         (btst): Add optional :G suffix for MACH32.
 520         (or.b:S): New.
 521         (pop.w:G): Add optional :G suffix for MACH16.
 522         (push.b.imm): Fix syntax.
 523
 524 2006-03-10  DJ Delorie  <dj@redhat.com>
 525
 526         * m32c.cpu (mul.l): New.
 527         (mulu.l): New.
 528
 529 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 530
 531         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 532         an error message otherwise.
 533         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 534         Fix up comments to correctly describe the functions.
 535
 536 2006-02-24  DJ Delorie  <dj@redhat.com>
 537
 538         * m32c.cpu (RL_TYPE): New attribute, with macros.
 539         (Lab-8-24): Add RELAX.
 540         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 541         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 542         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 543         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 544         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 545         attribute.
 546         (jsri16, jsri32): Add 1ADDR attribute.
 547         (jsr32.w, jsr32.a): Add JUMP attribute.
 548
 549 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 550             Anil Paranjape   <anilp1@kpitcummins.com>
 551             Shilin Shakti    <shilins@kpitcummins.com>
 552
 553         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 554         description.
 555         * xc16x.opc: New file containing supporting XC16C routines.
 556
 557 2006-02-10  Nick Clifton  <nickc@redhat.com>
 558
 559         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 560
 561 2006-01-06  DJ Delorie  <dj@redhat.com>
 562
 563         * m32c.cpu (mov.w:q): Fix mode.
 564         (push32.b.imm): Likewise, for the comment.
 565
 566 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 567
 568         Second part of ms1 to mt renaming.
 569         * mt.cpu (define-arch, define-isa): Set name to mt.
 570         (define-mach): Adjust.
 571         * mt.opc (CGEN_ASM_HASH): Update.
 572         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 573         (parse_loopsize, parse_imm16): Adjust.
 574
 575 2005-12-13  DJ Delorie  <dj@redhat.com>
 576
 577         * m32c.cpu (jsri): Fix order so register names aren't treated as
 578         symbols.
 579         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 580         indexwd, indexws): Fix encodings.
 581
 582 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 583
 584         * mt.cpu: Rename from ms1.cpu.
 585         * mt.opc: Rename from ms1.opc.
 586
 587 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 588
 589         * cris.cpu (simplecris-common-writable-specregs)
 590         (simplecris-common-readable-specregs): Split from
 591         simplecris-common-specregs.  All users changed.
 592         (cris-implemented-writable-specregs-v0)
 593         (cris-implemented-readable-specregs-v0): Similar from
 594         cris-implemented-specregs-v0.
 595         (cris-implemented-writable-specregs-v3)
 596         (cris-implemented-readable-specregs-v3)
 597         (cris-implemented-writable-specregs-v8)
 598         (cris-implemented-readable-specregs-v8)
 599         (cris-implemented-writable-specregs-v10)
 600         (cris-implemented-readable-specregs-v10)
 601         (cris-implemented-writable-specregs-v32)
 602         (cris-implemented-readable-specregs-v32): Similar.
 603         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 604         insns and specializations.
 605
 606 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 607
 608         Add ms2
 609         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 610         model.
 611         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 612         f-cb2incr, f-rc3): New fields.
 613         (LOOP): New instruction.
 614         (JAL-HAZARD): New hazard.
 615         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 616         New operands.
 617         (mul, muli, dbnz, iflush): Enable for ms2
 618         (jal, reti): Has JAL-HAZARD.
 619         (ldctxt, ldfb, stfb): Only ms1.
 620         (fbcb): Only ms1,ms1-003.
 621         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 622         fbcbincrs, mfbcbincrs): Enable for ms2.
 623         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 624         * ms1.opc (parse_loopsize): New.
 625         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 626         (print_pcrel): New.
 627
 628 2005-10-28  Dave Brolley  <brolley@redhat.com>
 629
 630         Contribute the following change:
 631         2003-09-24  Dave Brolley  <brolley@redhat.com>
 632
 633         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 634         CGEN_ATTR_VALUE_TYPE.
 635         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 636         Use cgen_bitset_intersect_p.
 637
 638 2005-10-27  DJ Delorie  <dj@redhat.com>
 639
 640         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 641         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 642         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 643         imm operand is needed.
 644         (adjnz, sbjnz): Pass the right operands.
 645         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 646         unary-insn): Add -g variants for opcodes that need to support :G.
 647         (not.BW:G, push.BW:G): Call it.
 648         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 649         stzx16-imm8-imm8-abs16): Fix operand typos.
 650         * m32c.opc (m32c_asm_hash): Support bnCND.
 651         (parse_signed4n, print_signed4n): New.
 652
 653 2005-10-26  DJ Delorie  <dj@redhat.com>
 654
 655         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 656         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 657         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 658         dsp8[sp] is signed.
 659         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 660         (mov.BW:S r0,r1): Fix typo r1l->r1.
 661         (tst): Allow :G suffix.
 662         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 663
 664 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 665
 666         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 667
 668 2005-10-25  DJ Delorie  <dj@redhat.com>
 669
 670         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 671         making one a macro of the other.
 672
 673 2005-10-21  DJ Delorie  <dj@redhat.com>
 674
 675         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 676         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 677         indexld, indexls): .w variants have `1' bit.
 678         (rot32.b): QI, not SI.
 679         (rot32.w): HI, not SI.
 680         (xchg16): HI for .w variant.
 681
 682 2005-10-19  Nick Clifton  <nickc@redhat.com>
 683
 684         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 685
 686 2005-10-18  Andreas Schwab  <schwab@suse.de>
 687
 688         * m32r.opc (parse_slo16): Better version of previous patch.
 689
 690 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 691
 692         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 693         size.
 694
 695 2005-07-25  DJ Delorie  <dj@redhat.com>
 696
 697         * m32c.opc (parse_unsigned8): Add %dsp8().
 698         (parse_signed8): Add %hi8().
 699         (parse_unsigned16): Add %dsp16().
 700         (parse_signed16): Add %lo16() and %hi16().
 701         (parse_lab_5_3): Make valuep a bfd_vma *.
 702
 703 2005-07-18  Nick Clifton  <nickc@redhat.com>
 704
 705         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 706         components.
 707         (f-lab32-jmp-s): Fix insertion sequence.
 708         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 709         (Dsp-40-s8): Make parameter be signed.
 710         (Dsp-40-s16): Likewise.
 711         (Dsp-48-s8): Likewise.
 712         (Dsp-48-s16): Likewise.
 713         (Imm-13-u3): Likewise. (Despite its name!)
 714         (BitBase16-16-s8): Make the parameter be unsigned.
 715         (BitBase16-8-u11-S): Likewise.
 716         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 717         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 718         relaxation.
 719
 720         * m32c.opc: Fix formatting.
 721         Use safe-ctype.h instead of ctype.h
 722         Move duplicated code sequences into a macro.
 723         Fix compile time warnings about signedness mismatches.
 724         Remove dead code.
 725         (parse_lab_5_3): New parser function.
 726
 727 2005-07-16  Jim Blandy  <jimb@redhat.com>
 728
 729         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 730         to represent isa sets.
 731
 732 2005-07-15  Jim Blandy  <jimb@redhat.com>
 733
 734         * m32c.cpu, m32c.opc: Fix copyright.
 735
 736 2005-07-14  Jim Blandy  <jimb@redhat.com>
 737
 738         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 739
 740 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 741
 742         * ms1.opc (print_dollarhex): Correct format string.
 743
 744 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 745
 746         * iq2000.cpu: Include from binutils cpu dir.
 747
 748 2005-07-05  Nick Clifton  <nickc@redhat.com>
 749
 750         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 751         unsigned in order to avoid compile time warnings about sign
 752         conflicts.
 753
 754         * ms1.opc (parse_*): Likewise.
 755         (parse_imm16): Use a "void *" as it is passed both signed and
 756         unsigned arguments.
 757
 758 2005-07-01  Nick Clifton  <nickc@redhat.com>
 759
 760         * frv.opc: Update to ISO C90 function declaration style.
 761         * iq2000.opc: Likewise.
 762         * m32r.opc: Likewise.
 763         * sh.opc: Likewise.
 764
 765 2005-06-15  Dave Brolley  <brolley@redhat.com>
 766
 767         Contributed by Red Hat.
 768         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 769         * ms1.opc: New file.  Written by Stan Cox.
 770
 771 2005-05-10  Nick Clifton  <nickc@redhat.com>
 772
 773         * Update the address and phone number of the FSF organization in
 774         the GPL notices in the following files:
 775         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 776         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 777         sh64-media.cpu, simplify.inc
 778
 779 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 780
 781         * frv.opc (parse_A): Warning fix.
 782
 783 2005-02-23  Nick Clifton  <nickc@redhat.com>
 784
 785         * frv.opc: Fixed compile time warnings about differing signed'ness
 786         of pointers passed to functions.
 787         * m32r.opc: Likewise.
 788
 789 2005-02-11  Nick Clifton  <nickc@redhat.com>
 790
 791         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 792         'bfd_vma *' in order avoid compile time warning message.
 793
 794 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 795
 796         * cris.cpu (mstep): Add missing insn.
 797
 798 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 799
 800         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 801         * frv.cpu: Add support for TLS annotations in loads and calll.
 802         * frv.opc (parse_symbolic_address): New.
 803         (parse_ldd_annotation): New.
 804         (parse_call_annotation): New.
 805         (parse_ld_annotation): New.
 806         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 807         Introduce TLS relocations.
 808         (parse_d12, parse_s12, parse_u12): Likewise.
 809         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 810         (parse_call_label, print_at): New.
 811
 812 2004-12-21  Mikael Starvik  <starvik@axis.com>
 813
 814         * cris.cpu (cris-set-mem): Correct integral write semantics.
 815
 816 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 817
 818         * cris.cpu: New file.
 819
 820 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 821
 822         * iq2000.cpu: Added quotes around macro arguments so that they
 823         will work with newer versions of guile.
 824
 825 2004-10-27  Nick Clifton  <nickc@redhat.com>
 826
 827         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 828         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 829         operand.
 830         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 831         with guile.
 832
 833 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 834
 835         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 836
 837 2004-05-15  Nick Clifton  <nickc@redhat.com>
 838
 839         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 840
 841 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 842
 843         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 844
 845 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 846
 847         * frv.cpu (define-arch frv): Add fr450 mach.
 848         (define-mach fr450): New.
 849         (define-model fr450): New.  Add profile units to every fr450 insn.
 850         (define-attr UNIT): Add MDCUTSSI.
 851         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 852         (define-attr AUDIO): New boolean.
 853         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 854         (f-LRA-null, f-TLBPR-null): New fields.
 855         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 856         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 857         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 858         (LRA-null, TLBPR-null): New macros.
 859         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 860         (load-real-address): New macro.
 861         (lrai, lrad, tlbpr): New instructions.
 862         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 863         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 864         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 865         (media-low-clear-semantics, media-scope-limit-semantics)
 866         (media-quad-limit, media-quad-shift): New macros.
 867         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 868         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 869         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 870         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 871         (fr450_unit_mapping): New array.
 872         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 873         for new MDCUTSSI unit.
 874         (fr450_check_insn_major_constraints): New function.
 875         (check_insn_major_constraints): Use it.
 876
 877 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 878
 879         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 880         (scutss): Change unit to I0.
 881         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 882         (mqsaths): Fix FR400-MAJOR categorization.
 883         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 884         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 885         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 886         combinations.
 887
 888 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 889
 890         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 891         (rstb, rsth, rst, rstd, rstq): Delete.
 892         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 893
 894 2004-02-23  Nick Clifton  <nickc@redhat.com>
 895
 896         * Apply these patches from Renesas:
 897
 898         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 899
 900         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 901         disassembling codes for 0x*2 addresses.
 902
 903         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 904
 905         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 906
 907         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 908
 909         * cpu/m32r.cpu : Add new model m32r2.
 910         Add new instructions.
 911         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 912         Changed PIPE attr of push from O to OS.
 913         Care for Little-endian of M32R.
 914         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 915         Care for Little-endian of M32R.
 916         (parse_slo16): signed extension for value.
 917
 918 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 919
 920         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 921         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 922
 923         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 924         written by Ben Elliston.
 925
 926 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 927
 928         * frv.cpu (UNIT): Add IACC.
 929         (iacc-multiply-r-r): Use it.
 930         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 931         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 932
 933 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 934
 935         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 936         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 937         cut&paste errors in shifting/truncating numerical operands.
 938         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 939         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 940         (parse_uslo16): Likewise.
 941         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 942         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 943         (parse_s12): Likewise.
 944         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 945         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 946         (parse_uslo16): Likewise.
 947         (parse_uhi16): Parse gothi and gotfuncdeschi.
 948         (parse_d12): Parse got12 and gotfuncdesc12.
 949         (parse_s12): Likewise.
 950
 951 2003-10-10  Dave Brolley  <brolley@redhat.com>
 952
 953         * frv.cpu (dnpmop): New p-macro.
 954         (GRdoublek): Use dnpmop.
 955         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 956         (store-double-r-r): Use (.sym regtype doublek).
 957         (r-store-double): Ditto.
 958         (store-double-r-r-u): Ditto.
 959         (conditional-store-double): Ditto.
 960         (conditional-store-double-u): Ditto.
 961         (store-double-r-simm): Ditto.
 962         (fmovs): Assign to UNIT FMALL.
 963
 964 2003-10-06  Dave Brolley  <brolley@redhat.com>
 965
 966         * frv.cpu, frv.opc: Add support for fr550.
 967
 968 2003-09-24  Dave Brolley  <brolley@redhat.com>
 969
 970         * frv.cpu (u-commit): New modelling unit for fr500.
 971         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 972         (commit-r): Use u-commit model for fr500.
 973         (commit): Ditto.
 974         (conditional-float-binary-op): Take profiling data as an argument.
 975         Update callers.
 976         (ne-float-binary-op): Ditto.
 977
 978 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 979
 980         * frv.cpu (nldqi): Delete unimplemented instruction.
 981
 982 2003-09-12  Dave Brolley  <brolley@redhat.com>
 983
 984         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 985         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 986         frv_ref_SI to get input register referenced for profiling.
 987         (clear-ne-flag-all): Pass insn profiling in as an argument.
 988         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 989
 990 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 991
 992         * frv.cpu: Typographical corrections.
 993
 994 2003-09-09  Dave Brolley  <brolley@redhat.com>
 995
 996         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 997         (conditional-media-dual-complex, media-quad-complex): Likewise.
 998
 999 2003-09-04  Dave Brolley  <brolley@redhat.com>
1000
1001         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1002         Update all callers.
1003         (conditional-register-transfer): Ditto.
1004         (cache-preload): Ditto.
1005         (floating-point-conversion): Ditto.
1006         (floating-point-neg): Ditto.
1007         (float-abs): Ditto.
1008         (float-binary-op-s): Ditto.
1009         (conditional-float-binary-op): Ditto.
1010         (ne-float-binary-op): Ditto.
1011         (float-dual-arith): Ditto.
1012         (ne-float-dual-arith): Ditto.
1013
1014 2003-09-03  Dave Brolley  <brolley@redhat.com>
1015
1016         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1017         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1018         MCLRACC-1.
1019         (A): Removed operand.
1020         (A0,A1): New operands replace operand A.
1021         (mnop): Now a real insn
1022         (mclracc): Removed insn.
1023         (mclracc-0, mclracc-1): New insns replace mclracc.
1024         (all insns): Use new UNIT attributes.
1025
1026 2003-08-21  Nick Clifton  <nickc@redhat.com>
1027
1028         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1029         and u-media-dual-btoh with output parameter.
1030         (cmbtoh): Add profiling hack.
1031
1032 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1033
1034         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1035
1036 2003-06-10  Doug Evans  <dje@sebabeach.org>
1037
1038         * frv.cpu: Add IDOC attribute.
1039
1040 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1041
1042         Contributed by Red Hat.
1043         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1044         Stan Cox, and Frank Ch. Eigler.
1045         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1046         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1047         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1048         * iq10.cpu: New file.  Written by Jeff Johnston.
1049
1050 2003-06-05  Nick Clifton  <nickc@redhat.com>
1051
1052         * frv.cpu (FRintieven): New operand.  An even-numbered only
1053         version of the FRinti operand.
1054         (FRintjeven): Likewise for FRintj.
1055         (FRintkeven): Likewise for FRintk.
1056         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1057         media-quad-arith-sat-semantics, media-quad-arith-sat,
1058         conditional-media-quad-arith-sat, mdunpackh,
1059         media-quad-multiply-semantics, media-quad-multiply,
1060         conditional-media-quad-multiply, media-quad-complex-i,
1061         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1062         conditional-media-quad-multiply-acc, munpackh,
1063         media-quad-multiply-cross-acc-semantics, mdpackh,
1064         media-quad-multiply-cross-acc, mbtoh-semantics,
1065         media-quad-cross-multiply-cross-acc-semantics,
1066         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1067         media-quad-cross-multiply-acc-semantics, cmbtoh,
1068         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1069         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1070         cmhtob): Use new operands.
1071         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1072         (parse_even_register): New function.
1073
1074 2003-06-03  Nick Clifton  <nickc@redhat.com>
1075
1076         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1077         immediate value not unsigned.
1078
1079 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1080
1081         Contributed by Red Hat.
1082         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1083         and Eric Christopher.
1084         * frv.opc: New file.  Written by Catherine Moore, and Dave
1085         Brolley.
1086         * simplify.inc: New file.  Written by Doug Evans.
1087
1088 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1089
1090         * New file.
1091
1092 \f
1093 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1094
1095 Copying and distribution of this file, with or without modification,
1096 are permitted in any medium without royalty provided the copyright
1097 notice and this notice are preserved.
1098
1099 Local Variables:
1100 mode: change-log
1101 left-margin: 8
1102 fill-column: 74
1103 version-control: never
1104 End: