cpu/ChangeLog

   1 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
   2             Stafford Horne  <shorne@gmail.com>
   3
   4         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
   5         (ORFPX-MACHS): Removed pmacro.
   6         * or1k.opc (or1k_cgen_insn_supported): New function.
   7         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
   8         (parse_regpair, print_regpair): New functions.
   9         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  10         and add comments.
  11         (h-fdr): Update comment to indicate or64.
  12         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  13         (h-fd32r): New hardware for 64-bit fpu registers.
  14         (h-i64r): New hardware for 64-bit int registers.
  15         * or1korbis.cpu (f-resv-8-1): New field.
  16         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  17         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  18         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  19         (h-roff1): New hardware.
  20         (double-field-and-ops mnemonic): New pmacro to generate operations
  21         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  22         (float-regreg-insn): Update single precision generator to MACH
  23         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  24         (float-setflag-insn): Update single precision generator to MACH
  25         ORFPX32-MACHS.  Fix double instructions from single to double
  26         precision.  Add generator for or32 64-bit instructions.
  27         (float-cust-insn cust-num): Update single precision generator to MACH
  28         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  29         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  30         ORFPX32-MACHS.
  31         (lf-rem-d): Fix operation from mod to rem.
  32         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
  33         (lf-itof-d): Fix operands from single to double.
  34         (lf-ftoi-d): Update operand mode from DI to WI.
  35
  36 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
  37
  38         * bpf.cpu: New file.
  39         * bpf.opc: Likewise.
  40
  41 2018-06-24  Nick Clifton  <nickc@redhat.com>
  42
  43         2.32 branch created.
  44
  45 2018-10-05  Richard Henderson  <rth@twiddle.net>
  46             Stafford Horne  <shorne@gmail.com>
  47
  48         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
  49         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
  50         (l-mul): Fix overflow support and indentation.
  51         (l-mulu): Fix overflow support and indentation.
  52         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
  53         (l-div); Remove incorrect carry behavior.
  54         (l-divu): Fix carry and overflow behavior.
  55         (l-mac): Add overflow support.
  56         (l-msb, l-msbu): Add carry and overflow support.
  57
  58 2018-10-05  Richard Henderson  <rth@twiddle.net>
  59
  60         * or1k.opc (parse_disp26): Add support for plta() relocations.
  61         (parse_disp21): New function.
  62         (or1k_rclass): New enum.
  63         (or1k_rtype): New enum.
  64         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
  65         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
  66         (parse_imm16): Add support for the new 21bit and 13bit relocations.
  67         * or1korbis.cpu (f-disp26): Don't assume SI.
  68         (f-disp21): New pc-relative 21-bit 13 shifted to right.
  69         (insn-opcode): Add ADRP.
  70         (l-adrp): New instruction.
  71
  72 2018-10-05  Richard Henderson  <rth@twiddle.net>
  73
  74         * or1k.opc: Add RTYPE_ enum.
  75         (INVALID_STORE_RELOC): New string.
  76         (or1k_imm16_relocs): New array array.
  77         (parse_reloc): New static function that just does the parsing.
  78         (parse_imm16): New static function for generic parsing.
  79         (parse_simm16): Change to just call parse_imm16.
  80         (parse_simm16_split): New function.
  81         (parse_uimm16): Change to call parse_imm16.
  82         (parse_uimm16_split): New function.
  83         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
  84         (uimm16-split): Change to use new uimm16_split.
  85
  86 2018-07-24  Alan Modra  <amodra@gmail.com>
  87
  88         PR 23430
  89         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
  90
  91 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
  92
  93         * or1kcommon.cpu (spr-reg-info): Typo fix.
  94
  95 2018-03-03  Alan Modra  <amodra@gmail.com>
  96
  97         * frv.opc: Include opintl.h.
  98         (add_next_to_vliw): Use opcodes_error_handler to print error.
  99         Standardize error message.
 100         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 101
 102 2018-01-13  Nick Clifton  <nickc@redhat.com>
 103
 104         2.30 branch created.
 105
 106 2017-03-15  Stafford Horne  <shorne@gmail.com>
 107
 108         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 109
 110 2016-10-06  Alan Modra  <amodra@gmail.com>
 111
 112         * mep.opc (expand_string): Add fall through comment.
 113
 114 2016-03-03  Alan Modra  <amodra@gmail.com>
 115
 116         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 117         at what is really going on.
 118
 119 2016-03-02  Alan Modra  <amodra@gmail.com>
 120
 121         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 122
 123 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 124
 125         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 126         a constant to better align disassembler output.
 127
 128 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 129
 130         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 131
 132 2014-06-12  Alan Modra  <amodra@gmail.com>
 133
 134         * or1k.opc: Whitespace fixes.
 135
 136 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 137
 138         * or1korbis.cpu (h-atomic-reserve): New hardware.
 139         (h-atomic-address): Likewise.
 140         (insn-opcode): Add opcodes for LWA and SWA.
 141         (atomic-reserve): New operand.
 142         (atomic-address): Likewise.
 143         (l-lwa, l-swa): New instructions.
 144         (l-lbs): Fix typo in comment.
 145         (store-insn): Clear atomic reserve on store to atomic-address.
 146         Fix register names in fmt field.
 147
 148 2014-04-22  Christian Svensson  <blue@cmd.nu>
 149
 150         * openrisc.cpu: Delete.
 151         * openrisc.opc: Delete.
 152         * or1k.cpu: New file.
 153         * or1k.opc: New file.
 154         * or1kcommon.cpu: New file.
 155         * or1korbis.cpu: New file.
 156         * or1korfpx.cpu: New file.
 157
 158 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * epiphany.opc: Remove +x file mode.
 161
 162 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 163
 164         PR binutils/15241
 165         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 166         TLBVADDR, TLBPADDR and TLBBADVADDR.
 167
 168 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 169             Joern Rennecke  <joern.rennecke@embecosm.com>
 170
 171         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 172         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 173         (testset-insn): Add NO_DIS attribute to t.l.
 174         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 175         (move-insns): Add NO-DIS attribute to cmov.l.
 176         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 177         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 178         (op-rrr): Add NO-DIS attribute to .l.
 179         (shift-rrr): Add NO-DIS attribute to .l.
 180         (op-shift-rri): Add NO-DIS attribute to i32.l.
 181         (bitrl, movtl): Add NO-DIS attribute.
 182         (op-iextrrr): Add NO-DIS attribute to .l
 183         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 184         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 185
 186 2012-02-27  Alan Modra  <amodra@gmail.com>
 187
 188         * mt.opc (print_dollarhex): Trim values to 32 bits.
 189
 190 2011-12-15  Nick Clifton  <nickc@redhat.com>
 191
 192         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 193         hosts.
 194
 195 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 196
 197         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 198         Cast value before printing it as a long.
 199         (parse_postindex): Fix type of valuep.
 200
 201 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 202
 203         * cpu/epiphany.cpu: New file.
 204         * cpu/epiphany.opc: New file.
 205
 206 2011-08-22  Nick Clifton  <nickc@redhat.com>
 207
 208         * fr30.cpu: Newly contributed file.
 209         * fr30.opc: Likewise.
 210         * ip2k.cpu: Likewise.
 211         * ip2k.opc: Likewise.
 212         * mep-avc.cpu: Likewise.
 213         * mep-avc2.cpu: Likewise.
 214         * mep-c5.cpu: Likewise.
 215         * mep-core.cpu: Likewise.
 216         * mep-default.cpu: Likewise.
 217         * mep-ext-cop.cpu: Likewise.
 218         * mep-fmax.cpu: Likewise.
 219         * mep-h1.cpu: Likewise.
 220         * mep-ivc2.cpu: Likewise.
 221         * mep-rhcop.cpu: Likewise.
 222         * mep-sample-ucidsp.cpu: Likewise.
 223         * mep.cpu: Likewise.
 224         * mep.opc: Likewise.
 225         * openrisc.cpu: Likewise.
 226         * openrisc.opc: Likewise.
 227         * xstormy16.cpu: Likewise.
 228         * xstormy16.opc: Likewise.
 229
 230 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 231
 232         * frv.opc: #undef DEBUG.
 233
 234 2010-07-03  DJ Delorie  <dj@delorie.com>
 235
 236         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 237
 238 2010-02-11  Doug Evans  <dje@sebabeach.org>
 239
 240         * m32r.cpu (HASH-PREFIX): Delete.
 241         (duhpo, dshpo): New pmacros.
 242         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 243         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 244         attribute, define with dshpo.
 245         (uimm24): Delete HASH-PREFIX attribute.
 246         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 247         (print_signed_with_hash_prefix): New function.
 248         (print_unsigned_with_hash_prefix): New function.
 249         * xc16x.cpu (dowh): New pmacro.
 250         (upof16): Define with dowh, specify print handler.
 251         (qbit, qlobit, qhibit): Ditto.
 252         (upag16): Ditto.
 253         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 254         (print_with_dot_prefix): New functions.
 255         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 256
 257 2010-01-24  Doug Evans  <dje@sebabeach.org>
 258
 259         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 260         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 261         conditional-floating-point-conversion, ne-floating-point-conversion,
 262         float-parallel-mul-add-double-semantics): Ditto.
 263
 264 2010-01-05  Doug Evans  <dje@sebabeach.org>
 265
 266         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 267         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 268
 269 2010-01-02  Doug Evans  <dje@sebabeach.org>
 270
 271         * m32c.opc (parse_signed16): Fix typo.
 272
 273 2009-12-11  Nick Clifton  <nickc@redhat.com>
 274
 275         * frv.opc: Fix shadowed variable warnings.
 276         * m32c.opc: Fix shadowed variable warnings.
 277
 278 2009-11-14  Doug Evans  <dje@sebabeach.org>
 279
 280         Must use VOID expression in VOID context.
 281         * xc16x.cpu (mov4): Fix mode of `sequence'.
 282         (mov9, mov10): Ditto.
 283         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 284         (callr, callseg, calls, trap, rets, reti): Ditto.
 285         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 286         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 287         (exts, exts1, extsr, extsr1, prior): Ditto.
 288
 289 2009-10-23  Doug Evans  <dje@sebabeach.org>
 290
 291         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 292         cgen-ops.h -> cgen/basic-ops.h.
 293
 294 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 295
 296         * m32r.cpu (stb-plus): Typo fix.
 297
 298 2009-09-23  Doug Evans  <dje@sebabeach.org>
 299
 300         * m32r.cpu (sth-plus): Fix address mode and calculation.
 301         (stb-plus): Ditto.
 302         (clrpsw): Fix mask calculation.
 303         (bset, bclr, btst): Make mode in bit calculation match expression.
 304
 305         * xc16x.cpu (rtl-version): Set to 0.8.
 306         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 307         make uppercase.  Remove unnecessary name-prefix spec.
 308         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 309         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 310         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 311         (h-cr): New hardware.
 312         (muls): Comment out parts that won't compile, add fixme.
 313         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 314         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 315         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 316
 317 2009-07-16  Doug Evans  <dje@sebabeach.org>
 318
 319         * cpu/simplify.inc (*): One line doc strings don't need \n.
 320         (df): Invoke define-full-ifield instead of claiming it's an alias.
 321         (dno): Define.
 322         (dnop): Mark as deprecated.
 323
 324 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 325
 326         * m32c.opc (parse_lab_5_3): Use correct enum.
 327
 328 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 329
 330         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 331         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 332         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 333         arguments of "operation" to DI using "mode" and the new pmacros.
 334
 335 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 336
 337         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 338         of number 2, PID.
 339
 340 2008-12-23  Jon Beniston <jon@beniston.com>
 341
 342         * lm32.cpu: New file.
 343         * lm32.opc: New file.
 344
 345 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 346
 347         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 348         to source.
 349
 350 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 351
 352         * cris.cpu (movs, movu): Use result of extension operation when
 353         updating flags.
 354
 355 2007-07-04  Nick Clifton  <nickc@redhat.com>
 356
 357         * cris.cpu: Update copyright notice to refer to GPLv3.
 358         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 359         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 360         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 361         xc16x.opc: Likewise.
 362         * iq2000.cpu: Fix copyright notice to refer to FSF.
 363
 364 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 365
 366         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 367
 368 2007-04-20  Nick Clifton  <nickc@redhat.com>
 369
 370         * xc16x.cpu: Restore after accidentally overwriting this file with
 371         xc16x.opc.
 372
 373 2007-03-29  DJ Delorie  <dj@redhat.com>
 374
 375         * m32c.cpu (Imm-8-s4n): Fix print hook.
 376         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 377         (arith-jnz-imm4-dst-defn): Make relaxable.
 378         (arith-jnz16-imm4-dst-defn): Fix encodings.
 379
 380 2007-03-20  DJ Delorie  <dj@redhat.com>
 381
 382         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 383         mem20): New.
 384         (src16-16-20-An-relative-*): New.
 385         (dst16-*-20-An-relative-*): New.
 386         (dst16-16-16sa-*): New
 387         (dst16-16-16ar-*): New
 388         (dst32-16-16sa-Unprefixed-*): New
 389         (jsri): Fix operands.
 390         (setzx): Fix encoding.
 391
 392 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 393
 394         * m32r.opc: Formatting.
 395
 396 2006-05-22  Nick Clifton  <nickc@redhat.com>
 397
 398         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 399
 400 2006-04-10  DJ Delorie  <dj@redhat.com>
 401
 402         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 403         decides if this function accepts symbolic constants or not.
 404         (parse_signed_bitbase): Likewise.
 405         (parse_unsigned_bitbase8): Pass the new parameter.
 406         (parse_unsigned_bitbase11): Likewise.
 407         (parse_unsigned_bitbase16): Likewise.
 408         (parse_unsigned_bitbase19): Likewise.
 409         (parse_unsigned_bitbase27): Likewise.
 410         (parse_signed_bitbase8): Likewise.
 411         (parse_signed_bitbase11): Likewise.
 412         (parse_signed_bitbase19): Likewise.
 413
 414 2006-03-13  DJ Delorie  <dj@redhat.com>
 415
 416         * m32c.cpu (Bit3-S): New.
 417         (btst:s): New.
 418         * m32c.opc (parse_bit3_S): New.
 419
 420         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 421         (btst): Add optional :G suffix for MACH32.
 422         (or.b:S): New.
 423         (pop.w:G): Add optional :G suffix for MACH16.
 424         (push.b.imm): Fix syntax.
 425
 426 2006-03-10  DJ Delorie  <dj@redhat.com>
 427
 428         * m32c.cpu (mul.l): New.
 429         (mulu.l): New.
 430
 431 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 432
 433         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 434         an error message otherwise.
 435         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 436         Fix up comments to correctly describe the functions.
 437
 438 2006-02-24  DJ Delorie  <dj@redhat.com>
 439
 440         * m32c.cpu (RL_TYPE): New attribute, with macros.
 441         (Lab-8-24): Add RELAX.
 442         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 443         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 444         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 445         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 446         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 447         attribute.
 448         (jsri16, jsri32): Add 1ADDR attribute.
 449         (jsr32.w, jsr32.a): Add JUMP attribute.
 450
 451 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 452             Anil Paranjape   <anilp1@kpitcummins.com>
 453             Shilin Shakti    <shilins@kpitcummins.com>
 454
 455         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 456         description.
 457         * xc16x.opc: New file containing supporting XC16C routines.
 458
 459 2006-02-10  Nick Clifton  <nickc@redhat.com>
 460
 461         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 462
 463 2006-01-06  DJ Delorie  <dj@redhat.com>
 464
 465         * m32c.cpu (mov.w:q): Fix mode.
 466         (push32.b.imm): Likewise, for the comment.
 467
 468 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 469
 470         Second part of ms1 to mt renaming.
 471         * mt.cpu (define-arch, define-isa): Set name to mt.
 472         (define-mach): Adjust.
 473         * mt.opc (CGEN_ASM_HASH): Update.
 474         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 475         (parse_loopsize, parse_imm16): Adjust.
 476
 477 2005-12-13  DJ Delorie  <dj@redhat.com>
 478
 479         * m32c.cpu (jsri): Fix order so register names aren't treated as
 480         symbols.
 481         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 482         indexwd, indexws): Fix encodings.
 483
 484 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 485
 486         * mt.cpu: Rename from ms1.cpu.
 487         * mt.opc: Rename from ms1.opc.
 488
 489 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 490
 491         * cris.cpu (simplecris-common-writable-specregs)
 492         (simplecris-common-readable-specregs): Split from
 493         simplecris-common-specregs.  All users changed.
 494         (cris-implemented-writable-specregs-v0)
 495         (cris-implemented-readable-specregs-v0): Similar from
 496         cris-implemented-specregs-v0.
 497         (cris-implemented-writable-specregs-v3)
 498         (cris-implemented-readable-specregs-v3)
 499         (cris-implemented-writable-specregs-v8)
 500         (cris-implemented-readable-specregs-v8)
 501         (cris-implemented-writable-specregs-v10)
 502         (cris-implemented-readable-specregs-v10)
 503         (cris-implemented-writable-specregs-v32)
 504         (cris-implemented-readable-specregs-v32): Similar.
 505         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 506         insns and specializations.
 507
 508 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 509
 510         Add ms2
 511         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 512         model.
 513         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 514         f-cb2incr, f-rc3): New fields.
 515         (LOOP): New instruction.
 516         (JAL-HAZARD): New hazard.
 517         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 518         New operands.
 519         (mul, muli, dbnz, iflush): Enable for ms2
 520         (jal, reti): Has JAL-HAZARD.
 521         (ldctxt, ldfb, stfb): Only ms1.
 522         (fbcb): Only ms1,ms1-003.
 523         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 524         fbcbincrs, mfbcbincrs): Enable for ms2.
 525         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 526         * ms1.opc (parse_loopsize): New.
 527         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 528         (print_pcrel): New.
 529
 530 2005-10-28  Dave Brolley  <brolley@redhat.com>
 531
 532         Contribute the following change:
 533         2003-09-24  Dave Brolley  <brolley@redhat.com>
 534
 535         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 536         CGEN_ATTR_VALUE_TYPE.
 537         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 538         Use cgen_bitset_intersect_p.
 539
 540 2005-10-27  DJ Delorie  <dj@redhat.com>
 541
 542         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 543         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 544         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 545         imm operand is needed.
 546         (adjnz, sbjnz): Pass the right operands.
 547         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 548         unary-insn): Add -g variants for opcodes that need to support :G.
 549         (not.BW:G, push.BW:G): Call it.
 550         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 551         stzx16-imm8-imm8-abs16): Fix operand typos.
 552         * m32c.opc (m32c_asm_hash): Support bnCND.
 553         (parse_signed4n, print_signed4n): New.
 554
 555 2005-10-26  DJ Delorie  <dj@redhat.com>
 556
 557         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 558         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 559         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 560         dsp8[sp] is signed.
 561         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 562         (mov.BW:S r0,r1): Fix typo r1l->r1.
 563         (tst): Allow :G suffix.
 564         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 565
 566 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 567
 568         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 569
 570 2005-10-25  DJ Delorie  <dj@redhat.com>
 571
 572         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 573         making one a macro of the other.
 574
 575 2005-10-21  DJ Delorie  <dj@redhat.com>
 576
 577         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 578         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 579         indexld, indexls): .w variants have `1' bit.
 580         (rot32.b): QI, not SI.
 581         (rot32.w): HI, not SI.
 582         (xchg16): HI for .w variant.
 583
 584 2005-10-19  Nick Clifton  <nickc@redhat.com>
 585
 586         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 587
 588 2005-10-18  Andreas Schwab  <schwab@suse.de>
 589
 590         * m32r.opc (parse_slo16): Better version of previous patch.
 591
 592 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 593
 594         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 595         size.
 596
 597 2005-07-25  DJ Delorie  <dj@redhat.com>
 598
 599         * m32c.opc (parse_unsigned8): Add %dsp8().
 600         (parse_signed8): Add %hi8().
 601         (parse_unsigned16): Add %dsp16().
 602         (parse_signed16): Add %lo16() and %hi16().
 603         (parse_lab_5_3): Make valuep a bfd_vma *.
 604
 605 2005-07-18  Nick Clifton  <nickc@redhat.com>
 606
 607         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 608         components.
 609         (f-lab32-jmp-s): Fix insertion sequence.
 610         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 611         (Dsp-40-s8): Make parameter be signed.
 612         (Dsp-40-s16): Likewise.
 613         (Dsp-48-s8): Likewise.
 614         (Dsp-48-s16): Likewise.
 615         (Imm-13-u3): Likewise. (Despite its name!)
 616         (BitBase16-16-s8): Make the parameter be unsigned.
 617         (BitBase16-8-u11-S): Likewise.
 618         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 619         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 620         relaxation.
 621
 622         * m32c.opc: Fix formatting.
 623         Use safe-ctype.h instead of ctype.h
 624         Move duplicated code sequences into a macro.
 625         Fix compile time warnings about signedness mismatches.
 626         Remove dead code.
 627         (parse_lab_5_3): New parser function.
 628
 629 2005-07-16  Jim Blandy  <jimb@redhat.com>
 630
 631         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 632         to represent isa sets.
 633
 634 2005-07-15  Jim Blandy  <jimb@redhat.com>
 635
 636         * m32c.cpu, m32c.opc: Fix copyright.
 637
 638 2005-07-14  Jim Blandy  <jimb@redhat.com>
 639
 640         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 641
 642 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 643
 644         * ms1.opc (print_dollarhex): Correct format string.
 645
 646 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 647
 648         * iq2000.cpu: Include from binutils cpu dir.
 649
 650 2005-07-05  Nick Clifton  <nickc@redhat.com>
 651
 652         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 653         unsigned in order to avoid compile time warnings about sign
 654         conflicts.
 655
 656         * ms1.opc (parse_*): Likewise.
 657         (parse_imm16): Use a "void *" as it is passed both signed and
 658         unsigned arguments.
 659
 660 2005-07-01  Nick Clifton  <nickc@redhat.com>
 661
 662         * frv.opc: Update to ISO C90 function declaration style.
 663         * iq2000.opc: Likewise.
 664         * m32r.opc: Likewise.
 665         * sh.opc: Likewise.
 666
 667 2005-06-15  Dave Brolley  <brolley@redhat.com>
 668
 669         Contributed by Red Hat.
 670         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 671         * ms1.opc: New file.  Written by Stan Cox.
 672
 673 2005-05-10  Nick Clifton  <nickc@redhat.com>
 674
 675         * Update the address and phone number of the FSF organization in
 676         the GPL notices in the following files:
 677         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 678         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 679         sh64-media.cpu, simplify.inc
 680
 681 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 682
 683         * frv.opc (parse_A): Warning fix.
 684
 685 2005-02-23  Nick Clifton  <nickc@redhat.com>
 686
 687         * frv.opc: Fixed compile time warnings about differing signed'ness
 688         of pointers passed to functions.
 689         * m32r.opc: Likewise.
 690
 691 2005-02-11  Nick Clifton  <nickc@redhat.com>
 692
 693         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 694         'bfd_vma *' in order avoid compile time warning message.
 695
 696 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 697
 698         * cris.cpu (mstep): Add missing insn.
 699
 700 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 701
 702         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 703         * frv.cpu: Add support for TLS annotations in loads and calll.
 704         * frv.opc (parse_symbolic_address): New.
 705         (parse_ldd_annotation): New.
 706         (parse_call_annotation): New.
 707         (parse_ld_annotation): New.
 708         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 709         Introduce TLS relocations.
 710         (parse_d12, parse_s12, parse_u12): Likewise.
 711         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 712         (parse_call_label, print_at): New.
 713
 714 2004-12-21  Mikael Starvik  <starvik@axis.com>
 715
 716         * cris.cpu (cris-set-mem): Correct integral write semantics.
 717
 718 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 719
 720         * cris.cpu: New file.
 721
 722 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 723
 724         * iq2000.cpu: Added quotes around macro arguments so that they
 725         will work with newer versions of guile.
 726
 727 2004-10-27  Nick Clifton  <nickc@redhat.com>
 728
 729         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 730         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 731         operand.
 732         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 733         with guile.
 734
 735 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 736
 737         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 738
 739 2004-05-15  Nick Clifton  <nickc@redhat.com>
 740
 741         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 742
 743 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 744
 745         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 746
 747 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 748
 749         * frv.cpu (define-arch frv): Add fr450 mach.
 750         (define-mach fr450): New.
 751         (define-model fr450): New.  Add profile units to every fr450 insn.
 752         (define-attr UNIT): Add MDCUTSSI.
 753         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 754         (define-attr AUDIO): New boolean.
 755         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 756         (f-LRA-null, f-TLBPR-null): New fields.
 757         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 758         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 759         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 760         (LRA-null, TLBPR-null): New macros.
 761         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 762         (load-real-address): New macro.
 763         (lrai, lrad, tlbpr): New instructions.
 764         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 765         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 766         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 767         (media-low-clear-semantics, media-scope-limit-semantics)
 768         (media-quad-limit, media-quad-shift): New macros.
 769         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 770         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 771         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 772         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 773         (fr450_unit_mapping): New array.
 774         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 775         for new MDCUTSSI unit.
 776         (fr450_check_insn_major_constraints): New function.
 777         (check_insn_major_constraints): Use it.
 778
 779 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 780
 781         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 782         (scutss): Change unit to I0.
 783         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 784         (mqsaths): Fix FR400-MAJOR categorization.
 785         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 786         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 787         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 788         combinations.
 789
 790 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 791
 792         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 793         (rstb, rsth, rst, rstd, rstq): Delete.
 794         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 795
 796 2004-02-23  Nick Clifton  <nickc@redhat.com>
 797
 798         * Apply these patches from Renesas:
 799
 800         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 801
 802         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 803         disassembling codes for 0x*2 addresses.
 804
 805         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 806
 807         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 808
 809         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 810
 811         * cpu/m32r.cpu : Add new model m32r2.
 812         Add new instructions.
 813         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 814         Changed PIPE attr of push from O to OS.
 815         Care for Little-endian of M32R.
 816         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 817         Care for Little-endian of M32R.
 818         (parse_slo16): signed extension for value.
 819
 820 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 821
 822         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 823         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 824
 825         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 826         written by Ben Elliston.
 827
 828 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 829
 830         * frv.cpu (UNIT): Add IACC.
 831         (iacc-multiply-r-r): Use it.
 832         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 833         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 834
 835 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 836
 837         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 838         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 839         cut&paste errors in shifting/truncating numerical operands.
 840         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 841         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 842         (parse_uslo16): Likewise.
 843         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 844         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 845         (parse_s12): Likewise.
 846         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 847         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 848         (parse_uslo16): Likewise.
 849         (parse_uhi16): Parse gothi and gotfuncdeschi.
 850         (parse_d12): Parse got12 and gotfuncdesc12.
 851         (parse_s12): Likewise.
 852
 853 2003-10-10  Dave Brolley  <brolley@redhat.com>
 854
 855         * frv.cpu (dnpmop): New p-macro.
 856         (GRdoublek): Use dnpmop.
 857         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 858         (store-double-r-r): Use (.sym regtype doublek).
 859         (r-store-double): Ditto.
 860         (store-double-r-r-u): Ditto.
 861         (conditional-store-double): Ditto.
 862         (conditional-store-double-u): Ditto.
 863         (store-double-r-simm): Ditto.
 864         (fmovs): Assign to UNIT FMALL.
 865
 866 2003-10-06  Dave Brolley  <brolley@redhat.com>
 867
 868         * frv.cpu, frv.opc: Add support for fr550.
 869
 870 2003-09-24  Dave Brolley  <brolley@redhat.com>
 871
 872         * frv.cpu (u-commit): New modelling unit for fr500.
 873         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 874         (commit-r): Use u-commit model for fr500.
 875         (commit): Ditto.
 876         (conditional-float-binary-op): Take profiling data as an argument.
 877         Update callers.
 878         (ne-float-binary-op): Ditto.
 879
 880 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 881
 882         * frv.cpu (nldqi): Delete unimplemented instruction.
 883
 884 2003-09-12  Dave Brolley  <brolley@redhat.com>
 885
 886         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 887         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 888         frv_ref_SI to get input register referenced for profiling.
 889         (clear-ne-flag-all): Pass insn profiling in as an argument.
 890         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 891
 892 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 893
 894         * frv.cpu: Typographical corrections.
 895
 896 2003-09-09  Dave Brolley  <brolley@redhat.com>
 897
 898         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 899         (conditional-media-dual-complex, media-quad-complex): Likewise.
 900
 901 2003-09-04  Dave Brolley  <brolley@redhat.com>
 902
 903         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 904         Update all callers.
 905         (conditional-register-transfer): Ditto.
 906         (cache-preload): Ditto.
 907         (floating-point-conversion): Ditto.
 908         (floating-point-neg): Ditto.
 909         (float-abs): Ditto.
 910         (float-binary-op-s): Ditto.
 911         (conditional-float-binary-op): Ditto.
 912         (ne-float-binary-op): Ditto.
 913         (float-dual-arith): Ditto.
 914         (ne-float-dual-arith): Ditto.
 915
 916 2003-09-03  Dave Brolley  <brolley@redhat.com>
 917
 918         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 919         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 920         MCLRACC-1.
 921         (A): Removed operand.
 922         (A0,A1): New operands replace operand A.
 923         (mnop): Now a real insn
 924         (mclracc): Removed insn.
 925         (mclracc-0, mclracc-1): New insns replace mclracc.
 926         (all insns): Use new UNIT attributes.
 927
 928 2003-08-21  Nick Clifton  <nickc@redhat.com>
 929
 930         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 931         and u-media-dual-btoh with output parameter.
 932         (cmbtoh): Add profiling hack.
 933
 934 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 935
 936         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 937
 938 2003-06-10  Doug Evans  <dje@sebabeach.org>
 939
 940         * frv.cpu: Add IDOC attribute.
 941
 942 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 943
 944         Contributed by Red Hat.
 945         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 946         Stan Cox, and Frank Ch. Eigler.
 947         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 948         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 949         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 950         * iq10.cpu: New file.  Written by Jeff Johnston.
 951
 952 2003-06-05  Nick Clifton  <nickc@redhat.com>
 953
 954         * frv.cpu (FRintieven): New operand.  An even-numbered only
 955         version of the FRinti operand.
 956         (FRintjeven): Likewise for FRintj.
 957         (FRintkeven): Likewise for FRintk.
 958         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 959         media-quad-arith-sat-semantics, media-quad-arith-sat,
 960         conditional-media-quad-arith-sat, mdunpackh,
 961         media-quad-multiply-semantics, media-quad-multiply,
 962         conditional-media-quad-multiply, media-quad-complex-i,
 963         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 964         conditional-media-quad-multiply-acc, munpackh,
 965         media-quad-multiply-cross-acc-semantics, mdpackh,
 966         media-quad-multiply-cross-acc, mbtoh-semantics,
 967         media-quad-cross-multiply-cross-acc-semantics,
 968         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 969         media-quad-cross-multiply-acc-semantics, cmbtoh,
 970         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 971         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 972         cmhtob): Use new operands.
 973         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
 974         (parse_even_register): New function.
 975
 976 2003-06-03  Nick Clifton  <nickc@redhat.com>
 977
 978         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
 979         immediate value not unsigned.
 980
 981 2003-06-03  Andrew Cagney  <cagney@redhat.com>
 982
 983         Contributed by Red Hat.
 984         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
 985         and Eric Christopher.
 986         * frv.opc: New file.  Written by Catherine Moore, and Dave
 987         Brolley.
 988         * simplify.inc: New file.  Written by Doug Evans.
 989
 990 2003-05-02  Andrew Cagney  <cagney@redhat.com>
 991
 992         * New file.
 993
 994 \f
 995 Copyright (C) 2003-2012 Free Software Foundation, Inc.
 996
 997 Copying and distribution of this file, with or without modification,
 998 are permitted in any medium without royalty provided the copyright
 999 notice and this notice are preserved.
1000
1001 Local Variables:
1002 mode: change-log
1003 left-margin: 8
1004 fill-column: 74
1005 version-control: never
1006 End: