cpu/ChangeLog

   1 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
   2
   3         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
   4         an error message otherwise.
   5         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
   6         Fix up comments to correctly describe the functions.
   7
   8 2006-02-24  DJ Delorie  <dj@redhat.com>
   9
  10         * m32c.cpu (RL_TYPE): New attribute, with macros.
  11         (Lab-8-24): Add RELAX.
  12         (unary-insn-defn-g, binary-arith-imm-dst-defn,
  13         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
  14         (binary-arith-src-dst-defn): Add 2ADDR attribute.
  15         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
  16         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
  17         attribute.
  18         (jsri16, jsri32): Add 1ADDR attribute.
  19         (jsr32.w, jsr32.a): Add JUMP attribute.
  20
  21 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
  22             Anil Paranjape   <anilp1@kpitcummins.com>
  23             Shilin Shakti    <shilins@kpitcummins.com>
  24
  25         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
  26         description.
  27         * xc16x.opc: New file containing supporting XC16C routines.
  28
  29 2006-02-10  Nick Clifton  <nickc@redhat.com>
  30
  31         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
  32
  33 2006-01-06  DJ Delorie  <dj@redhat.com>
  34
  35         * m32c.cpu (mov.w:q): Fix mode.
  36         (push32.b.imm): Likewise, for the comment.
  37
  38 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
  39
  40         Second part of ms1 to mt renaming.
  41         * mt.cpu (define-arch, define-isa): Set name to mt.
  42         (define-mach): Adjust.
  43         * mt.opc (CGEN_ASM_HASH): Update.
  44         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
  45         (parse_loopsize, parse_imm16): Adjust.
  46
  47 2005-12-13  DJ Delorie  <dj@redhat.com>
  48
  49         * m32c.cpu (jsri): Fix order so register names aren't treated as
  50         symbols.
  51         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
  52         indexwd, indexws): Fix encodings.
  53
  54 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
  55
  56         * mt.cpu: Rename from ms1.cpu.
  57         * mt.opc: Rename from ms1.opc.
  58
  59 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
  60
  61         * cris.cpu (simplecris-common-writable-specregs)
  62         (simplecris-common-readable-specregs): Split from
  63         simplecris-common-specregs.  All users changed.
  64         (cris-implemented-writable-specregs-v0)
  65         (cris-implemented-readable-specregs-v0): Similar from
  66         cris-implemented-specregs-v0.
  67         (cris-implemented-writable-specregs-v3)
  68         (cris-implemented-readable-specregs-v3)
  69         (cris-implemented-writable-specregs-v8)
  70         (cris-implemented-readable-specregs-v8)
  71         (cris-implemented-writable-specregs-v10)
  72         (cris-implemented-readable-specregs-v10)
  73         (cris-implemented-writable-specregs-v32)
  74         (cris-implemented-readable-specregs-v32): Similar.
  75         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
  76         insns and specializations.
  77
  78 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
  79
  80         Add ms2
  81         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
  82         model.
  83         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
  84         f-cb2incr, f-rc3): New fields.
  85         (LOOP): New instruction.
  86         (JAL-HAZARD): New hazard.
  87         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
  88         New operands.
  89         (mul, muli, dbnz, iflush): Enable for ms2
  90         (jal, reti): Has JAL-HAZARD.
  91         (ldctxt, ldfb, stfb): Only ms1.
  92         (fbcb): Only ms1,ms1-003.
  93         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
  94         fbcbincrs, mfbcbincrs): Enable for ms2.
  95         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
  96         * ms1.opc (parse_loopsize): New.
  97         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
  98         (print_pcrel): New.
  99
 100 2005-10-28  Dave Brolley  <brolley@redhat.com>
 101
 102         Contribute the following change:
 103         2003-09-24  Dave Brolley  <brolley@redhat.com>
 104
 105         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 106         CGEN_ATTR_VALUE_TYPE.
 107         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 108         Use cgen_bitset_intersect_p.
 109
 110 2005-10-27  DJ Delorie  <dj@redhat.com>
 111
 112         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 113         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 114         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 115         imm operand is needed.
 116         (adjnz, sbjnz): Pass the right operands.
 117         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 118         unary-insn): Add -g variants for opcodes that need to support :G.
 119         (not.BW:G, push.BW:G): Call it.
 120         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 121         stzx16-imm8-imm8-abs16): Fix operand typos.
 122         * m32c.opc (m32c_asm_hash): Support bnCND.
 123         (parse_signed4n, print_signed4n): New.
 124
 125 2005-10-26  DJ Delorie  <dj@redhat.com>
 126
 127         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 128         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 129         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 130         dsp8[sp] is signed.
 131         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 132         (mov.BW:S r0,r1): Fix typo r1l->r1.
 133         (tst): Allow :G suffix.
 134         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 135
 136 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 137
 138         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 139
 140 2005-10-25  DJ Delorie  <dj@redhat.com>
 141
 142         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 143         making one a macro of the other.
 144
 145 2005-10-21  DJ Delorie  <dj@redhat.com>
 146
 147         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 148         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 149         indexld, indexls): .w variants have `1' bit.
 150         (rot32.b): QI, not SI.
 151         (rot32.w): HI, not SI.
 152         (xchg16): HI for .w variant.
 153
 154 2005-10-19  Nick Clifton  <nickc@redhat.com>
 155
 156         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 157
 158 2005-10-18  Andreas Schwab  <schwab@suse.de>
 159
 160         * m32r.opc (parse_slo16): Better version of previous patch.
 161
 162 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 163
 164         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 165         size.
 166
 167 2005-07-25  DJ Delorie  <dj@redhat.com>
 168
 169         * m32c.opc (parse_unsigned8): Add %dsp8().
 170         (parse_signed8): Add %hi8().
 171         (parse_unsigned16): Add %dsp16().
 172         (parse_signed16): Add %lo16() and %hi16().
 173         (parse_lab_5_3): Make valuep a bfd_vma *.
 174
 175 2005-07-18  Nick Clifton  <nickc@redhat.com>
 176
 177         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 178         components.
 179         (f-lab32-jmp-s): Fix insertion sequence.
 180         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 181         (Dsp-40-s8): Make parameter be signed.
 182         (Dsp-40-s16): Likewise.
 183         (Dsp-48-s8): Likewise.
 184         (Dsp-48-s16): Likewise.
 185         (Imm-13-u3): Likewise. (Despite its name!)
 186         (BitBase16-16-s8): Make the parameter be unsigned.
 187         (BitBase16-8-u11-S): Likewise.
 188         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 189         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 190         relaxation.
 191
 192         * m32c.opc: Fix formatting.
 193         Use safe-ctype.h instead of ctype.h
 194         Move duplicated code sequences into a macro.
 195         Fix compile time warnings about signedness mismatches.
 196         Remove dead code.
 197         (parse_lab_5_3): New parser function.
 198
 199 2005-07-16  Jim Blandy  <jimb@redhat.com>
 200
 201         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 202         to represent isa sets.
 203
 204 2005-07-15  Jim Blandy  <jimb@redhat.com>
 205
 206         * m32c.cpu, m32c.opc: Fix copyright.
 207
 208 2005-07-14  Jim Blandy  <jimb@redhat.com>
 209
 210         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 211
 212 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 213
 214         * ms1.opc (print_dollarhex): Correct format string.
 215
 216 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 217
 218         * iq2000.cpu: Include from binutils cpu dir.
 219
 220 2005-07-05  Nick Clifton  <nickc@redhat.com>
 221
 222         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 223         unsigned in order to avoid compile time warnings about sign
 224         conflicts.
 225
 226         * ms1.opc (parse_*): Likewise.
 227         (parse_imm16): Use a "void *" as it is passed both signed and
 228         unsigned arguments.
 229
 230 2005-07-01  Nick Clifton  <nickc@redhat.com>
 231
 232         * frv.opc: Update to ISO C90 function declaration style.
 233         * iq2000.opc: Likewise.
 234         * m32r.opc: Likewise.
 235         * sh.opc: Likewise.
 236
 237 2005-06-15  Dave Brolley  <brolley@redhat.com>
 238
 239         Contributed by Red Hat.
 240         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 241         * ms1.opc: New file.  Written by Stan Cox.
 242
 243 2005-05-10  Nick Clifton  <nickc@redhat.com>
 244
 245         * Update the address and phone number of the FSF organization in
 246         the GPL notices in the following files:
 247         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 248         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 249         sh64-media.cpu, simplify.inc
 250
 251 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 252
 253         * frv.opc (parse_A): Warning fix.
 254
 255 2005-02-23  Nick Clifton  <nickc@redhat.com>
 256
 257         * frv.opc: Fixed compile time warnings about differing signed'ness
 258         of pointers passed to functions.
 259         * m32r.opc: Likewise.
 260
 261 2005-02-11  Nick Clifton  <nickc@redhat.com>
 262
 263         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 264         'bfd_vma *' in order avoid compile time warning message.
 265
 266 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 267
 268         * cris.cpu (mstep): Add missing insn.
 269
 270 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 271
 272         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 273         * frv.cpu: Add support for TLS annotations in loads and calll.
 274         * frv.opc (parse_symbolic_address): New.
 275         (parse_ldd_annotation): New.
 276         (parse_call_annotation): New.
 277         (parse_ld_annotation): New.
 278         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 279         Introduce TLS relocations.
 280         (parse_d12, parse_s12, parse_u12): Likewise.
 281         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 282         (parse_call_label, print_at): New.
 283
 284 2004-12-21  Mikael Starvik  <starvik@axis.com>
 285
 286         * cris.cpu (cris-set-mem): Correct integral write semantics.
 287
 288 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 289
 290         * cris.cpu: New file.
 291
 292 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 293
 294         * iq2000.cpu: Added quotes around macro arguments so that they
 295         will work with newer versions of guile.
 296
 297 2004-10-27  Nick Clifton  <nickc@redhat.com>
 298
 299         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 300         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 301         operand.
 302         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 303         with guile.
 304
 305 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 306
 307         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 308
 309 2004-05-15  Nick Clifton  <nickc@redhat.com>
 310
 311         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 312
 313 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 314
 315         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 316
 317 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 318
 319         * frv.cpu (define-arch frv): Add fr450 mach.
 320         (define-mach fr450): New.
 321         (define-model fr450): New.  Add profile units to every fr450 insn.
 322         (define-attr UNIT): Add MDCUTSSI.
 323         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 324         (define-attr AUDIO): New boolean.
 325         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 326         (f-LRA-null, f-TLBPR-null): New fields.
 327         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 328         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 329         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 330         (LRA-null, TLBPR-null): New macros.
 331         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 332         (load-real-address): New macro.
 333         (lrai, lrad, tlbpr): New instructions.
 334         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 335         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 336         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 337         (media-low-clear-semantics, media-scope-limit-semantics)
 338         (media-quad-limit, media-quad-shift): New macros.
 339         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 340         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 341         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 342         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 343         (fr450_unit_mapping): New array.
 344         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 345         for new MDCUTSSI unit.
 346         (fr450_check_insn_major_constraints): New function.
 347         (check_insn_major_constraints): Use it.
 348
 349 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 350
 351         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 352         (scutss): Change unit to I0.
 353         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 354         (mqsaths): Fix FR400-MAJOR categorization.
 355         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 356         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 357         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 358         combinations.
 359
 360 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 361
 362         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 363         (rstb, rsth, rst, rstd, rstq): Delete.
 364         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 365
 366 2004-02-23  Nick Clifton  <nickc@redhat.com>
 367
 368         * Apply these patches from Renesas:
 369
 370         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 371
 372         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 373         disassembling codes for 0x*2 addresses.
 374
 375         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 376
 377         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 378
 379         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 380
 381         * cpu/m32r.cpu : Add new model m32r2.
 382         Add new instructions.
 383         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 384         Changed PIPE attr of push from O to OS.
 385         Care for Little-endian of M32R.
 386         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 387         Care for Little-endian of M32R.
 388         (parse_slo16): signed extension for value.
 389
 390 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 391
 392         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 393         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 394
 395         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 396         written by Ben Elliston.
 397
 398 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 399
 400         * frv.cpu (UNIT): Add IACC.
 401         (iacc-multiply-r-r): Use it.
 402         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 403         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 404
 405 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 406
 407         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 408         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 409         cut&paste errors in shifting/truncating numerical operands.
 410         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 411         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 412         (parse_uslo16): Likewise.
 413         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 414         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 415         (parse_s12): Likewise.
 416         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 417         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 418         (parse_uslo16): Likewise.
 419         (parse_uhi16): Parse gothi and gotfuncdeschi.
 420         (parse_d12): Parse got12 and gotfuncdesc12.
 421         (parse_s12): Likewise.
 422
 423 2003-10-10  Dave Brolley  <brolley@redhat.com>
 424
 425         * frv.cpu (dnpmop): New p-macro.
 426         (GRdoublek): Use dnpmop.
 427         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 428         (store-double-r-r): Use (.sym regtype doublek).
 429         (r-store-double): Ditto.
 430         (store-double-r-r-u): Ditto.
 431         (conditional-store-double): Ditto.
 432         (conditional-store-double-u): Ditto.
 433         (store-double-r-simm): Ditto.
 434         (fmovs): Assign to UNIT FMALL.
 435
 436 2003-10-06  Dave Brolley  <brolley@redhat.com>
 437
 438         * frv.cpu, frv.opc: Add support for fr550.
 439
 440 2003-09-24  Dave Brolley  <brolley@redhat.com>
 441
 442         * frv.cpu (u-commit): New modelling unit for fr500.
 443         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 444         (commit-r): Use u-commit model for fr500.
 445         (commit): Ditto.
 446         (conditional-float-binary-op): Take profiling data as an argument.
 447         Update callers.
 448         (ne-float-binary-op): Ditto.
 449
 450 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 451
 452         * frv.cpu (nldqi): Delete unimplemented instruction.
 453
 454 2003-09-12  Dave Brolley  <brolley@redhat.com>
 455
 456         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 457         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 458         frv_ref_SI to get input register referenced for profiling.
 459         (clear-ne-flag-all): Pass insn profiling in as an argument.
 460         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 461
 462 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 463
 464         * frv.cpu: Typographical corrections.
 465
 466 2003-09-09  Dave Brolley  <brolley@redhat.com>
 467
 468         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 469         (conditional-media-dual-complex, media-quad-complex): Likewise.
 470
 471 2003-09-04  Dave Brolley  <brolley@redhat.com>
 472
 473         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 474         Update all callers.
 475         (conditional-register-transfer): Ditto.
 476         (cache-preload): Ditto.
 477         (floating-point-conversion): Ditto.
 478         (floating-point-neg): Ditto.
 479         (float-abs): Ditto.
 480         (float-binary-op-s): Ditto.
 481         (conditional-float-binary-op): Ditto.
 482         (ne-float-binary-op): Ditto.
 483         (float-dual-arith): Ditto.
 484         (ne-float-dual-arith): Ditto.
 485
 486 2003-09-03  Dave Brolley  <brolley@redhat.com>
 487
 488         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 489         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 490         MCLRACC-1.
 491         (A): Removed operand.
 492         (A0,A1): New operands replace operand A.
 493         (mnop): Now a real insn
 494         (mclracc): Removed insn.
 495         (mclracc-0, mclracc-1): New insns replace mclracc.
 496         (all insns): Use new UNIT attributes.
 497
 498 2003-08-21  Nick Clifton  <nickc@redhat.com>
 499
 500         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 501         and u-media-dual-btoh with output parameter.
 502         (cmbtoh): Add profiling hack.
 503
 504 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 505
 506         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 507
 508 2003-06-10  Doug Evans  <dje@sebabeach.org>
 509
 510         * frv.cpu: Add IDOC attribute.
 511
 512 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 513
 514         Contributed by Red Hat.
 515         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 516         Stan Cox, and Frank Ch. Eigler.
 517         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 518         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 519         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 520         * iq10.cpu: New file.  Written by Jeff Johnston.
 521
 522 2003-06-05  Nick Clifton  <nickc@redhat.com>
 523
 524         * frv.cpu (FRintieven): New operand.  An even-numbered only
 525         version of the FRinti operand.
 526         (FRintjeven): Likewise for FRintj.
 527         (FRintkeven): Likewise for FRintk.
 528         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 529         media-quad-arith-sat-semantics, media-quad-arith-sat,
 530         conditional-media-quad-arith-sat, mdunpackh,
 531         media-quad-multiply-semantics, media-quad-multiply,
 532         conditional-media-quad-multiply, media-quad-complex-i,
 533         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 534         conditional-media-quad-multiply-acc, munpackh,
 535         media-quad-multiply-cross-acc-semantics, mdpackh,
 536         media-quad-multiply-cross-acc, mbtoh-semantics,
 537         media-quad-cross-multiply-cross-acc-semantics,
 538         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 539         media-quad-cross-multiply-acc-semantics, cmbtoh,
 540         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 541         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 542         cmhtob): Use new operands.
 543         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
 544         (parse_even_register): New function.
 545
 546 2003-06-03  Nick Clifton  <nickc@redhat.com>
 547
 548         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
 549         immediate value not unsigned.
 550
 551 2003-06-03  Andrew Cagney  <cagney@redhat.com>
 552
 553         Contributed by Red Hat.
 554         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
 555         and Eric Christopher.
 556         * frv.opc: New file.  Written by Catherine Moore, and Dave
 557         Brolley.
 558         * simplify.inc: New file.  Written by Doug Evans.
 559
 560 2003-05-02  Andrew Cagney  <cagney@redhat.com>
 561
 562         * New file.
 563
 564 \f
 565 Local Variables:
 566 mode: change-log
 567 left-margin: 8
 568 fill-column: 74
 569 version-control: never
 570 End: