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1 /* Target-dependent code for the Texas Instruments MSP430 for GDB, the
2 GNU debugger.
3
4 Copyright (C) 2012-2019 Free Software Foundation, Inc.
5
6 Contributed by Red Hat, Inc.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22
23 #include "defs.h"
24 #include "arch-utils.h"
25 #include "prologue-value.h"
26 #include "target.h"
27 #include "regcache.h"
28 #include "dis-asm.h"
29 #include "gdbtypes.h"
30 #include "frame.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
33 #include "value.h"
34 #include "gdbcore.h"
35 #include "dwarf2-frame.h"
36 #include "reggroups.h"
37
38 #include "elf/msp430.h"
39 #include "opcode/msp430-decode.h"
40 #include "elf-bfd.h"
41
42 /* Register Numbers. */
43
44 enum
45 {
46 MSP430_PC_RAW_REGNUM,
47 MSP430_SP_RAW_REGNUM,
48 MSP430_SR_RAW_REGNUM,
49 MSP430_CG_RAW_REGNUM,
50 MSP430_R4_RAW_REGNUM,
51 MSP430_R5_RAW_REGNUM,
52 MSP430_R6_RAW_REGNUM,
53 MSP430_R7_RAW_REGNUM,
54 MSP430_R8_RAW_REGNUM,
55 MSP430_R9_RAW_REGNUM,
56 MSP430_R10_RAW_REGNUM,
57 MSP430_R11_RAW_REGNUM,
58 MSP430_R12_RAW_REGNUM,
59 MSP430_R13_RAW_REGNUM,
60 MSP430_R14_RAW_REGNUM,
61 MSP430_R15_RAW_REGNUM,
62
63 MSP430_NUM_REGS,
64
65 MSP430_PC_REGNUM = MSP430_NUM_REGS,
66 MSP430_SP_REGNUM,
67 MSP430_SR_REGNUM,
68 MSP430_CG_REGNUM,
69 MSP430_R4_REGNUM,
70 MSP430_R5_REGNUM,
71 MSP430_R6_REGNUM,
72 MSP430_R7_REGNUM,
73 MSP430_R8_REGNUM,
74 MSP430_R9_REGNUM,
75 MSP430_R10_REGNUM,
76 MSP430_R11_REGNUM,
77 MSP430_R12_REGNUM,
78 MSP430_R13_REGNUM,
79 MSP430_R14_REGNUM,
80 MSP430_R15_REGNUM,
81
82 MSP430_NUM_TOTAL_REGS,
83 MSP430_NUM_PSEUDO_REGS = MSP430_NUM_TOTAL_REGS - MSP430_NUM_REGS
84 };
85
86 enum
87 {
88 /* TI MSP430 Architecture. */
89 MSP_ISA_MSP430,
90
91 /* TI MSP430X Architecture. */
92 MSP_ISA_MSP430X
93 };
94
95 enum
96 {
97 /* The small code model limits code addresses to 16 bits. */
98 MSP_SMALL_CODE_MODEL,
99
100 /* The large code model uses 20 bit addresses for function
101 pointers. These are stored in memory using four bytes (32 bits). */
102 MSP_LARGE_CODE_MODEL
103 };
104
105 /* Architecture specific data. */
106
107 struct gdbarch_tdep
108 {
109 /* The ELF header flags specify the multilib used. */
110 int elf_flags;
111
112 /* One of MSP_ISA_MSP430 or MSP_ISA_MSP430X. */
113 int isa;
114
115 /* One of MSP_SMALL_CODE_MODEL or MSP_LARGE_CODE_MODEL. If, at
116 some point, we support different data models too, we'll probably
117 structure things so that we can combine values using logical
118 "or". */
119 int code_model;
120 };
121
122 /* This structure holds the results of a prologue analysis. */
123
124 struct msp430_prologue
125 {
126 /* The offset from the frame base to the stack pointer --- always
127 zero or negative.
128
129 Calling this a "size" is a bit misleading, but given that the
130 stack grows downwards, using offsets for everything keeps one
131 from going completely sign-crazy: you never change anything's
132 sign for an ADD instruction; always change the second operand's
133 sign for a SUB instruction; and everything takes care of
134 itself. */
135 int frame_size;
136
137 /* Non-zero if this function has initialized the frame pointer from
138 the stack pointer, zero otherwise. */
139 int has_frame_ptr;
140
141 /* If has_frame_ptr is non-zero, this is the offset from the frame
142 base to where the frame pointer points. This is always zero or
143 negative. */
144 int frame_ptr_offset;
145
146 /* The address of the first instruction at which the frame has been
147 set up and the arguments are where the debug info says they are
148 --- as best as we can tell. */
149 CORE_ADDR prologue_end;
150
151 /* reg_offset[R] is the offset from the CFA at which register R is
152 saved, or 1 if register R has not been saved. (Real values are
153 always zero or negative.) */
154 int reg_offset[MSP430_NUM_TOTAL_REGS];
155 };
156
157 /* Implement the "register_type" gdbarch method. */
158
159 static struct type *
160 msp430_register_type (struct gdbarch *gdbarch, int reg_nr)
161 {
162 if (reg_nr < MSP430_NUM_REGS)
163 return builtin_type (gdbarch)->builtin_uint32;
164 else if (reg_nr == MSP430_PC_REGNUM)
165 return builtin_type (gdbarch)->builtin_func_ptr;
166 else
167 return builtin_type (gdbarch)->builtin_uint16;
168 }
169
170 /* Implement another version of the "register_type" gdbarch method
171 for msp430x. */
172
173 static struct type *
174 msp430x_register_type (struct gdbarch *gdbarch, int reg_nr)
175 {
176 if (reg_nr < MSP430_NUM_REGS)
177 return builtin_type (gdbarch)->builtin_uint32;
178 else if (reg_nr == MSP430_PC_REGNUM)
179 return builtin_type (gdbarch)->builtin_func_ptr;
180 else
181 return builtin_type (gdbarch)->builtin_uint32;
182 }
183
184 /* Implement the "register_name" gdbarch method. */
185
186 static const char *
187 msp430_register_name (struct gdbarch *gdbarch, int regnr)
188 {
189 static const char *const reg_names[] = {
190 /* Raw registers. */
191 "", "", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
193 /* Pseudo registers. */
194 "pc", "sp", "sr", "cg", "r4", "r5", "r6", "r7",
195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
196 };
197
198 return reg_names[regnr];
199 }
200
201 /* Implement the "register_reggroup_p" gdbarch method. */
202
203 static int
204 msp430_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
205 struct reggroup *group)
206 {
207 if (group == all_reggroup)
208 return 1;
209
210 /* All other registers are saved and restored. */
211 if (group == save_reggroup || group == restore_reggroup)
212 return (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS);
213
214 return group == general_reggroup;
215 }
216
217 /* Implement the "pseudo_register_read" gdbarch method. */
218
219 static enum register_status
220 msp430_pseudo_register_read (struct gdbarch *gdbarch,
221 readable_regcache *regcache,
222 int regnum, gdb_byte *buffer)
223 {
224 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
225 {
226 enum register_status status;
227 ULONGEST val;
228 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
229 int regsize = register_size (gdbarch, regnum);
230 int raw_regnum = regnum - MSP430_NUM_REGS;
231
232 status = regcache->raw_read (raw_regnum, &val);
233 if (status == REG_VALID)
234 store_unsigned_integer (buffer, regsize, byte_order, val);
235
236 return status;
237 }
238 else
239 gdb_assert_not_reached ("invalid pseudo register number");
240 }
241
242 /* Implement the "pseudo_register_write" gdbarch method. */
243
244 static void
245 msp430_pseudo_register_write (struct gdbarch *gdbarch,
246 struct regcache *regcache,
247 int regnum, const gdb_byte *buffer)
248 {
249 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
250
251 {
252 ULONGEST val;
253 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
254 int regsize = register_size (gdbarch, regnum);
255 int raw_regnum = regnum - MSP430_NUM_REGS;
256
257 val = extract_unsigned_integer (buffer, regsize, byte_order);
258 regcache_raw_write_unsigned (regcache, raw_regnum, val);
259
260 }
261 else
262 gdb_assert_not_reached ("invalid pseudo register number");
263 }
264
265 /* Implement the `register_sim_regno' gdbarch method. */
266
267 static int
268 msp430_register_sim_regno (struct gdbarch *gdbarch, int regnum)
269 {
270 gdb_assert (regnum < MSP430_NUM_REGS);
271
272 /* So long as regnum is in [0, RL78_NUM_REGS), it's valid. We
273 just want to override the default here which disallows register
274 numbers which have no names. */
275 return regnum;
276 }
277
278 constexpr gdb_byte msp430_break_insn[] = { 0x43, 0x43 };
279
280 typedef BP_MANIPULATION (msp430_break_insn) msp430_breakpoint;
281
282 /* Define a "handle" struct for fetching the next opcode. */
283
284 struct msp430_get_opcode_byte_handle
285 {
286 CORE_ADDR pc;
287 };
288
289 /* Fetch a byte on behalf of the opcode decoder. HANDLE contains
290 the memory address of the next byte to fetch. If successful,
291 the address in the handle is updated and the byte fetched is
292 returned as the value of the function. If not successful, -1
293 is returned. */
294
295 static int
296 msp430_get_opcode_byte (void *handle)
297 {
298 struct msp430_get_opcode_byte_handle *opcdata
299 = (struct msp430_get_opcode_byte_handle *) handle;
300 int status;
301 gdb_byte byte;
302
303 status = target_read_memory (opcdata->pc, &byte, 1);
304 if (status == 0)
305 {
306 opcdata->pc += 1;
307 return byte;
308 }
309 else
310 return -1;
311 }
312
313 /* Function for finding saved registers in a 'struct pv_area'; this
314 function is passed to pv_area::scan.
315
316 If VALUE is a saved register, ADDR says it was saved at a constant
317 offset from the frame base, and SIZE indicates that the whole
318 register was saved, record its offset. */
319
320 static void
321 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
322 {
323 struct msp430_prologue *result = (struct msp430_prologue *) result_untyped;
324
325 if (value.kind == pvk_register
326 && value.k == 0
327 && pv_is_register (addr, MSP430_SP_REGNUM)
328 && size == register_size (target_gdbarch (), value.reg))
329 result->reg_offset[value.reg] = addr.k;
330 }
331
332 /* Analyze a prologue starting at START_PC, going no further than
333 LIMIT_PC. Fill in RESULT as appropriate. */
334
335 static void
336 msp430_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
337 CORE_ADDR limit_pc, struct msp430_prologue *result)
338 {
339 CORE_ADDR pc, next_pc;
340 int rn;
341 pv_t reg[MSP430_NUM_TOTAL_REGS];
342 CORE_ADDR after_last_frame_setup_insn = start_pc;
343 int code_model = gdbarch_tdep (gdbarch)->code_model;
344 int sz;
345
346 memset (result, 0, sizeof (*result));
347
348 for (rn = 0; rn < MSP430_NUM_TOTAL_REGS; rn++)
349 {
350 reg[rn] = pv_register (rn, 0);
351 result->reg_offset[rn] = 1;
352 }
353
354 pv_area stack (MSP430_SP_REGNUM, gdbarch_addr_bit (gdbarch));
355
356 /* The call instruction has saved the return address on the stack. */
357 sz = code_model == MSP_LARGE_CODE_MODEL ? 4 : 2;
358 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -sz);
359 stack.store (reg[MSP430_SP_REGNUM], sz, reg[MSP430_PC_REGNUM]);
360
361 pc = start_pc;
362 while (pc < limit_pc)
363 {
364 int bytes_read;
365 struct msp430_get_opcode_byte_handle opcode_handle;
366 MSP430_Opcode_Decoded opc;
367
368 opcode_handle.pc = pc;
369 bytes_read = msp430_decode_opcode (pc, &opc, msp430_get_opcode_byte,
370 &opcode_handle);
371 next_pc = pc + bytes_read;
372
373 if (opc.id == MSO_push && opc.op[0].type == MSP430_Operand_Register)
374 {
375 int rsrc = opc.op[0].reg;
376
377 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -2);
378 stack.store (reg[MSP430_SP_REGNUM], 2, reg[rsrc]);
379 after_last_frame_setup_insn = next_pc;
380 }
381 else if (opc.id == MSO_push /* PUSHM */
382 && opc.op[0].type == MSP430_Operand_None
383 && opc.op[1].type == MSP430_Operand_Register)
384 {
385 int rsrc = opc.op[1].reg;
386 int count = opc.repeats + 1;
387 int size = opc.size == 16 ? 2 : 4;
388
389 while (count > 0)
390 {
391 reg[MSP430_SP_REGNUM]
392 = pv_add_constant (reg[MSP430_SP_REGNUM], -size);
393 stack.store (reg[MSP430_SP_REGNUM], size, reg[rsrc]);
394 rsrc--;
395 count--;
396 }
397 after_last_frame_setup_insn = next_pc;
398 }
399 else if (opc.id == MSO_sub
400 && opc.op[0].type == MSP430_Operand_Register
401 && opc.op[0].reg == MSR_SP
402 && opc.op[1].type == MSP430_Operand_Immediate)
403 {
404 int addend = opc.op[1].addend;
405
406 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM],
407 -addend);
408 after_last_frame_setup_insn = next_pc;
409 }
410 else if (opc.id == MSO_mov
411 && opc.op[0].type == MSP430_Operand_Immediate
412 && 12 <= opc.op[0].reg && opc.op[0].reg <= 15)
413 after_last_frame_setup_insn = next_pc;
414 else
415 {
416 /* Terminate the prologue scan. */
417 break;
418 }
419
420 pc = next_pc;
421 }
422
423 /* Is the frame size (offset, really) a known constant? */
424 if (pv_is_register (reg[MSP430_SP_REGNUM], MSP430_SP_REGNUM))
425 result->frame_size = reg[MSP430_SP_REGNUM].k;
426
427 /* Record where all the registers were saved. */
428 stack.scan (check_for_saved, result);
429
430 result->prologue_end = after_last_frame_setup_insn;
431 }
432
433 /* Implement the "skip_prologue" gdbarch method. */
434
435 static CORE_ADDR
436 msp430_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
437 {
438 const char *name;
439 CORE_ADDR func_addr, func_end;
440 struct msp430_prologue p;
441
442 /* Try to find the extent of the function that contains PC. */
443 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
444 return pc;
445
446 msp430_analyze_prologue (gdbarch, pc, func_end, &p);
447 return p.prologue_end;
448 }
449
450 /* Implement the "unwind_pc" gdbarch method. */
451
452 static CORE_ADDR
453 msp430_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
454 {
455 return frame_unwind_register_unsigned (next_frame, MSP430_PC_REGNUM);
456 }
457
458 /* Implement the "unwind_sp" gdbarch method. */
459
460 static CORE_ADDR
461 msp430_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
462 {
463 return frame_unwind_register_unsigned (next_frame, MSP430_SP_REGNUM);
464 }
465
466 /* Given a frame described by THIS_FRAME, decode the prologue of its
467 associated function if there is not cache entry as specified by
468 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
469 return that struct as the value of this function. */
470
471 static struct msp430_prologue *
472 msp430_analyze_frame_prologue (struct frame_info *this_frame,
473 void **this_prologue_cache)
474 {
475 if (!*this_prologue_cache)
476 {
477 CORE_ADDR func_start, stop_addr;
478
479 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct msp430_prologue);
480
481 func_start = get_frame_func (this_frame);
482 stop_addr = get_frame_pc (this_frame);
483
484 /* If we couldn't find any function containing the PC, then
485 just initialize the prologue cache, but don't do anything. */
486 if (!func_start)
487 stop_addr = func_start;
488
489 msp430_analyze_prologue (get_frame_arch (this_frame), func_start,
490 stop_addr,
491 (struct msp430_prologue *) *this_prologue_cache);
492 }
493
494 return (struct msp430_prologue *) *this_prologue_cache;
495 }
496
497 /* Given a frame and a prologue cache, return this frame's base. */
498
499 static CORE_ADDR
500 msp430_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
501 {
502 struct msp430_prologue *p
503 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
504 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MSP430_SP_REGNUM);
505
506 return sp - p->frame_size;
507 }
508
509 /* Implement the "frame_this_id" method for unwinding frames. */
510
511 static void
512 msp430_this_id (struct frame_info *this_frame,
513 void **this_prologue_cache, struct frame_id *this_id)
514 {
515 *this_id = frame_id_build (msp430_frame_base (this_frame,
516 this_prologue_cache),
517 get_frame_func (this_frame));
518 }
519
520 /* Implement the "frame_prev_register" method for unwinding frames. */
521
522 static struct value *
523 msp430_prev_register (struct frame_info *this_frame,
524 void **this_prologue_cache, int regnum)
525 {
526 struct msp430_prologue *p
527 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
528 CORE_ADDR frame_base = msp430_frame_base (this_frame, this_prologue_cache);
529
530 if (regnum == MSP430_SP_REGNUM)
531 return frame_unwind_got_constant (this_frame, regnum, frame_base);
532
533 /* If prologue analysis says we saved this register somewhere,
534 return a description of the stack slot holding it. */
535 else if (p->reg_offset[regnum] != 1)
536 {
537 struct value *rv = frame_unwind_got_memory (this_frame, regnum,
538 frame_base +
539 p->reg_offset[regnum]);
540
541 if (regnum == MSP430_PC_REGNUM)
542 {
543 ULONGEST pc = value_as_long (rv);
544
545 return frame_unwind_got_constant (this_frame, regnum, pc);
546 }
547 return rv;
548 }
549
550 /* Otherwise, presume we haven't changed the value of this
551 register, and get it from the next frame. */
552 else
553 return frame_unwind_got_register (this_frame, regnum, regnum);
554 }
555
556 static const struct frame_unwind msp430_unwind = {
557 NORMAL_FRAME,
558 default_frame_unwind_stop_reason,
559 msp430_this_id,
560 msp430_prev_register,
561 NULL,
562 default_frame_sniffer
563 };
564
565 /* Implement the "dwarf2_reg_to_regnum" gdbarch method. */
566
567 static int
568 msp430_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
569 {
570 if (reg >= 0 && reg < MSP430_NUM_REGS)
571 return reg + MSP430_NUM_REGS;
572 return -1;
573 }
574
575 /* Implement the "return_value" gdbarch method. */
576
577 static enum return_value_convention
578 msp430_return_value (struct gdbarch *gdbarch,
579 struct value *function,
580 struct type *valtype,
581 struct regcache *regcache,
582 gdb_byte *readbuf, const gdb_byte *writebuf)
583 {
584 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
585 LONGEST valtype_len = TYPE_LENGTH (valtype);
586 int code_model = gdbarch_tdep (gdbarch)->code_model;
587
588 if (TYPE_LENGTH (valtype) > 8
589 || TYPE_CODE (valtype) == TYPE_CODE_STRUCT
590 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
591 return RETURN_VALUE_STRUCT_CONVENTION;
592
593 if (readbuf)
594 {
595 ULONGEST u;
596 int argreg = MSP430_R12_REGNUM;
597 int offset = 0;
598
599 while (valtype_len > 0)
600 {
601 int size = 2;
602
603 if (code_model == MSP_LARGE_CODE_MODEL
604 && TYPE_CODE (valtype) == TYPE_CODE_PTR)
605 {
606 size = 4;
607 }
608
609 regcache_cooked_read_unsigned (regcache, argreg, &u);
610 store_unsigned_integer (readbuf + offset, size, byte_order, u);
611 valtype_len -= size;
612 offset += size;
613 argreg++;
614 }
615 }
616
617 if (writebuf)
618 {
619 ULONGEST u;
620 int argreg = MSP430_R12_REGNUM;
621 int offset = 0;
622
623 while (valtype_len > 0)
624 {
625 int size = 2;
626
627 if (code_model == MSP_LARGE_CODE_MODEL
628 && TYPE_CODE (valtype) == TYPE_CODE_PTR)
629 {
630 size = 4;
631 }
632
633 u = extract_unsigned_integer (writebuf + offset, size, byte_order);
634 regcache_cooked_write_unsigned (regcache, argreg, u);
635 valtype_len -= size;
636 offset += size;
637 argreg++;
638 }
639 }
640
641 return RETURN_VALUE_REGISTER_CONVENTION;
642 }
643
644
645 /* Implement the "frame_align" gdbarch method. */
646
647 static CORE_ADDR
648 msp430_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
649 {
650 return align_down (sp, 2);
651 }
652
653
654 /* Implement the "dummy_id" gdbarch method. */
655
656 static struct frame_id
657 msp430_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
658 {
659 return
660 frame_id_build (get_frame_register_unsigned
661 (this_frame, MSP430_SP_REGNUM),
662 get_frame_pc (this_frame));
663 }
664
665
666 /* Implement the "push_dummy_call" gdbarch method. */
667
668 static CORE_ADDR
669 msp430_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
670 struct regcache *regcache, CORE_ADDR bp_addr,
671 int nargs, struct value **args, CORE_ADDR sp,
672 function_call_return_method return_method,
673 CORE_ADDR struct_addr)
674 {
675 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
676 int write_pass;
677 int sp_off = 0;
678 CORE_ADDR cfa;
679 int code_model = gdbarch_tdep (gdbarch)->code_model;
680
681 struct type *func_type = value_type (function);
682
683 /* Dereference function pointer types. */
684 while (TYPE_CODE (func_type) == TYPE_CODE_PTR)
685 func_type = TYPE_TARGET_TYPE (func_type);
686
687 /* The end result had better be a function or a method. */
688 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC
689 || TYPE_CODE (func_type) == TYPE_CODE_METHOD);
690
691 /* We make two passes; the first does the stack allocation,
692 the second actually stores the arguments. */
693 for (write_pass = 0; write_pass <= 1; write_pass++)
694 {
695 int i;
696 int arg_reg = MSP430_R12_REGNUM;
697 int args_on_stack = 0;
698
699 if (write_pass)
700 sp = align_down (sp - sp_off, 4);
701 sp_off = 0;
702
703 if (return_method == return_method_struct)
704 {
705 if (write_pass)
706 regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr);
707 arg_reg++;
708 }
709
710 /* Push the arguments. */
711 for (i = 0; i < nargs; i++)
712 {
713 struct value *arg = args[i];
714 const gdb_byte *arg_bits = value_contents_all (arg);
715 struct type *arg_type = check_typedef (value_type (arg));
716 ULONGEST arg_size = TYPE_LENGTH (arg_type);
717 int offset;
718 int current_arg_on_stack;
719 gdb_byte struct_addr_buf[4];
720
721 current_arg_on_stack = 0;
722
723 if (TYPE_CODE (arg_type) == TYPE_CODE_STRUCT
724 || TYPE_CODE (arg_type) == TYPE_CODE_UNION)
725 {
726 /* Aggregates of any size are passed by reference. */
727 store_unsigned_integer (struct_addr_buf, 4, byte_order,
728 value_address (arg));
729 arg_bits = struct_addr_buf;
730 arg_size = (code_model == MSP_LARGE_CODE_MODEL) ? 4 : 2;
731 }
732 else
733 {
734 /* Scalars bigger than 8 bytes such as complex doubles are passed
735 on the stack. */
736 if (arg_size > 8)
737 current_arg_on_stack = 1;
738 }
739
740
741 for (offset = 0; offset < arg_size; offset += 2)
742 {
743 /* The condition below prevents 8 byte scalars from being split
744 between registers and memory (stack). It also prevents other
745 splits once the stack has been written to. */
746 if (!current_arg_on_stack
747 && (arg_reg
748 + ((arg_size == 8 || args_on_stack)
749 ? ((arg_size - offset) / 2 - 1)
750 : 0) <= MSP430_R15_REGNUM))
751 {
752 int size = 2;
753
754 if (code_model == MSP_LARGE_CODE_MODEL
755 && (TYPE_CODE (arg_type) == TYPE_CODE_PTR
756 || TYPE_IS_REFERENCE (arg_type)
757 || TYPE_CODE (arg_type) == TYPE_CODE_STRUCT
758 || TYPE_CODE (arg_type) == TYPE_CODE_UNION))
759 {
760 /* When using the large memory model, pointer,
761 reference, struct, and union arguments are
762 passed using the entire register. (As noted
763 earlier, aggregates are always passed by
764 reference.) */
765 if (offset != 0)
766 continue;
767 size = 4;
768 }
769
770 if (write_pass)
771 regcache_cooked_write_unsigned (regcache, arg_reg,
772 extract_unsigned_integer
773 (arg_bits + offset, size,
774 byte_order));
775
776 arg_reg++;
777 }
778 else
779 {
780 if (write_pass)
781 write_memory (sp + sp_off, arg_bits + offset, 2);
782
783 sp_off += 2;
784 args_on_stack = 1;
785 current_arg_on_stack = 1;
786 }
787 }
788 }
789 }
790
791 /* Keep track of the stack address prior to pushing the return address.
792 This is the value that we'll return. */
793 cfa = sp;
794
795 /* Push the return address. */
796 {
797 int sz = (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL)
798 ? 2 : 4;
799 sp = sp - sz;
800 write_memory_unsigned_integer (sp, sz, byte_order, bp_addr);
801 }
802
803 /* Update the stack pointer. */
804 regcache_cooked_write_unsigned (regcache, MSP430_SP_REGNUM, sp);
805
806 return cfa;
807 }
808
809 /* In order to keep code size small, the compiler may create epilogue
810 code through which more than one function epilogue is routed. I.e.
811 the epilogue and return may just be a branch to some common piece of
812 code which is responsible for tearing down the frame and performing
813 the return. These epilog (label) names will have the common prefix
814 defined here. */
815
816 static const char msp430_epilog_name_prefix[] = "__mspabi_func_epilog_";
817
818 /* Implement the "in_return_stub" gdbarch method. */
819
820 static int
821 msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc,
822 const char *name)
823 {
824 return (name != NULL
825 && startswith (name, msp430_epilog_name_prefix));
826 }
827
828 /* Implement the "skip_trampoline_code" gdbarch method. */
829 static CORE_ADDR
830 msp430_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
831 {
832 struct bound_minimal_symbol bms;
833 const char *stub_name;
834 struct gdbarch *gdbarch = get_frame_arch (frame);
835
836 bms = lookup_minimal_symbol_by_pc (pc);
837 if (!bms.minsym)
838 return pc;
839
840 stub_name = MSYMBOL_LINKAGE_NAME (bms.minsym);
841
842 if (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL
843 && msp430_in_return_stub (gdbarch, pc, stub_name))
844 {
845 CORE_ADDR sp = get_frame_register_unsigned (frame, MSP430_SP_REGNUM);
846
847 return read_memory_integer
848 (sp + 2 * (stub_name[strlen (msp430_epilog_name_prefix)] - '0'),
849 2, gdbarch_byte_order (gdbarch));
850 }
851
852 return pc;
853 }
854
855 /* Allocate and initialize a gdbarch object. */
856
857 static struct gdbarch *
858 msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
859 {
860 struct gdbarch *gdbarch;
861 struct gdbarch_tdep *tdep;
862 int elf_flags, isa, code_model;
863
864 /* Extract the elf_flags if available. */
865 if (info.abfd != NULL
866 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
867 elf_flags = elf_elfheader (info.abfd)->e_flags;
868 else
869 elf_flags = 0;
870
871 if (info.abfd != NULL)
872 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
873 OFBA_MSPABI_Tag_ISA))
874 {
875 case 1:
876 isa = MSP_ISA_MSP430;
877 code_model = MSP_SMALL_CODE_MODEL;
878 break;
879 case 2:
880 isa = MSP_ISA_MSP430X;
881 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
882 OFBA_MSPABI_Tag_Code_Model))
883 {
884 case 1:
885 code_model = MSP_SMALL_CODE_MODEL;
886 break;
887 case 2:
888 code_model = MSP_LARGE_CODE_MODEL;
889 break;
890 default:
891 internal_error (__FILE__, __LINE__,
892 _("Unknown msp430x code memory model"));
893 break;
894 }
895 break;
896 case 0:
897 /* This can happen when loading a previously dumped data structure.
898 Use the ISA and code model from the current architecture, provided
899 it's compatible. */
900 {
901 struct gdbarch *ca = get_current_arch ();
902 if (ca && gdbarch_bfd_arch_info (ca)->arch == bfd_arch_msp430)
903 {
904 struct gdbarch_tdep *ca_tdep = gdbarch_tdep (ca);
905
906 elf_flags = ca_tdep->elf_flags;
907 isa = ca_tdep->isa;
908 code_model = ca_tdep->code_model;
909 break;
910 }
911 }
912 /* Fall through. */
913 default:
914 error (_("Unknown msp430 isa"));
915 break;
916 }
917 else
918 {
919 isa = MSP_ISA_MSP430;
920 code_model = MSP_SMALL_CODE_MODEL;
921 }
922
923
924 /* Try to find the architecture in the list of already defined
925 architectures. */
926 for (arches = gdbarch_list_lookup_by_info (arches, &info);
927 arches != NULL;
928 arches = gdbarch_list_lookup_by_info (arches->next, &info))
929 {
930 struct gdbarch_tdep *candidate_tdep = gdbarch_tdep (arches->gdbarch);
931
932 if (candidate_tdep->elf_flags != elf_flags
933 || candidate_tdep->isa != isa
934 || candidate_tdep->code_model != code_model)
935 continue;
936
937 return arches->gdbarch;
938 }
939
940 /* None found, create a new architecture from the information
941 provided. */
942 tdep = XCNEW (struct gdbarch_tdep);
943 gdbarch = gdbarch_alloc (&info, tdep);
944 tdep->elf_flags = elf_flags;
945 tdep->isa = isa;
946 tdep->code_model = code_model;
947
948 /* Registers. */
949 set_gdbarch_num_regs (gdbarch, MSP430_NUM_REGS);
950 set_gdbarch_num_pseudo_regs (gdbarch, MSP430_NUM_PSEUDO_REGS);
951 set_gdbarch_register_name (gdbarch, msp430_register_name);
952 if (isa == MSP_ISA_MSP430)
953 set_gdbarch_register_type (gdbarch, msp430_register_type);
954 else
955 set_gdbarch_register_type (gdbarch, msp430x_register_type);
956 set_gdbarch_pc_regnum (gdbarch, MSP430_PC_REGNUM);
957 set_gdbarch_sp_regnum (gdbarch, MSP430_SP_REGNUM);
958 set_gdbarch_register_reggroup_p (gdbarch, msp430_register_reggroup_p);
959 set_gdbarch_pseudo_register_read (gdbarch, msp430_pseudo_register_read);
960 set_gdbarch_pseudo_register_write (gdbarch, msp430_pseudo_register_write);
961 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, msp430_dwarf2_reg_to_regnum);
962 set_gdbarch_register_sim_regno (gdbarch, msp430_register_sim_regno);
963
964 /* Data types. */
965 set_gdbarch_char_signed (gdbarch, 0);
966 set_gdbarch_short_bit (gdbarch, 16);
967 set_gdbarch_int_bit (gdbarch, 16);
968 set_gdbarch_long_bit (gdbarch, 32);
969 set_gdbarch_long_long_bit (gdbarch, 64);
970 if (code_model == MSP_SMALL_CODE_MODEL)
971 {
972 set_gdbarch_ptr_bit (gdbarch, 16);
973 set_gdbarch_addr_bit (gdbarch, 16);
974 }
975 else /* MSP_LARGE_CODE_MODEL */
976 {
977 set_gdbarch_ptr_bit (gdbarch, 32);
978 set_gdbarch_addr_bit (gdbarch, 32);
979 }
980 set_gdbarch_dwarf2_addr_size (gdbarch, 4);
981 set_gdbarch_float_bit (gdbarch, 32);
982 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
983 set_gdbarch_double_bit (gdbarch, 64);
984 set_gdbarch_long_double_bit (gdbarch, 64);
985 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
986 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
987
988 /* Breakpoints. */
989 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
990 msp430_breakpoint::kind_from_pc);
991 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
992 msp430_breakpoint::bp_from_kind);
993 set_gdbarch_decr_pc_after_break (gdbarch, 1);
994
995 /* Frames, prologues, etc. */
996 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
997 set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue);
998 set_gdbarch_unwind_pc (gdbarch, msp430_unwind_pc);
999 set_gdbarch_unwind_sp (gdbarch, msp430_unwind_sp);
1000 set_gdbarch_frame_align (gdbarch, msp430_frame_align);
1001 dwarf2_append_unwinders (gdbarch);
1002 frame_unwind_append_unwinder (gdbarch, &msp430_unwind);
1003
1004 /* Dummy frames, return values. */
1005 set_gdbarch_dummy_id (gdbarch, msp430_dummy_id);
1006 set_gdbarch_push_dummy_call (gdbarch, msp430_push_dummy_call);
1007 set_gdbarch_return_value (gdbarch, msp430_return_value);
1008
1009 /* Trampolines. */
1010 set_gdbarch_in_solib_return_trampoline (gdbarch, msp430_in_return_stub);
1011 set_gdbarch_skip_trampoline_code (gdbarch, msp430_skip_trampoline_code);
1012
1013 /* Virtual tables. */
1014 set_gdbarch_vbit_in_delta (gdbarch, 0);
1015
1016 return gdbarch;
1017 }
1018
1019 /* Register the initialization routine. */
1020
1021 void
1022 _initialize_msp430_tdep (void)
1023 {
1024 register_gdbarch_init (bfd_arch_msp430, msp430_gdbarch_init);
1025 }