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1 /* GNU/Linux/IA64 specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2024 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "linux-low.h"
20
21 #ifdef HAVE_SYS_REG_H
22 #include <sys/reg.h>
23 #endif
24
25 /* Linux target op definitions for the IA64 architecture. */
26
27 class ia64_target : public linux_process_target
28 {
29 public:
30
31 const regs_info *get_regs_info () override;
32
33 const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
34
35 protected:
36
37 void low_arch_setup () override;
38
39 bool low_cannot_fetch_register (int regno) override;
40
41 bool low_cannot_store_register (int regno) override;
42
43 bool low_fetch_register (regcache *regcache, int regno) override;
44
45 bool low_breakpoint_at (CORE_ADDR pc) override;
46 };
47
48 /* The singleton target ops object. */
49
50 static ia64_target the_ia64_target;
51
52 const gdb_byte *
53 ia64_target::sw_breakpoint_from_kind (int kind, int *size)
54 {
55 gdb_assert_not_reached ("target op sw_breakpoint_from_kind is not "
56 "implemented by this target");
57 }
58
59 bool
60 ia64_target::low_breakpoint_at (CORE_ADDR pc)
61 {
62 gdb_assert_not_reached ("linux target op low_breakpoint_at is not "
63 "implemented by this target");
64 }
65
66 /* Defined in auto-generated file reg-ia64.c. */
67 void init_registers_ia64 (void);
68 extern const struct target_desc *tdesc_ia64;
69
70 #define ia64_num_regs 462
71
72 #include <asm/ptrace_offsets.h>
73
74 static int ia64_regmap[] =
75 {
76 /* general registers */
77 -1, /* gr0 not available; i.e, it's always zero */
78 PT_R1,
79 PT_R2,
80 PT_R3,
81 PT_R4,
82 PT_R5,
83 PT_R6,
84 PT_R7,
85 PT_R8,
86 PT_R9,
87 PT_R10,
88 PT_R11,
89 PT_R12,
90 PT_R13,
91 PT_R14,
92 PT_R15,
93 PT_R16,
94 PT_R17,
95 PT_R18,
96 PT_R19,
97 PT_R20,
98 PT_R21,
99 PT_R22,
100 PT_R23,
101 PT_R24,
102 PT_R25,
103 PT_R26,
104 PT_R27,
105 PT_R28,
106 PT_R29,
107 PT_R30,
108 PT_R31,
109 /* gr32 through gr127 not directly available via the ptrace interface */
110 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
111 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
112 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
113 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
114 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
115 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
116 /* Floating point registers */
117 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
118 PT_F2,
119 PT_F3,
120 PT_F4,
121 PT_F5,
122 PT_F6,
123 PT_F7,
124 PT_F8,
125 PT_F9,
126 PT_F10,
127 PT_F11,
128 PT_F12,
129 PT_F13,
130 PT_F14,
131 PT_F15,
132 PT_F16,
133 PT_F17,
134 PT_F18,
135 PT_F19,
136 PT_F20,
137 PT_F21,
138 PT_F22,
139 PT_F23,
140 PT_F24,
141 PT_F25,
142 PT_F26,
143 PT_F27,
144 PT_F28,
145 PT_F29,
146 PT_F30,
147 PT_F31,
148 PT_F32,
149 PT_F33,
150 PT_F34,
151 PT_F35,
152 PT_F36,
153 PT_F37,
154 PT_F38,
155 PT_F39,
156 PT_F40,
157 PT_F41,
158 PT_F42,
159 PT_F43,
160 PT_F44,
161 PT_F45,
162 PT_F46,
163 PT_F47,
164 PT_F48,
165 PT_F49,
166 PT_F50,
167 PT_F51,
168 PT_F52,
169 PT_F53,
170 PT_F54,
171 PT_F55,
172 PT_F56,
173 PT_F57,
174 PT_F58,
175 PT_F59,
176 PT_F60,
177 PT_F61,
178 PT_F62,
179 PT_F63,
180 PT_F64,
181 PT_F65,
182 PT_F66,
183 PT_F67,
184 PT_F68,
185 PT_F69,
186 PT_F70,
187 PT_F71,
188 PT_F72,
189 PT_F73,
190 PT_F74,
191 PT_F75,
192 PT_F76,
193 PT_F77,
194 PT_F78,
195 PT_F79,
196 PT_F80,
197 PT_F81,
198 PT_F82,
199 PT_F83,
200 PT_F84,
201 PT_F85,
202 PT_F86,
203 PT_F87,
204 PT_F88,
205 PT_F89,
206 PT_F90,
207 PT_F91,
208 PT_F92,
209 PT_F93,
210 PT_F94,
211 PT_F95,
212 PT_F96,
213 PT_F97,
214 PT_F98,
215 PT_F99,
216 PT_F100,
217 PT_F101,
218 PT_F102,
219 PT_F103,
220 PT_F104,
221 PT_F105,
222 PT_F106,
223 PT_F107,
224 PT_F108,
225 PT_F109,
226 PT_F110,
227 PT_F111,
228 PT_F112,
229 PT_F113,
230 PT_F114,
231 PT_F115,
232 PT_F116,
233 PT_F117,
234 PT_F118,
235 PT_F119,
236 PT_F120,
237 PT_F121,
238 PT_F122,
239 PT_F123,
240 PT_F124,
241 PT_F125,
242 PT_F126,
243 PT_F127,
244 /* predicate registers - we don't fetch these individually */
245 -1, -1, -1, -1, -1, -1, -1, -1,
246 -1, -1, -1, -1, -1, -1, -1, -1,
247 -1, -1, -1, -1, -1, -1, -1, -1,
248 -1, -1, -1, -1, -1, -1, -1, -1,
249 -1, -1, -1, -1, -1, -1, -1, -1,
250 -1, -1, -1, -1, -1, -1, -1, -1,
251 -1, -1, -1, -1, -1, -1, -1, -1,
252 -1, -1, -1, -1, -1, -1, -1, -1,
253 /* branch registers */
254 PT_B0,
255 PT_B1,
256 PT_B2,
257 PT_B3,
258 PT_B4,
259 PT_B5,
260 PT_B6,
261 PT_B7,
262 /* virtual frame pointer and virtual return address pointer */
263 -1, -1,
264 /* other registers */
265 PT_PR,
266 PT_CR_IIP, /* ip */
267 PT_CR_IPSR, /* psr */
268 PT_CFM, /* cfm */
269 /* kernel registers not visible via ptrace interface (?) */
270 -1, -1, -1, -1, -1, -1, -1, -1,
271 /* hole */
272 -1, -1, -1, -1, -1, -1, -1, -1,
273 PT_AR_RSC,
274 PT_AR_BSP,
275 PT_AR_BSPSTORE,
276 PT_AR_RNAT,
277 -1,
278 -1, /* Not available: FCR, IA32 floating control register */
279 -1, -1,
280 -1, /* Not available: EFLAG */
281 -1, /* Not available: CSD */
282 -1, /* Not available: SSD */
283 -1, /* Not available: CFLG */
284 -1, /* Not available: FSR */
285 -1, /* Not available: FIR */
286 -1, /* Not available: FDR */
287 -1,
288 PT_AR_CCV,
289 -1, -1, -1,
290 PT_AR_UNAT,
291 -1, -1, -1,
292 PT_AR_FPSR,
293 -1, -1, -1,
294 -1, /* Not available: ITC */
295 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
296 -1, -1, -1, -1, -1, -1, -1, -1, -1,
297 PT_AR_PFS,
298 PT_AR_LC,
299 PT_AR_EC,
300 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
301 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
302 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
303 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
304 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
305 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
306 -1,
307 };
308
309 bool
310 ia64_target::low_cannot_store_register (int regno)
311 {
312 return false;
313 }
314
315 bool
316 ia64_target::low_cannot_fetch_register (int regno)
317 {
318 return false;
319 }
320
321 /* GDB register numbers. */
322 #define IA64_GR0_REGNUM 0
323 #define IA64_FR0_REGNUM 128
324 #define IA64_FR1_REGNUM 129
325
326 bool
327 ia64_target::low_fetch_register (regcache *regcache, int regnum)
328 {
329 /* r0 cannot be fetched but is always zero. */
330 if (regnum == IA64_GR0_REGNUM)
331 {
332 const gdb_byte zero[8] = { 0 };
333
334 gdb_assert (sizeof (zero) == register_size (regcache->tdesc, regnum));
335 supply_register (regcache, regnum, zero);
336 return true;
337 }
338
339 /* fr0 cannot be fetched but is always zero. */
340 if (regnum == IA64_FR0_REGNUM)
341 {
342 const gdb_byte f_zero[16] = { 0 };
343
344 gdb_assert (sizeof (f_zero) == register_size (regcache->tdesc, regnum));
345 supply_register (regcache, regnum, f_zero);
346 return true;
347 }
348
349 /* fr1 cannot be fetched but is always one (1.0). */
350 if (regnum == IA64_FR1_REGNUM)
351 {
352 const gdb_byte f_one[16] =
353 { 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
354
355 gdb_assert (sizeof (f_one) == register_size (regcache->tdesc, regnum));
356 supply_register (regcache, regnum, f_one);
357 return true;
358 }
359
360 return false;
361 }
362
363 static struct usrregs_info ia64_usrregs_info =
364 {
365 ia64_num_regs,
366 ia64_regmap,
367 };
368
369 static struct regs_info myregs_info =
370 {
371 NULL, /* regset_bitmap */
372 &ia64_usrregs_info
373 };
374
375 const regs_info *
376 ia64_target::get_regs_info ()
377 {
378 return &myregs_info;
379 }
380
381 void
382 ia64_target::low_arch_setup ()
383 {
384 current_process ()->tdesc = tdesc_ia64;
385 }
386
387 /* The linux target ops object. */
388
389 linux_process_target *the_linux_target = &the_ia64_target;
390
391 void
392 initialize_low_arch (void)
393 {
394 init_registers_ia64 ();
395 }