ld/testsuite/ld-aarch64/emit-relocs-morello-7.d

   1 # Checking that the "compatibility hack" around symbols named with _start is
   2 # working.
   3 #
   4 # Use known offsets into the GOT.  Have ensured that the GOT is 12bit aligned
   5 # in the linker script, which means we know that the lo12 relocations should
   6 # all have a known value (assuming a constant order of entries into the GOT).
   7 #
   8 # Need this since a large point of this test is to demonstrate that different
   9 # symbols with the same address end up having different valued relocations, so
  10 # we want to ensure a direct link between the relevant relocations and their
  11 # GOT entries.
  12 #
  13 # As far as the linker is concerned, each of the symbols defined in our linker
  14 # script are associated with the output section just before them.  However, we
  15 # add a hack for symbols which are named in the pattern __*_start so that their
  16 # Morello bounds are given as if the symbol was associated with the section just
  17 # after them.
  18 #
  19 # Hence the __text_start and __data_other symbols should end up with permissions
  20 # for the text section.  This should mean that they have PCC bounds, and the
  21 # value of the __data_other symbol should include an addend.  These are the
  22 # symbols used in the first and last LDR instructions in the function.
  23 #
  24 # Meanwhile, the __text_other symbol should have bounds of everything remaining
  25 # in the section *before* it (which is nothing), and the __data_start symbol
  26 # should have bounds spanning the entire section *after* it (the .data section).
  27 #
  28 #source: emit-relocs-morello-7.s
  29 #as: -march=morello+c64
  30 #ld: -static -pie -T emit-relocs-morello-7.ld
  31 #objdump: -DR --section-headers -j .text -j .got -j .data
  32
  33 .*:     file format .*
  34
  35 Sections:
  36 Idx Name          Size      VMA               LMA               File off  Algn
  37 #record: TEXT_START
  38 .* .text         00000010  ([0-9a-f]+)  .*  .*  2\*\*2
  39                   CONTENTS, ALLOC, LOAD, READONLY, CODE
  40 #record: DATA_START
  41 .* .data         00000004  ([0-9a-f]+)  .*  .*  2\*\*0
  42                   CONTENTS, ALLOC, LOAD, DATA
  43 .* .got          00000050  0000000000001000  0000000000001000  00001000  2\*\*4
  44                   CONTENTS, ALLOC, LOAD, DATA
  45
  46 #check: TXT_START string tolower $TEXT_START
  47 #check: DTA_START string tolower $DATA_START
  48
  49 Disassembly of section \.text:
  50
  51 TXT_START <obj>:
  52 .*:     c2400400        ldr     c0, \[c0, #16\]
  53 .*:     c2401000        ldr     c0, \[c0, #64\]
  54 .*:     c2400c00        ldr     c0, \[c0, #48\]
  55 .*:     c2400800        ldr     c0, \[c0, #32\]
  56
  57
  58 Disassembly of section \.data:
  59
  60 DTA_START <\.data>:
  61 .*:     0000000a        .*
  62
  63 Disassembly of section \.got:
  64
  65 #check: PCC_START aarch64_8digit_addr $TEXT_START
  66 #check: DAT_START aarch64_8digit_addr $DATA_START
  67 #check: PCC_LENGTH aarch64_8digit_addr [format %x [expr "0x1050 - 0x$TEXT_START"]]
  68 0000000000001000 <\.got>:
  69     1000:       [0-9a-f]+       .*
  70         \.\.\.
  71     1010:       PCC_START       .*
  72                         1010: R_MORELLO_RELATIVE        \*ABS\*
  73     1014:       00000000        .*
  74     1018:       PCC_LENGTH      .*
  75     101c:       04000000        .*
  76     1020:       PCC_START       .*
  77                         1020: R_MORELLO_RELATIVE        \*ABS\*\+0x10
  78     1024:       00000000        .*
  79     1028:       PCC_LENGTH      .*
  80     102c:       04000000        .*
  81     1030:       DAT_START       .*
  82                         1030: R_MORELLO_RELATIVE        \*ABS\*
  83     1034:       00000000        .*
  84     1038:       00000004        .*
  85     103c:       02000000        .*
  86     1040:       PCC_START       .*
  87                         1040: R_MORELLO_RELATIVE        \*ABS\*
  88         \.\.\.
  89     104c:       02000000        .*
  90