opcodes/ChangeLog-2008

   1 2008-12-30  Martin Schwidefsky  <schwidefskyy@de.ibm.com>
   2
   3         * s390-opc.txt: Add ptff instruction.
   4
   5 2008-12-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
   6
   7         * Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files.
   8         * Makefile.in: Regenerate.
   9
  10 2008-12-23  Jon Beniston <jon@beniston.com>
  11
  12         * Makefile.am: Add LM32 object files and dependencies.
  13         * Makefile.in: Regenerate.
  14         * configure.in: Add LM32 target.
  15         * configure: Regenerate.
  16         * disassemble.c: Add LM32 disassembler.
  17         * cgen-asm.in: Update copyright year.
  18         * cgen-dis.in: Update copyright year.
  19         * cgen-ibld.in: Update copyright year.
  20         * lm32-asm.c: New file.
  21         * lm32-desc.c: New file.
  22         * lm32-desc.h: New file.
  23         * lm32-dis.c: New file.
  24         * lm32-ibld.c: New file.
  25         * lm32-opc.c: New file.
  26         * lm32-opc.h: New file.
  27         * lm32-opinst.c: New file.
  28
  29 2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>
  30
  31         * i386-dis.c (EXdS): New.
  32         (EXdVexS): Likewise.
  33         (EXqVexS): Likewise.
  34         (d_swap_mode): Likewise.
  35         (q_mode): Updated.
  36         (prefix_table): Use EXdS on movss and EXqS on movsd.
  37         (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
  38         (intel_operand_size): Handle d_swap_mode.
  39         (OP_EX): Likewise.
  40
  41         * i386-opc.h (S): Update comments.
  42
  43         * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
  44         * i386-tbl.h: Regenerated.
  45
  46 2008-12-23  Nick Clifton  <nickc@redhat.com>
  47
  48         * po/ga.po: Updated Irish translation.
  49
  50 2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>
  51
  52         * i386-dis.c (EbS): New.
  53         (EvS): Likewise.
  54         (EMS): Likewise.
  55         (EXqS): Likewise.
  56         (EXxS): Likewise.
  57         (b_swap_mode): Likewise.
  58         (v_swap_mode): Likewise.
  59         (q_swap_mode): Likewise.
  60         (x_swap_mode): Likewise.
  61         (v_mode): Updated.
  62         (w_mode): Likewise.
  63         (t_mode): Likewise.
  64         (xmm_mode): Likewise.
  65         (swap_operand): Likewise.
  66         (dis386): Use EbS on movB.  Use EvS on moveS.
  67         (dis386_twobyte): Use EXxS on movapX.
  68         (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
  69         vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
  70         (vex_table): Use EXxS on vmovapX.
  71         (vex_len_table): Use EXqS on vmovq.
  72         (intel_operand_size): Handle b_swap_mode, v_swap_mode,
  73         q_swap_mode and x_swap_mode.
  74         (OP_E_register): Handle b_swap_mode and v_swap_mode.
  75         (OP_EM): Handle v_swap_mode.
  76         (OP_EX): x_swap_mode and q_swap_mode.
  77
  78         * i386-gen.c (opcode_modifiers): Add S.
  79
  80         * i386-opc.h (S): New.
  81         (Modrm): Updated.
  82         (i386_opcode_modifier): Add s.
  83
  84         * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
  85         movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
  86         * i386-tbl.h: Regenerated.
  87
  88 2008-12-18  H.J. Lu  <hongjiu.lu@intel.com>
  89
  90         * i386-dis.c (mnemonicendp): New.
  91         (op): Likewise.
  92         (print_insn): Use mnemonicendp.
  93         (OP_3DNowSuffix): Likewise.
  94         (CMP_Fixup): Likewise.
  95         (CMPXCHG8B_Fixup): Likewise.
  96         (CRC32_Fixup): Likewise.
  97         (OP_DREX_FCMP): Likewise.
  98         (OP_DREX_ICMP): Likewise.
  99         (VZERO_Fixup): Likewise.
 100         (VCMP_Fixup): Likewise.
 101         (PCLMUL_Fixup): Likewise.
 102         (VPERMIL2_Fixup): Likewise.
 103         (MOVBE_Fixup): Likewise.
 104         (putop): Update mnemonicendp.
 105         (oappend): Use stpcpy.
 106         (simd_cmp_op): Changed to struct op.
 107         (vex_cmp_op): Likewise.
 108         (pclmul_op): Likewise.
 109         (vpermil2_op): Likewise.
 110
 111 2008-12-18  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 112
 113         * configure: Regenerate.
 114
 115 2008-12-15  Richard Earnshaw  <rearnsha@arm.com>
 116
 117         * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
 118         unified syntax.
 119
 120 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
 121
 122         * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
 123
 124 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
 125
 126         * i386-dis.c (putop): Remove strayed comments.
 127
 128 2008-12-04  Ben Elliston  <bje@au.ibm.com>
 129
 130         * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
 131         for -Mbooke.
 132         (print_ppc_disassembler_options): Update usage.
 133         * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
 134         (BOOKE64): Remove.
 135         (PPCCHLK64): Likewise.
 136         (powerpc_opcodes): Remove all BOOKE64 instructions.
 137
 138 2008-11-28  Joshua Kinard  <kumba@gentoo.org>
 139
 140         * mips-dis.c (mips_arch_choices): Add r14000, r16000.
 141
 142 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 143
 144         * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
 145         adjusted the mask for 32-bit branch instruction.
 146
 147 2008-11-27  Alan Modra  <amodra@bigpond.net.au>
 148
 149         * ppc-opc.c (extract_sprg): Correct operand range check.
 150
 151 2008-11-26  Andreas Schwab  <schwab@suse.de>
 152
 153         * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
 154         (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
 155         (save_printer, save_print_address): Remove.
 156         (fetch_data): Don't use them.
 157         (match_insn_m68k): Always restore printing functions.
 158         (print_insn_m68k): Don't save/restore printing functions.
 159
 160 2008-11-25  Nick Clifton  <nickc@redhat.com>
 161
 162         * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
 163
 164 2008-11-18  Catherine Moore  <clm@codesourcery.com>
 165
 166         * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
 167         instructions.
 168         (neon_opcodes): Likewise.
 169         (print_insn_coprocessor): Print 't' or 'b' for vcvt
 170         instructions.
 171
 172 2008-11-14  Tristan Gingold  <gingold@adacore.com>
 173
 174         * makefile.vms (OBJS): Update list of objects.
 175         (DEFS): Update
 176         (CFLAGS): Update.
 177
 178 2008-11-06  Chao-ying Fu  <fu@mips.com>
 179
 180         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
 181         before sync.
 182         (sync): New instruction with 5-bit sync type.
 183         * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
 184
 185 2008-11-06  Nick Clifton  <nickc@redhat.com>
 186
 187         * avr-dis.c: Replace uses of sprintf without a format string with
 188         calls to strcpy.
 189
 190 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
 191
 192         * i386-opc.tbl: Add cmovpe and cmovpo.
 193         * i386-tbl.h: Regenerated.
 194
 195 2008-10-22  Nick Clifton  <nickc@redhat.com>
 196
 197         PR 6937
 198         * configure.in (SHARED_LIBADD): Revert previous change.
 199         Add a comment explaining why.
 200         (SHARED_DEPENDENCIES): Revert previous change.
 201         * configure: Regenerate.
 202
 203 2008-10-10  Nick Clifton  <nickc@redhat.com>
 204
 205         PR 6937
 206         * configure.in (SHARED_LIBADD): Add libiberty.a.
 207         (SHARED_DEPENDENCIES): Add libiberty.a.
 208
 209 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 210
 211         * i386-gen.c: Include "hashtab.h".
 212         (next_field): Take a new argument, last.  Check last.
 213         (process_i386_cpu_flag): Updated.
 214         (process_i386_opcode_modifier): Likewise.
 215         (process_i386_operand_type): Likewise.
 216         (process_i386_registers): Likewise.
 217         (output_i386_opcode): New.
 218         (opcode_hash_entry): Likewise.
 219         (opcode_hash_table): Likewise.
 220         (opcode_hash_hash): Likewise.
 221         (opcode_hash_eq): Likewise.
 222         (process_i386_opcodes): Use opcode hash table and opcode array.
 223
 224 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 225
 226         * s390-opc.txt (stdy, stey): Fix description
 227
 228 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
 229
 230         * Makefile.am: Run "make dep-am".
 231         * Makefile.in: Regenerate.
 232
 233 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
 234
 235         * aclocal.m4: Regenerated.
 236         * configure: Likewise.
 237         * Makefile.in: Likewise.
 238
 239 2008-09-29  Nick Clifton  <nickc@redhat.com>
 240
 241         * po/vi.po: Updated Vietnamese translation.
 242         * po/fr.po: Updated French translation.
 243
 244 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
 245
 246         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
 247         (cfxr, cfdr, cfer, clclu): Add esa flag.
 248         (sqd): Instruction added.
 249         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
 250         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
 251
 252 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
 253
 254         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
 255         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
 256
 257 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
 258
 259         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
 260         * i386-tbl.h: Regenerated.
 261
 262 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 263
 264         * i386-dis.c (dis386): Adjust far return mnemonics.
 265         * i386-opc.tbl: Add retf.
 266         * i386-tbl.h: Re-generate.
 267
 268 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 269
 270         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 271
 272 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 273
 274         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 275         * ia64-gen.c (lookup_specifier): Likewise.
 276
 277         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 278         * ia64-raw.tbl: Likewise.
 279         * ia64-waw.tbl: Likewise.
 280         * ia64-asmtab.c: Regenerated.
 281
 282 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 283
 284         * i386-opc.tbl: Correct fidivr operand size.
 285
 286         * i386-tbl.h: Regenerated.
 287
 288 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 289
 290         * configure.in: Update a number of obsolete autoconf macros.
 291         * aclocal.m4: Regenerate.
 292
 293 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 294
 295         AVX Programming Reference (August, 2008)
 296         * i386-dis.c (PREFIX_VEX_38DB): New.
 297         (PREFIX_VEX_38DC): Likewise.
 298         (PREFIX_VEX_38DD): Likewise.
 299         (PREFIX_VEX_38DE): Likewise.
 300         (PREFIX_VEX_38DF): Likewise.
 301         (PREFIX_VEX_3ADF): Likewise.
 302         (VEX_LEN_38DB_P_2): Likewise.
 303         (VEX_LEN_38DC_P_2): Likewise.
 304         (VEX_LEN_38DD_P_2): Likewise.
 305         (VEX_LEN_38DE_P_2): Likewise.
 306         (VEX_LEN_38DF_P_2): Likewise.
 307         (VEX_LEN_3ADF_P_2): Likewise.
 308         (PREFIX_VEX_3A04): Updated.
 309         (VEX_LEN_3A06_P_2): Likewise.
 310         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 311         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 312         (x86_64_table): Likewise.
 313         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 314         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 315         VEX_LEN_3ADF_P_2.
 316
 317         * i386-opc.tbl: Add AES + AVX instructions.
 318         * i386-init.h: Regenerated.
 319         * i386-tbl.h: Likewise.
 320
 321 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 322
 323         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 324         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 325
 326 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 327
 328         PR 6526
 329         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 330         * Makefile.in: Regenerate.
 331         * aclocal.m4: Regenerate.
 332         * config.in: Regenerate.
 333         * configure: Regenerate.
 334
 335 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 336
 337         PR 6825
 338         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 339
 340 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 341
 342         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 343
 344         * i386-tbl.h: Regenerated.
 345
 346 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 347
 348         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 349         * Makefile.in: Regenerate.
 350         * po/POTFILES.in: Regenerate.
 351
 352 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 353
 354         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 355         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 356         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 357         * ppc-opc.c (insert_xt6): New static function.
 358         (extract_xt6): Likewise.
 359         (insert_xa6): Likewise.
 360         (extract_xa6: Likewise.
 361         (insert_xb6): Likewise.
 362         (extract_xb6): Likewise.
 363         (insert_xb6s): Likewise.
 364         (extract_xb6s): Likewise.
 365         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 366         XX3DM_MASK, PPCVSX): New.
 367         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 368         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 369
 370 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 371
 372         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 373         * Makefile.in: Regenerate.
 374
 375 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 376
 377         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 378         * i386-tbl.h: Regenerated.
 379
 380 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 381
 382         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 383         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 384         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 385         (powerpc_opcodes): Add Xilinx APU related opcodes.
 386
 387 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 388
 389         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 390
 391 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 392
 393         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 394
 395 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 396
 397         * mips-opc.c (CP): New macro.
 398         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 399         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 400         dmtc2 Octeon instructions.
 401
 402 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 403
 404         * dis-init.c (init_disassemble_info): Init endian_code field.
 405         * arm-dis.c (print_insn): Disassemble code according to
 406         setting of endian_code.
 407         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 408
 409 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 410
 411         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 412         for ELF symbols.
 413
 414 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 415
 416         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 417         (print_ppc_disassembler_options): Likewise.
 418         * ppc-opc.c (PPC464): Define.
 419         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 420
 421 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 422
 423         * configure: Regenerate.
 424
 425 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 426
 427         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 428         ppc_cpu_t typedef.
 429         (struct dis_private): New.
 430         (POWERPC_DIALECT): New define.
 431         (powerpc_dialect): Renamed to...
 432         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 433         struct dis_private.
 434         (print_insn_big_powerpc): Update for using structure in
 435         info->private_data.
 436         (print_insn_little_powerpc): Likewise.
 437         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 438         (skip_optional_operands): Likewise.
 439         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 440         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 441         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 442         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 443         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 444         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 445         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 446         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 447         param to be of type ppc_cpu_t.  Update prototype.
 448
 449 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 450
 451         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 452         +s, +S.
 453         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 454         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 455         syncw, syncws, vm3mulu, vm0 and vmulu.
 456
 457         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 458         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 459         seqi, sne and snei.
 460
 461 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 462
 463         * i386-opc.tbl: Add vmovd with 64bit operand.
 464         * i386-tbl.h: Regenerated.
 465
 466 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 467
 468         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 469
 470 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 471
 472         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 473         * i386-tbl.h: Regenerated.
 474
 475 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 476
 477         PR gas/6517
 478         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 479         into 32bit and 64bit.  Remove Reg64|Qword and add
 480         IgnoreSize|No_qSuf on 32bit version.
 481         * i386-tbl.h: Regenerated.
 482
 483 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 484
 485         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 486         * i386-tbl.h: Regenerated.
 487
 488 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 489
 490         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 491
 492 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 493
 494         * Makefile.am: Run "make dep-am".
 495         * Makefile.in: Regenerate.
 496
 497 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 498
 499         * i386-dis.c (MOVBE_Fixup): New.
 500         (Mo): Likewise.
 501         (PREFIX_0F3880): Likewise.
 502         (PREFIX_0F3881): Likewise.
 503         (PREFIX_0F38F0): Updated.
 504         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 505         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 506         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 507
 508         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 509         CPU_EPT_FLAGS.
 510         (cpu_flags): Add CpuMovbe and CpuEPT.
 511
 512         * i386-opc.h (CpuMovbe): New.
 513         (CpuEPT): Likewise.
 514         (CpuLM): Updated.
 515         (i386_cpu_flags): Add cpumovbe and cpuept.
 516
 517         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 518         * i386-init.h: Regenerated.
 519         * i386-tbl.h: Likewise.
 520
 521 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 522
 523         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 524         the two drem and the two dremu macros.
 525
 526 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 527
 528         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 529         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 530         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 531         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 532
 533 2008-04-25  David S. Miller  <davem@davemloft.net>
 534
 535         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 536         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 537
 538 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 539
 540         * aclocal.m4: Regenerate.
 541         * configure: Regenerate.
 542
 543 2008-04-23  David S. Miller  <davem@davemloft.net>
 544
 545         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 546         extended values.
 547         (prefetch_table): Add missing values.
 548
 549 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 550
 551         * i386-gen.c (opcode_modifiers): Add NoAVX.
 552
 553         * i386-opc.h (NoAVX): New.
 554         (OldGcc): Updated.
 555         (i386_opcode_modifier): Add noavx.
 556
 557         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 558         instructions which don't have AVX equivalent.
 559         * i386-tbl.h: Regenerated.
 560
 561 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 562
 563         * i386-dis.c (OP_VEX_FMA): New.
 564         (OP_EX_VexImmW): Likewise.
 565         (VexFMA): Likewise.
 566         (Vex128FMA): Likewise.
 567         (EXVexImmW): Likewise.
 568         (get_vex_imm8): Likewise.
 569         (OP_EX_VexReg): Likewise.
 570         (vex_i4_done): Renamed to ...
 571         (vex_w_done): This.
 572         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 573         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 574         FMA instructions.
 575         (print_insn): Updated.
 576         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 577         (OP_REG_VexI4): Check invalid high registers.
 578
 579 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 580             Michael Meissner  <michael.meissner@amd.com>
 581
 582         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 583         * i386-tbl.h: Regenerate from i386-opc.tbl.
 584
 585 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 586
 587         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 588         accept Power E500MC instructions.
 589         (print_ppc_disassembler_options): Document -Me500mc.
 590         * ppc-opc.c (DUIS, DUI, T): New.
 591         (XRT, XRTRA): Likewise.
 592         (E500MC): Likewise.
 593         (powerpc_opcodes): Add new Power E500MC instructions.
 594
 595 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 596
 597         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 598         (print_s390_disassembler_options): New function.
 599         * disassemble.c (disassembler_usage): Invoke
 600         print_s390_disassembler_options.
 601
 602 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 603
 604         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 605         of local variables used for mnemonic parsing: prefix, suffix and
 606         number.
 607
 608 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 609
 610         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 611         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 612         (s390_crb_extensions): New extensions table.
 613         (insertExpandedMnemonic): Handle '$' tag.
 614         * s390-opc.txt: Remove conditional jump variants which can now
 615         be expanded automatically.
 616         Replace '*' tag with '$' in the compare and branch instructions.
 617
 618 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 619
 620         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 621         (PREFIX_VEX_3AXX): Likewis.
 622
 623 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 624
 625         * i386-opc.tbl: Remove 4 extra blank lines.
 626
 627 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 628
 629         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 630         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 631         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 632         * i386-opc.tbl: Likewise.
 633
 634         * i386-opc.h (CpuCLMUL): Renamed to ...
 635         (CpuPCLMUL): This.
 636         (CpuFMA): Updated.
 637         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 638
 639         * i386-init.h: Regenerated.
 640
 641 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 642
 643         * i386-dis.c (OP_E_register): New.
 644         (OP_E_memory): Likewise.
 645         (OP_VEX): Likewise.
 646         (OP_EX_Vex): Likewise.
 647         (OP_EX_VexW): Likewise.
 648         (OP_XMM_Vex): Likewise.
 649         (OP_XMM_VexW): Likewise.
 650         (OP_REG_VexI4): Likewise.
 651         (PCLMUL_Fixup): Likewise.
 652         (VEXI4_Fixup): Likewise.
 653         (VZERO_Fixup): Likewise.
 654         (VCMP_Fixup): Likewise.
 655         (VPERMIL2_Fixup): Likewise.
 656         (rex_original): Likewise.
 657         (rex_ignored): Likewise.
 658         (Mxmm): Likewise.
 659         (XMM): Likewise.
 660         (EXxmm): Likewise.
 661         (EXxmmq): Likewise.
 662         (EXymmq): Likewise.
 663         (Vex): Likewise.
 664         (Vex128): Likewise.
 665         (Vex256): Likewise.
 666         (VexI4): Likewise.
 667         (EXdVex): Likewise.
 668         (EXqVex): Likewise.
 669         (EXVexW): Likewise.
 670         (EXdVexW): Likewise.
 671         (EXqVexW): Likewise.
 672         (XMVex): Likewise.
 673         (XMVexW): Likewise.
 674         (XMVexI4): Likewise.
 675         (PCLMUL): Likewise.
 676         (VZERO): Likewise.
 677         (VCMP): Likewise.
 678         (VPERMIL2): Likewise.
 679         (xmm_mode): Likewise.
 680         (xmmq_mode): Likewise.
 681         (ymmq_mode): Likewise.
 682         (vex_mode): Likewise.
 683         (vex128_mode): Likewise.
 684         (vex256_mode): Likewise.
 685         (USE_VEX_C4_TABLE): Likewise.
 686         (USE_VEX_C5_TABLE): Likewise.
 687         (USE_VEX_LEN_TABLE): Likewise.
 688         (VEX_C4_TABLE): Likewise.
 689         (VEX_C5_TABLE): Likewise.
 690         (VEX_LEN_TABLE): Likewise.
 691         (REG_VEX_XX): Likewise.
 692         (MOD_VEX_XXX): Likewise.
 693         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 694         (PREFIX_0F3A44): Likewise.
 695         (PREFIX_0F3ADF): Likewise.
 696         (PREFIX_VEX_XXX): Likewise.
 697         (VEX_OF): Likewise.
 698         (VEX_OF38): Likewise.
 699         (VEX_OF3A): Likewise.
 700         (VEX_LEN_XXX): Likewise.
 701         (vex): Likewise.
 702         (need_vex): Likewise.
 703         (need_vex_reg): Likewise.
 704         (vex_i4_done): Likewise.
 705         (vex_table): Likewise.
 706         (vex_len_table): Likewise.
 707         (OP_REG_VexI4): Likewise.
 708         (vex_cmp_op): Likewise.
 709         (pclmul_op): Likewise.
 710         (vpermil2_op): Likewise.
 711         (m_mode): Updated.
 712         (es_reg): Likewise.
 713         (PREFIX_0F38F0): Likewise.
 714         (PREFIX_0F3A60): Likewise.
 715         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 716         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 717         and PREFIX_VEX_XXX entries.
 718         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 719         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 720         PREFIX_0F3ADF.
 721         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 722         Add MOD_VEX_XXX entries.
 723         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 724         REX byte in rex_original.
 725         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 726         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 727         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 728         calling get_valid_dis386.  Use rex_original and rex_ignored when
 729         printing out REX.
 730         (putop): Handle "XY".
 731         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 732         ymmq_mode.
 733         (OP_E_extended): Updated to use OP_E_register and
 734         OP_E_memory.
 735         (OP_XMM): Handle VEX.
 736         (OP_EX): Likewise.
 737         (XMM_Fixup): Likewise.
 738         (CMP_Fixup): Use ARRAY_SIZE.
 739
 740         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 741         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 742         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 743         OPERAND_TYPE_VEX_IMM4.
 744         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 745         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 746         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 747         VexImmExt and SSE2AVX.
 748         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 749
 750         * i386-opc.h (CpuAVX): New.
 751         (CpuAES): Likewise.
 752         (CpuCLMUL): Likewise.
 753         (CpuFMA): Likewise.
 754         (Vex): Likewise.
 755         (Vex256): Likewise.
 756         (VexNDS): Likewise.
 757         (VexNDD): Likewise.
 758         (VexW0): Likewise.
 759         (VexW1): Likewise.
 760         (Vex0F): Likewise.
 761         (Vex0F38): Likewise.
 762         (Vex0F3A): Likewise.
 763         (Vex3Sources): Likewise.
 764         (VexImmExt): Likewise.
 765         (SSE2AVX): Likewise.
 766         (RegYMM): Likewise.
 767         (Ymmword): Likewise.
 768         (Vex_Imm4): Likewise.
 769         (Implicit1stXmm0): Likewise.
 770         (CpuXsave): Updated.
 771         (CpuLM): Likewise.
 772         (ByteOkIntel): Likewise.
 773         (OldGcc): Likewise.
 774         (Control): Likewise.
 775         (Unspecified): Likewise.
 776         (OTMax): Likewise.
 777         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 778         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 779         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 780         vex3sources, veximmext and sse2avx.
 781         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 782
 783         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 784
 785         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 786
 787         * i386-init.h: Regenerated.
 788         * i386-tbl.h: Likewise.
 789
 790 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 791
 792         From  Robin Getz  <robin.getz@analog.com>
 793         * bfin-dis.c (bu32): Typedef.
 794         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 795         (constant_formats[]): Add uimm32 and huimm16.
 796         (fmtconst_val): New.
 797         (uimm32): Define.
 798         (huimm32): Define.
 799         (imm16_val): Define.
 800         (luimm16_val): Define.
 801         (struct saved_state): Define.
 802         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 803         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 804         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 805         (get_allreg): New.
 806         (decode_LDIMMhalf_0): Print out the whole register value.
 807
 808         From Jie Zhang  <jie.zhang@analog.com>
 809         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 810         multiply and multiply-accumulate to data register instruction.
 811
 812         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 813         c_imm32, c_huimm32e): Define.
 814         (constant_formats): Add flags for printing decimal, leading spaces, and
 815         exact symbols.
 816         (comment, parallel): Add global flags in all disassembly.
 817         (fmtconst): Take advantage of new flags, and print default in hex.
 818         (fmtconst_val): Likewise.
 819         (decode_macfunc): Be consistant with spaces, tabs, comments,
 820         capitalization in disassembly, fix minor coding style issues.
 821         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 822         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 823         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 824         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 825         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 826         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 827         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 828         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 829         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 830         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 831         _print_insn_bfin, print_insn_bfin): Likewise.
 832
 833 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 834
 835         * aclocal.m4: Regenerate.
 836         * configure: Likewise.
 837         * Makefile.in: Likewise.
 838
 839 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 840
 841         * Makefile.am: Run "make dep-am".
 842         * Makefile.in: Regenerate.
 843         * configure: Regenerate.
 844
 845 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 846
 847         * ppc-opc.c (powerpc_opcodes): Order and format.
 848
 849 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 850
 851         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 852         * i386-tbl.h: Regenerated.
 853
 854 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 855
 856         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 857         x86-64.
 858         * i386-tbl.h: Regenerated.
 859
 860 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 861
 862         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 863         and Fword for far indirect jmp. Allow Reg16 and Word for near
 864         indirect jmp on x86-64. Disallow Fword for lcall.
 865         * i386-tbl.h: Re-generate.
 866
 867 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 868
 869         * cr16-opc.c  (cr16_num_optab): Defined
 870
 871 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 872
 873         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 874         * i386-init.h: Regenerated.
 875
 876 2008-02-14  Nick Clifton  <nickc@redhat.com>
 877
 878         PR binutils/5524
 879         * configure.in (SHARED_LIBADD): Select the correct host specific
 880         file extension for shared libraries.
 881         * configure: Regenerate.
 882
 883 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 884
 885         * i386-opc.h (RegFlat): New.
 886         * i386-reg.tbl (flat): Add.
 887         * i386-tbl.h: Re-generate.
 888
 889 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 890
 891         * i386-dis.c (a_mode): New.
 892         (cond_jump_mode): Adjust.
 893         (Ma): Change to a_mode.
 894         (intel_operand_size): Handle a_mode.
 895         * i386-opc.tbl: Allow Dword and Qword for bound.
 896         * i386-tbl.h: Re-generate.
 897
 898 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 899
 900         * i386-gen.c (process_i386_registers): Process new fields.
 901         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 902         unsigned char. Add dw2_regnum and Dw2Inval.
 903         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 904         register names.
 905         * i386-tbl.h: Re-generate.
 906
 907 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 908
 909         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 910         * i386-init.h: Updated.
 911
 912 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 913
 914         * i386-gen.c (cpu_flags): Add CpuXsave.
 915
 916         * i386-opc.h (CpuXsave): New.
 917         (CpuLM): Updated.
 918         (i386_cpu_flags): Add cpuxsave.
 919
 920         * i386-dis.c (MOD_0FAE_REG_4): New.
 921         (RM_0F01_REG_2): Likewise.
 922         (MOD_0FAE_REG_5): Updated.
 923         (RM_0F01_REG_3): Likewise.
 924         (reg_table): Use MOD_0FAE_REG_4.
 925         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 926         for xrstor.
 927         (rm_table): Add RM_0F01_REG_2.
 928
 929         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 930         * i386-init.h: Regenerated.
 931         * i386-tbl.h: Likewise.
 932
 933 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 934
 935         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 936         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 937         * i386-tbl.h: Re-generate.
 938
 939 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 940
 941         PR 5715
 942         * configure: Regenerated.
 943
 944 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 945
 946         * mips-dis.c: Update copyright.
 947         (mips_arch_choices): Add Octeon.
 948         * mips-opc.c: Update copyright.
 949         (IOCT): New macro.
 950         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 951
 952 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 953
 954         * ppc-opc.c: Support optional L form mtmsr.
 955
 956 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 957
 958         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 959
 960 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 961
 962         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 963         * i386-init.h: Regenerated.
 964
 965 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 966
 967         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 968         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 969
 970 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 971
 972         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 973         (cpu_flags): Likewise.
 974
 975         * i386-opc.h (CpuMMX2): Removed.
 976         (CpuSSE): Updated.
 977
 978         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 979         * i386-init.h: Regenerated.
 980         * i386-tbl.h: Likewise.
 981
 982 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 983
 984         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 985         CPU_SMX_FLAGS.
 986         * i386-init.h: Regenerated.
 987
 988 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 989
 990         * i386-opc.tbl: Use Qword on movddup.
 991         * i386-tbl.h: Regenerated.
 992
 993 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 994
 995         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 996         * i386-tbl.h: Regenerated.
 997
 998 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 999
1000         * i386-dis.c (Mx): New.
1001         (PREFIX_0FC3): Likewise.
1002         (PREFIX_0FC7_REG_6): Updated.
1003         (dis386_twobyte): Use PREFIX_0FC3.
1004         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
1005         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
1006         movntss.
1007
1008 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1009
1010         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
1011         (operand_types): Add Mem.
1012
1013         * i386-opc.h (IntelSyntax): New.
1014         * i386-opc.h (Mem): New.
1015         (Byte): Updated.
1016         (Opcode_Modifier_Max): Updated.
1017         (i386_opcode_modifier): Add intelsyntax.
1018         (i386_operand_type): Add mem.
1019
1020         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
1021         instructions.
1022
1023         * i386-reg.tbl: Add size for accumulator.
1024
1025         * i386-init.h: Regenerated.
1026         * i386-tbl.h: Likewise.
1027
1028 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
1029
1030         * i386-opc.h (Byte): Fix a typo.
1031
1032 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1033
1034         PR gas/5534
1035         * i386-gen.c (operand_type_init): Add Dword to
1036         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
1037         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
1038         Qword and Xmmword.
1039         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
1040         Xmmword, Unspecified and Anysize.
1041         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
1042         an alias of Xmmword.
1043
1044         * i386-opc.h (CheckSize): Removed.
1045         (Byte): Updated.
1046         (Word): Likewise.
1047         (Dword): Likewise.
1048         (Qword): Likewise.
1049         (Xmmword): Likewise.
1050         (FWait): Updated.
1051         (OTMax): Likewise.
1052         (i386_opcode_modifier): Remove checksize, byte, word, dword,
1053         qword and xmmword.
1054         (Fword): New.
1055         (TBYTE): Likewise.
1056         (Unspecified): Likewise.
1057         (Anysize): Likewise.
1058         (i386_operand_type): Add byte, word, dword, fword, qword,
1059         tbyte xmmword, unspecified and anysize.
1060
1061         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
1062         Tbyte, Xmmword, Unspecified and Anysize.
1063
1064         * i386-reg.tbl: Add size for accumulator.
1065
1066         * i386-init.h: Regenerated.
1067         * i386-tbl.h: Likewise.
1068
1069 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1070
1071         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
1072         (REG_0F18): Updated.
1073         (reg_table): Updated.
1074         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
1075         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
1076
1077 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1078
1079         * i386-gen.c (set_bitfield): Use fail () on error.
1080
1081 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1082
1083         * i386-gen.c (lineno): New.
1084         (filename): Likewise.
1085         (set_bitfield): Report filename and line numer on error.
1086         (process_i386_opcodes): Set filename and update lineno.
1087         (process_i386_registers): Likewise.
1088
1089 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
1090
1091         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1092         ATTSyntax.
1093
1094         * i386-opc.h (IntelMnemonic): Renamed to ..
1095         (ATTSyntax): This
1096         (Opcode_Modifier_Max): Updated.
1097         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1098         and intelsyntax.
1099
1100         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1101         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1102         * i386-tbl.h: Regenerated.
1103
1104 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1105
1106         * i386-gen.c: Update copyright to 2008.
1107         * i386-opc.h: Likewise.
1108         * i386-opc.tbl: Likewise.
1109
1110         * i386-init.h: Regenerated.
1111         * i386-tbl.h: Likewise.
1112
1113 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1114
1115         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1116         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1117         * i386-tbl.h: Regenerated.
1118
1119 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1120
1121         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1122         CpuSSE4_2_Or_ABM.
1123         (cpu_flags): Likewise.
1124
1125         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1126         (CpuSSE4_2_Or_ABM): Likewise.
1127         (CpuLM): Updated.
1128         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1129
1130         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1131         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1132         and CpuPadLock, respectively.
1133         * i386-init.h: Regenerated.
1134         * i386-tbl.h: Likewise.
1135
1136 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1137
1138         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1139
1140         * i386-opc.h (No_xSuf): Removed.
1141         (CheckSize): Updated.
1142
1143         * i386-tbl.h: Regenerated.
1144
1145 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1146
1147         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1148         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1149         CPU_SSE5_FLAGS.
1150         (cpu_flags): Add CpuSSE4_2_Or_ABM.
1151
1152         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1153         (CpuLM): Updated.
1154         (i386_cpu_flags): Add cpusse4_2_or_abm.
1155
1156         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1157         CpuABM|CpuSSE4_2 on popcnt.
1158         * i386-init.h: Regenerated.
1159         * i386-tbl.h: Likewise.
1160
1161 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1162
1163         * i386-opc.h: Update comments.
1164
1165 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1166
1167         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1168         * i386-opc.h: Likewise.
1169         * i386-opc.tbl: Likewise.
1170
1171 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1172
1173         PR gas/5534
1174         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1175         Byte, Word, Dword, QWord and Xmmword.
1176
1177         * i386-opc.h (No_xSuf): New.
1178         (CheckSize): Likewise.
1179         (Byte): Likewise.
1180         (Word): Likewise.
1181         (Dword): Likewise.
1182         (QWord): Likewise.
1183         (Xmmword): Likewise.
1184         (FWait): Updated.
1185         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1186         Dword, QWord and Xmmword.
1187
1188         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1189         used.
1190         * i386-tbl.h: Regenerated.
1191
1192 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1193
1194         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1195         From Miod Vallat.
1196
1197 For older changes see ChangeLog-2007
1198 \f
1199 Copyright (C) 2008 Free Software Foundation, Inc.
1200
1201 Copying and distribution of this file, with or without modification,
1202 are permitted in any medium without royalty provided the copyright
1203 notice and this notice are preserved.
1204
1205 Local Variables:
1206 mode: change-log
1207 left-margin: 8
1208 fill-column: 74
1209 version-control: never
1210 End: