opcodes/ChangeLog

   1 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
   2
   3         * arm-dis.c (coprocessor_opcodes): Document new %J and %K format
   4         specifier.  Add entries for VLDR and VSTR of system registers.
   5         (print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in
   6         coprocessor instructions on Armv8.1-M Mainline targets.  Add handling
   7         of %J and %K format specifier.
   8
   9 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  10
  11         * arm-dis.c (coprocessor_opcodes): Document new %C format control code.
  12         Add new entries for VSCCLRM instruction.
  13         (print_insn_coprocessor): Handle new %C format control code.
  14
  15 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  16
  17         * arm-dis.c (enum isa): New enum.
  18         (struct sopcode32): New structure.
  19         (coprocessor_opcodes): change type of entries to struct sopcode32 and
  20         set isa field of all current entries to ANY.
  21         (print_insn_coprocessor): Change type of insn to struct sopcode32.
  22         Only match an entry if its isa field allows the current mode.
  23
  24 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  25
  26         * arm-dis.c (thumb_opcodes): Document %n control code.  Add entry for
  27         CLRM.
  28         (print_insn_thumb32): Add logic to print %n CLRM register list.
  29
  30 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  31
  32         * arm-dis.c (print_insn_thumb32): Updated to accept new %P
  33         and %Q patterns.
  34
  35 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  36
  37         * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
  38         (print_insn_thumb32): Edit the switch case for %Z.
  39
  40 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  41
  42         * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
  43
  44 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  45
  46         * arm-dis.c (thumb32_opcodes): New instruction bfl.
  47
  48 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  49
  50         * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
  51
  52 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  53
  54         * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
  55         Arm register with r13 and r15 unpredictable.
  56         (thumb32_opcodes): New instructions for bfx and bflx.
  57
  58 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  59
  60         * arm-dis.c (thumb32_opcodes): New instructions for bf.
  61
  62 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  63
  64         * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
  65
  66 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  67
  68         * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
  69
  70 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  71
  72         * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
  73
  74 2019-04-12  John Darrington <john@darrington.wattle.id.au>
  75
  76         s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
  77         "optr". ("operator" is a reserved word in c++).
  78
  79 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  80
  81         * aarch64-opc.c (aarch64_print_operand): Add case for
  82         AARCH64_OPND_Rt_SP.
  83         (verify_constraints): Likewise.
  84         * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
  85         (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
  86         to accept Rt|SP as first operand.
  87         (AARCH64_OPERANDS): Add new Rt_SP.
  88         * aarch64-asm-2.c: Regenerated.
  89         * aarch64-dis-2.c: Regenerated.
  90         * aarch64-opc-2.c: Regenerated.
  91
  92 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  93
  94         * aarch64-asm-2.c: Regenerated.
  95         * aarch64-dis-2.c: Likewise.
  96         * aarch64-opc-2.c: Likewise.
  97         * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
  98
  99 2019-04-09  Robert Suchanek  <robert.suchanek@mips.com>
 100
 101         * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
 102
 103 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
 104
 105         * i386-opc.tbl: Consolidate AVX512 BF16 entries.
 106         * i386-init.h: Regenerated.
 107
 108 2019-04-07  Alan Modra  <amodra@gmail.com>
 109
 110         * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
 111         op_separator to control printing of spaces, comma and parens
 112         rather than need_comma, need_paren and spaces vars.
 113
 114 2019-04-07  Alan Modra  <amodra@gmail.com>
 115
 116         PR 24421
 117         * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
 118         (print_insn_neon, print_insn_arm): Likewise.
 119
 120 2019-04-05  Xuepeng Guo  <xuepeng.guo@intel.com>
 121
 122         * i386-dis-evex.h (evex_table): Updated to support BF16
 123         instructions.
 124         * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
 125         and EVEX_W_0F3872_P_3.
 126         * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
 127         (cpu_flags): Add bitfield for CpuAVX512_BF16.
 128         * i386-opc.h (enum): Add CpuAVX512_BF16.
 129         (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
 130         * i386-opc.tbl: Add AVX512 BF16 instructions.
 131         * i386-init.h: Regenerated.
 132         * i386-tbl.h: Likewise.
 133
 134 2019-04-05  Alan Modra  <amodra@gmail.com>
 135
 136         * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
 137         (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
 138         to favour printing of "-" branch hint when using the "y" bit.
 139         Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
 140
 141 2019-04-05  Alan Modra  <amodra@gmail.com>
 142
 143         * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
 144         opcode until first operand is output.
 145
 146 2019-04-04  Peter Bergner  <bergner@linux.ibm.com>
 147
 148         PR gas/24349
 149         * ppc-opc.c (valid_bo_pre_v2): Add comments.
 150         (valid_bo_post_v2): Add support for 'at' branch hints.
 151         (insert_bo): Only error on branch on ctr.
 152         (get_bo_hint_mask): New function.
 153         (insert_boe): Add new 'branch_taken' formal argument.  Add support
 154         for inserting 'at' branch hints.
 155         (extract_boe): Add new 'branch_taken' formal argument.  Add support
 156         for extracting 'at' branch hints.
 157         (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
 158         (BOE): Delete operand.
 159         (BOM, BOP): New operands.
 160         (RM): Update value.
 161         (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
 162         (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
 163         bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
 164         (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
 165         bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
 166         <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
 167         bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
 168         bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
 169         bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
 170         bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
 171         bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
 172         bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
 173         bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
 174         beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
 175         bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
 176         buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
 177         bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
 178         bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
 179         bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
 180         bttarl+>: New extended mnemonics.
 181
 182 2019-03-28  Alan Modra  <amodra@gmail.com>
 183
 184         PR 24390
 185         * ppc-opc.c (BTF): Define.
 186         (powerpc_opcodes): Use for mtfsb*.
 187         * ppc-dis.c (print_insn_powerpc): Print fields with both
 188         PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
 189
 190 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 191
 192         * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
 193         (mapping_symbol_for_insn): Implement new algorithm.
 194         (print_insn): Remove duplicate code.
 195
 196 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 197
 198         * aarch64-dis.c (print_insn_aarch64):
 199         Implement override.
 200
 201 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 202
 203         * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
 204         order.
 205
 206 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 207
 208         * aarch64-dis.c (last_stop_offset): New.
 209         (print_insn_aarch64): Use stop_offset.
 210
 211 2019-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 212
 213         PR gas/24359
 214         * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
 215         CPU_ANY_AVX2_FLAGS.
 216         * i386-init.h: Regenerated.
 217
 218 2019-03-18  H.J. Lu  <hongjiu.lu@intel.com>
 219
 220         PR gas/24348
 221         * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
 222         vmovdqu16, vmovdqu32 and vmovdqu64.
 223         * i386-tbl.h: Regenerated.
 224
 225 2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>
 226
 227         * s390-opc.txt: Rename selhhhr to selfhr.  Remove optional operand
 228         from vstrszb, vstrszh, and vstrszf.
 229
 230 2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>
 231
 232         * s390-opc.txt: Add instruction descriptions.
 233
 234 2019-02-08  Jim Wilson  <jimw@sifive.com>
 235
 236         * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
 237         <bne>: Likewise.
 238
 239 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
 240
 241         * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
 242
 243 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
 244
 245         PR binutils/23212
 246         * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
 247         * aarch64-opc.c (verify_elem_sd): New.
 248         (fields): Add FLD_sz entr.
 249         * aarch64-tbl.h (_SIMD_INSN): New.
 250         (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
 251         fmulx scalar and vector by element isns.
 252
 253 2019-02-07  Nick Clifton  <nickc@redhat.com>
 254
 255         * po/sv.po: Updated Swedish translation.
 256
 257 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 258
 259         * s390-mkopc.c (main): Accept arch13 as cpu string.
 260         * s390-opc.c: Add new instruction formats and instruction opcode
 261         masks.
 262         * s390-opc.txt: Add new arch13 instructions.
 263
 264 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 265
 266         * aarch64-tbl.h (QL_LDST_AT): Update macro.
 267         (aarch64_opcode): Change encoding for stg, stzg
 268         st2g and st2zg.
 269         * aarch64-asm-2.c: Regenerated.
 270         * aarch64-dis-2.c: Regenerated.
 271         * aarch64-opc-2.c: Regenerated.
 272
 273 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 274
 275         * aarch64-asm-2.c: Regenerated.
 276         * aarch64-dis-2.c: Likewise.
 277         * aarch64-opc-2.c: Likewise.
 278         * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
 279
 280 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 281             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 282
 283         * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
 284         * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
 285         * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
 286         * aarch64-dis.h (ext_addr_simple_2): Likewise.
 287         * aarch64-opc.c (operand_general_constraint_met_p): Remove
 288         case for ldstgv_indexed.
 289         (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
 290         * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
 291         (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
 292         * aarch64-asm-2.c: Regenerated.
 293         * aarch64-dis-2.c: Regenerated.
 294         * aarch64-opc-2.c: Regenerated.
 295
 296 2019-01-23  Nick Clifton  <nickc@redhat.com>
 297
 298         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 299
 300 2019-01-21  Nick Clifton  <nickc@redhat.com>
 301
 302         * po/de.po: Updated German translation.
 303         * po/uk.po: Updated Ukranian translation.
 304
 305 2019-01-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 306         * mips-dis.c (mips_arch_choices): Fix typo in
 307         gs464, gs464e and gs264e descriptors.
 308
 309 2019-01-19  Nick Clifton  <nickc@redhat.com>
 310
 311         * configure: Regenerate.
 312         * po/opcodes.pot: Regenerate.
 313
 314 2018-06-24  Nick Clifton  <nickc@redhat.com>
 315
 316         2.32 branch created.
 317
 318 2019-01-09  John Darrington <john@darrington.wattle.id.au>
 319
 320         * s12z-dis.c (print_insn_s12z):  Do not dereference an operand
 321         if it is null.
 322         -dis.c (opr_emit_disassembly): Do not omit an index if it is
 323         zero.
 324
 325 2019-01-09  Andrew Paprocki  <andrew@ishiboo.com>
 326
 327         * configure: Regenerate.
 328
 329 2019-01-07  Alan Modra  <amodra@gmail.com>
 330
 331         * configure: Regenerate.
 332         * po/POTFILES.in: Regenerate.
 333
 334 2019-01-03  John Darrington <john@darrington.wattle.id.au>
 335
 336         * s12z-opc.c: New file.
 337         * s12z-opc.h: New file.
 338         * s12z-dis.c: Removed all code not directly related to display
 339         of instructions.  Used the interface provided by the new files
 340         instead.
 341         * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
 342         * Makefile.in: Regenerate.
 343         * configure.ac (bfd_s12z_arch): Correct the dependencies.
 344         * configure: Regenerate.
 345
 346 2019-01-01  Alan Modra  <amodra@gmail.com>
 347
 348         Update year range in copyright notice of all files.
 349
 350 For older changes see ChangeLog-2018
 351 \f
 352 Copyright (C) 2019 Free Software Foundation, Inc.
 353
 354 Copying and distribution of this file, with or without modification,
 355 are permitted in any medium without royalty provided the copyright
 356 notice and this notice are preserved.
 357
 358 Local Variables:
 359 mode: change-log
 360 left-margin: 8
 361 fill-column: 74
 362 version-control: never
 363 End: