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1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2022 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "disassemble.h"
23 #include "safe-ctype.h"
24 #include "opintl.h"
25
26 #ifdef ARCH_all
27 #ifdef BFD64
28 #define ARCH_aarch64
29 #define ARCH_alpha
30 #define ARCH_bpf
31 #define ARCH_cris
32 #define ARCH_ia64
33 #define ARCH_loongarch
34 #define ARCH_mips
35 #define ARCH_mmix
36 #define ARCH_nfp
37 #define ARCH_riscv
38 #define ARCH_score
39 #define ARCH_tilegx
40 #endif
41 #define ARCH_arc
42 #define ARCH_arm
43 #define ARCH_avr
44 #define ARCH_bfin
45 #define ARCH_cr16
46 #define ARCH_crx
47 #define ARCH_csky
48 #define ARCH_d10v
49 #define ARCH_d30v
50 #define ARCH_dlx
51 #define ARCH_epiphany
52 #define ARCH_fr30
53 #define ARCH_frv
54 #define ARCH_ft32
55 #define ARCH_h8300
56 #define ARCH_hppa
57 #define ARCH_i386
58 #define ARCH_ip2k
59 #define ARCH_iq2000
60 #define ARCH_lm32
61 #define ARCH_m32c
62 #define ARCH_m32r
63 #define ARCH_m68hc11
64 #define ARCH_m68hc12
65 #define ARCH_m68k
66 #define ARCH_mcore
67 #define ARCH_mep
68 #define ARCH_metag
69 #define ARCH_microblaze
70 #define ARCH_mn10200
71 #define ARCH_mn10300
72 #define ARCH_moxie
73 #define ARCH_mt
74 #define ARCH_msp430
75 #define ARCH_nds32
76 #define ARCH_nios2
77 #define ARCH_ns32k
78 #define ARCH_or1k
79 #define ARCH_pdp11
80 #define ARCH_pj
81 #define ARCH_powerpc
82 #define ARCH_pru
83 #define ARCH_rs6000
84 #define ARCH_rl78
85 #define ARCH_rx
86 #define ARCH_s12z
87 #define ARCH_s390
88 #define ARCH_sh
89 #define ARCH_sparc
90 #define ARCH_spu
91 #define ARCH_tic30
92 #define ARCH_tic4x
93 #define ARCH_tic54x
94 #define ARCH_tic6x
95 #define ARCH_tilepro
96 #define ARCH_v850
97 #define ARCH_vax
98 #define ARCH_visium
99 #define ARCH_wasm32
100 #define ARCH_xstormy16
101 #define ARCH_xc16x
102 #define ARCH_xgate
103 #define ARCH_xtensa
104 #define ARCH_z80
105 #define ARCH_z8k
106 #endif
107
108 #ifdef ARCH_m32c
109 #include "m32c-desc.h"
110 #endif
111
112 #ifdef ARCH_bpf
113 /* XXX this should be including bpf-desc.h instead of this hackery,
114 but at the moment it is not possible to include several CGEN
115 generated *-desc.h files simultaneously. To be fixed in
116 CGEN... */
117
118 # ifdef ARCH_m32c
119 enum epbf_isa_attr
120 {
121 ISA_EBPFLE, ISA_EBPFBE, ISA_XBPFLE, ISA_XBPFBE, ISA_EBPFMAX
122 };
123 # else
124 # include "bpf-desc.h"
125 # define ISA_EBPFMAX ISA_MAX
126 # endif
127 #endif /* ARCH_bpf */
128
129 disassembler_ftype
130 disassembler (enum bfd_architecture a,
131 bool big ATTRIBUTE_UNUSED,
132 unsigned long mach ATTRIBUTE_UNUSED,
133 bfd *abfd ATTRIBUTE_UNUSED)
134 {
135 disassembler_ftype disassemble;
136
137 switch (a)
138 {
139 /* If you add a case to this table, also add it to the
140 ARCH_all definition right above this function. */
141 #ifdef ARCH_aarch64
142 case bfd_arch_aarch64:
143 disassemble = print_insn_aarch64;
144 break;
145 #endif
146 #ifdef ARCH_alpha
147 case bfd_arch_alpha:
148 disassemble = print_insn_alpha;
149 break;
150 #endif
151 #ifdef ARCH_arc
152 case bfd_arch_arc:
153 disassemble = arc_get_disassembler (abfd);
154 break;
155 #endif
156 #ifdef ARCH_arm
157 case bfd_arch_arm:
158 if (big)
159 disassemble = print_insn_big_arm;
160 else
161 disassemble = print_insn_little_arm;
162 break;
163 #endif
164 #ifdef ARCH_avr
165 case bfd_arch_avr:
166 disassemble = print_insn_avr;
167 break;
168 #endif
169 #ifdef ARCH_bfin
170 case bfd_arch_bfin:
171 disassemble = print_insn_bfin;
172 break;
173 #endif
174 #ifdef ARCH_cr16
175 case bfd_arch_cr16:
176 disassemble = print_insn_cr16;
177 break;
178 #endif
179 #ifdef ARCH_cris
180 case bfd_arch_cris:
181 disassemble = cris_get_disassembler (abfd);
182 break;
183 #endif
184 #ifdef ARCH_crx
185 case bfd_arch_crx:
186 disassemble = print_insn_crx;
187 break;
188 #endif
189 #ifdef ARCH_csky
190 case bfd_arch_csky:
191 disassemble = csky_get_disassembler (abfd);
192 break;
193 #endif
194
195 #ifdef ARCH_d10v
196 case bfd_arch_d10v:
197 disassemble = print_insn_d10v;
198 break;
199 #endif
200 #ifdef ARCH_d30v
201 case bfd_arch_d30v:
202 disassemble = print_insn_d30v;
203 break;
204 #endif
205 #ifdef ARCH_dlx
206 case bfd_arch_dlx:
207 /* As far as I know we only handle big-endian DLX objects. */
208 disassemble = print_insn_dlx;
209 break;
210 #endif
211 #ifdef ARCH_h8300
212 case bfd_arch_h8300:
213 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
214 disassemble = print_insn_h8300h;
215 else if (mach == bfd_mach_h8300s
216 || mach == bfd_mach_h8300sn
217 || mach == bfd_mach_h8300sx
218 || mach == bfd_mach_h8300sxn)
219 disassemble = print_insn_h8300s;
220 else
221 disassemble = print_insn_h8300;
222 break;
223 #endif
224 #ifdef ARCH_hppa
225 case bfd_arch_hppa:
226 disassemble = print_insn_hppa;
227 break;
228 #endif
229 #ifdef ARCH_i386
230 case bfd_arch_i386:
231 case bfd_arch_iamcu:
232 case bfd_arch_l1om:
233 case bfd_arch_k1om:
234 disassemble = print_insn_i386;
235 break;
236 #endif
237 #ifdef ARCH_ia64
238 case bfd_arch_ia64:
239 disassemble = print_insn_ia64;
240 break;
241 #endif
242 #ifdef ARCH_ip2k
243 case bfd_arch_ip2k:
244 disassemble = print_insn_ip2k;
245 break;
246 #endif
247 #ifdef ARCH_bpf
248 case bfd_arch_bpf:
249 disassemble = print_insn_bpf;
250 break;
251 #endif
252 #ifdef ARCH_epiphany
253 case bfd_arch_epiphany:
254 disassemble = print_insn_epiphany;
255 break;
256 #endif
257 #ifdef ARCH_fr30
258 case bfd_arch_fr30:
259 disassemble = print_insn_fr30;
260 break;
261 #endif
262 #ifdef ARCH_lm32
263 case bfd_arch_lm32:
264 disassemble = print_insn_lm32;
265 break;
266 #endif
267 #ifdef ARCH_m32r
268 case bfd_arch_m32r:
269 disassemble = print_insn_m32r;
270 break;
271 #endif
272 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
273 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
274 case bfd_arch_m68hc11:
275 disassemble = print_insn_m68hc11;
276 break;
277 case bfd_arch_m68hc12:
278 disassemble = print_insn_m68hc12;
279 break;
280 case bfd_arch_m9s12x:
281 disassemble = print_insn_m9s12x;
282 break;
283 case bfd_arch_m9s12xg:
284 disassemble = print_insn_m9s12xg;
285 break;
286 #endif
287 #if defined(ARCH_s12z)
288 case bfd_arch_s12z:
289 disassemble = print_insn_s12z;
290 break;
291 #endif
292 #ifdef ARCH_m68k
293 case bfd_arch_m68k:
294 disassemble = print_insn_m68k;
295 break;
296 #endif
297 #ifdef ARCH_mt
298 case bfd_arch_mt:
299 disassemble = print_insn_mt;
300 break;
301 #endif
302 #ifdef ARCH_microblaze
303 case bfd_arch_microblaze:
304 disassemble = print_insn_microblaze;
305 break;
306 #endif
307 #ifdef ARCH_msp430
308 case bfd_arch_msp430:
309 disassemble = print_insn_msp430;
310 break;
311 #endif
312 #ifdef ARCH_nds32
313 case bfd_arch_nds32:
314 disassemble = print_insn_nds32;
315 break;
316 #endif
317 #ifdef ARCH_nfp
318 case bfd_arch_nfp:
319 disassemble = print_insn_nfp;
320 break;
321 #endif
322 #ifdef ARCH_ns32k
323 case bfd_arch_ns32k:
324 disassemble = print_insn_ns32k;
325 break;
326 #endif
327 #ifdef ARCH_mcore
328 case bfd_arch_mcore:
329 disassemble = print_insn_mcore;
330 break;
331 #endif
332 #ifdef ARCH_mep
333 case bfd_arch_mep:
334 disassemble = print_insn_mep;
335 break;
336 #endif
337 #ifdef ARCH_metag
338 case bfd_arch_metag:
339 disassemble = print_insn_metag;
340 break;
341 #endif
342 #ifdef ARCH_mips
343 case bfd_arch_mips:
344 if (big)
345 disassemble = print_insn_big_mips;
346 else
347 disassemble = print_insn_little_mips;
348 break;
349 #endif
350 #ifdef ARCH_mmix
351 case bfd_arch_mmix:
352 disassemble = print_insn_mmix;
353 break;
354 #endif
355 #ifdef ARCH_mn10200
356 case bfd_arch_mn10200:
357 disassemble = print_insn_mn10200;
358 break;
359 #endif
360 #ifdef ARCH_mn10300
361 case bfd_arch_mn10300:
362 disassemble = print_insn_mn10300;
363 break;
364 #endif
365 #ifdef ARCH_nios2
366 case bfd_arch_nios2:
367 if (big)
368 disassemble = print_insn_big_nios2;
369 else
370 disassemble = print_insn_little_nios2;
371 break;
372 #endif
373 #ifdef ARCH_or1k
374 case bfd_arch_or1k:
375 disassemble = print_insn_or1k;
376 break;
377 #endif
378 #ifdef ARCH_pdp11
379 case bfd_arch_pdp11:
380 disassemble = print_insn_pdp11;
381 break;
382 #endif
383 #ifdef ARCH_pj
384 case bfd_arch_pj:
385 disassemble = print_insn_pj;
386 break;
387 #endif
388 #ifdef ARCH_powerpc
389 case bfd_arch_powerpc:
390 #endif
391 #ifdef ARCH_rs6000
392 case bfd_arch_rs6000:
393 #endif
394 #if defined ARCH_powerpc || defined ARCH_rs6000
395 if (big)
396 disassemble = print_insn_big_powerpc;
397 else
398 disassemble = print_insn_little_powerpc;
399 break;
400 #endif
401 #ifdef ARCH_pru
402 case bfd_arch_pru:
403 disassemble = print_insn_pru;
404 break;
405 #endif
406 #ifdef ARCH_riscv
407 case bfd_arch_riscv:
408 disassemble = riscv_get_disassembler (abfd);
409 break;
410 #endif
411 #ifdef ARCH_rl78
412 case bfd_arch_rl78:
413 disassemble = rl78_get_disassembler (abfd);
414 break;
415 #endif
416 #ifdef ARCH_rx
417 case bfd_arch_rx:
418 disassemble = print_insn_rx;
419 break;
420 #endif
421 #ifdef ARCH_s390
422 case bfd_arch_s390:
423 disassemble = print_insn_s390;
424 break;
425 #endif
426 #ifdef ARCH_score
427 case bfd_arch_score:
428 if (big)
429 disassemble = print_insn_big_score;
430 else
431 disassemble = print_insn_little_score;
432 break;
433 #endif
434 #ifdef ARCH_sh
435 case bfd_arch_sh:
436 disassemble = print_insn_sh;
437 break;
438 #endif
439 #ifdef ARCH_sparc
440 case bfd_arch_sparc:
441 disassemble = print_insn_sparc;
442 break;
443 #endif
444 #ifdef ARCH_spu
445 case bfd_arch_spu:
446 disassemble = print_insn_spu;
447 break;
448 #endif
449 #ifdef ARCH_tic30
450 case bfd_arch_tic30:
451 disassemble = print_insn_tic30;
452 break;
453 #endif
454 #ifdef ARCH_tic4x
455 case bfd_arch_tic4x:
456 disassemble = print_insn_tic4x;
457 break;
458 #endif
459 #ifdef ARCH_tic54x
460 case bfd_arch_tic54x:
461 disassemble = print_insn_tic54x;
462 break;
463 #endif
464 #ifdef ARCH_tic6x
465 case bfd_arch_tic6x:
466 disassemble = print_insn_tic6x;
467 break;
468 #endif
469 #ifdef ARCH_ft32
470 case bfd_arch_ft32:
471 disassemble = print_insn_ft32;
472 break;
473 #endif
474 #ifdef ARCH_v850
475 case bfd_arch_v850:
476 case bfd_arch_v850_rh850:
477 disassemble = print_insn_v850;
478 break;
479 #endif
480 #ifdef ARCH_wasm32
481 case bfd_arch_wasm32:
482 disassemble = print_insn_wasm32;
483 break;
484 #endif
485 #ifdef ARCH_xgate
486 case bfd_arch_xgate:
487 disassemble = print_insn_xgate;
488 break;
489 #endif
490 #ifdef ARCH_xstormy16
491 case bfd_arch_xstormy16:
492 disassemble = print_insn_xstormy16;
493 break;
494 #endif
495 #ifdef ARCH_xc16x
496 case bfd_arch_xc16x:
497 disassemble = print_insn_xc16x;
498 break;
499 #endif
500 #ifdef ARCH_xtensa
501 case bfd_arch_xtensa:
502 disassemble = print_insn_xtensa;
503 break;
504 #endif
505 #ifdef ARCH_z80
506 case bfd_arch_z80:
507 disassemble = print_insn_z80;
508 break;
509 #endif
510 #ifdef ARCH_z8k
511 case bfd_arch_z8k:
512 if (mach == bfd_mach_z8001)
513 disassemble = print_insn_z8001;
514 else
515 disassemble = print_insn_z8002;
516 break;
517 #endif
518 #ifdef ARCH_vax
519 case bfd_arch_vax:
520 disassemble = print_insn_vax;
521 break;
522 #endif
523 #ifdef ARCH_visium
524 case bfd_arch_visium:
525 disassemble = print_insn_visium;
526 break;
527 #endif
528 #ifdef ARCH_frv
529 case bfd_arch_frv:
530 disassemble = print_insn_frv;
531 break;
532 #endif
533 #ifdef ARCH_moxie
534 case bfd_arch_moxie:
535 disassemble = print_insn_moxie;
536 break;
537 #endif
538 #ifdef ARCH_iq2000
539 case bfd_arch_iq2000:
540 disassemble = print_insn_iq2000;
541 break;
542 #endif
543 #ifdef ARCH_m32c
544 case bfd_arch_m32c:
545 disassemble = print_insn_m32c;
546 break;
547 #endif
548 #ifdef ARCH_tilegx
549 case bfd_arch_tilegx:
550 disassemble = print_insn_tilegx;
551 break;
552 #endif
553 #ifdef ARCH_tilepro
554 case bfd_arch_tilepro:
555 disassemble = print_insn_tilepro;
556 break;
557 #endif
558 #ifdef ARCH_loongarch
559 case bfd_arch_loongarch:
560 disassemble = print_insn_loongarch;
561 break;
562 #endif
563 default:
564 return 0;
565 }
566 return disassemble;
567 }
568
569 void
570 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
571 {
572 #ifdef ARCH_aarch64
573 print_aarch64_disassembler_options (stream);
574 #endif
575 #ifdef ARCH_arc
576 print_arc_disassembler_options (stream);
577 #endif
578 #ifdef ARCH_arm
579 print_arm_disassembler_options (stream);
580 #endif
581 #ifdef ARCH_mips
582 print_mips_disassembler_options (stream);
583 #endif
584 #ifdef ARCH_nfp
585 print_nfp_disassembler_options (stream);
586 #endif
587 #ifdef ARCH_powerpc
588 print_ppc_disassembler_options (stream);
589 #endif
590 #ifdef ARCH_riscv
591 print_riscv_disassembler_options (stream);
592 #endif
593 #ifdef ARCH_i386
594 print_i386_disassembler_options (stream);
595 #endif
596 #ifdef ARCH_s390
597 print_s390_disassembler_options (stream);
598 #endif
599 #ifdef ARCH_wasm32
600 print_wasm32_disassembler_options (stream);
601 #endif
602 #ifdef ARCH_loongarch
603 print_loongarch_disassembler_options (stream);
604 #endif
605
606 return;
607 }
608
609 void
610 disassemble_init_for_target (struct disassemble_info * info)
611 {
612 if (info == NULL)
613 return;
614
615 switch (info->arch)
616 {
617 #ifdef ARCH_aarch64
618 case bfd_arch_aarch64:
619 info->symbol_is_valid = aarch64_symbol_is_valid;
620 info->disassembler_needs_relocs = true;
621 break;
622 #endif
623 #ifdef ARCH_arm
624 case bfd_arch_arm:
625 info->symbol_is_valid = arm_symbol_is_valid;
626 info->disassembler_needs_relocs = true;
627 break;
628 #endif
629 #ifdef ARCH_csky
630 case bfd_arch_csky:
631 info->symbol_is_valid = csky_symbol_is_valid;
632 info->disassembler_needs_relocs = true;
633 break;
634 #endif
635
636 #ifdef ARCH_ia64
637 case bfd_arch_ia64:
638 info->skip_zeroes = 16;
639 break;
640 #endif
641 #ifdef ARCH_tic4x
642 case bfd_arch_tic4x:
643 info->skip_zeroes = 32;
644 break;
645 #endif
646 #ifdef ARCH_mep
647 case bfd_arch_mep:
648 info->skip_zeroes = 256;
649 info->skip_zeroes_at_end = 0;
650 break;
651 #endif
652 #ifdef ARCH_metag
653 case bfd_arch_metag:
654 info->disassembler_needs_relocs = true;
655 break;
656 #endif
657 #ifdef ARCH_m32c
658 case bfd_arch_m32c:
659 /* This processor in fact is little endian. The value set here
660 reflects the way opcodes are written in the cgen description. */
661 info->endian = BFD_ENDIAN_BIG;
662 if (!info->private_data)
663 {
664 info->private_data = cgen_bitset_create (ISA_MAX);
665 if (info->mach == bfd_mach_m16c)
666 cgen_bitset_set (info->private_data, ISA_M16C);
667 else
668 cgen_bitset_set (info->private_data, ISA_M32C);
669 }
670 break;
671 #endif
672 #ifdef ARCH_bpf
673 case bfd_arch_bpf:
674 info->endian_code = BFD_ENDIAN_LITTLE;
675 if (!info->private_data)
676 {
677 info->private_data = cgen_bitset_create (ISA_MAX);
678 if (info->endian == BFD_ENDIAN_BIG)
679 {
680 cgen_bitset_set (info->private_data, ISA_EBPFBE);
681 if (info->mach == bfd_mach_xbpf)
682 cgen_bitset_set (info->private_data, ISA_XBPFBE);
683 }
684 else
685 {
686 cgen_bitset_set (info->private_data, ISA_EBPFLE);
687 if (info->mach == bfd_mach_xbpf)
688 cgen_bitset_set (info->private_data, ISA_XBPFLE);
689 }
690 }
691 break;
692 #endif
693 #ifdef ARCH_pru
694 case bfd_arch_pru:
695 info->disassembler_needs_relocs = true;
696 break;
697 #endif
698 #ifdef ARCH_powerpc
699 case bfd_arch_powerpc:
700 #endif
701 #ifdef ARCH_rs6000
702 case bfd_arch_rs6000:
703 #endif
704 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
705 disassemble_init_powerpc (info);
706 break;
707 #endif
708 #ifdef ARCH_riscv
709 case bfd_arch_riscv:
710 info->symbol_is_valid = riscv_symbol_is_valid;
711 break;
712 #endif
713 #ifdef ARCH_wasm32
714 case bfd_arch_wasm32:
715 disassemble_init_wasm32 (info);
716 break;
717 #endif
718 #ifdef ARCH_s390
719 case bfd_arch_s390:
720 disassemble_init_s390 (info);
721 break;
722 #endif
723 #ifdef ARCH_nds32
724 case bfd_arch_nds32:
725 disassemble_init_nds32 (info);
726 break;
727 #endif
728 default:
729 break;
730 }
731 }
732
733 void
734 disassemble_free_target (struct disassemble_info *info)
735 {
736 if (info == NULL)
737 return;
738
739 switch (info->arch)
740 {
741 default:
742 return;
743
744 #ifdef ARCH_bpf
745 case bfd_arch_bpf:
746 #endif
747 #ifdef ARCH_m32c
748 case bfd_arch_m32c:
749 #endif
750 #if defined ARCH_bpf || defined ARCH_m32c
751 if (info->private_data)
752 {
753 CGEN_BITSET *mask = info->private_data;
754 free (mask->bits);
755 }
756 break;
757 #endif
758
759 #ifdef ARCH_arc
760 case bfd_arch_arc:
761 break;
762 #endif
763 #ifdef ARCH_cris
764 case bfd_arch_cris:
765 break;
766 #endif
767 #ifdef ARCH_mmix
768 case bfd_arch_mmix:
769 break;
770 #endif
771 #ifdef ARCH_nfp
772 case bfd_arch_nfp:
773 break;
774 #endif
775 #ifdef ARCH_powerpc
776 case bfd_arch_powerpc:
777 break;
778 #endif
779 #ifdef ARCH_riscv
780 case bfd_arch_riscv:
781 break;
782 #endif
783 #ifdef ARCH_rs6000
784 case bfd_arch_rs6000:
785 break;
786 #endif
787 }
788
789 free (info->private_data);
790 }
791
792 /* Remove whitespace and consecutive commas from OPTIONS. */
793
794 char *
795 remove_whitespace_and_extra_commas (char *options)
796 {
797 char *str;
798 size_t i, len;
799
800 if (options == NULL)
801 return NULL;
802
803 /* Strip off all trailing whitespace and commas. */
804 for (len = strlen (options); len > 0; len--)
805 {
806 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
807 break;
808 options[len - 1] = '\0';
809 }
810
811 /* Convert all remaining whitespace to commas. */
812 for (i = 0; options[i] != '\0'; i++)
813 if (ISSPACE (options[i]))
814 options[i] = ',';
815
816 /* Remove consecutive commas. */
817 for (str = options; *str != '\0'; str++)
818 if (*str == ',' && (*(str + 1) == ',' || str == options))
819 {
820 char *next = str + 1;
821 while (*next == ',')
822 next++;
823 len = strlen (next);
824 if (str != options)
825 str++;
826 memmove (str, next, len);
827 next[len - (size_t)(next - str)] = '\0';
828 }
829 return (strlen (options) != 0) ? options : NULL;
830 }
831
832 /* Like STRCMP, but treat ',' the same as '\0' so that we match
833 strings like "foobar" against "foobar,xxyyzz,...". */
834
835 int
836 disassembler_options_cmp (const char *s1, const char *s2)
837 {
838 unsigned char c1, c2;
839
840 do
841 {
842 c1 = (unsigned char) *s1++;
843 if (c1 == ',')
844 c1 = '\0';
845 c2 = (unsigned char) *s2++;
846 if (c2 == ',')
847 c2 = '\0';
848 if (c1 == '\0')
849 return c1 - c2;
850 }
851 while (c1 == c2);
852
853 return c1 - c2;
854 }
855
856 void
857 opcodes_assert (const char *file, int line)
858 {
859 opcodes_error_handler (_("assertion fail %s:%d"), file, line);
860 opcodes_error_handler (_("Please report this bug"));
861 abort ();
862 }