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1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for m32c. -*- C -*-
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
6
7 Copyright (C) 1996-2020 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "cgen/basic-modes.h"
37 #include "opintl.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
47
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61 #if CGEN_INT_INSN_P
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64 #endif
65 #if ! CGEN_INT_INSN_P
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72 #endif
73 \f
74 /* Operand insertion. */
75
76 #if ! CGEN_INT_INSN_P
77
78 /* Subroutine of insert_normal. */
79
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87 {
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102 }
103
104 #endif /* ! CGEN_INT_INSN_P */
105
106 /* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122 static const char *
123 insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132 {
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208 #if CGEN_INT_INSN_P
209
210 {
211 int shift_within_word, shift_to_word, shift;
212
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P)
218 shift_within_word = start + 1 - length;
219 else
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227 #else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235 #endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238 }
239
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247 static const char *
248 insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
253 {
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264 #if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269 #else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275 #endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296 }
297
298 #if CGEN_INT_INSN_P
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
301
302 static void
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
308 {
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
318
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321 }
322 #endif
323 \f
324 /* Operand extraction. */
325
326 #if ! CGEN_INT_INSN_P
327
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334 static CGEN_INLINE int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
340 {
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374 }
375
376 /* Subroutine of extract_normal. */
377
378 static CGEN_INLINE long
379 extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
386 {
387 unsigned long x;
388 int shift;
389
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397 }
398
399 #endif /* ! CGEN_INT_INSN_P */
400
401 /* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416 /* ??? The return code isn't properly used. wip. */
417
418 /* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421 static int
422 extract_normal (CGEN_CPU_DESC cd,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
425 #else
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
427 #endif
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
435 #if ! CGEN_INT_INSN_P
436 bfd_vma pc,
437 #else
438 bfd_vma pc ATTRIBUTE_UNUSED,
439 #endif
440 long *valuep)
441 {
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473 #if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 {
484 *valuep = 0;
485 return 0;
486 }
487
488 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
489 }
490
491 #endif /* ! CGEN_INT_INSN_P */
492
493 /* Written this way to avoid undefined behaviour. */
494 mask = (((1L << (length - 1)) - 1) << 1) | 1;
495
496 value &= mask;
497 /* sign extend? */
498 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
499 && (value & (1L << (length - 1))))
500 value |= ~mask;
501
502 *valuep = value;
503
504 return 1;
505 }
506
507 /* Default insn extractor.
508
509 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
510 The extracted fields are stored in FIELDS.
511 EX_INFO is used to handle reading variable length insns.
512 Return the length of the insn in bits, or 0 if no match,
513 or -1 if an error occurs fetching data (memory_error_func will have
514 been called). */
515
516 static int
517 extract_insn_normal (CGEN_CPU_DESC cd,
518 const CGEN_INSN *insn,
519 CGEN_EXTRACT_INFO *ex_info,
520 CGEN_INSN_INT insn_value,
521 CGEN_FIELDS *fields,
522 bfd_vma pc)
523 {
524 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
525 const CGEN_SYNTAX_CHAR_TYPE *syn;
526
527 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
528
529 CGEN_INIT_EXTRACT (cd);
530
531 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
532 {
533 int length;
534
535 if (CGEN_SYNTAX_CHAR_P (*syn))
536 continue;
537
538 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
539 ex_info, insn_value, fields, pc);
540 if (length <= 0)
541 return length;
542 }
543
544 /* We recognized and successfully extracted this insn. */
545 return CGEN_INSN_BITSIZE (insn);
546 }
547 \f
548 /* Machine generated code added here. */
549
550 const char * m32c_cgen_insert_operand
551 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
552
553 /* Main entry point for operand insertion.
554
555 This function is basically just a big switch statement. Earlier versions
556 used tables to look up the function to use, but
557 - if the table contains both assembler and disassembler functions then
558 the disassembler contains much of the assembler and vice-versa,
559 - there's a lot of inlining possibilities as things grow,
560 - using a switch statement avoids the function call overhead.
561
562 This function could be moved into `parse_insn_normal', but keeping it
563 separate makes clear the interface between `parse_insn_normal' and each of
564 the handlers. It's also needed by GAS to insert operands that couldn't be
565 resolved during parsing. */
566
567 const char *
568 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
569 int opindex,
570 CGEN_FIELDS * fields,
571 CGEN_INSN_BYTES_PTR buffer,
572 bfd_vma pc ATTRIBUTE_UNUSED)
573 {
574 const char * errmsg = NULL;
575 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
576
577 switch (opindex)
578 {
579 case M32C_OPERAND_A0 :
580 break;
581 case M32C_OPERAND_A1 :
582 break;
583 case M32C_OPERAND_AN16_PUSH_S :
584 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
585 break;
586 case M32C_OPERAND_BIT16AN :
587 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
588 break;
589 case M32C_OPERAND_BIT16RN :
590 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
591 break;
592 case M32C_OPERAND_BIT3_S :
593 {
594 {
595 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
596 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
597 }
598 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
599 if (errmsg)
600 break;
601 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
602 if (errmsg)
603 break;
604 }
605 break;
606 case M32C_OPERAND_BIT32ANPREFIXED :
607 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
608 break;
609 case M32C_OPERAND_BIT32ANUNPREFIXED :
610 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
611 break;
612 case M32C_OPERAND_BIT32RNPREFIXED :
613 {
614 long value = fields->f_dst32_rn_prefixed_QI;
615 value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
616 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
617 }
618 break;
619 case M32C_OPERAND_BIT32RNUNPREFIXED :
620 {
621 long value = fields->f_dst32_rn_unprefixed_QI;
622 value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
623 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
624 }
625 break;
626 case M32C_OPERAND_BITBASE16_16_S8 :
627 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
628 break;
629 case M32C_OPERAND_BITBASE16_16_U16 :
630 {
631 long value = fields->f_dsp_16_u16;
632 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
633 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
634 }
635 break;
636 case M32C_OPERAND_BITBASE16_16_U8 :
637 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
638 break;
639 case M32C_OPERAND_BITBASE16_8_U11_S :
640 {
641 {
642 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
643 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
644 }
645 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
646 if (errmsg)
647 break;
648 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
649 if (errmsg)
650 break;
651 }
652 break;
653 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
654 {
655 {
656 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
657 FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
658 }
659 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
660 if (errmsg)
661 break;
662 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
663 if (errmsg)
664 break;
665 }
666 break;
667 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
668 {
669 {
670 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
671 FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
672 }
673 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
674 if (errmsg)
675 break;
676 {
677 long value = fields->f_dsp_16_s16;
678 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
679 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
680 }
681 if (errmsg)
682 break;
683 }
684 break;
685 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
686 {
687 {
688 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
689 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
690 }
691 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
692 if (errmsg)
693 break;
694 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
695 if (errmsg)
696 break;
697 }
698 break;
699 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
700 {
701 {
702 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
703 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
704 }
705 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
706 if (errmsg)
707 break;
708 {
709 long value = fields->f_dsp_16_u16;
710 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
711 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
712 }
713 if (errmsg)
714 break;
715 }
716 break;
717 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
718 {
719 {
720 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
721 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
722 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
723 }
724 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
725 if (errmsg)
726 break;
727 {
728 long value = fields->f_dsp_16_u16;
729 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
730 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
731 }
732 if (errmsg)
733 break;
734 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
735 if (errmsg)
736 break;
737 }
738 break;
739 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
740 {
741 {
742 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
743 FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
744 }
745 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
746 if (errmsg)
747 break;
748 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
749 if (errmsg)
750 break;
751 }
752 break;
753 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
754 {
755 {
756 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
757 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
758 FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
759 }
760 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
761 if (errmsg)
762 break;
763 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
764 if (errmsg)
765 break;
766 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
767 if (errmsg)
768 break;
769 }
770 break;
771 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
772 {
773 {
774 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
775 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
776 }
777 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
778 if (errmsg)
779 break;
780 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
781 if (errmsg)
782 break;
783 }
784 break;
785 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
786 {
787 {
788 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
789 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
790 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
791 }
792 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
793 if (errmsg)
794 break;
795 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
796 if (errmsg)
797 break;
798 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
799 if (errmsg)
800 break;
801 }
802 break;
803 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
804 {
805 {
806 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
807 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
808 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
809 }
810 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
811 if (errmsg)
812 break;
813 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
814 if (errmsg)
815 break;
816 {
817 long value = fields->f_dsp_32_u16;
818 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
819 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
820 }
821 if (errmsg)
822 break;
823 }
824 break;
825 case M32C_OPERAND_BITNO16R :
826 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
827 break;
828 case M32C_OPERAND_BITNO32PREFIXED :
829 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
830 break;
831 case M32C_OPERAND_BITNO32UNPREFIXED :
832 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
833 break;
834 case M32C_OPERAND_DSP_10_U6 :
835 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
836 break;
837 case M32C_OPERAND_DSP_16_S16 :
838 {
839 long value = fields->f_dsp_16_s16;
840 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
841 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
842 }
843 break;
844 case M32C_OPERAND_DSP_16_S8 :
845 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
846 break;
847 case M32C_OPERAND_DSP_16_U16 :
848 {
849 long value = fields->f_dsp_16_u16;
850 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
851 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
852 }
853 break;
854 case M32C_OPERAND_DSP_16_U20 :
855 {
856 {
857 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
858 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
859 }
860 {
861 long value = fields->f_dsp_16_u16;
862 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
863 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
864 }
865 if (errmsg)
866 break;
867 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
868 if (errmsg)
869 break;
870 }
871 break;
872 case M32C_OPERAND_DSP_16_U24 :
873 {
874 {
875 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
876 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
877 }
878 {
879 long value = fields->f_dsp_16_u16;
880 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
881 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
882 }
883 if (errmsg)
884 break;
885 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
886 if (errmsg)
887 break;
888 }
889 break;
890 case M32C_OPERAND_DSP_16_U8 :
891 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
892 break;
893 case M32C_OPERAND_DSP_24_S16 :
894 {
895 {
896 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
897 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
898 }
899 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
900 if (errmsg)
901 break;
902 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
903 if (errmsg)
904 break;
905 }
906 break;
907 case M32C_OPERAND_DSP_24_S8 :
908 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
909 break;
910 case M32C_OPERAND_DSP_24_U16 :
911 {
912 {
913 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
914 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255));
915 }
916 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
917 if (errmsg)
918 break;
919 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
920 if (errmsg)
921 break;
922 }
923 break;
924 case M32C_OPERAND_DSP_24_U20 :
925 {
926 {
927 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
928 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
929 }
930 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
931 if (errmsg)
932 break;
933 {
934 long value = fields->f_dsp_32_u16;
935 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
936 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
937 }
938 if (errmsg)
939 break;
940 }
941 break;
942 case M32C_OPERAND_DSP_24_U24 :
943 {
944 {
945 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
946 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
947 }
948 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
949 if (errmsg)
950 break;
951 {
952 long value = fields->f_dsp_32_u16;
953 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
954 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
955 }
956 if (errmsg)
957 break;
958 }
959 break;
960 case M32C_OPERAND_DSP_24_U8 :
961 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
962 break;
963 case M32C_OPERAND_DSP_32_S16 :
964 {
965 long value = fields->f_dsp_32_s16;
966 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
967 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
968 }
969 break;
970 case M32C_OPERAND_DSP_32_S8 :
971 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
972 break;
973 case M32C_OPERAND_DSP_32_U16 :
974 {
975 long value = fields->f_dsp_32_u16;
976 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
977 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
978 }
979 break;
980 case M32C_OPERAND_DSP_32_U20 :
981 {
982 long value = fields->f_dsp_32_u24;
983 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
984 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
985 }
986 break;
987 case M32C_OPERAND_DSP_32_U24 :
988 {
989 long value = fields->f_dsp_32_u24;
990 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
991 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
992 }
993 break;
994 case M32C_OPERAND_DSP_32_U8 :
995 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
996 break;
997 case M32C_OPERAND_DSP_40_S16 :
998 {
999 long value = fields->f_dsp_40_s16;
1000 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1001 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1002 }
1003 break;
1004 case M32C_OPERAND_DSP_40_S8 :
1005 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1006 break;
1007 case M32C_OPERAND_DSP_40_U16 :
1008 {
1009 long value = fields->f_dsp_40_u16;
1010 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1011 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1012 }
1013 break;
1014 case M32C_OPERAND_DSP_40_U20 :
1015 {
1016 long value = fields->f_dsp_40_u20;
1017 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
1018 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
1019 }
1020 break;
1021 case M32C_OPERAND_DSP_40_U24 :
1022 {
1023 long value = fields->f_dsp_40_u24;
1024 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1025 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1026 }
1027 break;
1028 case M32C_OPERAND_DSP_40_U8 :
1029 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1030 break;
1031 case M32C_OPERAND_DSP_48_S16 :
1032 {
1033 long value = fields->f_dsp_48_s16;
1034 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1035 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1036 }
1037 break;
1038 case M32C_OPERAND_DSP_48_S8 :
1039 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1040 break;
1041 case M32C_OPERAND_DSP_48_U16 :
1042 {
1043 long value = fields->f_dsp_48_u16;
1044 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1045 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1046 }
1047 break;
1048 case M32C_OPERAND_DSP_48_U20 :
1049 {
1050 {
1051 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15));
1052 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
1053 }
1054 {
1055 long value = fields->f_dsp_48_u16;
1056 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1057 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1058 }
1059 if (errmsg)
1060 break;
1061 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1062 if (errmsg)
1063 break;
1064 }
1065 break;
1066 case M32C_OPERAND_DSP_48_U24 :
1067 {
1068 {
1069 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1070 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1071 }
1072 {
1073 long value = fields->f_dsp_48_u16;
1074 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1075 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1076 }
1077 if (errmsg)
1078 break;
1079 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1080 if (errmsg)
1081 break;
1082 }
1083 break;
1084 case M32C_OPERAND_DSP_48_U8 :
1085 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1086 break;
1087 case M32C_OPERAND_DSP_8_S24 :
1088 {
1089 long value = fields->f_dsp_8_s24;
1090 value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608));
1091 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1092 }
1093 break;
1094 case M32C_OPERAND_DSP_8_S8 :
1095 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1096 break;
1097 case M32C_OPERAND_DSP_8_U16 :
1098 {
1099 long value = fields->f_dsp_8_u16;
1100 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1101 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1102 }
1103 break;
1104 case M32C_OPERAND_DSP_8_U24 :
1105 {
1106 long value = fields->f_dsp_8_u24;
1107 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1108 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1109 }
1110 break;
1111 case M32C_OPERAND_DSP_8_U6 :
1112 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1113 break;
1114 case M32C_OPERAND_DSP_8_U8 :
1115 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1116 break;
1117 case M32C_OPERAND_DST16AN :
1118 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1119 break;
1120 case M32C_OPERAND_DST16AN_S :
1121 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1122 break;
1123 case M32C_OPERAND_DST16ANHI :
1124 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1125 break;
1126 case M32C_OPERAND_DST16ANQI :
1127 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1128 break;
1129 case M32C_OPERAND_DST16ANQI_S :
1130 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1131 break;
1132 case M32C_OPERAND_DST16ANSI :
1133 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1134 break;
1135 case M32C_OPERAND_DST16RNEXTQI :
1136 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1137 break;
1138 case M32C_OPERAND_DST16RNHI :
1139 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1140 break;
1141 case M32C_OPERAND_DST16RNQI :
1142 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1143 break;
1144 case M32C_OPERAND_DST16RNQI_S :
1145 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1146 break;
1147 case M32C_OPERAND_DST16RNSI :
1148 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1149 break;
1150 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1151 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1152 break;
1153 case M32C_OPERAND_DST32ANPREFIXED :
1154 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1155 break;
1156 case M32C_OPERAND_DST32ANPREFIXEDHI :
1157 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1158 break;
1159 case M32C_OPERAND_DST32ANPREFIXEDQI :
1160 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1161 break;
1162 case M32C_OPERAND_DST32ANPREFIXEDSI :
1163 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1164 break;
1165 case M32C_OPERAND_DST32ANUNPREFIXED :
1166 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1167 break;
1168 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1169 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1170 break;
1171 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1172 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1173 break;
1174 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1175 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1176 break;
1177 case M32C_OPERAND_DST32R0HI_S :
1178 break;
1179 case M32C_OPERAND_DST32R0QI_S :
1180 break;
1181 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1182 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1183 break;
1184 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1185 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1186 break;
1187 case M32C_OPERAND_DST32RNPREFIXEDHI :
1188 {
1189 long value = fields->f_dst32_rn_prefixed_HI;
1190 value = ((((value) + (2))) % (4));
1191 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1192 }
1193 break;
1194 case M32C_OPERAND_DST32RNPREFIXEDQI :
1195 {
1196 long value = fields->f_dst32_rn_prefixed_QI;
1197 value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1198 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1199 }
1200 break;
1201 case M32C_OPERAND_DST32RNPREFIXEDSI :
1202 {
1203 long value = fields->f_dst32_rn_prefixed_SI;
1204 value = ((value) + (2));
1205 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1206 }
1207 break;
1208 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1209 {
1210 long value = fields->f_dst32_rn_unprefixed_HI;
1211 value = ((((value) + (2))) % (4));
1212 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1213 }
1214 break;
1215 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1216 {
1217 long value = fields->f_dst32_rn_unprefixed_QI;
1218 value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1219 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1220 }
1221 break;
1222 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1223 {
1224 long value = fields->f_dst32_rn_unprefixed_SI;
1225 value = ((value) + (2));
1226 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1227 }
1228 break;
1229 case M32C_OPERAND_G :
1230 break;
1231 case M32C_OPERAND_IMM_12_S4 :
1232 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1233 break;
1234 case M32C_OPERAND_IMM_12_S4N :
1235 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1236 break;
1237 case M32C_OPERAND_IMM_13_U3 :
1238 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1239 break;
1240 case M32C_OPERAND_IMM_16_HI :
1241 {
1242 long value = fields->f_dsp_16_s16;
1243 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1244 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1245 }
1246 break;
1247 case M32C_OPERAND_IMM_16_QI :
1248 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1249 break;
1250 case M32C_OPERAND_IMM_16_SI :
1251 {
1252 {
1253 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1254 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1255 }
1256 {
1257 long value = fields->f_dsp_16_u16;
1258 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1259 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1260 }
1261 if (errmsg)
1262 break;
1263 {
1264 long value = fields->f_dsp_32_u16;
1265 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1266 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1267 }
1268 if (errmsg)
1269 break;
1270 }
1271 break;
1272 case M32C_OPERAND_IMM_20_S4 :
1273 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1274 break;
1275 case M32C_OPERAND_IMM_24_HI :
1276 {
1277 {
1278 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1279 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1280 }
1281 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1282 if (errmsg)
1283 break;
1284 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1285 if (errmsg)
1286 break;
1287 }
1288 break;
1289 case M32C_OPERAND_IMM_24_QI :
1290 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1291 break;
1292 case M32C_OPERAND_IMM_24_SI :
1293 {
1294 {
1295 FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1296 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1297 }
1298 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1299 if (errmsg)
1300 break;
1301 {
1302 long value = fields->f_dsp_32_u24;
1303 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1304 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1305 }
1306 if (errmsg)
1307 break;
1308 }
1309 break;
1310 case M32C_OPERAND_IMM_32_HI :
1311 {
1312 long value = fields->f_dsp_32_s16;
1313 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1314 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1315 }
1316 break;
1317 case M32C_OPERAND_IMM_32_QI :
1318 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1319 break;
1320 case M32C_OPERAND_IMM_32_SI :
1321 {
1322 long value = fields->f_dsp_32_s32;
1323 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) & (65280))) << (8))) | (((((value) & (255))) << (24)))))));
1324 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1325 }
1326 break;
1327 case M32C_OPERAND_IMM_40_HI :
1328 {
1329 long value = fields->f_dsp_40_s16;
1330 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1331 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1332 }
1333 break;
1334 case M32C_OPERAND_IMM_40_QI :
1335 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1336 break;
1337 case M32C_OPERAND_IMM_40_SI :
1338 {
1339 {
1340 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1341 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1342 }
1343 {
1344 long value = fields->f_dsp_40_u24;
1345 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1346 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1347 }
1348 if (errmsg)
1349 break;
1350 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1351 if (errmsg)
1352 break;
1353 }
1354 break;
1355 case M32C_OPERAND_IMM_48_HI :
1356 {
1357 long value = fields->f_dsp_48_s16;
1358 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1359 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1360 }
1361 break;
1362 case M32C_OPERAND_IMM_48_QI :
1363 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1364 break;
1365 case M32C_OPERAND_IMM_48_SI :
1366 {
1367 {
1368 FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1369 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1370 }
1371 {
1372 long value = fields->f_dsp_48_u16;
1373 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1374 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1375 }
1376 if (errmsg)
1377 break;
1378 {
1379 long value = fields->f_dsp_64_u16;
1380 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1381 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1382 }
1383 if (errmsg)
1384 break;
1385 }
1386 break;
1387 case M32C_OPERAND_IMM_56_HI :
1388 {
1389 {
1390 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1391 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1392 }
1393 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1394 if (errmsg)
1395 break;
1396 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1397 if (errmsg)
1398 break;
1399 }
1400 break;
1401 case M32C_OPERAND_IMM_56_QI :
1402 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1403 break;
1404 case M32C_OPERAND_IMM_64_HI :
1405 {
1406 long value = fields->f_dsp_64_s16;
1407 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1408 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1409 }
1410 break;
1411 case M32C_OPERAND_IMM_8_HI :
1412 {
1413 long value = fields->f_dsp_8_s16;
1414 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1415 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1416 }
1417 break;
1418 case M32C_OPERAND_IMM_8_QI :
1419 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1420 break;
1421 case M32C_OPERAND_IMM_8_S4 :
1422 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1423 break;
1424 case M32C_OPERAND_IMM_8_S4N :
1425 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1426 break;
1427 case M32C_OPERAND_IMM_SH_12_S4 :
1428 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1429 break;
1430 case M32C_OPERAND_IMM_SH_20_S4 :
1431 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1432 break;
1433 case M32C_OPERAND_IMM_SH_8_S4 :
1434 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1435 break;
1436 case M32C_OPERAND_IMM1_S :
1437 {
1438 long value = fields->f_imm1_S;
1439 value = ((value) - (1));
1440 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1441 }
1442 break;
1443 case M32C_OPERAND_IMM3_S :
1444 {
1445 {
1446 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1447 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1448 }
1449 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1450 if (errmsg)
1451 break;
1452 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1453 if (errmsg)
1454 break;
1455 }
1456 break;
1457 case M32C_OPERAND_LAB_16_8 :
1458 {
1459 long value = fields->f_lab_16_8;
1460 value = ((value) - (((pc) + (2))));
1461 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1462 }
1463 break;
1464 case M32C_OPERAND_LAB_24_8 :
1465 {
1466 long value = fields->f_lab_24_8;
1467 value = ((value) - (((pc) + (2))));
1468 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1469 }
1470 break;
1471 case M32C_OPERAND_LAB_32_8 :
1472 {
1473 long value = fields->f_lab_32_8;
1474 value = ((value) - (((pc) + (2))));
1475 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1476 }
1477 break;
1478 case M32C_OPERAND_LAB_40_8 :
1479 {
1480 long value = fields->f_lab_40_8;
1481 value = ((value) - (((pc) + (2))));
1482 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1483 }
1484 break;
1485 case M32C_OPERAND_LAB_5_3 :
1486 {
1487 long value = fields->f_lab_5_3;
1488 value = ((value) - (((pc) + (2))));
1489 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1490 }
1491 break;
1492 case M32C_OPERAND_LAB_8_16 :
1493 {
1494 long value = fields->f_lab_8_16;
1495 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65280))) >> (8))));
1496 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1497 }
1498 break;
1499 case M32C_OPERAND_LAB_8_24 :
1500 {
1501 long value = fields->f_lab_8_24;
1502 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1503 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1504 }
1505 break;
1506 case M32C_OPERAND_LAB_8_8 :
1507 {
1508 long value = fields->f_lab_8_8;
1509 value = ((value) - (((pc) + (1))));
1510 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1511 }
1512 break;
1513 case M32C_OPERAND_LAB32_JMP_S :
1514 {
1515 {
1516 SI tmp_val;
1517 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1518 FLD (f_7_1) = ((tmp_val) & (1));
1519 FLD (f_2_2) = ((USI) (tmp_val) >> (1));
1520 }
1521 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1522 if (errmsg)
1523 break;
1524 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1525 if (errmsg)
1526 break;
1527 }
1528 break;
1529 case M32C_OPERAND_Q :
1530 break;
1531 case M32C_OPERAND_R0 :
1532 break;
1533 case M32C_OPERAND_R0H :
1534 break;
1535 case M32C_OPERAND_R0L :
1536 break;
1537 case M32C_OPERAND_R1 :
1538 break;
1539 case M32C_OPERAND_R1R2R0 :
1540 break;
1541 case M32C_OPERAND_R2 :
1542 break;
1543 case M32C_OPERAND_R2R0 :
1544 break;
1545 case M32C_OPERAND_R3 :
1546 break;
1547 case M32C_OPERAND_R3R1 :
1548 break;
1549 case M32C_OPERAND_REGSETPOP :
1550 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1551 break;
1552 case M32C_OPERAND_REGSETPUSH :
1553 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1554 break;
1555 case M32C_OPERAND_RN16_PUSH_S :
1556 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1557 break;
1558 case M32C_OPERAND_S :
1559 break;
1560 case M32C_OPERAND_SRC16AN :
1561 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1562 break;
1563 case M32C_OPERAND_SRC16ANHI :
1564 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1565 break;
1566 case M32C_OPERAND_SRC16ANQI :
1567 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1568 break;
1569 case M32C_OPERAND_SRC16RNHI :
1570 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1571 break;
1572 case M32C_OPERAND_SRC16RNQI :
1573 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1574 break;
1575 case M32C_OPERAND_SRC32ANPREFIXED :
1576 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1577 break;
1578 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1579 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1580 break;
1581 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1582 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1583 break;
1584 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1585 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1586 break;
1587 case M32C_OPERAND_SRC32ANUNPREFIXED :
1588 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1589 break;
1590 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1591 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1592 break;
1593 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1594 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1595 break;
1596 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1597 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1598 break;
1599 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1600 {
1601 long value = fields->f_src32_rn_prefixed_HI;
1602 value = ((((value) + (2))) % (4));
1603 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1604 }
1605 break;
1606 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1607 {
1608 long value = fields->f_src32_rn_prefixed_QI;
1609 value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1610 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1611 }
1612 break;
1613 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1614 {
1615 long value = fields->f_src32_rn_prefixed_SI;
1616 value = ((value) + (2));
1617 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1618 }
1619 break;
1620 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1621 {
1622 long value = fields->f_src32_rn_unprefixed_HI;
1623 value = ((((value) + (2))) % (4));
1624 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1625 }
1626 break;
1627 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1628 {
1629 long value = fields->f_src32_rn_unprefixed_QI;
1630 value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1631 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1632 }
1633 break;
1634 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1635 {
1636 long value = fields->f_src32_rn_unprefixed_SI;
1637 value = ((value) + (2));
1638 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1639 }
1640 break;
1641 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1642 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1643 break;
1644 case M32C_OPERAND_X :
1645 break;
1646 case M32C_OPERAND_Z :
1647 break;
1648 case M32C_OPERAND_COND16_16 :
1649 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1650 break;
1651 case M32C_OPERAND_COND16_24 :
1652 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1653 break;
1654 case M32C_OPERAND_COND16_32 :
1655 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1656 break;
1657 case M32C_OPERAND_COND16C :
1658 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1659 break;
1660 case M32C_OPERAND_COND16J :
1661 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1662 break;
1663 case M32C_OPERAND_COND16J5 :
1664 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1665 break;
1666 case M32C_OPERAND_COND32 :
1667 {
1668 {
1669 FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1));
1670 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1671 }
1672 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1673 if (errmsg)
1674 break;
1675 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1676 if (errmsg)
1677 break;
1678 }
1679 break;
1680 case M32C_OPERAND_COND32_16 :
1681 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1682 break;
1683 case M32C_OPERAND_COND32_24 :
1684 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1685 break;
1686 case M32C_OPERAND_COND32_32 :
1687 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1688 break;
1689 case M32C_OPERAND_COND32_40 :
1690 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1691 break;
1692 case M32C_OPERAND_COND32J :
1693 {
1694 {
1695 FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7));
1696 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1697 }
1698 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1699 if (errmsg)
1700 break;
1701 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1702 if (errmsg)
1703 break;
1704 }
1705 break;
1706 case M32C_OPERAND_CR1_PREFIXED_32 :
1707 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1708 break;
1709 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1710 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1711 break;
1712 case M32C_OPERAND_CR16 :
1713 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1714 break;
1715 case M32C_OPERAND_CR2_32 :
1716 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1717 break;
1718 case M32C_OPERAND_CR3_PREFIXED_32 :
1719 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1720 break;
1721 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1722 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1723 break;
1724 case M32C_OPERAND_FLAGS16 :
1725 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1726 break;
1727 case M32C_OPERAND_FLAGS32 :
1728 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1729 break;
1730 case M32C_OPERAND_SCCOND32 :
1731 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1732 break;
1733 case M32C_OPERAND_SIZE :
1734 break;
1735
1736 default :
1737 /* xgettext:c-format */
1738 opcodes_error_handler
1739 (_("internal error: unrecognized field %d while building insn"),
1740 opindex);
1741 abort ();
1742 }
1743
1744 return errmsg;
1745 }
1746
1747 int m32c_cgen_extract_operand
1748 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1749
1750 /* Main entry point for operand extraction.
1751 The result is <= 0 for error, >0 for success.
1752 ??? Actual values aren't well defined right now.
1753
1754 This function is basically just a big switch statement. Earlier versions
1755 used tables to look up the function to use, but
1756 - if the table contains both assembler and disassembler functions then
1757 the disassembler contains much of the assembler and vice-versa,
1758 - there's a lot of inlining possibilities as things grow,
1759 - using a switch statement avoids the function call overhead.
1760
1761 This function could be moved into `print_insn_normal', but keeping it
1762 separate makes clear the interface between `print_insn_normal' and each of
1763 the handlers. */
1764
1765 int
1766 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1767 int opindex,
1768 CGEN_EXTRACT_INFO *ex_info,
1769 CGEN_INSN_INT insn_value,
1770 CGEN_FIELDS * fields,
1771 bfd_vma pc)
1772 {
1773 /* Assume success (for those operands that are nops). */
1774 int length = 1;
1775 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1776
1777 switch (opindex)
1778 {
1779 case M32C_OPERAND_A0 :
1780 break;
1781 case M32C_OPERAND_A1 :
1782 break;
1783 case M32C_OPERAND_AN16_PUSH_S :
1784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1785 break;
1786 case M32C_OPERAND_BIT16AN :
1787 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1788 break;
1789 case M32C_OPERAND_BIT16RN :
1790 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1791 break;
1792 case M32C_OPERAND_BIT3_S :
1793 {
1794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1795 if (length <= 0) break;
1796 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1797 if (length <= 0) break;
1798 {
1799 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1800 }
1801 }
1802 break;
1803 case M32C_OPERAND_BIT32ANPREFIXED :
1804 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1805 break;
1806 case M32C_OPERAND_BIT32ANUNPREFIXED :
1807 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1808 break;
1809 case M32C_OPERAND_BIT32RNPREFIXED :
1810 {
1811 long value;
1812 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1813 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1814 fields->f_dst32_rn_prefixed_QI = value;
1815 }
1816 break;
1817 case M32C_OPERAND_BIT32RNUNPREFIXED :
1818 {
1819 long value;
1820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1821 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1822 fields->f_dst32_rn_unprefixed_QI = value;
1823 }
1824 break;
1825 case M32C_OPERAND_BITBASE16_16_S8 :
1826 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1827 break;
1828 case M32C_OPERAND_BITBASE16_16_U16 :
1829 {
1830 long value;
1831 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1832 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1833 fields->f_dsp_16_u16 = value;
1834 }
1835 break;
1836 case M32C_OPERAND_BITBASE16_16_U8 :
1837 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1838 break;
1839 case M32C_OPERAND_BITBASE16_8_U11_S :
1840 {
1841 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1842 if (length <= 0) break;
1843 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1844 if (length <= 0) break;
1845 {
1846 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1847 }
1848 }
1849 break;
1850 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1851 {
1852 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1853 if (length <= 0) break;
1854 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1855 if (length <= 0) break;
1856 {
1857 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) * (8))) | (FLD (f_bitno32_unprefixed)));
1858 }
1859 }
1860 break;
1861 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1862 {
1863 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1864 if (length <= 0) break;
1865 {
1866 long value;
1867 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1868 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1869 fields->f_dsp_16_s16 = value;
1870 }
1871 if (length <= 0) break;
1872 {
1873 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) * (8))) | (FLD (f_bitno32_unprefixed)));
1874 }
1875 }
1876 break;
1877 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1878 {
1879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1880 if (length <= 0) break;
1881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1882 if (length <= 0) break;
1883 {
1884 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1885 }
1886 }
1887 break;
1888 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1889 {
1890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1891 if (length <= 0) break;
1892 {
1893 long value;
1894 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1895 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1896 fields->f_dsp_16_u16 = value;
1897 }
1898 if (length <= 0) break;
1899 {
1900 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1901 }
1902 }
1903 break;
1904 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1905 {
1906 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1907 if (length <= 0) break;
1908 {
1909 long value;
1910 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1911 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1912 fields->f_dsp_16_u16 = value;
1913 }
1914 if (length <= 0) break;
1915 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1916 if (length <= 0) break;
1917 {
1918 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1919 }
1920 }
1921 break;
1922 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1923 {
1924 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1925 if (length <= 0) break;
1926 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1927 if (length <= 0) break;
1928 {
1929 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) * (8))) | (FLD (f_bitno32_prefixed)));
1930 }
1931 }
1932 break;
1933 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1934 {
1935 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1936 if (length <= 0) break;
1937 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1938 if (length <= 0) break;
1939 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1940 if (length <= 0) break;
1941 {
1942 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) * (2048))) | (FLD (f_bitno32_prefixed)))));
1943 }
1944 }
1945 break;
1946 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1947 {
1948 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1949 if (length <= 0) break;
1950 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1951 if (length <= 0) break;
1952 {
1953 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1954 }
1955 }
1956 break;
1957 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1958 {
1959 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1960 if (length <= 0) break;
1961 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1962 if (length <= 0) break;
1963 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1964 if (length <= 0) break;
1965 {
1966 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1967 }
1968 }
1969 break;
1970 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1971 {
1972 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1973 if (length <= 0) break;
1974 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1975 if (length <= 0) break;
1976 {
1977 long value;
1978 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1979 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1980 fields->f_dsp_32_u16 = value;
1981 }
1982 if (length <= 0) break;
1983 {
1984 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1985 }
1986 }
1987 break;
1988 case M32C_OPERAND_BITNO16R :
1989 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1990 break;
1991 case M32C_OPERAND_BITNO32PREFIXED :
1992 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1993 break;
1994 case M32C_OPERAND_BITNO32UNPREFIXED :
1995 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1996 break;
1997 case M32C_OPERAND_DSP_10_U6 :
1998 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1999 break;
2000 case M32C_OPERAND_DSP_16_S16 :
2001 {
2002 long value;
2003 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2004 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2005 fields->f_dsp_16_s16 = value;
2006 }
2007 break;
2008 case M32C_OPERAND_DSP_16_S8 :
2009 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2010 break;
2011 case M32C_OPERAND_DSP_16_U16 :
2012 {
2013 long value;
2014 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2015 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2016 fields->f_dsp_16_u16 = value;
2017 }
2018 break;
2019 case M32C_OPERAND_DSP_16_U20 :
2020 {
2021 {
2022 long value;
2023 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2024 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2025 fields->f_dsp_16_u16 = value;
2026 }
2027 if (length <= 0) break;
2028 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2029 if (length <= 0) break;
2030 {
2031 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2032 }
2033 }
2034 break;
2035 case M32C_OPERAND_DSP_16_U24 :
2036 {
2037 {
2038 long value;
2039 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2040 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2041 fields->f_dsp_16_u16 = value;
2042 }
2043 if (length <= 0) break;
2044 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2045 if (length <= 0) break;
2046 {
2047 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2048 }
2049 }
2050 break;
2051 case M32C_OPERAND_DSP_16_U8 :
2052 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2053 break;
2054 case M32C_OPERAND_DSP_24_S16 :
2055 {
2056 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2057 if (length <= 0) break;
2058 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2059 if (length <= 0) break;
2060 {
2061 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2062 }
2063 }
2064 break;
2065 case M32C_OPERAND_DSP_24_S8 :
2066 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2067 break;
2068 case M32C_OPERAND_DSP_24_U16 :
2069 {
2070 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2071 if (length <= 0) break;
2072 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2073 if (length <= 0) break;
2074 {
2075 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2076 }
2077 }
2078 break;
2079 case M32C_OPERAND_DSP_24_U20 :
2080 {
2081 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2082 if (length <= 0) break;
2083 {
2084 long value;
2085 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2086 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2087 fields->f_dsp_32_u16 = value;
2088 }
2089 if (length <= 0) break;
2090 {
2091 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2092 }
2093 }
2094 break;
2095 case M32C_OPERAND_DSP_24_U24 :
2096 {
2097 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2098 if (length <= 0) break;
2099 {
2100 long value;
2101 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2102 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2103 fields->f_dsp_32_u16 = value;
2104 }
2105 if (length <= 0) break;
2106 {
2107 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2108 }
2109 }
2110 break;
2111 case M32C_OPERAND_DSP_24_U8 :
2112 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2113 break;
2114 case M32C_OPERAND_DSP_32_S16 :
2115 {
2116 long value;
2117 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2118 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2119 fields->f_dsp_32_s16 = value;
2120 }
2121 break;
2122 case M32C_OPERAND_DSP_32_S8 :
2123 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2124 break;
2125 case M32C_OPERAND_DSP_32_U16 :
2126 {
2127 long value;
2128 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2129 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2130 fields->f_dsp_32_u16 = value;
2131 }
2132 break;
2133 case M32C_OPERAND_DSP_32_U20 :
2134 {
2135 long value;
2136 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2137 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2138 fields->f_dsp_32_u24 = value;
2139 }
2140 break;
2141 case M32C_OPERAND_DSP_32_U24 :
2142 {
2143 long value;
2144 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2145 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2146 fields->f_dsp_32_u24 = value;
2147 }
2148 break;
2149 case M32C_OPERAND_DSP_32_U8 :
2150 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2151 break;
2152 case M32C_OPERAND_DSP_40_S16 :
2153 {
2154 long value;
2155 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2156 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2157 fields->f_dsp_40_s16 = value;
2158 }
2159 break;
2160 case M32C_OPERAND_DSP_40_S8 :
2161 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2162 break;
2163 case M32C_OPERAND_DSP_40_U16 :
2164 {
2165 long value;
2166 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2167 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2168 fields->f_dsp_40_u16 = value;
2169 }
2170 break;
2171 case M32C_OPERAND_DSP_40_U20 :
2172 {
2173 long value;
2174 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
2175 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
2176 fields->f_dsp_40_u20 = value;
2177 }
2178 break;
2179 case M32C_OPERAND_DSP_40_U24 :
2180 {
2181 long value;
2182 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2183 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2184 fields->f_dsp_40_u24 = value;
2185 }
2186 break;
2187 case M32C_OPERAND_DSP_40_U8 :
2188 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2189 break;
2190 case M32C_OPERAND_DSP_48_S16 :
2191 {
2192 long value;
2193 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2194 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2195 fields->f_dsp_48_s16 = value;
2196 }
2197 break;
2198 case M32C_OPERAND_DSP_48_S8 :
2199 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2200 break;
2201 case M32C_OPERAND_DSP_48_U16 :
2202 {
2203 long value;
2204 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2205 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2206 fields->f_dsp_48_u16 = value;
2207 }
2208 break;
2209 case M32C_OPERAND_DSP_48_U20 :
2210 {
2211 {
2212 long value;
2213 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2214 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2215 fields->f_dsp_48_u16 = value;
2216 }
2217 if (length <= 0) break;
2218 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2219 if (length <= 0) break;
2220 {
2221 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040))));
2222 }
2223 }
2224 break;
2225 case M32C_OPERAND_DSP_48_U24 :
2226 {
2227 {
2228 long value;
2229 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2230 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2231 fields->f_dsp_48_u16 = value;
2232 }
2233 if (length <= 0) break;
2234 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2235 if (length <= 0) break;
2236 {
2237 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2238 }
2239 }
2240 break;
2241 case M32C_OPERAND_DSP_48_U8 :
2242 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2243 break;
2244 case M32C_OPERAND_DSP_8_S24 :
2245 {
2246 long value;
2247 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2248 value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608));
2249 fields->f_dsp_8_s24 = value;
2250 }
2251 break;
2252 case M32C_OPERAND_DSP_8_S8 :
2253 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2254 break;
2255 case M32C_OPERAND_DSP_8_U16 :
2256 {
2257 long value;
2258 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2259 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2260 fields->f_dsp_8_u16 = value;
2261 }
2262 break;
2263 case M32C_OPERAND_DSP_8_U24 :
2264 {
2265 long value;
2266 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2267 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2268 fields->f_dsp_8_u24 = value;
2269 }
2270 break;
2271 case M32C_OPERAND_DSP_8_U6 :
2272 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2273 break;
2274 case M32C_OPERAND_DSP_8_U8 :
2275 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2276 break;
2277 case M32C_OPERAND_DST16AN :
2278 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2279 break;
2280 case M32C_OPERAND_DST16AN_S :
2281 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2282 break;
2283 case M32C_OPERAND_DST16ANHI :
2284 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2285 break;
2286 case M32C_OPERAND_DST16ANQI :
2287 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2288 break;
2289 case M32C_OPERAND_DST16ANQI_S :
2290 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2291 break;
2292 case M32C_OPERAND_DST16ANSI :
2293 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2294 break;
2295 case M32C_OPERAND_DST16RNEXTQI :
2296 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2297 break;
2298 case M32C_OPERAND_DST16RNHI :
2299 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2300 break;
2301 case M32C_OPERAND_DST16RNQI :
2302 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2303 break;
2304 case M32C_OPERAND_DST16RNQI_S :
2305 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2306 break;
2307 case M32C_OPERAND_DST16RNSI :
2308 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2309 break;
2310 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2311 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2312 break;
2313 case M32C_OPERAND_DST32ANPREFIXED :
2314 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2315 break;
2316 case M32C_OPERAND_DST32ANPREFIXEDHI :
2317 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2318 break;
2319 case M32C_OPERAND_DST32ANPREFIXEDQI :
2320 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2321 break;
2322 case M32C_OPERAND_DST32ANPREFIXEDSI :
2323 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2324 break;
2325 case M32C_OPERAND_DST32ANUNPREFIXED :
2326 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2327 break;
2328 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2329 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2330 break;
2331 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2332 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2333 break;
2334 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2335 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2336 break;
2337 case M32C_OPERAND_DST32R0HI_S :
2338 break;
2339 case M32C_OPERAND_DST32R0QI_S :
2340 break;
2341 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2342 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2343 break;
2344 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2345 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2346 break;
2347 case M32C_OPERAND_DST32RNPREFIXEDHI :
2348 {
2349 long value;
2350 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2351 value = ((((value) + (2))) % (4));
2352 fields->f_dst32_rn_prefixed_HI = value;
2353 }
2354 break;
2355 case M32C_OPERAND_DST32RNPREFIXEDQI :
2356 {
2357 long value;
2358 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2359 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2360 fields->f_dst32_rn_prefixed_QI = value;
2361 }
2362 break;
2363 case M32C_OPERAND_DST32RNPREFIXEDSI :
2364 {
2365 long value;
2366 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2367 value = ((value) - (2));
2368 fields->f_dst32_rn_prefixed_SI = value;
2369 }
2370 break;
2371 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2372 {
2373 long value;
2374 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2375 value = ((((value) + (2))) % (4));
2376 fields->f_dst32_rn_unprefixed_HI = value;
2377 }
2378 break;
2379 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2380 {
2381 long value;
2382 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2383 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2384 fields->f_dst32_rn_unprefixed_QI = value;
2385 }
2386 break;
2387 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2388 {
2389 long value;
2390 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2391 value = ((value) - (2));
2392 fields->f_dst32_rn_unprefixed_SI = value;
2393 }
2394 break;
2395 case M32C_OPERAND_G :
2396 break;
2397 case M32C_OPERAND_IMM_12_S4 :
2398 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2399 break;
2400 case M32C_OPERAND_IMM_12_S4N :
2401 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2402 break;
2403 case M32C_OPERAND_IMM_13_U3 :
2404 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2405 break;
2406 case M32C_OPERAND_IMM_16_HI :
2407 {
2408 long value;
2409 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2410 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2411 fields->f_dsp_16_s16 = value;
2412 }
2413 break;
2414 case M32C_OPERAND_IMM_16_QI :
2415 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2416 break;
2417 case M32C_OPERAND_IMM_16_SI :
2418 {
2419 {
2420 long value;
2421 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2422 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2423 fields->f_dsp_16_u16 = value;
2424 }
2425 if (length <= 0) break;
2426 {
2427 long value;
2428 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2429 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2430 fields->f_dsp_32_u16 = value;
2431 }
2432 if (length <= 0) break;
2433 {
2434 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2435 }
2436 }
2437 break;
2438 case M32C_OPERAND_IMM_20_S4 :
2439 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2440 break;
2441 case M32C_OPERAND_IMM_24_HI :
2442 {
2443 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2444 if (length <= 0) break;
2445 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2446 if (length <= 0) break;
2447 {
2448 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2449 }
2450 }
2451 break;
2452 case M32C_OPERAND_IMM_24_QI :
2453 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2454 break;
2455 case M32C_OPERAND_IMM_24_SI :
2456 {
2457 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2458 if (length <= 0) break;
2459 {
2460 long value;
2461 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2462 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2463 fields->f_dsp_32_u24 = value;
2464 }
2465 if (length <= 0) break;
2466 {
2467 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2468 }
2469 }
2470 break;
2471 case M32C_OPERAND_IMM_32_HI :
2472 {
2473 long value;
2474 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2475 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2476 fields->f_dsp_32_s16 = value;
2477 }
2478 break;
2479 case M32C_OPERAND_IMM_32_QI :
2480 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2481 break;
2482 case M32C_OPERAND_IMM_32_SI :
2483 {
2484 long value;
2485 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2486 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) & (65280))) << (8))) | (((((value) & (255))) << (24)))))));
2487 fields->f_dsp_32_s32 = value;
2488 }
2489 break;
2490 case M32C_OPERAND_IMM_40_HI :
2491 {
2492 long value;
2493 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2494 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2495 fields->f_dsp_40_s16 = value;
2496 }
2497 break;
2498 case M32C_OPERAND_IMM_40_QI :
2499 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2500 break;
2501 case M32C_OPERAND_IMM_40_SI :
2502 {
2503 {
2504 long value;
2505 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2506 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2507 fields->f_dsp_40_u24 = value;
2508 }
2509 if (length <= 0) break;
2510 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2511 if (length <= 0) break;
2512 {
2513 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2514 }
2515 }
2516 break;
2517 case M32C_OPERAND_IMM_48_HI :
2518 {
2519 long value;
2520 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2521 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2522 fields->f_dsp_48_s16 = value;
2523 }
2524 break;
2525 case M32C_OPERAND_IMM_48_QI :
2526 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2527 break;
2528 case M32C_OPERAND_IMM_48_SI :
2529 {
2530 {
2531 long value;
2532 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2533 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2534 fields->f_dsp_48_u16 = value;
2535 }
2536 if (length <= 0) break;
2537 {
2538 long value;
2539 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2540 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2541 fields->f_dsp_64_u16 = value;
2542 }
2543 if (length <= 0) break;
2544 {
2545 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) & (65535))) << (16))));
2546 }
2547 }
2548 break;
2549 case M32C_OPERAND_IMM_56_HI :
2550 {
2551 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2552 if (length <= 0) break;
2553 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2554 if (length <= 0) break;
2555 {
2556 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2557 }
2558 }
2559 break;
2560 case M32C_OPERAND_IMM_56_QI :
2561 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2562 break;
2563 case M32C_OPERAND_IMM_64_HI :
2564 {
2565 long value;
2566 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2567 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2568 fields->f_dsp_64_s16 = value;
2569 }
2570 break;
2571 case M32C_OPERAND_IMM_8_HI :
2572 {
2573 long value;
2574 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2575 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2576 fields->f_dsp_8_s16 = value;
2577 }
2578 break;
2579 case M32C_OPERAND_IMM_8_QI :
2580 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2581 break;
2582 case M32C_OPERAND_IMM_8_S4 :
2583 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2584 break;
2585 case M32C_OPERAND_IMM_8_S4N :
2586 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2587 break;
2588 case M32C_OPERAND_IMM_SH_12_S4 :
2589 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2590 break;
2591 case M32C_OPERAND_IMM_SH_20_S4 :
2592 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2593 break;
2594 case M32C_OPERAND_IMM_SH_8_S4 :
2595 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2596 break;
2597 case M32C_OPERAND_IMM1_S :
2598 {
2599 long value;
2600 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2601 value = ((value) + (1));
2602 fields->f_imm1_S = value;
2603 }
2604 break;
2605 case M32C_OPERAND_IMM3_S :
2606 {
2607 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2608 if (length <= 0) break;
2609 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2610 if (length <= 0) break;
2611 {
2612 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2613 }
2614 }
2615 break;
2616 case M32C_OPERAND_LAB_16_8 :
2617 {
2618 long value;
2619 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2620 value = ((value) + (((pc) + (2))));
2621 fields->f_lab_16_8 = value;
2622 }
2623 break;
2624 case M32C_OPERAND_LAB_24_8 :
2625 {
2626 long value;
2627 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2628 value = ((value) + (((pc) + (2))));
2629 fields->f_lab_24_8 = value;
2630 }
2631 break;
2632 case M32C_OPERAND_LAB_32_8 :
2633 {
2634 long value;
2635 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2636 value = ((value) + (((pc) + (2))));
2637 fields->f_lab_32_8 = value;
2638 }
2639 break;
2640 case M32C_OPERAND_LAB_40_8 :
2641 {
2642 long value;
2643 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2644 value = ((value) + (((pc) + (2))));
2645 fields->f_lab_40_8 = value;
2646 }
2647 break;
2648 case M32C_OPERAND_LAB_5_3 :
2649 {
2650 long value;
2651 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2652 value = ((value) + (((pc) + (2))));
2653 fields->f_lab_5_3 = value;
2654 }
2655 break;
2656 case M32C_OPERAND_LAB_8_16 :
2657 {
2658 long value;
2659 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2660 value = ((((((((((USI) (((value) & (65280))) >> (8))) | (((((value) & (255))) << (8))))) ^ (32768))) - (32768))) + (((pc) + (1))));
2661 fields->f_lab_8_16 = value;
2662 }
2663 break;
2664 case M32C_OPERAND_LAB_8_24 :
2665 {
2666 long value;
2667 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2668 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2669 fields->f_lab_8_24 = value;
2670 }
2671 break;
2672 case M32C_OPERAND_LAB_8_8 :
2673 {
2674 long value;
2675 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2676 value = ((value) + (((pc) + (1))));
2677 fields->f_lab_8_8 = value;
2678 }
2679 break;
2680 case M32C_OPERAND_LAB32_JMP_S :
2681 {
2682 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2683 if (length <= 0) break;
2684 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2685 if (length <= 0) break;
2686 {
2687 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2688 }
2689 }
2690 break;
2691 case M32C_OPERAND_Q :
2692 break;
2693 case M32C_OPERAND_R0 :
2694 break;
2695 case M32C_OPERAND_R0H :
2696 break;
2697 case M32C_OPERAND_R0L :
2698 break;
2699 case M32C_OPERAND_R1 :
2700 break;
2701 case M32C_OPERAND_R1R2R0 :
2702 break;
2703 case M32C_OPERAND_R2 :
2704 break;
2705 case M32C_OPERAND_R2R0 :
2706 break;
2707 case M32C_OPERAND_R3 :
2708 break;
2709 case M32C_OPERAND_R3R1 :
2710 break;
2711 case M32C_OPERAND_REGSETPOP :
2712 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2713 break;
2714 case M32C_OPERAND_REGSETPUSH :
2715 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2716 break;
2717 case M32C_OPERAND_RN16_PUSH_S :
2718 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2719 break;
2720 case M32C_OPERAND_S :
2721 break;
2722 case M32C_OPERAND_SRC16AN :
2723 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2724 break;
2725 case M32C_OPERAND_SRC16ANHI :
2726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2727 break;
2728 case M32C_OPERAND_SRC16ANQI :
2729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2730 break;
2731 case M32C_OPERAND_SRC16RNHI :
2732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2733 break;
2734 case M32C_OPERAND_SRC16RNQI :
2735 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2736 break;
2737 case M32C_OPERAND_SRC32ANPREFIXED :
2738 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2739 break;
2740 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2741 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2742 break;
2743 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2744 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2745 break;
2746 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2747 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2748 break;
2749 case M32C_OPERAND_SRC32ANUNPREFIXED :
2750 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2751 break;
2752 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2753 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2754 break;
2755 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2756 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2757 break;
2758 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2760 break;
2761 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2762 {
2763 long value;
2764 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2765 value = ((((value) + (2))) % (4));
2766 fields->f_src32_rn_prefixed_HI = value;
2767 }
2768 break;
2769 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2770 {
2771 long value;
2772 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2773 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2774 fields->f_src32_rn_prefixed_QI = value;
2775 }
2776 break;
2777 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2778 {
2779 long value;
2780 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2781 value = ((value) - (2));
2782 fields->f_src32_rn_prefixed_SI = value;
2783 }
2784 break;
2785 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2786 {
2787 long value;
2788 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2789 value = ((((value) + (2))) % (4));
2790 fields->f_src32_rn_unprefixed_HI = value;
2791 }
2792 break;
2793 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2794 {
2795 long value;
2796 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2797 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2798 fields->f_src32_rn_unprefixed_QI = value;
2799 }
2800 break;
2801 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2802 {
2803 long value;
2804 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2805 value = ((value) - (2));
2806 fields->f_src32_rn_unprefixed_SI = value;
2807 }
2808 break;
2809 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2810 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2811 break;
2812 case M32C_OPERAND_X :
2813 break;
2814 case M32C_OPERAND_Z :
2815 break;
2816 case M32C_OPERAND_COND16_16 :
2817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2818 break;
2819 case M32C_OPERAND_COND16_24 :
2820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2821 break;
2822 case M32C_OPERAND_COND16_32 :
2823 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2824 break;
2825 case M32C_OPERAND_COND16C :
2826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2827 break;
2828 case M32C_OPERAND_COND16J :
2829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2830 break;
2831 case M32C_OPERAND_COND16J5 :
2832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2833 break;
2834 case M32C_OPERAND_COND32 :
2835 {
2836 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2837 if (length <= 0) break;
2838 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2839 if (length <= 0) break;
2840 {
2841 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2842 }
2843 }
2844 break;
2845 case M32C_OPERAND_COND32_16 :
2846 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2847 break;
2848 case M32C_OPERAND_COND32_24 :
2849 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2850 break;
2851 case M32C_OPERAND_COND32_32 :
2852 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2853 break;
2854 case M32C_OPERAND_COND32_40 :
2855 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2856 break;
2857 case M32C_OPERAND_COND32J :
2858 {
2859 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2860 if (length <= 0) break;
2861 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2862 if (length <= 0) break;
2863 {
2864 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2865 }
2866 }
2867 break;
2868 case M32C_OPERAND_CR1_PREFIXED_32 :
2869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2870 break;
2871 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2873 break;
2874 case M32C_OPERAND_CR16 :
2875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2876 break;
2877 case M32C_OPERAND_CR2_32 :
2878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2879 break;
2880 case M32C_OPERAND_CR3_PREFIXED_32 :
2881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2882 break;
2883 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2884 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2885 break;
2886 case M32C_OPERAND_FLAGS16 :
2887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2888 break;
2889 case M32C_OPERAND_FLAGS32 :
2890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2891 break;
2892 case M32C_OPERAND_SCCOND32 :
2893 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2894 break;
2895 case M32C_OPERAND_SIZE :
2896 break;
2897
2898 default :
2899 /* xgettext:c-format */
2900 opcodes_error_handler
2901 (_("internal error: unrecognized field %d while decoding insn"),
2902 opindex);
2903 abort ();
2904 }
2905
2906 return length;
2907 }
2908
2909 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2910 {
2911 insert_insn_normal,
2912 };
2913
2914 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2915 {
2916 extract_insn_normal,
2917 };
2918
2919 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2920 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2921
2922 /* Getting values from cgen_fields is handled by a collection of functions.
2923 They are distinguished by the type of the VALUE argument they return.
2924 TODO: floating point, inlining support, remove cases where result type
2925 not appropriate. */
2926
2927 int
2928 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2929 int opindex,
2930 const CGEN_FIELDS * fields)
2931 {
2932 int value;
2933
2934 switch (opindex)
2935 {
2936 case M32C_OPERAND_A0 :
2937 value = 0;
2938 break;
2939 case M32C_OPERAND_A1 :
2940 value = 0;
2941 break;
2942 case M32C_OPERAND_AN16_PUSH_S :
2943 value = fields->f_4_1;
2944 break;
2945 case M32C_OPERAND_BIT16AN :
2946 value = fields->f_dst16_an;
2947 break;
2948 case M32C_OPERAND_BIT16RN :
2949 value = fields->f_dst16_rn;
2950 break;
2951 case M32C_OPERAND_BIT3_S :
2952 value = fields->f_imm3_S;
2953 break;
2954 case M32C_OPERAND_BIT32ANPREFIXED :
2955 value = fields->f_dst32_an_prefixed;
2956 break;
2957 case M32C_OPERAND_BIT32ANUNPREFIXED :
2958 value = fields->f_dst32_an_unprefixed;
2959 break;
2960 case M32C_OPERAND_BIT32RNPREFIXED :
2961 value = fields->f_dst32_rn_prefixed_QI;
2962 break;
2963 case M32C_OPERAND_BIT32RNUNPREFIXED :
2964 value = fields->f_dst32_rn_unprefixed_QI;
2965 break;
2966 case M32C_OPERAND_BITBASE16_16_S8 :
2967 value = fields->f_dsp_16_s8;
2968 break;
2969 case M32C_OPERAND_BITBASE16_16_U16 :
2970 value = fields->f_dsp_16_u16;
2971 break;
2972 case M32C_OPERAND_BITBASE16_16_U8 :
2973 value = fields->f_dsp_16_u8;
2974 break;
2975 case M32C_OPERAND_BITBASE16_8_U11_S :
2976 value = fields->f_bitbase16_u11_S;
2977 break;
2978 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2979 value = fields->f_bitbase32_16_s11_unprefixed;
2980 break;
2981 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2982 value = fields->f_bitbase32_16_s19_unprefixed;
2983 break;
2984 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2985 value = fields->f_bitbase32_16_u11_unprefixed;
2986 break;
2987 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2988 value = fields->f_bitbase32_16_u19_unprefixed;
2989 break;
2990 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2991 value = fields->f_bitbase32_16_u27_unprefixed;
2992 break;
2993 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2994 value = fields->f_bitbase32_24_s11_prefixed;
2995 break;
2996 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2997 value = fields->f_bitbase32_24_s19_prefixed;
2998 break;
2999 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3000 value = fields->f_bitbase32_24_u11_prefixed;
3001 break;
3002 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3003 value = fields->f_bitbase32_24_u19_prefixed;
3004 break;
3005 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3006 value = fields->f_bitbase32_24_u27_prefixed;
3007 break;
3008 case M32C_OPERAND_BITNO16R :
3009 value = fields->f_dsp_16_u8;
3010 break;
3011 case M32C_OPERAND_BITNO32PREFIXED :
3012 value = fields->f_bitno32_prefixed;
3013 break;
3014 case M32C_OPERAND_BITNO32UNPREFIXED :
3015 value = fields->f_bitno32_unprefixed;
3016 break;
3017 case M32C_OPERAND_DSP_10_U6 :
3018 value = fields->f_dsp_10_u6;
3019 break;
3020 case M32C_OPERAND_DSP_16_S16 :
3021 value = fields->f_dsp_16_s16;
3022 break;
3023 case M32C_OPERAND_DSP_16_S8 :
3024 value = fields->f_dsp_16_s8;
3025 break;
3026 case M32C_OPERAND_DSP_16_U16 :
3027 value = fields->f_dsp_16_u16;
3028 break;
3029 case M32C_OPERAND_DSP_16_U20 :
3030 value = fields->f_dsp_16_u24;
3031 break;
3032 case M32C_OPERAND_DSP_16_U24 :
3033 value = fields->f_dsp_16_u24;
3034 break;
3035 case M32C_OPERAND_DSP_16_U8 :
3036 value = fields->f_dsp_16_u8;
3037 break;
3038 case M32C_OPERAND_DSP_24_S16 :
3039 value = fields->f_dsp_24_s16;
3040 break;
3041 case M32C_OPERAND_DSP_24_S8 :
3042 value = fields->f_dsp_24_s8;
3043 break;
3044 case M32C_OPERAND_DSP_24_U16 :
3045 value = fields->f_dsp_24_u16;
3046 break;
3047 case M32C_OPERAND_DSP_24_U20 :
3048 value = fields->f_dsp_24_u24;
3049 break;
3050 case M32C_OPERAND_DSP_24_U24 :
3051 value = fields->f_dsp_24_u24;
3052 break;
3053 case M32C_OPERAND_DSP_24_U8 :
3054 value = fields->f_dsp_24_u8;
3055 break;
3056 case M32C_OPERAND_DSP_32_S16 :
3057 value = fields->f_dsp_32_s16;
3058 break;
3059 case M32C_OPERAND_DSP_32_S8 :
3060 value = fields->f_dsp_32_s8;
3061 break;
3062 case M32C_OPERAND_DSP_32_U16 :
3063 value = fields->f_dsp_32_u16;
3064 break;
3065 case M32C_OPERAND_DSP_32_U20 :
3066 value = fields->f_dsp_32_u24;
3067 break;
3068 case M32C_OPERAND_DSP_32_U24 :
3069 value = fields->f_dsp_32_u24;
3070 break;
3071 case M32C_OPERAND_DSP_32_U8 :
3072 value = fields->f_dsp_32_u8;
3073 break;
3074 case M32C_OPERAND_DSP_40_S16 :
3075 value = fields->f_dsp_40_s16;
3076 break;
3077 case M32C_OPERAND_DSP_40_S8 :
3078 value = fields->f_dsp_40_s8;
3079 break;
3080 case M32C_OPERAND_DSP_40_U16 :
3081 value = fields->f_dsp_40_u16;
3082 break;
3083 case M32C_OPERAND_DSP_40_U20 :
3084 value = fields->f_dsp_40_u20;
3085 break;
3086 case M32C_OPERAND_DSP_40_U24 :
3087 value = fields->f_dsp_40_u24;
3088 break;
3089 case M32C_OPERAND_DSP_40_U8 :
3090 value = fields->f_dsp_40_u8;
3091 break;
3092 case M32C_OPERAND_DSP_48_S16 :
3093 value = fields->f_dsp_48_s16;
3094 break;
3095 case M32C_OPERAND_DSP_48_S8 :
3096 value = fields->f_dsp_48_s8;
3097 break;
3098 case M32C_OPERAND_DSP_48_U16 :
3099 value = fields->f_dsp_48_u16;
3100 break;
3101 case M32C_OPERAND_DSP_48_U20 :
3102 value = fields->f_dsp_48_u20;
3103 break;
3104 case M32C_OPERAND_DSP_48_U24 :
3105 value = fields->f_dsp_48_u24;
3106 break;
3107 case M32C_OPERAND_DSP_48_U8 :
3108 value = fields->f_dsp_48_u8;
3109 break;
3110 case M32C_OPERAND_DSP_8_S24 :
3111 value = fields->f_dsp_8_s24;
3112 break;
3113 case M32C_OPERAND_DSP_8_S8 :
3114 value = fields->f_dsp_8_s8;
3115 break;
3116 case M32C_OPERAND_DSP_8_U16 :
3117 value = fields->f_dsp_8_u16;
3118 break;
3119 case M32C_OPERAND_DSP_8_U24 :
3120 value = fields->f_dsp_8_u24;
3121 break;
3122 case M32C_OPERAND_DSP_8_U6 :
3123 value = fields->f_dsp_8_u6;
3124 break;
3125 case M32C_OPERAND_DSP_8_U8 :
3126 value = fields->f_dsp_8_u8;
3127 break;
3128 case M32C_OPERAND_DST16AN :
3129 value = fields->f_dst16_an;
3130 break;
3131 case M32C_OPERAND_DST16AN_S :
3132 value = fields->f_dst16_an_s;
3133 break;
3134 case M32C_OPERAND_DST16ANHI :
3135 value = fields->f_dst16_an;
3136 break;
3137 case M32C_OPERAND_DST16ANQI :
3138 value = fields->f_dst16_an;
3139 break;
3140 case M32C_OPERAND_DST16ANQI_S :
3141 value = fields->f_dst16_rn_QI_s;
3142 break;
3143 case M32C_OPERAND_DST16ANSI :
3144 value = fields->f_dst16_an;
3145 break;
3146 case M32C_OPERAND_DST16RNEXTQI :
3147 value = fields->f_dst16_rn_ext;
3148 break;
3149 case M32C_OPERAND_DST16RNHI :
3150 value = fields->f_dst16_rn;
3151 break;
3152 case M32C_OPERAND_DST16RNQI :
3153 value = fields->f_dst16_rn;
3154 break;
3155 case M32C_OPERAND_DST16RNQI_S :
3156 value = fields->f_dst16_rn_QI_s;
3157 break;
3158 case M32C_OPERAND_DST16RNSI :
3159 value = fields->f_dst16_rn;
3160 break;
3161 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3162 value = fields->f_dst32_an_unprefixed;
3163 break;
3164 case M32C_OPERAND_DST32ANPREFIXED :
3165 value = fields->f_dst32_an_prefixed;
3166 break;
3167 case M32C_OPERAND_DST32ANPREFIXEDHI :
3168 value = fields->f_dst32_an_prefixed;
3169 break;
3170 case M32C_OPERAND_DST32ANPREFIXEDQI :
3171 value = fields->f_dst32_an_prefixed;
3172 break;
3173 case M32C_OPERAND_DST32ANPREFIXEDSI :
3174 value = fields->f_dst32_an_prefixed;
3175 break;
3176 case M32C_OPERAND_DST32ANUNPREFIXED :
3177 value = fields->f_dst32_an_unprefixed;
3178 break;
3179 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3180 value = fields->f_dst32_an_unprefixed;
3181 break;
3182 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3183 value = fields->f_dst32_an_unprefixed;
3184 break;
3185 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3186 value = fields->f_dst32_an_unprefixed;
3187 break;
3188 case M32C_OPERAND_DST32R0HI_S :
3189 value = 0;
3190 break;
3191 case M32C_OPERAND_DST32R0QI_S :
3192 value = 0;
3193 break;
3194 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3195 value = fields->f_dst32_rn_ext_unprefixed;
3196 break;
3197 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3198 value = fields->f_dst32_rn_ext_unprefixed;
3199 break;
3200 case M32C_OPERAND_DST32RNPREFIXEDHI :
3201 value = fields->f_dst32_rn_prefixed_HI;
3202 break;
3203 case M32C_OPERAND_DST32RNPREFIXEDQI :
3204 value = fields->f_dst32_rn_prefixed_QI;
3205 break;
3206 case M32C_OPERAND_DST32RNPREFIXEDSI :
3207 value = fields->f_dst32_rn_prefixed_SI;
3208 break;
3209 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3210 value = fields->f_dst32_rn_unprefixed_HI;
3211 break;
3212 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3213 value = fields->f_dst32_rn_unprefixed_QI;
3214 break;
3215 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3216 value = fields->f_dst32_rn_unprefixed_SI;
3217 break;
3218 case M32C_OPERAND_G :
3219 value = 0;
3220 break;
3221 case M32C_OPERAND_IMM_12_S4 :
3222 value = fields->f_imm_12_s4;
3223 break;
3224 case M32C_OPERAND_IMM_12_S4N :
3225 value = fields->f_imm_12_s4;
3226 break;
3227 case M32C_OPERAND_IMM_13_U3 :
3228 value = fields->f_imm_13_u3;
3229 break;
3230 case M32C_OPERAND_IMM_16_HI :
3231 value = fields->f_dsp_16_s16;
3232 break;
3233 case M32C_OPERAND_IMM_16_QI :
3234 value = fields->f_dsp_16_s8;
3235 break;
3236 case M32C_OPERAND_IMM_16_SI :
3237 value = fields->f_dsp_16_s32;
3238 break;
3239 case M32C_OPERAND_IMM_20_S4 :
3240 value = fields->f_imm_20_s4;
3241 break;
3242 case M32C_OPERAND_IMM_24_HI :
3243 value = fields->f_dsp_24_s16;
3244 break;
3245 case M32C_OPERAND_IMM_24_QI :
3246 value = fields->f_dsp_24_s8;
3247 break;
3248 case M32C_OPERAND_IMM_24_SI :
3249 value = fields->f_dsp_24_s32;
3250 break;
3251 case M32C_OPERAND_IMM_32_HI :
3252 value = fields->f_dsp_32_s16;
3253 break;
3254 case M32C_OPERAND_IMM_32_QI :
3255 value = fields->f_dsp_32_s8;
3256 break;
3257 case M32C_OPERAND_IMM_32_SI :
3258 value = fields->f_dsp_32_s32;
3259 break;
3260 case M32C_OPERAND_IMM_40_HI :
3261 value = fields->f_dsp_40_s16;
3262 break;
3263 case M32C_OPERAND_IMM_40_QI :
3264 value = fields->f_dsp_40_s8;
3265 break;
3266 case M32C_OPERAND_IMM_40_SI :
3267 value = fields->f_dsp_40_s32;
3268 break;
3269 case M32C_OPERAND_IMM_48_HI :
3270 value = fields->f_dsp_48_s16;
3271 break;
3272 case M32C_OPERAND_IMM_48_QI :
3273 value = fields->f_dsp_48_s8;
3274 break;
3275 case M32C_OPERAND_IMM_48_SI :
3276 value = fields->f_dsp_48_s32;
3277 break;
3278 case M32C_OPERAND_IMM_56_HI :
3279 value = fields->f_dsp_56_s16;
3280 break;
3281 case M32C_OPERAND_IMM_56_QI :
3282 value = fields->f_dsp_56_s8;
3283 break;
3284 case M32C_OPERAND_IMM_64_HI :
3285 value = fields->f_dsp_64_s16;
3286 break;
3287 case M32C_OPERAND_IMM_8_HI :
3288 value = fields->f_dsp_8_s16;
3289 break;
3290 case M32C_OPERAND_IMM_8_QI :
3291 value = fields->f_dsp_8_s8;
3292 break;
3293 case M32C_OPERAND_IMM_8_S4 :
3294 value = fields->f_imm_8_s4;
3295 break;
3296 case M32C_OPERAND_IMM_8_S4N :
3297 value = fields->f_imm_8_s4;
3298 break;
3299 case M32C_OPERAND_IMM_SH_12_S4 :
3300 value = fields->f_imm_12_s4;
3301 break;
3302 case M32C_OPERAND_IMM_SH_20_S4 :
3303 value = fields->f_imm_20_s4;
3304 break;
3305 case M32C_OPERAND_IMM_SH_8_S4 :
3306 value = fields->f_imm_8_s4;
3307 break;
3308 case M32C_OPERAND_IMM1_S :
3309 value = fields->f_imm1_S;
3310 break;
3311 case M32C_OPERAND_IMM3_S :
3312 value = fields->f_imm3_S;
3313 break;
3314 case M32C_OPERAND_LAB_16_8 :
3315 value = fields->f_lab_16_8;
3316 break;
3317 case M32C_OPERAND_LAB_24_8 :
3318 value = fields->f_lab_24_8;
3319 break;
3320 case M32C_OPERAND_LAB_32_8 :
3321 value = fields->f_lab_32_8;
3322 break;
3323 case M32C_OPERAND_LAB_40_8 :
3324 value = fields->f_lab_40_8;
3325 break;
3326 case M32C_OPERAND_LAB_5_3 :
3327 value = fields->f_lab_5_3;
3328 break;
3329 case M32C_OPERAND_LAB_8_16 :
3330 value = fields->f_lab_8_16;
3331 break;
3332 case M32C_OPERAND_LAB_8_24 :
3333 value = fields->f_lab_8_24;
3334 break;
3335 case M32C_OPERAND_LAB_8_8 :
3336 value = fields->f_lab_8_8;
3337 break;
3338 case M32C_OPERAND_LAB32_JMP_S :
3339 value = fields->f_lab32_jmp_s;
3340 break;
3341 case M32C_OPERAND_Q :
3342 value = 0;
3343 break;
3344 case M32C_OPERAND_R0 :
3345 value = 0;
3346 break;
3347 case M32C_OPERAND_R0H :
3348 value = 0;
3349 break;
3350 case M32C_OPERAND_R0L :
3351 value = 0;
3352 break;
3353 case M32C_OPERAND_R1 :
3354 value = 0;
3355 break;
3356 case M32C_OPERAND_R1R2R0 :
3357 value = 0;
3358 break;
3359 case M32C_OPERAND_R2 :
3360 value = 0;
3361 break;
3362 case M32C_OPERAND_R2R0 :
3363 value = 0;
3364 break;
3365 case M32C_OPERAND_R3 :
3366 value = 0;
3367 break;
3368 case M32C_OPERAND_R3R1 :
3369 value = 0;
3370 break;
3371 case M32C_OPERAND_REGSETPOP :
3372 value = fields->f_8_8;
3373 break;
3374 case M32C_OPERAND_REGSETPUSH :
3375 value = fields->f_8_8;
3376 break;
3377 case M32C_OPERAND_RN16_PUSH_S :
3378 value = fields->f_4_1;
3379 break;
3380 case M32C_OPERAND_S :
3381 value = 0;
3382 break;
3383 case M32C_OPERAND_SRC16AN :
3384 value = fields->f_src16_an;
3385 break;
3386 case M32C_OPERAND_SRC16ANHI :
3387 value = fields->f_src16_an;
3388 break;
3389 case M32C_OPERAND_SRC16ANQI :
3390 value = fields->f_src16_an;
3391 break;
3392 case M32C_OPERAND_SRC16RNHI :
3393 value = fields->f_src16_rn;
3394 break;
3395 case M32C_OPERAND_SRC16RNQI :
3396 value = fields->f_src16_rn;
3397 break;
3398 case M32C_OPERAND_SRC32ANPREFIXED :
3399 value = fields->f_src32_an_prefixed;
3400 break;
3401 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3402 value = fields->f_src32_an_prefixed;
3403 break;
3404 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3405 value = fields->f_src32_an_prefixed;
3406 break;
3407 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3408 value = fields->f_src32_an_prefixed;
3409 break;
3410 case M32C_OPERAND_SRC32ANUNPREFIXED :
3411 value = fields->f_src32_an_unprefixed;
3412 break;
3413 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3414 value = fields->f_src32_an_unprefixed;
3415 break;
3416 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3417 value = fields->f_src32_an_unprefixed;
3418 break;
3419 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3420 value = fields->f_src32_an_unprefixed;
3421 break;
3422 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3423 value = fields->f_src32_rn_prefixed_HI;
3424 break;
3425 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3426 value = fields->f_src32_rn_prefixed_QI;
3427 break;
3428 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3429 value = fields->f_src32_rn_prefixed_SI;
3430 break;
3431 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3432 value = fields->f_src32_rn_unprefixed_HI;
3433 break;
3434 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3435 value = fields->f_src32_rn_unprefixed_QI;
3436 break;
3437 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3438 value = fields->f_src32_rn_unprefixed_SI;
3439 break;
3440 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3441 value = fields->f_5_1;
3442 break;
3443 case M32C_OPERAND_X :
3444 value = 0;
3445 break;
3446 case M32C_OPERAND_Z :
3447 value = 0;
3448 break;
3449 case M32C_OPERAND_COND16_16 :
3450 value = fields->f_dsp_16_u8;
3451 break;
3452 case M32C_OPERAND_COND16_24 :
3453 value = fields->f_dsp_24_u8;
3454 break;
3455 case M32C_OPERAND_COND16_32 :
3456 value = fields->f_dsp_32_u8;
3457 break;
3458 case M32C_OPERAND_COND16C :
3459 value = fields->f_cond16;
3460 break;
3461 case M32C_OPERAND_COND16J :
3462 value = fields->f_cond16;
3463 break;
3464 case M32C_OPERAND_COND16J5 :
3465 value = fields->f_cond16j_5;
3466 break;
3467 case M32C_OPERAND_COND32 :
3468 value = fields->f_cond32;
3469 break;
3470 case M32C_OPERAND_COND32_16 :
3471 value = fields->f_dsp_16_u8;
3472 break;
3473 case M32C_OPERAND_COND32_24 :
3474 value = fields->f_dsp_24_u8;
3475 break;
3476 case M32C_OPERAND_COND32_32 :
3477 value = fields->f_dsp_32_u8;
3478 break;
3479 case M32C_OPERAND_COND32_40 :
3480 value = fields->f_dsp_40_u8;
3481 break;
3482 case M32C_OPERAND_COND32J :
3483 value = fields->f_cond32j;
3484 break;
3485 case M32C_OPERAND_CR1_PREFIXED_32 :
3486 value = fields->f_21_3;
3487 break;
3488 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3489 value = fields->f_13_3;
3490 break;
3491 case M32C_OPERAND_CR16 :
3492 value = fields->f_9_3;
3493 break;
3494 case M32C_OPERAND_CR2_32 :
3495 value = fields->f_13_3;
3496 break;
3497 case M32C_OPERAND_CR3_PREFIXED_32 :
3498 value = fields->f_21_3;
3499 break;
3500 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3501 value = fields->f_13_3;
3502 break;
3503 case M32C_OPERAND_FLAGS16 :
3504 value = fields->f_9_3;
3505 break;
3506 case M32C_OPERAND_FLAGS32 :
3507 value = fields->f_13_3;
3508 break;
3509 case M32C_OPERAND_SCCOND32 :
3510 value = fields->f_cond16;
3511 break;
3512 case M32C_OPERAND_SIZE :
3513 value = 0;
3514 break;
3515
3516 default :
3517 /* xgettext:c-format */
3518 opcodes_error_handler
3519 (_("internal error: unrecognized field %d while getting int operand"),
3520 opindex);
3521 abort ();
3522 }
3523
3524 return value;
3525 }
3526
3527 bfd_vma
3528 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3529 int opindex,
3530 const CGEN_FIELDS * fields)
3531 {
3532 bfd_vma value;
3533
3534 switch (opindex)
3535 {
3536 case M32C_OPERAND_A0 :
3537 value = 0;
3538 break;
3539 case M32C_OPERAND_A1 :
3540 value = 0;
3541 break;
3542 case M32C_OPERAND_AN16_PUSH_S :
3543 value = fields->f_4_1;
3544 break;
3545 case M32C_OPERAND_BIT16AN :
3546 value = fields->f_dst16_an;
3547 break;
3548 case M32C_OPERAND_BIT16RN :
3549 value = fields->f_dst16_rn;
3550 break;
3551 case M32C_OPERAND_BIT3_S :
3552 value = fields->f_imm3_S;
3553 break;
3554 case M32C_OPERAND_BIT32ANPREFIXED :
3555 value = fields->f_dst32_an_prefixed;
3556 break;
3557 case M32C_OPERAND_BIT32ANUNPREFIXED :
3558 value = fields->f_dst32_an_unprefixed;
3559 break;
3560 case M32C_OPERAND_BIT32RNPREFIXED :
3561 value = fields->f_dst32_rn_prefixed_QI;
3562 break;
3563 case M32C_OPERAND_BIT32RNUNPREFIXED :
3564 value = fields->f_dst32_rn_unprefixed_QI;
3565 break;
3566 case M32C_OPERAND_BITBASE16_16_S8 :
3567 value = fields->f_dsp_16_s8;
3568 break;
3569 case M32C_OPERAND_BITBASE16_16_U16 :
3570 value = fields->f_dsp_16_u16;
3571 break;
3572 case M32C_OPERAND_BITBASE16_16_U8 :
3573 value = fields->f_dsp_16_u8;
3574 break;
3575 case M32C_OPERAND_BITBASE16_8_U11_S :
3576 value = fields->f_bitbase16_u11_S;
3577 break;
3578 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3579 value = fields->f_bitbase32_16_s11_unprefixed;
3580 break;
3581 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3582 value = fields->f_bitbase32_16_s19_unprefixed;
3583 break;
3584 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3585 value = fields->f_bitbase32_16_u11_unprefixed;
3586 break;
3587 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3588 value = fields->f_bitbase32_16_u19_unprefixed;
3589 break;
3590 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3591 value = fields->f_bitbase32_16_u27_unprefixed;
3592 break;
3593 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3594 value = fields->f_bitbase32_24_s11_prefixed;
3595 break;
3596 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3597 value = fields->f_bitbase32_24_s19_prefixed;
3598 break;
3599 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3600 value = fields->f_bitbase32_24_u11_prefixed;
3601 break;
3602 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3603 value = fields->f_bitbase32_24_u19_prefixed;
3604 break;
3605 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3606 value = fields->f_bitbase32_24_u27_prefixed;
3607 break;
3608 case M32C_OPERAND_BITNO16R :
3609 value = fields->f_dsp_16_u8;
3610 break;
3611 case M32C_OPERAND_BITNO32PREFIXED :
3612 value = fields->f_bitno32_prefixed;
3613 break;
3614 case M32C_OPERAND_BITNO32UNPREFIXED :
3615 value = fields->f_bitno32_unprefixed;
3616 break;
3617 case M32C_OPERAND_DSP_10_U6 :
3618 value = fields->f_dsp_10_u6;
3619 break;
3620 case M32C_OPERAND_DSP_16_S16 :
3621 value = fields->f_dsp_16_s16;
3622 break;
3623 case M32C_OPERAND_DSP_16_S8 :
3624 value = fields->f_dsp_16_s8;
3625 break;
3626 case M32C_OPERAND_DSP_16_U16 :
3627 value = fields->f_dsp_16_u16;
3628 break;
3629 case M32C_OPERAND_DSP_16_U20 :
3630 value = fields->f_dsp_16_u24;
3631 break;
3632 case M32C_OPERAND_DSP_16_U24 :
3633 value = fields->f_dsp_16_u24;
3634 break;
3635 case M32C_OPERAND_DSP_16_U8 :
3636 value = fields->f_dsp_16_u8;
3637 break;
3638 case M32C_OPERAND_DSP_24_S16 :
3639 value = fields->f_dsp_24_s16;
3640 break;
3641 case M32C_OPERAND_DSP_24_S8 :
3642 value = fields->f_dsp_24_s8;
3643 break;
3644 case M32C_OPERAND_DSP_24_U16 :
3645 value = fields->f_dsp_24_u16;
3646 break;
3647 case M32C_OPERAND_DSP_24_U20 :
3648 value = fields->f_dsp_24_u24;
3649 break;
3650 case M32C_OPERAND_DSP_24_U24 :
3651 value = fields->f_dsp_24_u24;
3652 break;
3653 case M32C_OPERAND_DSP_24_U8 :
3654 value = fields->f_dsp_24_u8;
3655 break;
3656 case M32C_OPERAND_DSP_32_S16 :
3657 value = fields->f_dsp_32_s16;
3658 break;
3659 case M32C_OPERAND_DSP_32_S8 :
3660 value = fields->f_dsp_32_s8;
3661 break;
3662 case M32C_OPERAND_DSP_32_U16 :
3663 value = fields->f_dsp_32_u16;
3664 break;
3665 case M32C_OPERAND_DSP_32_U20 :
3666 value = fields->f_dsp_32_u24;
3667 break;
3668 case M32C_OPERAND_DSP_32_U24 :
3669 value = fields->f_dsp_32_u24;
3670 break;
3671 case M32C_OPERAND_DSP_32_U8 :
3672 value = fields->f_dsp_32_u8;
3673 break;
3674 case M32C_OPERAND_DSP_40_S16 :
3675 value = fields->f_dsp_40_s16;
3676 break;
3677 case M32C_OPERAND_DSP_40_S8 :
3678 value = fields->f_dsp_40_s8;
3679 break;
3680 case M32C_OPERAND_DSP_40_U16 :
3681 value = fields->f_dsp_40_u16;
3682 break;
3683 case M32C_OPERAND_DSP_40_U20 :
3684 value = fields->f_dsp_40_u20;
3685 break;
3686 case M32C_OPERAND_DSP_40_U24 :
3687 value = fields->f_dsp_40_u24;
3688 break;
3689 case M32C_OPERAND_DSP_40_U8 :
3690 value = fields->f_dsp_40_u8;
3691 break;
3692 case M32C_OPERAND_DSP_48_S16 :
3693 value = fields->f_dsp_48_s16;
3694 break;
3695 case M32C_OPERAND_DSP_48_S8 :
3696 value = fields->f_dsp_48_s8;
3697 break;
3698 case M32C_OPERAND_DSP_48_U16 :
3699 value = fields->f_dsp_48_u16;
3700 break;
3701 case M32C_OPERAND_DSP_48_U20 :
3702 value = fields->f_dsp_48_u20;
3703 break;
3704 case M32C_OPERAND_DSP_48_U24 :
3705 value = fields->f_dsp_48_u24;
3706 break;
3707 case M32C_OPERAND_DSP_48_U8 :
3708 value = fields->f_dsp_48_u8;
3709 break;
3710 case M32C_OPERAND_DSP_8_S24 :
3711 value = fields->f_dsp_8_s24;
3712 break;
3713 case M32C_OPERAND_DSP_8_S8 :
3714 value = fields->f_dsp_8_s8;
3715 break;
3716 case M32C_OPERAND_DSP_8_U16 :
3717 value = fields->f_dsp_8_u16;
3718 break;
3719 case M32C_OPERAND_DSP_8_U24 :
3720 value = fields->f_dsp_8_u24;
3721 break;
3722 case M32C_OPERAND_DSP_8_U6 :
3723 value = fields->f_dsp_8_u6;
3724 break;
3725 case M32C_OPERAND_DSP_8_U8 :
3726 value = fields->f_dsp_8_u8;
3727 break;
3728 case M32C_OPERAND_DST16AN :
3729 value = fields->f_dst16_an;
3730 break;
3731 case M32C_OPERAND_DST16AN_S :
3732 value = fields->f_dst16_an_s;
3733 break;
3734 case M32C_OPERAND_DST16ANHI :
3735 value = fields->f_dst16_an;
3736 break;
3737 case M32C_OPERAND_DST16ANQI :
3738 value = fields->f_dst16_an;
3739 break;
3740 case M32C_OPERAND_DST16ANQI_S :
3741 value = fields->f_dst16_rn_QI_s;
3742 break;
3743 case M32C_OPERAND_DST16ANSI :
3744 value = fields->f_dst16_an;
3745 break;
3746 case M32C_OPERAND_DST16RNEXTQI :
3747 value = fields->f_dst16_rn_ext;
3748 break;
3749 case M32C_OPERAND_DST16RNHI :
3750 value = fields->f_dst16_rn;
3751 break;
3752 case M32C_OPERAND_DST16RNQI :
3753 value = fields->f_dst16_rn;
3754 break;
3755 case M32C_OPERAND_DST16RNQI_S :
3756 value = fields->f_dst16_rn_QI_s;
3757 break;
3758 case M32C_OPERAND_DST16RNSI :
3759 value = fields->f_dst16_rn;
3760 break;
3761 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3762 value = fields->f_dst32_an_unprefixed;
3763 break;
3764 case M32C_OPERAND_DST32ANPREFIXED :
3765 value = fields->f_dst32_an_prefixed;
3766 break;
3767 case M32C_OPERAND_DST32ANPREFIXEDHI :
3768 value = fields->f_dst32_an_prefixed;
3769 break;
3770 case M32C_OPERAND_DST32ANPREFIXEDQI :
3771 value = fields->f_dst32_an_prefixed;
3772 break;
3773 case M32C_OPERAND_DST32ANPREFIXEDSI :
3774 value = fields->f_dst32_an_prefixed;
3775 break;
3776 case M32C_OPERAND_DST32ANUNPREFIXED :
3777 value = fields->f_dst32_an_unprefixed;
3778 break;
3779 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3780 value = fields->f_dst32_an_unprefixed;
3781 break;
3782 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3783 value = fields->f_dst32_an_unprefixed;
3784 break;
3785 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3786 value = fields->f_dst32_an_unprefixed;
3787 break;
3788 case M32C_OPERAND_DST32R0HI_S :
3789 value = 0;
3790 break;
3791 case M32C_OPERAND_DST32R0QI_S :
3792 value = 0;
3793 break;
3794 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3795 value = fields->f_dst32_rn_ext_unprefixed;
3796 break;
3797 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3798 value = fields->f_dst32_rn_ext_unprefixed;
3799 break;
3800 case M32C_OPERAND_DST32RNPREFIXEDHI :
3801 value = fields->f_dst32_rn_prefixed_HI;
3802 break;
3803 case M32C_OPERAND_DST32RNPREFIXEDQI :
3804 value = fields->f_dst32_rn_prefixed_QI;
3805 break;
3806 case M32C_OPERAND_DST32RNPREFIXEDSI :
3807 value = fields->f_dst32_rn_prefixed_SI;
3808 break;
3809 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3810 value = fields->f_dst32_rn_unprefixed_HI;
3811 break;
3812 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3813 value = fields->f_dst32_rn_unprefixed_QI;
3814 break;
3815 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3816 value = fields->f_dst32_rn_unprefixed_SI;
3817 break;
3818 case M32C_OPERAND_G :
3819 value = 0;
3820 break;
3821 case M32C_OPERAND_IMM_12_S4 :
3822 value = fields->f_imm_12_s4;
3823 break;
3824 case M32C_OPERAND_IMM_12_S4N :
3825 value = fields->f_imm_12_s4;
3826 break;
3827 case M32C_OPERAND_IMM_13_U3 :
3828 value = fields->f_imm_13_u3;
3829 break;
3830 case M32C_OPERAND_IMM_16_HI :
3831 value = fields->f_dsp_16_s16;
3832 break;
3833 case M32C_OPERAND_IMM_16_QI :
3834 value = fields->f_dsp_16_s8;
3835 break;
3836 case M32C_OPERAND_IMM_16_SI :
3837 value = fields->f_dsp_16_s32;
3838 break;
3839 case M32C_OPERAND_IMM_20_S4 :
3840 value = fields->f_imm_20_s4;
3841 break;
3842 case M32C_OPERAND_IMM_24_HI :
3843 value = fields->f_dsp_24_s16;
3844 break;
3845 case M32C_OPERAND_IMM_24_QI :
3846 value = fields->f_dsp_24_s8;
3847 break;
3848 case M32C_OPERAND_IMM_24_SI :
3849 value = fields->f_dsp_24_s32;
3850 break;
3851 case M32C_OPERAND_IMM_32_HI :
3852 value = fields->f_dsp_32_s16;
3853 break;
3854 case M32C_OPERAND_IMM_32_QI :
3855 value = fields->f_dsp_32_s8;
3856 break;
3857 case M32C_OPERAND_IMM_32_SI :
3858 value = fields->f_dsp_32_s32;
3859 break;
3860 case M32C_OPERAND_IMM_40_HI :
3861 value = fields->f_dsp_40_s16;
3862 break;
3863 case M32C_OPERAND_IMM_40_QI :
3864 value = fields->f_dsp_40_s8;
3865 break;
3866 case M32C_OPERAND_IMM_40_SI :
3867 value = fields->f_dsp_40_s32;
3868 break;
3869 case M32C_OPERAND_IMM_48_HI :
3870 value = fields->f_dsp_48_s16;
3871 break;
3872 case M32C_OPERAND_IMM_48_QI :
3873 value = fields->f_dsp_48_s8;
3874 break;
3875 case M32C_OPERAND_IMM_48_SI :
3876 value = fields->f_dsp_48_s32;
3877 break;
3878 case M32C_OPERAND_IMM_56_HI :
3879 value = fields->f_dsp_56_s16;
3880 break;
3881 case M32C_OPERAND_IMM_56_QI :
3882 value = fields->f_dsp_56_s8;
3883 break;
3884 case M32C_OPERAND_IMM_64_HI :
3885 value = fields->f_dsp_64_s16;
3886 break;
3887 case M32C_OPERAND_IMM_8_HI :
3888 value = fields->f_dsp_8_s16;
3889 break;
3890 case M32C_OPERAND_IMM_8_QI :
3891 value = fields->f_dsp_8_s8;
3892 break;
3893 case M32C_OPERAND_IMM_8_S4 :
3894 value = fields->f_imm_8_s4;
3895 break;
3896 case M32C_OPERAND_IMM_8_S4N :
3897 value = fields->f_imm_8_s4;
3898 break;
3899 case M32C_OPERAND_IMM_SH_12_S4 :
3900 value = fields->f_imm_12_s4;
3901 break;
3902 case M32C_OPERAND_IMM_SH_20_S4 :
3903 value = fields->f_imm_20_s4;
3904 break;
3905 case M32C_OPERAND_IMM_SH_8_S4 :
3906 value = fields->f_imm_8_s4;
3907 break;
3908 case M32C_OPERAND_IMM1_S :
3909 value = fields->f_imm1_S;
3910 break;
3911 case M32C_OPERAND_IMM3_S :
3912 value = fields->f_imm3_S;
3913 break;
3914 case M32C_OPERAND_LAB_16_8 :
3915 value = fields->f_lab_16_8;
3916 break;
3917 case M32C_OPERAND_LAB_24_8 :
3918 value = fields->f_lab_24_8;
3919 break;
3920 case M32C_OPERAND_LAB_32_8 :
3921 value = fields->f_lab_32_8;
3922 break;
3923 case M32C_OPERAND_LAB_40_8 :
3924 value = fields->f_lab_40_8;
3925 break;
3926 case M32C_OPERAND_LAB_5_3 :
3927 value = fields->f_lab_5_3;
3928 break;
3929 case M32C_OPERAND_LAB_8_16 :
3930 value = fields->f_lab_8_16;
3931 break;
3932 case M32C_OPERAND_LAB_8_24 :
3933 value = fields->f_lab_8_24;
3934 break;
3935 case M32C_OPERAND_LAB_8_8 :
3936 value = fields->f_lab_8_8;
3937 break;
3938 case M32C_OPERAND_LAB32_JMP_S :
3939 value = fields->f_lab32_jmp_s;
3940 break;
3941 case M32C_OPERAND_Q :
3942 value = 0;
3943 break;
3944 case M32C_OPERAND_R0 :
3945 value = 0;
3946 break;
3947 case M32C_OPERAND_R0H :
3948 value = 0;
3949 break;
3950 case M32C_OPERAND_R0L :
3951 value = 0;
3952 break;
3953 case M32C_OPERAND_R1 :
3954 value = 0;
3955 break;
3956 case M32C_OPERAND_R1R2R0 :
3957 value = 0;
3958 break;
3959 case M32C_OPERAND_R2 :
3960 value = 0;
3961 break;
3962 case M32C_OPERAND_R2R0 :
3963 value = 0;
3964 break;
3965 case M32C_OPERAND_R3 :
3966 value = 0;
3967 break;
3968 case M32C_OPERAND_R3R1 :
3969 value = 0;
3970 break;
3971 case M32C_OPERAND_REGSETPOP :
3972 value = fields->f_8_8;
3973 break;
3974 case M32C_OPERAND_REGSETPUSH :
3975 value = fields->f_8_8;
3976 break;
3977 case M32C_OPERAND_RN16_PUSH_S :
3978 value = fields->f_4_1;
3979 break;
3980 case M32C_OPERAND_S :
3981 value = 0;
3982 break;
3983 case M32C_OPERAND_SRC16AN :
3984 value = fields->f_src16_an;
3985 break;
3986 case M32C_OPERAND_SRC16ANHI :
3987 value = fields->f_src16_an;
3988 break;
3989 case M32C_OPERAND_SRC16ANQI :
3990 value = fields->f_src16_an;
3991 break;
3992 case M32C_OPERAND_SRC16RNHI :
3993 value = fields->f_src16_rn;
3994 break;
3995 case M32C_OPERAND_SRC16RNQI :
3996 value = fields->f_src16_rn;
3997 break;
3998 case M32C_OPERAND_SRC32ANPREFIXED :
3999 value = fields->f_src32_an_prefixed;
4000 break;
4001 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4002 value = fields->f_src32_an_prefixed;
4003 break;
4004 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4005 value = fields->f_src32_an_prefixed;
4006 break;
4007 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4008 value = fields->f_src32_an_prefixed;
4009 break;
4010 case M32C_OPERAND_SRC32ANUNPREFIXED :
4011 value = fields->f_src32_an_unprefixed;
4012 break;
4013 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4014 value = fields->f_src32_an_unprefixed;
4015 break;
4016 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4017 value = fields->f_src32_an_unprefixed;
4018 break;
4019 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4020 value = fields->f_src32_an_unprefixed;
4021 break;
4022 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4023 value = fields->f_src32_rn_prefixed_HI;
4024 break;
4025 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4026 value = fields->f_src32_rn_prefixed_QI;
4027 break;
4028 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4029 value = fields->f_src32_rn_prefixed_SI;
4030 break;
4031 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4032 value = fields->f_src32_rn_unprefixed_HI;
4033 break;
4034 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4035 value = fields->f_src32_rn_unprefixed_QI;
4036 break;
4037 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4038 value = fields->f_src32_rn_unprefixed_SI;
4039 break;
4040 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4041 value = fields->f_5_1;
4042 break;
4043 case M32C_OPERAND_X :
4044 value = 0;
4045 break;
4046 case M32C_OPERAND_Z :
4047 value = 0;
4048 break;
4049 case M32C_OPERAND_COND16_16 :
4050 value = fields->f_dsp_16_u8;
4051 break;
4052 case M32C_OPERAND_COND16_24 :
4053 value = fields->f_dsp_24_u8;
4054 break;
4055 case M32C_OPERAND_COND16_32 :
4056 value = fields->f_dsp_32_u8;
4057 break;
4058 case M32C_OPERAND_COND16C :
4059 value = fields->f_cond16;
4060 break;
4061 case M32C_OPERAND_COND16J :
4062 value = fields->f_cond16;
4063 break;
4064 case M32C_OPERAND_COND16J5 :
4065 value = fields->f_cond16j_5;
4066 break;
4067 case M32C_OPERAND_COND32 :
4068 value = fields->f_cond32;
4069 break;
4070 case M32C_OPERAND_COND32_16 :
4071 value = fields->f_dsp_16_u8;
4072 break;
4073 case M32C_OPERAND_COND32_24 :
4074 value = fields->f_dsp_24_u8;
4075 break;
4076 case M32C_OPERAND_COND32_32 :
4077 value = fields->f_dsp_32_u8;
4078 break;
4079 case M32C_OPERAND_COND32_40 :
4080 value = fields->f_dsp_40_u8;
4081 break;
4082 case M32C_OPERAND_COND32J :
4083 value = fields->f_cond32j;
4084 break;
4085 case M32C_OPERAND_CR1_PREFIXED_32 :
4086 value = fields->f_21_3;
4087 break;
4088 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4089 value = fields->f_13_3;
4090 break;
4091 case M32C_OPERAND_CR16 :
4092 value = fields->f_9_3;
4093 break;
4094 case M32C_OPERAND_CR2_32 :
4095 value = fields->f_13_3;
4096 break;
4097 case M32C_OPERAND_CR3_PREFIXED_32 :
4098 value = fields->f_21_3;
4099 break;
4100 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4101 value = fields->f_13_3;
4102 break;
4103 case M32C_OPERAND_FLAGS16 :
4104 value = fields->f_9_3;
4105 break;
4106 case M32C_OPERAND_FLAGS32 :
4107 value = fields->f_13_3;
4108 break;
4109 case M32C_OPERAND_SCCOND32 :
4110 value = fields->f_cond16;
4111 break;
4112 case M32C_OPERAND_SIZE :
4113 value = 0;
4114 break;
4115
4116 default :
4117 /* xgettext:c-format */
4118 opcodes_error_handler
4119 (_("internal error: unrecognized field %d while getting vma operand"),
4120 opindex);
4121 abort ();
4122 }
4123
4124 return value;
4125 }
4126
4127 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4128 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4129
4130 /* Stuffing values in cgen_fields is handled by a collection of functions.
4131 They are distinguished by the type of the VALUE argument they accept.
4132 TODO: floating point, inlining support, remove cases where argument type
4133 not appropriate. */
4134
4135 void
4136 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4137 int opindex,
4138 CGEN_FIELDS * fields,
4139 int value)
4140 {
4141 switch (opindex)
4142 {
4143 case M32C_OPERAND_A0 :
4144 break;
4145 case M32C_OPERAND_A1 :
4146 break;
4147 case M32C_OPERAND_AN16_PUSH_S :
4148 fields->f_4_1 = value;
4149 break;
4150 case M32C_OPERAND_BIT16AN :
4151 fields->f_dst16_an = value;
4152 break;
4153 case M32C_OPERAND_BIT16RN :
4154 fields->f_dst16_rn = value;
4155 break;
4156 case M32C_OPERAND_BIT3_S :
4157 fields->f_imm3_S = value;
4158 break;
4159 case M32C_OPERAND_BIT32ANPREFIXED :
4160 fields->f_dst32_an_prefixed = value;
4161 break;
4162 case M32C_OPERAND_BIT32ANUNPREFIXED :
4163 fields->f_dst32_an_unprefixed = value;
4164 break;
4165 case M32C_OPERAND_BIT32RNPREFIXED :
4166 fields->f_dst32_rn_prefixed_QI = value;
4167 break;
4168 case M32C_OPERAND_BIT32RNUNPREFIXED :
4169 fields->f_dst32_rn_unprefixed_QI = value;
4170 break;
4171 case M32C_OPERAND_BITBASE16_16_S8 :
4172 fields->f_dsp_16_s8 = value;
4173 break;
4174 case M32C_OPERAND_BITBASE16_16_U16 :
4175 fields->f_dsp_16_u16 = value;
4176 break;
4177 case M32C_OPERAND_BITBASE16_16_U8 :
4178 fields->f_dsp_16_u8 = value;
4179 break;
4180 case M32C_OPERAND_BITBASE16_8_U11_S :
4181 fields->f_bitbase16_u11_S = value;
4182 break;
4183 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4184 fields->f_bitbase32_16_s11_unprefixed = value;
4185 break;
4186 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4187 fields->f_bitbase32_16_s19_unprefixed = value;
4188 break;
4189 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4190 fields->f_bitbase32_16_u11_unprefixed = value;
4191 break;
4192 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4193 fields->f_bitbase32_16_u19_unprefixed = value;
4194 break;
4195 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4196 fields->f_bitbase32_16_u27_unprefixed = value;
4197 break;
4198 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4199 fields->f_bitbase32_24_s11_prefixed = value;
4200 break;
4201 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4202 fields->f_bitbase32_24_s19_prefixed = value;
4203 break;
4204 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4205 fields->f_bitbase32_24_u11_prefixed = value;
4206 break;
4207 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4208 fields->f_bitbase32_24_u19_prefixed = value;
4209 break;
4210 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4211 fields->f_bitbase32_24_u27_prefixed = value;
4212 break;
4213 case M32C_OPERAND_BITNO16R :
4214 fields->f_dsp_16_u8 = value;
4215 break;
4216 case M32C_OPERAND_BITNO32PREFIXED :
4217 fields->f_bitno32_prefixed = value;
4218 break;
4219 case M32C_OPERAND_BITNO32UNPREFIXED :
4220 fields->f_bitno32_unprefixed = value;
4221 break;
4222 case M32C_OPERAND_DSP_10_U6 :
4223 fields->f_dsp_10_u6 = value;
4224 break;
4225 case M32C_OPERAND_DSP_16_S16 :
4226 fields->f_dsp_16_s16 = value;
4227 break;
4228 case M32C_OPERAND_DSP_16_S8 :
4229 fields->f_dsp_16_s8 = value;
4230 break;
4231 case M32C_OPERAND_DSP_16_U16 :
4232 fields->f_dsp_16_u16 = value;
4233 break;
4234 case M32C_OPERAND_DSP_16_U20 :
4235 fields->f_dsp_16_u24 = value;
4236 break;
4237 case M32C_OPERAND_DSP_16_U24 :
4238 fields->f_dsp_16_u24 = value;
4239 break;
4240 case M32C_OPERAND_DSP_16_U8 :
4241 fields->f_dsp_16_u8 = value;
4242 break;
4243 case M32C_OPERAND_DSP_24_S16 :
4244 fields->f_dsp_24_s16 = value;
4245 break;
4246 case M32C_OPERAND_DSP_24_S8 :
4247 fields->f_dsp_24_s8 = value;
4248 break;
4249 case M32C_OPERAND_DSP_24_U16 :
4250 fields->f_dsp_24_u16 = value;
4251 break;
4252 case M32C_OPERAND_DSP_24_U20 :
4253 fields->f_dsp_24_u24 = value;
4254 break;
4255 case M32C_OPERAND_DSP_24_U24 :
4256 fields->f_dsp_24_u24 = value;
4257 break;
4258 case M32C_OPERAND_DSP_24_U8 :
4259 fields->f_dsp_24_u8 = value;
4260 break;
4261 case M32C_OPERAND_DSP_32_S16 :
4262 fields->f_dsp_32_s16 = value;
4263 break;
4264 case M32C_OPERAND_DSP_32_S8 :
4265 fields->f_dsp_32_s8 = value;
4266 break;
4267 case M32C_OPERAND_DSP_32_U16 :
4268 fields->f_dsp_32_u16 = value;
4269 break;
4270 case M32C_OPERAND_DSP_32_U20 :
4271 fields->f_dsp_32_u24 = value;
4272 break;
4273 case M32C_OPERAND_DSP_32_U24 :
4274 fields->f_dsp_32_u24 = value;
4275 break;
4276 case M32C_OPERAND_DSP_32_U8 :
4277 fields->f_dsp_32_u8 = value;
4278 break;
4279 case M32C_OPERAND_DSP_40_S16 :
4280 fields->f_dsp_40_s16 = value;
4281 break;
4282 case M32C_OPERAND_DSP_40_S8 :
4283 fields->f_dsp_40_s8 = value;
4284 break;
4285 case M32C_OPERAND_DSP_40_U16 :
4286 fields->f_dsp_40_u16 = value;
4287 break;
4288 case M32C_OPERAND_DSP_40_U20 :
4289 fields->f_dsp_40_u20 = value;
4290 break;
4291 case M32C_OPERAND_DSP_40_U24 :
4292 fields->f_dsp_40_u24 = value;
4293 break;
4294 case M32C_OPERAND_DSP_40_U8 :
4295 fields->f_dsp_40_u8 = value;
4296 break;
4297 case M32C_OPERAND_DSP_48_S16 :
4298 fields->f_dsp_48_s16 = value;
4299 break;
4300 case M32C_OPERAND_DSP_48_S8 :
4301 fields->f_dsp_48_s8 = value;
4302 break;
4303 case M32C_OPERAND_DSP_48_U16 :
4304 fields->f_dsp_48_u16 = value;
4305 break;
4306 case M32C_OPERAND_DSP_48_U20 :
4307 fields->f_dsp_48_u20 = value;
4308 break;
4309 case M32C_OPERAND_DSP_48_U24 :
4310 fields->f_dsp_48_u24 = value;
4311 break;
4312 case M32C_OPERAND_DSP_48_U8 :
4313 fields->f_dsp_48_u8 = value;
4314 break;
4315 case M32C_OPERAND_DSP_8_S24 :
4316 fields->f_dsp_8_s24 = value;
4317 break;
4318 case M32C_OPERAND_DSP_8_S8 :
4319 fields->f_dsp_8_s8 = value;
4320 break;
4321 case M32C_OPERAND_DSP_8_U16 :
4322 fields->f_dsp_8_u16 = value;
4323 break;
4324 case M32C_OPERAND_DSP_8_U24 :
4325 fields->f_dsp_8_u24 = value;
4326 break;
4327 case M32C_OPERAND_DSP_8_U6 :
4328 fields->f_dsp_8_u6 = value;
4329 break;
4330 case M32C_OPERAND_DSP_8_U8 :
4331 fields->f_dsp_8_u8 = value;
4332 break;
4333 case M32C_OPERAND_DST16AN :
4334 fields->f_dst16_an = value;
4335 break;
4336 case M32C_OPERAND_DST16AN_S :
4337 fields->f_dst16_an_s = value;
4338 break;
4339 case M32C_OPERAND_DST16ANHI :
4340 fields->f_dst16_an = value;
4341 break;
4342 case M32C_OPERAND_DST16ANQI :
4343 fields->f_dst16_an = value;
4344 break;
4345 case M32C_OPERAND_DST16ANQI_S :
4346 fields->f_dst16_rn_QI_s = value;
4347 break;
4348 case M32C_OPERAND_DST16ANSI :
4349 fields->f_dst16_an = value;
4350 break;
4351 case M32C_OPERAND_DST16RNEXTQI :
4352 fields->f_dst16_rn_ext = value;
4353 break;
4354 case M32C_OPERAND_DST16RNHI :
4355 fields->f_dst16_rn = value;
4356 break;
4357 case M32C_OPERAND_DST16RNQI :
4358 fields->f_dst16_rn = value;
4359 break;
4360 case M32C_OPERAND_DST16RNQI_S :
4361 fields->f_dst16_rn_QI_s = value;
4362 break;
4363 case M32C_OPERAND_DST16RNSI :
4364 fields->f_dst16_rn = value;
4365 break;
4366 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4367 fields->f_dst32_an_unprefixed = value;
4368 break;
4369 case M32C_OPERAND_DST32ANPREFIXED :
4370 fields->f_dst32_an_prefixed = value;
4371 break;
4372 case M32C_OPERAND_DST32ANPREFIXEDHI :
4373 fields->f_dst32_an_prefixed = value;
4374 break;
4375 case M32C_OPERAND_DST32ANPREFIXEDQI :
4376 fields->f_dst32_an_prefixed = value;
4377 break;
4378 case M32C_OPERAND_DST32ANPREFIXEDSI :
4379 fields->f_dst32_an_prefixed = value;
4380 break;
4381 case M32C_OPERAND_DST32ANUNPREFIXED :
4382 fields->f_dst32_an_unprefixed = value;
4383 break;
4384 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4385 fields->f_dst32_an_unprefixed = value;
4386 break;
4387 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4388 fields->f_dst32_an_unprefixed = value;
4389 break;
4390 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4391 fields->f_dst32_an_unprefixed = value;
4392 break;
4393 case M32C_OPERAND_DST32R0HI_S :
4394 break;
4395 case M32C_OPERAND_DST32R0QI_S :
4396 break;
4397 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4398 fields->f_dst32_rn_ext_unprefixed = value;
4399 break;
4400 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4401 fields->f_dst32_rn_ext_unprefixed = value;
4402 break;
4403 case M32C_OPERAND_DST32RNPREFIXEDHI :
4404 fields->f_dst32_rn_prefixed_HI = value;
4405 break;
4406 case M32C_OPERAND_DST32RNPREFIXEDQI :
4407 fields->f_dst32_rn_prefixed_QI = value;
4408 break;
4409 case M32C_OPERAND_DST32RNPREFIXEDSI :
4410 fields->f_dst32_rn_prefixed_SI = value;
4411 break;
4412 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4413 fields->f_dst32_rn_unprefixed_HI = value;
4414 break;
4415 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4416 fields->f_dst32_rn_unprefixed_QI = value;
4417 break;
4418 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4419 fields->f_dst32_rn_unprefixed_SI = value;
4420 break;
4421 case M32C_OPERAND_G :
4422 break;
4423 case M32C_OPERAND_IMM_12_S4 :
4424 fields->f_imm_12_s4 = value;
4425 break;
4426 case M32C_OPERAND_IMM_12_S4N :
4427 fields->f_imm_12_s4 = value;
4428 break;
4429 case M32C_OPERAND_IMM_13_U3 :
4430 fields->f_imm_13_u3 = value;
4431 break;
4432 case M32C_OPERAND_IMM_16_HI :
4433 fields->f_dsp_16_s16 = value;
4434 break;
4435 case M32C_OPERAND_IMM_16_QI :
4436 fields->f_dsp_16_s8 = value;
4437 break;
4438 case M32C_OPERAND_IMM_16_SI :
4439 fields->f_dsp_16_s32 = value;
4440 break;
4441 case M32C_OPERAND_IMM_20_S4 :
4442 fields->f_imm_20_s4 = value;
4443 break;
4444 case M32C_OPERAND_IMM_24_HI :
4445 fields->f_dsp_24_s16 = value;
4446 break;
4447 case M32C_OPERAND_IMM_24_QI :
4448 fields->f_dsp_24_s8 = value;
4449 break;
4450 case M32C_OPERAND_IMM_24_SI :
4451 fields->f_dsp_24_s32 = value;
4452 break;
4453 case M32C_OPERAND_IMM_32_HI :
4454 fields->f_dsp_32_s16 = value;
4455 break;
4456 case M32C_OPERAND_IMM_32_QI :
4457 fields->f_dsp_32_s8 = value;
4458 break;
4459 case M32C_OPERAND_IMM_32_SI :
4460 fields->f_dsp_32_s32 = value;
4461 break;
4462 case M32C_OPERAND_IMM_40_HI :
4463 fields->f_dsp_40_s16 = value;
4464 break;
4465 case M32C_OPERAND_IMM_40_QI :
4466 fields->f_dsp_40_s8 = value;
4467 break;
4468 case M32C_OPERAND_IMM_40_SI :
4469 fields->f_dsp_40_s32 = value;
4470 break;
4471 case M32C_OPERAND_IMM_48_HI :
4472 fields->f_dsp_48_s16 = value;
4473 break;
4474 case M32C_OPERAND_IMM_48_QI :
4475 fields->f_dsp_48_s8 = value;
4476 break;
4477 case M32C_OPERAND_IMM_48_SI :
4478 fields->f_dsp_48_s32 = value;
4479 break;
4480 case M32C_OPERAND_IMM_56_HI :
4481 fields->f_dsp_56_s16 = value;
4482 break;
4483 case M32C_OPERAND_IMM_56_QI :
4484 fields->f_dsp_56_s8 = value;
4485 break;
4486 case M32C_OPERAND_IMM_64_HI :
4487 fields->f_dsp_64_s16 = value;
4488 break;
4489 case M32C_OPERAND_IMM_8_HI :
4490 fields->f_dsp_8_s16 = value;
4491 break;
4492 case M32C_OPERAND_IMM_8_QI :
4493 fields->f_dsp_8_s8 = value;
4494 break;
4495 case M32C_OPERAND_IMM_8_S4 :
4496 fields->f_imm_8_s4 = value;
4497 break;
4498 case M32C_OPERAND_IMM_8_S4N :
4499 fields->f_imm_8_s4 = value;
4500 break;
4501 case M32C_OPERAND_IMM_SH_12_S4 :
4502 fields->f_imm_12_s4 = value;
4503 break;
4504 case M32C_OPERAND_IMM_SH_20_S4 :
4505 fields->f_imm_20_s4 = value;
4506 break;
4507 case M32C_OPERAND_IMM_SH_8_S4 :
4508 fields->f_imm_8_s4 = value;
4509 break;
4510 case M32C_OPERAND_IMM1_S :
4511 fields->f_imm1_S = value;
4512 break;
4513 case M32C_OPERAND_IMM3_S :
4514 fields->f_imm3_S = value;
4515 break;
4516 case M32C_OPERAND_LAB_16_8 :
4517 fields->f_lab_16_8 = value;
4518 break;
4519 case M32C_OPERAND_LAB_24_8 :
4520 fields->f_lab_24_8 = value;
4521 break;
4522 case M32C_OPERAND_LAB_32_8 :
4523 fields->f_lab_32_8 = value;
4524 break;
4525 case M32C_OPERAND_LAB_40_8 :
4526 fields->f_lab_40_8 = value;
4527 break;
4528 case M32C_OPERAND_LAB_5_3 :
4529 fields->f_lab_5_3 = value;
4530 break;
4531 case M32C_OPERAND_LAB_8_16 :
4532 fields->f_lab_8_16 = value;
4533 break;
4534 case M32C_OPERAND_LAB_8_24 :
4535 fields->f_lab_8_24 = value;
4536 break;
4537 case M32C_OPERAND_LAB_8_8 :
4538 fields->f_lab_8_8 = value;
4539 break;
4540 case M32C_OPERAND_LAB32_JMP_S :
4541 fields->f_lab32_jmp_s = value;
4542 break;
4543 case M32C_OPERAND_Q :
4544 break;
4545 case M32C_OPERAND_R0 :
4546 break;
4547 case M32C_OPERAND_R0H :
4548 break;
4549 case M32C_OPERAND_R0L :
4550 break;
4551 case M32C_OPERAND_R1 :
4552 break;
4553 case M32C_OPERAND_R1R2R0 :
4554 break;
4555 case M32C_OPERAND_R2 :
4556 break;
4557 case M32C_OPERAND_R2R0 :
4558 break;
4559 case M32C_OPERAND_R3 :
4560 break;
4561 case M32C_OPERAND_R3R1 :
4562 break;
4563 case M32C_OPERAND_REGSETPOP :
4564 fields->f_8_8 = value;
4565 break;
4566 case M32C_OPERAND_REGSETPUSH :
4567 fields->f_8_8 = value;
4568 break;
4569 case M32C_OPERAND_RN16_PUSH_S :
4570 fields->f_4_1 = value;
4571 break;
4572 case M32C_OPERAND_S :
4573 break;
4574 case M32C_OPERAND_SRC16AN :
4575 fields->f_src16_an = value;
4576 break;
4577 case M32C_OPERAND_SRC16ANHI :
4578 fields->f_src16_an = value;
4579 break;
4580 case M32C_OPERAND_SRC16ANQI :
4581 fields->f_src16_an = value;
4582 break;
4583 case M32C_OPERAND_SRC16RNHI :
4584 fields->f_src16_rn = value;
4585 break;
4586 case M32C_OPERAND_SRC16RNQI :
4587 fields->f_src16_rn = value;
4588 break;
4589 case M32C_OPERAND_SRC32ANPREFIXED :
4590 fields->f_src32_an_prefixed = value;
4591 break;
4592 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4593 fields->f_src32_an_prefixed = value;
4594 break;
4595 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4596 fields->f_src32_an_prefixed = value;
4597 break;
4598 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4599 fields->f_src32_an_prefixed = value;
4600 break;
4601 case M32C_OPERAND_SRC32ANUNPREFIXED :
4602 fields->f_src32_an_unprefixed = value;
4603 break;
4604 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4605 fields->f_src32_an_unprefixed = value;
4606 break;
4607 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4608 fields->f_src32_an_unprefixed = value;
4609 break;
4610 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4611 fields->f_src32_an_unprefixed = value;
4612 break;
4613 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4614 fields->f_src32_rn_prefixed_HI = value;
4615 break;
4616 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4617 fields->f_src32_rn_prefixed_QI = value;
4618 break;
4619 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4620 fields->f_src32_rn_prefixed_SI = value;
4621 break;
4622 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4623 fields->f_src32_rn_unprefixed_HI = value;
4624 break;
4625 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4626 fields->f_src32_rn_unprefixed_QI = value;
4627 break;
4628 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4629 fields->f_src32_rn_unprefixed_SI = value;
4630 break;
4631 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4632 fields->f_5_1 = value;
4633 break;
4634 case M32C_OPERAND_X :
4635 break;
4636 case M32C_OPERAND_Z :
4637 break;
4638 case M32C_OPERAND_COND16_16 :
4639 fields->f_dsp_16_u8 = value;
4640 break;
4641 case M32C_OPERAND_COND16_24 :
4642 fields->f_dsp_24_u8 = value;
4643 break;
4644 case M32C_OPERAND_COND16_32 :
4645 fields->f_dsp_32_u8 = value;
4646 break;
4647 case M32C_OPERAND_COND16C :
4648 fields->f_cond16 = value;
4649 break;
4650 case M32C_OPERAND_COND16J :
4651 fields->f_cond16 = value;
4652 break;
4653 case M32C_OPERAND_COND16J5 :
4654 fields->f_cond16j_5 = value;
4655 break;
4656 case M32C_OPERAND_COND32 :
4657 fields->f_cond32 = value;
4658 break;
4659 case M32C_OPERAND_COND32_16 :
4660 fields->f_dsp_16_u8 = value;
4661 break;
4662 case M32C_OPERAND_COND32_24 :
4663 fields->f_dsp_24_u8 = value;
4664 break;
4665 case M32C_OPERAND_COND32_32 :
4666 fields->f_dsp_32_u8 = value;
4667 break;
4668 case M32C_OPERAND_COND32_40 :
4669 fields->f_dsp_40_u8 = value;
4670 break;
4671 case M32C_OPERAND_COND32J :
4672 fields->f_cond32j = value;
4673 break;
4674 case M32C_OPERAND_CR1_PREFIXED_32 :
4675 fields->f_21_3 = value;
4676 break;
4677 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4678 fields->f_13_3 = value;
4679 break;
4680 case M32C_OPERAND_CR16 :
4681 fields->f_9_3 = value;
4682 break;
4683 case M32C_OPERAND_CR2_32 :
4684 fields->f_13_3 = value;
4685 break;
4686 case M32C_OPERAND_CR3_PREFIXED_32 :
4687 fields->f_21_3 = value;
4688 break;
4689 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4690 fields->f_13_3 = value;
4691 break;
4692 case M32C_OPERAND_FLAGS16 :
4693 fields->f_9_3 = value;
4694 break;
4695 case M32C_OPERAND_FLAGS32 :
4696 fields->f_13_3 = value;
4697 break;
4698 case M32C_OPERAND_SCCOND32 :
4699 fields->f_cond16 = value;
4700 break;
4701 case M32C_OPERAND_SIZE :
4702 break;
4703
4704 default :
4705 /* xgettext:c-format */
4706 opcodes_error_handler
4707 (_("internal error: unrecognized field %d while setting int operand"),
4708 opindex);
4709 abort ();
4710 }
4711 }
4712
4713 void
4714 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4715 int opindex,
4716 CGEN_FIELDS * fields,
4717 bfd_vma value)
4718 {
4719 switch (opindex)
4720 {
4721 case M32C_OPERAND_A0 :
4722 break;
4723 case M32C_OPERAND_A1 :
4724 break;
4725 case M32C_OPERAND_AN16_PUSH_S :
4726 fields->f_4_1 = value;
4727 break;
4728 case M32C_OPERAND_BIT16AN :
4729 fields->f_dst16_an = value;
4730 break;
4731 case M32C_OPERAND_BIT16RN :
4732 fields->f_dst16_rn = value;
4733 break;
4734 case M32C_OPERAND_BIT3_S :
4735 fields->f_imm3_S = value;
4736 break;
4737 case M32C_OPERAND_BIT32ANPREFIXED :
4738 fields->f_dst32_an_prefixed = value;
4739 break;
4740 case M32C_OPERAND_BIT32ANUNPREFIXED :
4741 fields->f_dst32_an_unprefixed = value;
4742 break;
4743 case M32C_OPERAND_BIT32RNPREFIXED :
4744 fields->f_dst32_rn_prefixed_QI = value;
4745 break;
4746 case M32C_OPERAND_BIT32RNUNPREFIXED :
4747 fields->f_dst32_rn_unprefixed_QI = value;
4748 break;
4749 case M32C_OPERAND_BITBASE16_16_S8 :
4750 fields->f_dsp_16_s8 = value;
4751 break;
4752 case M32C_OPERAND_BITBASE16_16_U16 :
4753 fields->f_dsp_16_u16 = value;
4754 break;
4755 case M32C_OPERAND_BITBASE16_16_U8 :
4756 fields->f_dsp_16_u8 = value;
4757 break;
4758 case M32C_OPERAND_BITBASE16_8_U11_S :
4759 fields->f_bitbase16_u11_S = value;
4760 break;
4761 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4762 fields->f_bitbase32_16_s11_unprefixed = value;
4763 break;
4764 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4765 fields->f_bitbase32_16_s19_unprefixed = value;
4766 break;
4767 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4768 fields->f_bitbase32_16_u11_unprefixed = value;
4769 break;
4770 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4771 fields->f_bitbase32_16_u19_unprefixed = value;
4772 break;
4773 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4774 fields->f_bitbase32_16_u27_unprefixed = value;
4775 break;
4776 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4777 fields->f_bitbase32_24_s11_prefixed = value;
4778 break;
4779 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4780 fields->f_bitbase32_24_s19_prefixed = value;
4781 break;
4782 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4783 fields->f_bitbase32_24_u11_prefixed = value;
4784 break;
4785 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4786 fields->f_bitbase32_24_u19_prefixed = value;
4787 break;
4788 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4789 fields->f_bitbase32_24_u27_prefixed = value;
4790 break;
4791 case M32C_OPERAND_BITNO16R :
4792 fields->f_dsp_16_u8 = value;
4793 break;
4794 case M32C_OPERAND_BITNO32PREFIXED :
4795 fields->f_bitno32_prefixed = value;
4796 break;
4797 case M32C_OPERAND_BITNO32UNPREFIXED :
4798 fields->f_bitno32_unprefixed = value;
4799 break;
4800 case M32C_OPERAND_DSP_10_U6 :
4801 fields->f_dsp_10_u6 = value;
4802 break;
4803 case M32C_OPERAND_DSP_16_S16 :
4804 fields->f_dsp_16_s16 = value;
4805 break;
4806 case M32C_OPERAND_DSP_16_S8 :
4807 fields->f_dsp_16_s8 = value;
4808 break;
4809 case M32C_OPERAND_DSP_16_U16 :
4810 fields->f_dsp_16_u16 = value;
4811 break;
4812 case M32C_OPERAND_DSP_16_U20 :
4813 fields->f_dsp_16_u24 = value;
4814 break;
4815 case M32C_OPERAND_DSP_16_U24 :
4816 fields->f_dsp_16_u24 = value;
4817 break;
4818 case M32C_OPERAND_DSP_16_U8 :
4819 fields->f_dsp_16_u8 = value;
4820 break;
4821 case M32C_OPERAND_DSP_24_S16 :
4822 fields->f_dsp_24_s16 = value;
4823 break;
4824 case M32C_OPERAND_DSP_24_S8 :
4825 fields->f_dsp_24_s8 = value;
4826 break;
4827 case M32C_OPERAND_DSP_24_U16 :
4828 fields->f_dsp_24_u16 = value;
4829 break;
4830 case M32C_OPERAND_DSP_24_U20 :
4831 fields->f_dsp_24_u24 = value;
4832 break;
4833 case M32C_OPERAND_DSP_24_U24 :
4834 fields->f_dsp_24_u24 = value;
4835 break;
4836 case M32C_OPERAND_DSP_24_U8 :
4837 fields->f_dsp_24_u8 = value;
4838 break;
4839 case M32C_OPERAND_DSP_32_S16 :
4840 fields->f_dsp_32_s16 = value;
4841 break;
4842 case M32C_OPERAND_DSP_32_S8 :
4843 fields->f_dsp_32_s8 = value;
4844 break;
4845 case M32C_OPERAND_DSP_32_U16 :
4846 fields->f_dsp_32_u16 = value;
4847 break;
4848 case M32C_OPERAND_DSP_32_U20 :
4849 fields->f_dsp_32_u24 = value;
4850 break;
4851 case M32C_OPERAND_DSP_32_U24 :
4852 fields->f_dsp_32_u24 = value;
4853 break;
4854 case M32C_OPERAND_DSP_32_U8 :
4855 fields->f_dsp_32_u8 = value;
4856 break;
4857 case M32C_OPERAND_DSP_40_S16 :
4858 fields->f_dsp_40_s16 = value;
4859 break;
4860 case M32C_OPERAND_DSP_40_S8 :
4861 fields->f_dsp_40_s8 = value;
4862 break;
4863 case M32C_OPERAND_DSP_40_U16 :
4864 fields->f_dsp_40_u16 = value;
4865 break;
4866 case M32C_OPERAND_DSP_40_U20 :
4867 fields->f_dsp_40_u20 = value;
4868 break;
4869 case M32C_OPERAND_DSP_40_U24 :
4870 fields->f_dsp_40_u24 = value;
4871 break;
4872 case M32C_OPERAND_DSP_40_U8 :
4873 fields->f_dsp_40_u8 = value;
4874 break;
4875 case M32C_OPERAND_DSP_48_S16 :
4876 fields->f_dsp_48_s16 = value;
4877 break;
4878 case M32C_OPERAND_DSP_48_S8 :
4879 fields->f_dsp_48_s8 = value;
4880 break;
4881 case M32C_OPERAND_DSP_48_U16 :
4882 fields->f_dsp_48_u16 = value;
4883 break;
4884 case M32C_OPERAND_DSP_48_U20 :
4885 fields->f_dsp_48_u20 = value;
4886 break;
4887 case M32C_OPERAND_DSP_48_U24 :
4888 fields->f_dsp_48_u24 = value;
4889 break;
4890 case M32C_OPERAND_DSP_48_U8 :
4891 fields->f_dsp_48_u8 = value;
4892 break;
4893 case M32C_OPERAND_DSP_8_S24 :
4894 fields->f_dsp_8_s24 = value;
4895 break;
4896 case M32C_OPERAND_DSP_8_S8 :
4897 fields->f_dsp_8_s8 = value;
4898 break;
4899 case M32C_OPERAND_DSP_8_U16 :
4900 fields->f_dsp_8_u16 = value;
4901 break;
4902 case M32C_OPERAND_DSP_8_U24 :
4903 fields->f_dsp_8_u24 = value;
4904 break;
4905 case M32C_OPERAND_DSP_8_U6 :
4906 fields->f_dsp_8_u6 = value;
4907 break;
4908 case M32C_OPERAND_DSP_8_U8 :
4909 fields->f_dsp_8_u8 = value;
4910 break;
4911 case M32C_OPERAND_DST16AN :
4912 fields->f_dst16_an = value;
4913 break;
4914 case M32C_OPERAND_DST16AN_S :
4915 fields->f_dst16_an_s = value;
4916 break;
4917 case M32C_OPERAND_DST16ANHI :
4918 fields->f_dst16_an = value;
4919 break;
4920 case M32C_OPERAND_DST16ANQI :
4921 fields->f_dst16_an = value;
4922 break;
4923 case M32C_OPERAND_DST16ANQI_S :
4924 fields->f_dst16_rn_QI_s = value;
4925 break;
4926 case M32C_OPERAND_DST16ANSI :
4927 fields->f_dst16_an = value;
4928 break;
4929 case M32C_OPERAND_DST16RNEXTQI :
4930 fields->f_dst16_rn_ext = value;
4931 break;
4932 case M32C_OPERAND_DST16RNHI :
4933 fields->f_dst16_rn = value;
4934 break;
4935 case M32C_OPERAND_DST16RNQI :
4936 fields->f_dst16_rn = value;
4937 break;
4938 case M32C_OPERAND_DST16RNQI_S :
4939 fields->f_dst16_rn_QI_s = value;
4940 break;
4941 case M32C_OPERAND_DST16RNSI :
4942 fields->f_dst16_rn = value;
4943 break;
4944 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4945 fields->f_dst32_an_unprefixed = value;
4946 break;
4947 case M32C_OPERAND_DST32ANPREFIXED :
4948 fields->f_dst32_an_prefixed = value;
4949 break;
4950 case M32C_OPERAND_DST32ANPREFIXEDHI :
4951 fields->f_dst32_an_prefixed = value;
4952 break;
4953 case M32C_OPERAND_DST32ANPREFIXEDQI :
4954 fields->f_dst32_an_prefixed = value;
4955 break;
4956 case M32C_OPERAND_DST32ANPREFIXEDSI :
4957 fields->f_dst32_an_prefixed = value;
4958 break;
4959 case M32C_OPERAND_DST32ANUNPREFIXED :
4960 fields->f_dst32_an_unprefixed = value;
4961 break;
4962 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4963 fields->f_dst32_an_unprefixed = value;
4964 break;
4965 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4966 fields->f_dst32_an_unprefixed = value;
4967 break;
4968 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4969 fields->f_dst32_an_unprefixed = value;
4970 break;
4971 case M32C_OPERAND_DST32R0HI_S :
4972 break;
4973 case M32C_OPERAND_DST32R0QI_S :
4974 break;
4975 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4976 fields->f_dst32_rn_ext_unprefixed = value;
4977 break;
4978 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4979 fields->f_dst32_rn_ext_unprefixed = value;
4980 break;
4981 case M32C_OPERAND_DST32RNPREFIXEDHI :
4982 fields->f_dst32_rn_prefixed_HI = value;
4983 break;
4984 case M32C_OPERAND_DST32RNPREFIXEDQI :
4985 fields->f_dst32_rn_prefixed_QI = value;
4986 break;
4987 case M32C_OPERAND_DST32RNPREFIXEDSI :
4988 fields->f_dst32_rn_prefixed_SI = value;
4989 break;
4990 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4991 fields->f_dst32_rn_unprefixed_HI = value;
4992 break;
4993 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4994 fields->f_dst32_rn_unprefixed_QI = value;
4995 break;
4996 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4997 fields->f_dst32_rn_unprefixed_SI = value;
4998 break;
4999 case M32C_OPERAND_G :
5000 break;
5001 case M32C_OPERAND_IMM_12_S4 :
5002 fields->f_imm_12_s4 = value;
5003 break;
5004 case M32C_OPERAND_IMM_12_S4N :
5005 fields->f_imm_12_s4 = value;
5006 break;
5007 case M32C_OPERAND_IMM_13_U3 :
5008 fields->f_imm_13_u3 = value;
5009 break;
5010 case M32C_OPERAND_IMM_16_HI :
5011 fields->f_dsp_16_s16 = value;
5012 break;
5013 case M32C_OPERAND_IMM_16_QI :
5014 fields->f_dsp_16_s8 = value;
5015 break;
5016 case M32C_OPERAND_IMM_16_SI :
5017 fields->f_dsp_16_s32 = value;
5018 break;
5019 case M32C_OPERAND_IMM_20_S4 :
5020 fields->f_imm_20_s4 = value;
5021 break;
5022 case M32C_OPERAND_IMM_24_HI :
5023 fields->f_dsp_24_s16 = value;
5024 break;
5025 case M32C_OPERAND_IMM_24_QI :
5026 fields->f_dsp_24_s8 = value;
5027 break;
5028 case M32C_OPERAND_IMM_24_SI :
5029 fields->f_dsp_24_s32 = value;
5030 break;
5031 case M32C_OPERAND_IMM_32_HI :
5032 fields->f_dsp_32_s16 = value;
5033 break;
5034 case M32C_OPERAND_IMM_32_QI :
5035 fields->f_dsp_32_s8 = value;
5036 break;
5037 case M32C_OPERAND_IMM_32_SI :
5038 fields->f_dsp_32_s32 = value;
5039 break;
5040 case M32C_OPERAND_IMM_40_HI :
5041 fields->f_dsp_40_s16 = value;
5042 break;
5043 case M32C_OPERAND_IMM_40_QI :
5044 fields->f_dsp_40_s8 = value;
5045 break;
5046 case M32C_OPERAND_IMM_40_SI :
5047 fields->f_dsp_40_s32 = value;
5048 break;
5049 case M32C_OPERAND_IMM_48_HI :
5050 fields->f_dsp_48_s16 = value;
5051 break;
5052 case M32C_OPERAND_IMM_48_QI :
5053 fields->f_dsp_48_s8 = value;
5054 break;
5055 case M32C_OPERAND_IMM_48_SI :
5056 fields->f_dsp_48_s32 = value;
5057 break;
5058 case M32C_OPERAND_IMM_56_HI :
5059 fields->f_dsp_56_s16 = value;
5060 break;
5061 case M32C_OPERAND_IMM_56_QI :
5062 fields->f_dsp_56_s8 = value;
5063 break;
5064 case M32C_OPERAND_IMM_64_HI :
5065 fields->f_dsp_64_s16 = value;
5066 break;
5067 case M32C_OPERAND_IMM_8_HI :
5068 fields->f_dsp_8_s16 = value;
5069 break;
5070 case M32C_OPERAND_IMM_8_QI :
5071 fields->f_dsp_8_s8 = value;
5072 break;
5073 case M32C_OPERAND_IMM_8_S4 :
5074 fields->f_imm_8_s4 = value;
5075 break;
5076 case M32C_OPERAND_IMM_8_S4N :
5077 fields->f_imm_8_s4 = value;
5078 break;
5079 case M32C_OPERAND_IMM_SH_12_S4 :
5080 fields->f_imm_12_s4 = value;
5081 break;
5082 case M32C_OPERAND_IMM_SH_20_S4 :
5083 fields->f_imm_20_s4 = value;
5084 break;
5085 case M32C_OPERAND_IMM_SH_8_S4 :
5086 fields->f_imm_8_s4 = value;
5087 break;
5088 case M32C_OPERAND_IMM1_S :
5089 fields->f_imm1_S = value;
5090 break;
5091 case M32C_OPERAND_IMM3_S :
5092 fields->f_imm3_S = value;
5093 break;
5094 case M32C_OPERAND_LAB_16_8 :
5095 fields->f_lab_16_8 = value;
5096 break;
5097 case M32C_OPERAND_LAB_24_8 :
5098 fields->f_lab_24_8 = value;
5099 break;
5100 case M32C_OPERAND_LAB_32_8 :
5101 fields->f_lab_32_8 = value;
5102 break;
5103 case M32C_OPERAND_LAB_40_8 :
5104 fields->f_lab_40_8 = value;
5105 break;
5106 case M32C_OPERAND_LAB_5_3 :
5107 fields->f_lab_5_3 = value;
5108 break;
5109 case M32C_OPERAND_LAB_8_16 :
5110 fields->f_lab_8_16 = value;
5111 break;
5112 case M32C_OPERAND_LAB_8_24 :
5113 fields->f_lab_8_24 = value;
5114 break;
5115 case M32C_OPERAND_LAB_8_8 :
5116 fields->f_lab_8_8 = value;
5117 break;
5118 case M32C_OPERAND_LAB32_JMP_S :
5119 fields->f_lab32_jmp_s = value;
5120 break;
5121 case M32C_OPERAND_Q :
5122 break;
5123 case M32C_OPERAND_R0 :
5124 break;
5125 case M32C_OPERAND_R0H :
5126 break;
5127 case M32C_OPERAND_R0L :
5128 break;
5129 case M32C_OPERAND_R1 :
5130 break;
5131 case M32C_OPERAND_R1R2R0 :
5132 break;
5133 case M32C_OPERAND_R2 :
5134 break;
5135 case M32C_OPERAND_R2R0 :
5136 break;
5137 case M32C_OPERAND_R3 :
5138 break;
5139 case M32C_OPERAND_R3R1 :
5140 break;
5141 case M32C_OPERAND_REGSETPOP :
5142 fields->f_8_8 = value;
5143 break;
5144 case M32C_OPERAND_REGSETPUSH :
5145 fields->f_8_8 = value;
5146 break;
5147 case M32C_OPERAND_RN16_PUSH_S :
5148 fields->f_4_1 = value;
5149 break;
5150 case M32C_OPERAND_S :
5151 break;
5152 case M32C_OPERAND_SRC16AN :
5153 fields->f_src16_an = value;
5154 break;
5155 case M32C_OPERAND_SRC16ANHI :
5156 fields->f_src16_an = value;
5157 break;
5158 case M32C_OPERAND_SRC16ANQI :
5159 fields->f_src16_an = value;
5160 break;
5161 case M32C_OPERAND_SRC16RNHI :
5162 fields->f_src16_rn = value;
5163 break;
5164 case M32C_OPERAND_SRC16RNQI :
5165 fields->f_src16_rn = value;
5166 break;
5167 case M32C_OPERAND_SRC32ANPREFIXED :
5168 fields->f_src32_an_prefixed = value;
5169 break;
5170 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5171 fields->f_src32_an_prefixed = value;
5172 break;
5173 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5174 fields->f_src32_an_prefixed = value;
5175 break;
5176 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5177 fields->f_src32_an_prefixed = value;
5178 break;
5179 case M32C_OPERAND_SRC32ANUNPREFIXED :
5180 fields->f_src32_an_unprefixed = value;
5181 break;
5182 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5183 fields->f_src32_an_unprefixed = value;
5184 break;
5185 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5186 fields->f_src32_an_unprefixed = value;
5187 break;
5188 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5189 fields->f_src32_an_unprefixed = value;
5190 break;
5191 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5192 fields->f_src32_rn_prefixed_HI = value;
5193 break;
5194 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5195 fields->f_src32_rn_prefixed_QI = value;
5196 break;
5197 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5198 fields->f_src32_rn_prefixed_SI = value;
5199 break;
5200 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5201 fields->f_src32_rn_unprefixed_HI = value;
5202 break;
5203 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5204 fields->f_src32_rn_unprefixed_QI = value;
5205 break;
5206 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5207 fields->f_src32_rn_unprefixed_SI = value;
5208 break;
5209 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5210 fields->f_5_1 = value;
5211 break;
5212 case M32C_OPERAND_X :
5213 break;
5214 case M32C_OPERAND_Z :
5215 break;
5216 case M32C_OPERAND_COND16_16 :
5217 fields->f_dsp_16_u8 = value;
5218 break;
5219 case M32C_OPERAND_COND16_24 :
5220 fields->f_dsp_24_u8 = value;
5221 break;
5222 case M32C_OPERAND_COND16_32 :
5223 fields->f_dsp_32_u8 = value;
5224 break;
5225 case M32C_OPERAND_COND16C :
5226 fields->f_cond16 = value;
5227 break;
5228 case M32C_OPERAND_COND16J :
5229 fields->f_cond16 = value;
5230 break;
5231 case M32C_OPERAND_COND16J5 :
5232 fields->f_cond16j_5 = value;
5233 break;
5234 case M32C_OPERAND_COND32 :
5235 fields->f_cond32 = value;
5236 break;
5237 case M32C_OPERAND_COND32_16 :
5238 fields->f_dsp_16_u8 = value;
5239 break;
5240 case M32C_OPERAND_COND32_24 :
5241 fields->f_dsp_24_u8 = value;
5242 break;
5243 case M32C_OPERAND_COND32_32 :
5244 fields->f_dsp_32_u8 = value;
5245 break;
5246 case M32C_OPERAND_COND32_40 :
5247 fields->f_dsp_40_u8 = value;
5248 break;
5249 case M32C_OPERAND_COND32J :
5250 fields->f_cond32j = value;
5251 break;
5252 case M32C_OPERAND_CR1_PREFIXED_32 :
5253 fields->f_21_3 = value;
5254 break;
5255 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5256 fields->f_13_3 = value;
5257 break;
5258 case M32C_OPERAND_CR16 :
5259 fields->f_9_3 = value;
5260 break;
5261 case M32C_OPERAND_CR2_32 :
5262 fields->f_13_3 = value;
5263 break;
5264 case M32C_OPERAND_CR3_PREFIXED_32 :
5265 fields->f_21_3 = value;
5266 break;
5267 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5268 fields->f_13_3 = value;
5269 break;
5270 case M32C_OPERAND_FLAGS16 :
5271 fields->f_9_3 = value;
5272 break;
5273 case M32C_OPERAND_FLAGS32 :
5274 fields->f_13_3 = value;
5275 break;
5276 case M32C_OPERAND_SCCOND32 :
5277 fields->f_cond16 = value;
5278 break;
5279 case M32C_OPERAND_SIZE :
5280 break;
5281
5282 default :
5283 /* xgettext:c-format */
5284 opcodes_error_handler
5285 (_("internal error: unrecognized field %d while setting vma operand"),
5286 opindex);
5287 abort ();
5288 }
5289 }
5290
5291 /* Function to call before using the instruction builder tables. */
5292
5293 void
5294 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5295 {
5296 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5297 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5298
5299 cd->insert_operand = m32c_cgen_insert_operand;
5300 cd->extract_operand = m32c_cgen_extract_operand;
5301
5302 cd->get_int_operand = m32c_cgen_get_int_operand;
5303 cd->set_int_operand = m32c_cgen_set_int_operand;
5304 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5305 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5306 }