]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - opcodes/m32c-ibld.c
projects / thirdparty / binutils-gdb.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Update year range in copyright notice of all files.
[thirdparty/binutils-gdb.git] / opcodes / m32c-ibld.c
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright (C) 1996-2017 Free Software Foundation, Inc.
7
8 This file is part of libopcodes.
9
10 This library is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
23
24 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
25 Keep that in mind. */
26
27 #include "sysdep.h"
28 #include <stdio.h>
29 #include "ansidecl.h"
30 #include "dis-asm.h"
31 #include "bfd.h"
32 #include "symcat.h"
33 #include "m32c-desc.h"
34 #include "m32c-opc.h"
35 #include "cgen/basic-modes.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 8 * sizeof (CGEN_INSN_INT))
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171 unsigned long val = (unsigned long) value;
172
173 /* For hosts with a word size > 32 check to see if value has been sign
174 extended beyond 32 bits. If so then ignore these higher sign bits
175 as the user is attempting to store a 32-bit signed value into an
176 unsigned 32-bit field which is allowed. */
177 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
178 val &= 0xFFFFFFFF;
179
180 if (val > maxval)
181 {
182 /* xgettext:c-format */
183 sprintf (errbuf,
184 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
185 val, maxval);
186 return errbuf;
187 }
188 }
189 else
190 {
191 if (! cgen_signed_overflow_ok_p (cd))
192 {
193 long minval = - (1L << (length - 1));
194 long maxval = (1L << (length - 1)) - 1;
195
196 if (value < minval || value > maxval)
197 {
198 sprintf
199 /* xgettext:c-format */
200 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
201 value, minval, maxval);
202 return errbuf;
203 }
204 }
205 }
206
207 #if CGEN_INT_INSN_P
208
209 {
210 int shift_within_word, shift_to_word, shift;
211
212 /* How to shift the value to BIT0 of the word. */
213 shift_to_word = total_length - (word_offset + word_length);
214
215 /* How to shift the value to the field within the word. */
216 if (CGEN_INSN_LSB0_P)
217 shift_within_word = start + 1 - length;
218 else
219 shift_within_word = word_length - start - length;
220
221 /* The total SHIFT, then mask in the value. */
222 shift = shift_to_word + shift_within_word;
223 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
224 }
225
226 #else /* ! CGEN_INT_INSN_P */
227
228 {
229 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
230
231 insert_1 (cd, value, start, length, word_length, bufp);
232 }
233
234 #endif /* ! CGEN_INT_INSN_P */
235
236 return NULL;
237 }
238
239 /* Default insn builder (insert handler).
240 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
241 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
242 recorded in host byte order, otherwise BUFFER is an array of bytes
243 and the value is recorded in target byte order).
244 The result is an error message or NULL if success. */
245
246 static const char *
247 insert_insn_normal (CGEN_CPU_DESC cd,
248 const CGEN_INSN * insn,
249 CGEN_FIELDS * fields,
250 CGEN_INSN_BYTES_PTR buffer,
251 bfd_vma pc)
252 {
253 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
254 unsigned long value;
255 const CGEN_SYNTAX_CHAR_TYPE * syn;
256
257 CGEN_INIT_INSERT (cd);
258 value = CGEN_INSN_BASE_VALUE (insn);
259
260 /* If we're recording insns as numbers (rather than a string of bytes),
261 target byte order handling is deferred until later. */
262
263 #if CGEN_INT_INSN_P
264
265 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
266 CGEN_FIELDS_BITSIZE (fields), value);
267
268 #else
269
270 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
271 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
272 value);
273
274 #endif /* ! CGEN_INT_INSN_P */
275
276 /* ??? It would be better to scan the format's fields.
277 Still need to be able to insert a value based on the operand though;
278 e.g. storing a branch displacement that got resolved later.
279 Needs more thought first. */
280
281 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
282 {
283 const char *errmsg;
284
285 if (CGEN_SYNTAX_CHAR_P (* syn))
286 continue;
287
288 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
289 fields, buffer, pc);
290 if (errmsg)
291 return errmsg;
292 }
293
294 return NULL;
295 }
296
297 #if CGEN_INT_INSN_P
298 /* Cover function to store an insn value into an integral insn. Must go here
299 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
300
301 static void
302 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
303 CGEN_INSN_BYTES_PTR buf,
304 int length,
305 int insn_length,
306 CGEN_INSN_INT value)
307 {
308 /* For architectures with insns smaller than the base-insn-bitsize,
309 length may be too big. */
310 if (length > insn_length)
311 *buf = value;
312 else
313 {
314 int shift = insn_length - length;
315 /* Written this way to avoid undefined behaviour. */
316 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
317
318 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
319 }
320 }
321 #endif
322 \f
323 /* Operand extraction. */
324
325 #if ! CGEN_INT_INSN_P
326
327 /* Subroutine of extract_normal.
328 Ensure sufficient bytes are cached in EX_INFO.
329 OFFSET is the offset in bytes from the start of the insn of the value.
330 BYTES is the length of the needed value.
331 Returns 1 for success, 0 for failure. */
332
333 static CGEN_INLINE int
334 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
335 CGEN_EXTRACT_INFO *ex_info,
336 int offset,
337 int bytes,
338 bfd_vma pc)
339 {
340 /* It's doubtful that the middle part has already been fetched so
341 we don't optimize that case. kiss. */
342 unsigned int mask;
343 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
344
345 /* First do a quick check. */
346 mask = (1 << bytes) - 1;
347 if (((ex_info->valid >> offset) & mask) == mask)
348 return 1;
349
350 /* Search for the first byte we need to read. */
351 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
352 if (! (mask & ex_info->valid))
353 break;
354
355 if (bytes)
356 {
357 int status;
358
359 pc += offset;
360 status = (*info->read_memory_func)
361 (pc, ex_info->insn_bytes + offset, bytes, info);
362
363 if (status != 0)
364 {
365 (*info->memory_error_func) (status, pc, info);
366 return 0;
367 }
368
369 ex_info->valid |= ((1 << bytes) - 1) << offset;
370 }
371
372 return 1;
373 }
374
375 /* Subroutine of extract_normal. */
376
377 static CGEN_INLINE long
378 extract_1 (CGEN_CPU_DESC cd,
379 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
380 int start,
381 int length,
382 int word_length,
383 unsigned char *bufp,
384 bfd_vma pc ATTRIBUTE_UNUSED)
385 {
386 unsigned long x;
387 int shift;
388
389 x = cgen_get_insn_value (cd, bufp, word_length);
390
391 if (CGEN_INSN_LSB0_P)
392 shift = (start + 1) - length;
393 else
394 shift = (word_length - (start + length));
395 return x >> shift;
396 }
397
398 #endif /* ! CGEN_INT_INSN_P */
399
400 /* Default extraction routine.
401
402 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
403 or sometimes less for cases like the m32r where the base insn size is 32
404 but some insns are 16 bits.
405 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
406 but for generality we take a bitmask of all of them.
407 WORD_OFFSET is the offset in bits from the start of the insn of the value.
408 WORD_LENGTH is the length of the word in bits in which the value resides.
409 START is the starting bit number in the word, architecture origin.
410 LENGTH is the length of VALUE in bits.
411 TOTAL_LENGTH is the total length of the insn in bits.
412
413 Returns 1 for success, 0 for failure. */
414
415 /* ??? The return code isn't properly used. wip. */
416
417 /* ??? This doesn't handle bfd_vma's. Create another function when
418 necessary. */
419
420 static int
421 extract_normal (CGEN_CPU_DESC cd,
422 #if ! CGEN_INT_INSN_P
423 CGEN_EXTRACT_INFO *ex_info,
424 #else
425 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
426 #endif
427 CGEN_INSN_INT insn_value,
428 unsigned int attrs,
429 unsigned int word_offset,
430 unsigned int start,
431 unsigned int length,
432 unsigned int word_length,
433 unsigned int total_length,
434 #if ! CGEN_INT_INSN_P
435 bfd_vma pc,
436 #else
437 bfd_vma pc ATTRIBUTE_UNUSED,
438 #endif
439 long *valuep)
440 {
441 long value, mask;
442
443 /* If LENGTH is zero, this operand doesn't contribute to the value
444 so give it a standard value of zero. */
445 if (length == 0)
446 {
447 *valuep = 0;
448 return 1;
449 }
450
451 if (word_length > 8 * sizeof (CGEN_INSN_INT))
452 abort ();
453
454 /* For architectures with insns smaller than the insn-base-bitsize,
455 word_length may be too big. */
456 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
457 {
458 if (word_offset + word_length > total_length)
459 word_length = total_length - word_offset;
460 }
461
462 /* Does the value reside in INSN_VALUE, and at the right alignment? */
463
464 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
465 {
466 if (CGEN_INSN_LSB0_P)
467 value = insn_value >> ((word_offset + start + 1) - length);
468 else
469 value = insn_value >> (total_length - ( word_offset + start + length));
470 }
471
472 #if ! CGEN_INT_INSN_P
473
474 else
475 {
476 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
477
478 if (word_length > 8 * sizeof (CGEN_INSN_INT))
479 abort ();
480
481 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
482 return 0;
483
484 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
485 }
486
487 #endif /* ! CGEN_INT_INSN_P */
488
489 /* Written this way to avoid undefined behaviour. */
490 mask = (((1L << (length - 1)) - 1) << 1) | 1;
491
492 value &= mask;
493 /* sign extend? */
494 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
495 && (value & (1L << (length - 1))))
496 value |= ~mask;
497
498 *valuep = value;
499
500 return 1;
501 }
502
503 /* Default insn extractor.
504
505 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
506 The extracted fields are stored in FIELDS.
507 EX_INFO is used to handle reading variable length insns.
508 Return the length of the insn in bits, or 0 if no match,
509 or -1 if an error occurs fetching data (memory_error_func will have
510 been called). */
511
512 static int
513 extract_insn_normal (CGEN_CPU_DESC cd,
514 const CGEN_INSN *insn,
515 CGEN_EXTRACT_INFO *ex_info,
516 CGEN_INSN_INT insn_value,
517 CGEN_FIELDS *fields,
518 bfd_vma pc)
519 {
520 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
521 const CGEN_SYNTAX_CHAR_TYPE *syn;
522
523 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
524
525 CGEN_INIT_EXTRACT (cd);
526
527 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
528 {
529 int length;
530
531 if (CGEN_SYNTAX_CHAR_P (*syn))
532 continue;
533
534 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
535 ex_info, insn_value, fields, pc);
536 if (length <= 0)
537 return length;
538 }
539
540 /* We recognized and successfully extracted this insn. */
541 return CGEN_INSN_BITSIZE (insn);
542 }
543 \f
544 /* Machine generated code added here. */
545
546 const char * m32c_cgen_insert_operand
547 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
548
549 /* Main entry point for operand insertion.
550
551 This function is basically just a big switch statement. Earlier versions
552 used tables to look up the function to use, but
553 - if the table contains both assembler and disassembler functions then
554 the disassembler contains much of the assembler and vice-versa,
555 - there's a lot of inlining possibilities as things grow,
556 - using a switch statement avoids the function call overhead.
557
558 This function could be moved into `parse_insn_normal', but keeping it
559 separate makes clear the interface between `parse_insn_normal' and each of
560 the handlers. It's also needed by GAS to insert operands that couldn't be
561 resolved during parsing. */
562
563 const char *
564 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
565 int opindex,
566 CGEN_FIELDS * fields,
567 CGEN_INSN_BYTES_PTR buffer,
568 bfd_vma pc ATTRIBUTE_UNUSED)
569 {
570 const char * errmsg = NULL;
571 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
572
573 switch (opindex)
574 {
575 case M32C_OPERAND_A0 :
576 break;
577 case M32C_OPERAND_A1 :
578 break;
579 case M32C_OPERAND_AN16_PUSH_S :
580 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
581 break;
582 case M32C_OPERAND_BIT16AN :
583 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
584 break;
585 case M32C_OPERAND_BIT16RN :
586 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
587 break;
588 case M32C_OPERAND_BIT3_S :
589 {
590 {
591 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
592 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
593 }
594 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
595 if (errmsg)
596 break;
597 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
598 if (errmsg)
599 break;
600 }
601 break;
602 case M32C_OPERAND_BIT32ANPREFIXED :
603 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
604 break;
605 case M32C_OPERAND_BIT32ANUNPREFIXED :
606 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
607 break;
608 case M32C_OPERAND_BIT32RNPREFIXED :
609 {
610 long value = fields->f_dst32_rn_prefixed_QI;
611 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
612 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
613 }
614 break;
615 case M32C_OPERAND_BIT32RNUNPREFIXED :
616 {
617 long value = fields->f_dst32_rn_unprefixed_QI;
618 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
619 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
620 }
621 break;
622 case M32C_OPERAND_BITBASE16_16_S8 :
623 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
624 break;
625 case M32C_OPERAND_BITBASE16_16_U16 :
626 {
627 long value = fields->f_dsp_16_u16;
628 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
629 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
630 }
631 break;
632 case M32C_OPERAND_BITBASE16_16_U8 :
633 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
634 break;
635 case M32C_OPERAND_BITBASE16_8_U11_S :
636 {
637 {
638 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
639 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
640 }
641 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
642 if (errmsg)
643 break;
644 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
645 if (errmsg)
646 break;
647 }
648 break;
649 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
650 {
651 {
652 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
653 FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
654 }
655 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
656 if (errmsg)
657 break;
658 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
659 if (errmsg)
660 break;
661 }
662 break;
663 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
664 {
665 {
666 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
667 FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
668 }
669 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
670 if (errmsg)
671 break;
672 {
673 long value = fields->f_dsp_16_s16;
674 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
675 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
676 }
677 if (errmsg)
678 break;
679 }
680 break;
681 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
682 {
683 {
684 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
685 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
686 }
687 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
688 if (errmsg)
689 break;
690 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
691 if (errmsg)
692 break;
693 }
694 break;
695 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
696 {
697 {
698 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
699 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
700 }
701 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
702 if (errmsg)
703 break;
704 {
705 long value = fields->f_dsp_16_u16;
706 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
707 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
708 }
709 if (errmsg)
710 break;
711 }
712 break;
713 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
714 {
715 {
716 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
717 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
718 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
719 }
720 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
721 if (errmsg)
722 break;
723 {
724 long value = fields->f_dsp_16_u16;
725 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
726 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
727 }
728 if (errmsg)
729 break;
730 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
731 if (errmsg)
732 break;
733 }
734 break;
735 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
736 {
737 {
738 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
739 FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
740 }
741 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
742 if (errmsg)
743 break;
744 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
745 if (errmsg)
746 break;
747 }
748 break;
749 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
750 {
751 {
752 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
753 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
754 FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
755 }
756 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
757 if (errmsg)
758 break;
759 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
760 if (errmsg)
761 break;
762 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
763 if (errmsg)
764 break;
765 }
766 break;
767 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
768 {
769 {
770 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
771 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
772 }
773 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
774 if (errmsg)
775 break;
776 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
777 if (errmsg)
778 break;
779 }
780 break;
781 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
782 {
783 {
784 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
785 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
786 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
787 }
788 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
789 if (errmsg)
790 break;
791 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
792 if (errmsg)
793 break;
794 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
795 if (errmsg)
796 break;
797 }
798 break;
799 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
800 {
801 {
802 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
803 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
804 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
805 }
806 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
807 if (errmsg)
808 break;
809 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
810 if (errmsg)
811 break;
812 {
813 long value = fields->f_dsp_32_u16;
814 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
815 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
816 }
817 if (errmsg)
818 break;
819 }
820 break;
821 case M32C_OPERAND_BITNO16R :
822 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
823 break;
824 case M32C_OPERAND_BITNO32PREFIXED :
825 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
826 break;
827 case M32C_OPERAND_BITNO32UNPREFIXED :
828 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
829 break;
830 case M32C_OPERAND_DSP_10_U6 :
831 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
832 break;
833 case M32C_OPERAND_DSP_16_S16 :
834 {
835 long value = fields->f_dsp_16_s16;
836 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
837 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
838 }
839 break;
840 case M32C_OPERAND_DSP_16_S8 :
841 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
842 break;
843 case M32C_OPERAND_DSP_16_U16 :
844 {
845 long value = fields->f_dsp_16_u16;
846 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
847 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
848 }
849 break;
850 case M32C_OPERAND_DSP_16_U20 :
851 {
852 {
853 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
854 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
855 }
856 {
857 long value = fields->f_dsp_16_u16;
858 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
859 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
860 }
861 if (errmsg)
862 break;
863 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
864 if (errmsg)
865 break;
866 }
867 break;
868 case M32C_OPERAND_DSP_16_U24 :
869 {
870 {
871 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
872 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
873 }
874 {
875 long value = fields->f_dsp_16_u16;
876 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
877 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
878 }
879 if (errmsg)
880 break;
881 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
882 if (errmsg)
883 break;
884 }
885 break;
886 case M32C_OPERAND_DSP_16_U8 :
887 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
888 break;
889 case M32C_OPERAND_DSP_24_S16 :
890 {
891 {
892 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
893 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
894 }
895 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
896 if (errmsg)
897 break;
898 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
899 if (errmsg)
900 break;
901 }
902 break;
903 case M32C_OPERAND_DSP_24_S8 :
904 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
905 break;
906 case M32C_OPERAND_DSP_24_U16 :
907 {
908 {
909 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
910 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255));
911 }
912 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
913 if (errmsg)
914 break;
915 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
916 if (errmsg)
917 break;
918 }
919 break;
920 case M32C_OPERAND_DSP_24_U20 :
921 {
922 {
923 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
924 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
925 }
926 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
927 if (errmsg)
928 break;
929 {
930 long value = fields->f_dsp_32_u16;
931 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
932 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
933 }
934 if (errmsg)
935 break;
936 }
937 break;
938 case M32C_OPERAND_DSP_24_U24 :
939 {
940 {
941 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
942 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
943 }
944 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
945 if (errmsg)
946 break;
947 {
948 long value = fields->f_dsp_32_u16;
949 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
950 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
951 }
952 if (errmsg)
953 break;
954 }
955 break;
956 case M32C_OPERAND_DSP_24_U8 :
957 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
958 break;
959 case M32C_OPERAND_DSP_32_S16 :
960 {
961 long value = fields->f_dsp_32_s16;
962 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
963 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
964 }
965 break;
966 case M32C_OPERAND_DSP_32_S8 :
967 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
968 break;
969 case M32C_OPERAND_DSP_32_U16 :
970 {
971 long value = fields->f_dsp_32_u16;
972 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
973 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
974 }
975 break;
976 case M32C_OPERAND_DSP_32_U20 :
977 {
978 long value = fields->f_dsp_32_u24;
979 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
980 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
981 }
982 break;
983 case M32C_OPERAND_DSP_32_U24 :
984 {
985 long value = fields->f_dsp_32_u24;
986 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
987 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
988 }
989 break;
990 case M32C_OPERAND_DSP_32_U8 :
991 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
992 break;
993 case M32C_OPERAND_DSP_40_S16 :
994 {
995 long value = fields->f_dsp_40_s16;
996 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
997 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
998 }
999 break;
1000 case M32C_OPERAND_DSP_40_S8 :
1001 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1002 break;
1003 case M32C_OPERAND_DSP_40_U16 :
1004 {
1005 long value = fields->f_dsp_40_u16;
1006 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1007 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1008 }
1009 break;
1010 case M32C_OPERAND_DSP_40_U20 :
1011 {
1012 long value = fields->f_dsp_40_u20;
1013 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
1014 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
1015 }
1016 break;
1017 case M32C_OPERAND_DSP_40_U24 :
1018 {
1019 long value = fields->f_dsp_40_u24;
1020 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1021 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1022 }
1023 break;
1024 case M32C_OPERAND_DSP_40_U8 :
1025 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1026 break;
1027 case M32C_OPERAND_DSP_48_S16 :
1028 {
1029 long value = fields->f_dsp_48_s16;
1030 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1031 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1032 }
1033 break;
1034 case M32C_OPERAND_DSP_48_S8 :
1035 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1036 break;
1037 case M32C_OPERAND_DSP_48_U16 :
1038 {
1039 long value = fields->f_dsp_48_u16;
1040 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1041 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1042 }
1043 break;
1044 case M32C_OPERAND_DSP_48_U20 :
1045 {
1046 {
1047 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15));
1048 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
1049 }
1050 {
1051 long value = fields->f_dsp_48_u16;
1052 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1053 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1054 }
1055 if (errmsg)
1056 break;
1057 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1058 if (errmsg)
1059 break;
1060 }
1061 break;
1062 case M32C_OPERAND_DSP_48_U24 :
1063 {
1064 {
1065 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1066 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1067 }
1068 {
1069 long value = fields->f_dsp_48_u16;
1070 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1071 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1072 }
1073 if (errmsg)
1074 break;
1075 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1076 if (errmsg)
1077 break;
1078 }
1079 break;
1080 case M32C_OPERAND_DSP_48_U8 :
1081 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1082 break;
1083 case M32C_OPERAND_DSP_8_S24 :
1084 {
1085 long value = fields->f_dsp_8_s24;
1086 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1087 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1088 }
1089 break;
1090 case M32C_OPERAND_DSP_8_S8 :
1091 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1092 break;
1093 case M32C_OPERAND_DSP_8_U16 :
1094 {
1095 long value = fields->f_dsp_8_u16;
1096 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1097 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1098 }
1099 break;
1100 case M32C_OPERAND_DSP_8_U24 :
1101 {
1102 long value = fields->f_dsp_8_u24;
1103 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1104 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1105 }
1106 break;
1107 case M32C_OPERAND_DSP_8_U6 :
1108 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1109 break;
1110 case M32C_OPERAND_DSP_8_U8 :
1111 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1112 break;
1113 case M32C_OPERAND_DST16AN :
1114 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1115 break;
1116 case M32C_OPERAND_DST16AN_S :
1117 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1118 break;
1119 case M32C_OPERAND_DST16ANHI :
1120 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1121 break;
1122 case M32C_OPERAND_DST16ANQI :
1123 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1124 break;
1125 case M32C_OPERAND_DST16ANQI_S :
1126 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1127 break;
1128 case M32C_OPERAND_DST16ANSI :
1129 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1130 break;
1131 case M32C_OPERAND_DST16RNEXTQI :
1132 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1133 break;
1134 case M32C_OPERAND_DST16RNHI :
1135 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1136 break;
1137 case M32C_OPERAND_DST16RNQI :
1138 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1139 break;
1140 case M32C_OPERAND_DST16RNQI_S :
1141 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1142 break;
1143 case M32C_OPERAND_DST16RNSI :
1144 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1145 break;
1146 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1147 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1148 break;
1149 case M32C_OPERAND_DST32ANPREFIXED :
1150 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1151 break;
1152 case M32C_OPERAND_DST32ANPREFIXEDHI :
1153 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1154 break;
1155 case M32C_OPERAND_DST32ANPREFIXEDQI :
1156 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1157 break;
1158 case M32C_OPERAND_DST32ANPREFIXEDSI :
1159 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1160 break;
1161 case M32C_OPERAND_DST32ANUNPREFIXED :
1162 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1163 break;
1164 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1165 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1166 break;
1167 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1168 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1169 break;
1170 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1171 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1172 break;
1173 case M32C_OPERAND_DST32R0HI_S :
1174 break;
1175 case M32C_OPERAND_DST32R0QI_S :
1176 break;
1177 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1178 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1179 break;
1180 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1181 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1182 break;
1183 case M32C_OPERAND_DST32RNPREFIXEDHI :
1184 {
1185 long value = fields->f_dst32_rn_prefixed_HI;
1186 value = ((((value) + (2))) % (4));
1187 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1188 }
1189 break;
1190 case M32C_OPERAND_DST32RNPREFIXEDQI :
1191 {
1192 long value = fields->f_dst32_rn_prefixed_QI;
1193 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1194 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1195 }
1196 break;
1197 case M32C_OPERAND_DST32RNPREFIXEDSI :
1198 {
1199 long value = fields->f_dst32_rn_prefixed_SI;
1200 value = ((value) + (2));
1201 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1202 }
1203 break;
1204 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1205 {
1206 long value = fields->f_dst32_rn_unprefixed_HI;
1207 value = ((((value) + (2))) % (4));
1208 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1209 }
1210 break;
1211 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1212 {
1213 long value = fields->f_dst32_rn_unprefixed_QI;
1214 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1215 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1216 }
1217 break;
1218 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1219 {
1220 long value = fields->f_dst32_rn_unprefixed_SI;
1221 value = ((value) + (2));
1222 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1223 }
1224 break;
1225 case M32C_OPERAND_G :
1226 break;
1227 case M32C_OPERAND_IMM_12_S4 :
1228 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1229 break;
1230 case M32C_OPERAND_IMM_12_S4N :
1231 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1232 break;
1233 case M32C_OPERAND_IMM_13_U3 :
1234 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1235 break;
1236 case M32C_OPERAND_IMM_16_HI :
1237 {
1238 long value = fields->f_dsp_16_s16;
1239 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1240 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1241 }
1242 break;
1243 case M32C_OPERAND_IMM_16_QI :
1244 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1245 break;
1246 case M32C_OPERAND_IMM_16_SI :
1247 {
1248 {
1249 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1250 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1251 }
1252 {
1253 long value = fields->f_dsp_16_u16;
1254 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1255 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1256 }
1257 if (errmsg)
1258 break;
1259 {
1260 long value = fields->f_dsp_32_u16;
1261 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1262 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1263 }
1264 if (errmsg)
1265 break;
1266 }
1267 break;
1268 case M32C_OPERAND_IMM_20_S4 :
1269 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1270 break;
1271 case M32C_OPERAND_IMM_24_HI :
1272 {
1273 {
1274 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1275 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1276 }
1277 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1278 if (errmsg)
1279 break;
1280 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1281 if (errmsg)
1282 break;
1283 }
1284 break;
1285 case M32C_OPERAND_IMM_24_QI :
1286 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1287 break;
1288 case M32C_OPERAND_IMM_24_SI :
1289 {
1290 {
1291 FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1292 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1293 }
1294 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1295 if (errmsg)
1296 break;
1297 {
1298 long value = fields->f_dsp_32_u24;
1299 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1300 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1301 }
1302 if (errmsg)
1303 break;
1304 }
1305 break;
1306 case M32C_OPERAND_IMM_32_HI :
1307 {
1308 long value = fields->f_dsp_32_s16;
1309 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1310 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1311 }
1312 break;
1313 case M32C_OPERAND_IMM_32_QI :
1314 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1315 break;
1316 case M32C_OPERAND_IMM_32_SI :
1317 {
1318 long value = fields->f_dsp_32_s32;
1319 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1320 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1321 }
1322 break;
1323 case M32C_OPERAND_IMM_40_HI :
1324 {
1325 long value = fields->f_dsp_40_s16;
1326 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1327 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1328 }
1329 break;
1330 case M32C_OPERAND_IMM_40_QI :
1331 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1332 break;
1333 case M32C_OPERAND_IMM_40_SI :
1334 {
1335 {
1336 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1337 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1338 }
1339 {
1340 long value = fields->f_dsp_40_u24;
1341 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1342 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1343 }
1344 if (errmsg)
1345 break;
1346 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1347 if (errmsg)
1348 break;
1349 }
1350 break;
1351 case M32C_OPERAND_IMM_48_HI :
1352 {
1353 long value = fields->f_dsp_48_s16;
1354 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1355 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1356 }
1357 break;
1358 case M32C_OPERAND_IMM_48_QI :
1359 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1360 break;
1361 case M32C_OPERAND_IMM_48_SI :
1362 {
1363 {
1364 FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1365 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1366 }
1367 {
1368 long value = fields->f_dsp_48_u16;
1369 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1370 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1371 }
1372 if (errmsg)
1373 break;
1374 {
1375 long value = fields->f_dsp_64_u16;
1376 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1377 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1378 }
1379 if (errmsg)
1380 break;
1381 }
1382 break;
1383 case M32C_OPERAND_IMM_56_HI :
1384 {
1385 {
1386 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1387 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1388 }
1389 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1390 if (errmsg)
1391 break;
1392 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1393 if (errmsg)
1394 break;
1395 }
1396 break;
1397 case M32C_OPERAND_IMM_56_QI :
1398 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1399 break;
1400 case M32C_OPERAND_IMM_64_HI :
1401 {
1402 long value = fields->f_dsp_64_s16;
1403 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1404 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1405 }
1406 break;
1407 case M32C_OPERAND_IMM_8_HI :
1408 {
1409 long value = fields->f_dsp_8_s16;
1410 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1411 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1412 }
1413 break;
1414 case M32C_OPERAND_IMM_8_QI :
1415 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1416 break;
1417 case M32C_OPERAND_IMM_8_S4 :
1418 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1419 break;
1420 case M32C_OPERAND_IMM_8_S4N :
1421 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1422 break;
1423 case M32C_OPERAND_IMM_SH_12_S4 :
1424 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1425 break;
1426 case M32C_OPERAND_IMM_SH_20_S4 :
1427 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1428 break;
1429 case M32C_OPERAND_IMM_SH_8_S4 :
1430 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1431 break;
1432 case M32C_OPERAND_IMM1_S :
1433 {
1434 long value = fields->f_imm1_S;
1435 value = ((value) - (1));
1436 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1437 }
1438 break;
1439 case M32C_OPERAND_IMM3_S :
1440 {
1441 {
1442 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1443 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1444 }
1445 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1446 if (errmsg)
1447 break;
1448 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1449 if (errmsg)
1450 break;
1451 }
1452 break;
1453 case M32C_OPERAND_LAB_16_8 :
1454 {
1455 long value = fields->f_lab_16_8;
1456 value = ((value) - (((pc) + (2))));
1457 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1458 }
1459 break;
1460 case M32C_OPERAND_LAB_24_8 :
1461 {
1462 long value = fields->f_lab_24_8;
1463 value = ((value) - (((pc) + (2))));
1464 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1465 }
1466 break;
1467 case M32C_OPERAND_LAB_32_8 :
1468 {
1469 long value = fields->f_lab_32_8;
1470 value = ((value) - (((pc) + (2))));
1471 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1472 }
1473 break;
1474 case M32C_OPERAND_LAB_40_8 :
1475 {
1476 long value = fields->f_lab_40_8;
1477 value = ((value) - (((pc) + (2))));
1478 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1479 }
1480 break;
1481 case M32C_OPERAND_LAB_5_3 :
1482 {
1483 long value = fields->f_lab_5_3;
1484 value = ((value) - (((pc) + (2))));
1485 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1486 }
1487 break;
1488 case M32C_OPERAND_LAB_8_16 :
1489 {
1490 long value = fields->f_lab_8_16;
1491 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1492 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1493 }
1494 break;
1495 case M32C_OPERAND_LAB_8_24 :
1496 {
1497 long value = fields->f_lab_8_24;
1498 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1499 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1500 }
1501 break;
1502 case M32C_OPERAND_LAB_8_8 :
1503 {
1504 long value = fields->f_lab_8_8;
1505 value = ((value) - (((pc) + (1))));
1506 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1507 }
1508 break;
1509 case M32C_OPERAND_LAB32_JMP_S :
1510 {
1511 {
1512 SI tmp_val;
1513 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1514 FLD (f_7_1) = ((tmp_val) & (1));
1515 FLD (f_2_2) = ((USI) (tmp_val) >> (1));
1516 }
1517 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1518 if (errmsg)
1519 break;
1520 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1521 if (errmsg)
1522 break;
1523 }
1524 break;
1525 case M32C_OPERAND_Q :
1526 break;
1527 case M32C_OPERAND_R0 :
1528 break;
1529 case M32C_OPERAND_R0H :
1530 break;
1531 case M32C_OPERAND_R0L :
1532 break;
1533 case M32C_OPERAND_R1 :
1534 break;
1535 case M32C_OPERAND_R1R2R0 :
1536 break;
1537 case M32C_OPERAND_R2 :
1538 break;
1539 case M32C_OPERAND_R2R0 :
1540 break;
1541 case M32C_OPERAND_R3 :
1542 break;
1543 case M32C_OPERAND_R3R1 :
1544 break;
1545 case M32C_OPERAND_REGSETPOP :
1546 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1547 break;
1548 case M32C_OPERAND_REGSETPUSH :
1549 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1550 break;
1551 case M32C_OPERAND_RN16_PUSH_S :
1552 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1553 break;
1554 case M32C_OPERAND_S :
1555 break;
1556 case M32C_OPERAND_SRC16AN :
1557 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1558 break;
1559 case M32C_OPERAND_SRC16ANHI :
1560 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1561 break;
1562 case M32C_OPERAND_SRC16ANQI :
1563 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1564 break;
1565 case M32C_OPERAND_SRC16RNHI :
1566 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1567 break;
1568 case M32C_OPERAND_SRC16RNQI :
1569 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1570 break;
1571 case M32C_OPERAND_SRC32ANPREFIXED :
1572 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1573 break;
1574 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1575 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1576 break;
1577 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1578 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1579 break;
1580 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1581 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1582 break;
1583 case M32C_OPERAND_SRC32ANUNPREFIXED :
1584 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1585 break;
1586 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1587 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1588 break;
1589 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1590 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1591 break;
1592 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1593 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1594 break;
1595 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1596 {
1597 long value = fields->f_src32_rn_prefixed_HI;
1598 value = ((((value) + (2))) % (4));
1599 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1600 }
1601 break;
1602 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1603 {
1604 long value = fields->f_src32_rn_prefixed_QI;
1605 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1606 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1607 }
1608 break;
1609 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1610 {
1611 long value = fields->f_src32_rn_prefixed_SI;
1612 value = ((value) + (2));
1613 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1614 }
1615 break;
1616 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1617 {
1618 long value = fields->f_src32_rn_unprefixed_HI;
1619 value = ((((value) + (2))) % (4));
1620 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1621 }
1622 break;
1623 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1624 {
1625 long value = fields->f_src32_rn_unprefixed_QI;
1626 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1627 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1628 }
1629 break;
1630 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1631 {
1632 long value = fields->f_src32_rn_unprefixed_SI;
1633 value = ((value) + (2));
1634 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1635 }
1636 break;
1637 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1638 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1639 break;
1640 case M32C_OPERAND_X :
1641 break;
1642 case M32C_OPERAND_Z :
1643 break;
1644 case M32C_OPERAND_COND16_16 :
1645 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1646 break;
1647 case M32C_OPERAND_COND16_24 :
1648 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1649 break;
1650 case M32C_OPERAND_COND16_32 :
1651 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1652 break;
1653 case M32C_OPERAND_COND16C :
1654 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1655 break;
1656 case M32C_OPERAND_COND16J :
1657 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1658 break;
1659 case M32C_OPERAND_COND16J5 :
1660 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1661 break;
1662 case M32C_OPERAND_COND32 :
1663 {
1664 {
1665 FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1));
1666 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1667 }
1668 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1669 if (errmsg)
1670 break;
1671 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1672 if (errmsg)
1673 break;
1674 }
1675 break;
1676 case M32C_OPERAND_COND32_16 :
1677 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1678 break;
1679 case M32C_OPERAND_COND32_24 :
1680 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1681 break;
1682 case M32C_OPERAND_COND32_32 :
1683 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1684 break;
1685 case M32C_OPERAND_COND32_40 :
1686 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1687 break;
1688 case M32C_OPERAND_COND32J :
1689 {
1690 {
1691 FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7));
1692 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1693 }
1694 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1695 if (errmsg)
1696 break;
1697 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1698 if (errmsg)
1699 break;
1700 }
1701 break;
1702 case M32C_OPERAND_CR1_PREFIXED_32 :
1703 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1704 break;
1705 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1706 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1707 break;
1708 case M32C_OPERAND_CR16 :
1709 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1710 break;
1711 case M32C_OPERAND_CR2_32 :
1712 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1713 break;
1714 case M32C_OPERAND_CR3_PREFIXED_32 :
1715 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1716 break;
1717 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1718 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1719 break;
1720 case M32C_OPERAND_FLAGS16 :
1721 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1722 break;
1723 case M32C_OPERAND_FLAGS32 :
1724 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1725 break;
1726 case M32C_OPERAND_SCCOND32 :
1727 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1728 break;
1729 case M32C_OPERAND_SIZE :
1730 break;
1731
1732 default :
1733 /* xgettext:c-format */
1734 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1735 opindex);
1736 abort ();
1737 }
1738
1739 return errmsg;
1740 }
1741
1742 int m32c_cgen_extract_operand
1743 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1744
1745 /* Main entry point for operand extraction.
1746 The result is <= 0 for error, >0 for success.
1747 ??? Actual values aren't well defined right now.
1748
1749 This function is basically just a big switch statement. Earlier versions
1750 used tables to look up the function to use, but
1751 - if the table contains both assembler and disassembler functions then
1752 the disassembler contains much of the assembler and vice-versa,
1753 - there's a lot of inlining possibilities as things grow,
1754 - using a switch statement avoids the function call overhead.
1755
1756 This function could be moved into `print_insn_normal', but keeping it
1757 separate makes clear the interface between `print_insn_normal' and each of
1758 the handlers. */
1759
1760 int
1761 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1762 int opindex,
1763 CGEN_EXTRACT_INFO *ex_info,
1764 CGEN_INSN_INT insn_value,
1765 CGEN_FIELDS * fields,
1766 bfd_vma pc)
1767 {
1768 /* Assume success (for those operands that are nops). */
1769 int length = 1;
1770 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1771
1772 switch (opindex)
1773 {
1774 case M32C_OPERAND_A0 :
1775 break;
1776 case M32C_OPERAND_A1 :
1777 break;
1778 case M32C_OPERAND_AN16_PUSH_S :
1779 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1780 break;
1781 case M32C_OPERAND_BIT16AN :
1782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1783 break;
1784 case M32C_OPERAND_BIT16RN :
1785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1786 break;
1787 case M32C_OPERAND_BIT3_S :
1788 {
1789 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1790 if (length <= 0) break;
1791 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1792 if (length <= 0) break;
1793 {
1794 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1795 }
1796 }
1797 break;
1798 case M32C_OPERAND_BIT32ANPREFIXED :
1799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1800 break;
1801 case M32C_OPERAND_BIT32ANUNPREFIXED :
1802 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1803 break;
1804 case M32C_OPERAND_BIT32RNPREFIXED :
1805 {
1806 long value;
1807 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1808 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1809 fields->f_dst32_rn_prefixed_QI = value;
1810 }
1811 break;
1812 case M32C_OPERAND_BIT32RNUNPREFIXED :
1813 {
1814 long value;
1815 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1816 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1817 fields->f_dst32_rn_unprefixed_QI = value;
1818 }
1819 break;
1820 case M32C_OPERAND_BITBASE16_16_S8 :
1821 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1822 break;
1823 case M32C_OPERAND_BITBASE16_16_U16 :
1824 {
1825 long value;
1826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1827 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1828 fields->f_dsp_16_u16 = value;
1829 }
1830 break;
1831 case M32C_OPERAND_BITBASE16_16_U8 :
1832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1833 break;
1834 case M32C_OPERAND_BITBASE16_8_U11_S :
1835 {
1836 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1837 if (length <= 0) break;
1838 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1839 if (length <= 0) break;
1840 {
1841 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1842 }
1843 }
1844 break;
1845 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1846 {
1847 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1848 if (length <= 0) break;
1849 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1850 if (length <= 0) break;
1851 {
1852 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1853 }
1854 }
1855 break;
1856 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1857 {
1858 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1859 if (length <= 0) break;
1860 {
1861 long value;
1862 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1863 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1864 fields->f_dsp_16_s16 = value;
1865 }
1866 if (length <= 0) break;
1867 {
1868 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1869 }
1870 }
1871 break;
1872 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1873 {
1874 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1875 if (length <= 0) break;
1876 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1877 if (length <= 0) break;
1878 {
1879 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1880 }
1881 }
1882 break;
1883 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1884 {
1885 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1886 if (length <= 0) break;
1887 {
1888 long value;
1889 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1890 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1891 fields->f_dsp_16_u16 = value;
1892 }
1893 if (length <= 0) break;
1894 {
1895 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1896 }
1897 }
1898 break;
1899 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1900 {
1901 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1902 if (length <= 0) break;
1903 {
1904 long value;
1905 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1906 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1907 fields->f_dsp_16_u16 = value;
1908 }
1909 if (length <= 0) break;
1910 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1911 if (length <= 0) break;
1912 {
1913 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1914 }
1915 }
1916 break;
1917 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1918 {
1919 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1920 if (length <= 0) break;
1921 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1922 if (length <= 0) break;
1923 {
1924 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1925 }
1926 }
1927 break;
1928 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1929 {
1930 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1931 if (length <= 0) break;
1932 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1933 if (length <= 0) break;
1934 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1935 if (length <= 0) break;
1936 {
1937 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1938 }
1939 }
1940 break;
1941 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1942 {
1943 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1944 if (length <= 0) break;
1945 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1946 if (length <= 0) break;
1947 {
1948 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1949 }
1950 }
1951 break;
1952 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1953 {
1954 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1955 if (length <= 0) break;
1956 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1957 if (length <= 0) break;
1958 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1959 if (length <= 0) break;
1960 {
1961 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1962 }
1963 }
1964 break;
1965 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1966 {
1967 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1968 if (length <= 0) break;
1969 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1970 if (length <= 0) break;
1971 {
1972 long value;
1973 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1974 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1975 fields->f_dsp_32_u16 = value;
1976 }
1977 if (length <= 0) break;
1978 {
1979 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1980 }
1981 }
1982 break;
1983 case M32C_OPERAND_BITNO16R :
1984 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1985 break;
1986 case M32C_OPERAND_BITNO32PREFIXED :
1987 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1988 break;
1989 case M32C_OPERAND_BITNO32UNPREFIXED :
1990 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1991 break;
1992 case M32C_OPERAND_DSP_10_U6 :
1993 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1994 break;
1995 case M32C_OPERAND_DSP_16_S16 :
1996 {
1997 long value;
1998 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1999 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2000 fields->f_dsp_16_s16 = value;
2001 }
2002 break;
2003 case M32C_OPERAND_DSP_16_S8 :
2004 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2005 break;
2006 case M32C_OPERAND_DSP_16_U16 :
2007 {
2008 long value;
2009 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2010 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2011 fields->f_dsp_16_u16 = value;
2012 }
2013 break;
2014 case M32C_OPERAND_DSP_16_U20 :
2015 {
2016 {
2017 long value;
2018 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2019 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2020 fields->f_dsp_16_u16 = value;
2021 }
2022 if (length <= 0) break;
2023 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2024 if (length <= 0) break;
2025 {
2026 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2027 }
2028 }
2029 break;
2030 case M32C_OPERAND_DSP_16_U24 :
2031 {
2032 {
2033 long value;
2034 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2035 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2036 fields->f_dsp_16_u16 = value;
2037 }
2038 if (length <= 0) break;
2039 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2040 if (length <= 0) break;
2041 {
2042 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2043 }
2044 }
2045 break;
2046 case M32C_OPERAND_DSP_16_U8 :
2047 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2048 break;
2049 case M32C_OPERAND_DSP_24_S16 :
2050 {
2051 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2052 if (length <= 0) break;
2053 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2054 if (length <= 0) break;
2055 {
2056 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2057 }
2058 }
2059 break;
2060 case M32C_OPERAND_DSP_24_S8 :
2061 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2062 break;
2063 case M32C_OPERAND_DSP_24_U16 :
2064 {
2065 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2066 if (length <= 0) break;
2067 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2068 if (length <= 0) break;
2069 {
2070 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2071 }
2072 }
2073 break;
2074 case M32C_OPERAND_DSP_24_U20 :
2075 {
2076 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2077 if (length <= 0) break;
2078 {
2079 long value;
2080 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2081 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2082 fields->f_dsp_32_u16 = value;
2083 }
2084 if (length <= 0) break;
2085 {
2086 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2087 }
2088 }
2089 break;
2090 case M32C_OPERAND_DSP_24_U24 :
2091 {
2092 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2093 if (length <= 0) break;
2094 {
2095 long value;
2096 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2097 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2098 fields->f_dsp_32_u16 = value;
2099 }
2100 if (length <= 0) break;
2101 {
2102 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2103 }
2104 }
2105 break;
2106 case M32C_OPERAND_DSP_24_U8 :
2107 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2108 break;
2109 case M32C_OPERAND_DSP_32_S16 :
2110 {
2111 long value;
2112 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2113 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2114 fields->f_dsp_32_s16 = value;
2115 }
2116 break;
2117 case M32C_OPERAND_DSP_32_S8 :
2118 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2119 break;
2120 case M32C_OPERAND_DSP_32_U16 :
2121 {
2122 long value;
2123 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2124 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2125 fields->f_dsp_32_u16 = value;
2126 }
2127 break;
2128 case M32C_OPERAND_DSP_32_U20 :
2129 {
2130 long value;
2131 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2132 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2133 fields->f_dsp_32_u24 = value;
2134 }
2135 break;
2136 case M32C_OPERAND_DSP_32_U24 :
2137 {
2138 long value;
2139 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2140 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2141 fields->f_dsp_32_u24 = value;
2142 }
2143 break;
2144 case M32C_OPERAND_DSP_32_U8 :
2145 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2146 break;
2147 case M32C_OPERAND_DSP_40_S16 :
2148 {
2149 long value;
2150 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2151 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2152 fields->f_dsp_40_s16 = value;
2153 }
2154 break;
2155 case M32C_OPERAND_DSP_40_S8 :
2156 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2157 break;
2158 case M32C_OPERAND_DSP_40_U16 :
2159 {
2160 long value;
2161 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2162 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2163 fields->f_dsp_40_u16 = value;
2164 }
2165 break;
2166 case M32C_OPERAND_DSP_40_U20 :
2167 {
2168 long value;
2169 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
2170 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
2171 fields->f_dsp_40_u20 = value;
2172 }
2173 break;
2174 case M32C_OPERAND_DSP_40_U24 :
2175 {
2176 long value;
2177 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2178 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2179 fields->f_dsp_40_u24 = value;
2180 }
2181 break;
2182 case M32C_OPERAND_DSP_40_U8 :
2183 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2184 break;
2185 case M32C_OPERAND_DSP_48_S16 :
2186 {
2187 long value;
2188 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2189 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2190 fields->f_dsp_48_s16 = value;
2191 }
2192 break;
2193 case M32C_OPERAND_DSP_48_S8 :
2194 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2195 break;
2196 case M32C_OPERAND_DSP_48_U16 :
2197 {
2198 long value;
2199 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2200 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2201 fields->f_dsp_48_u16 = value;
2202 }
2203 break;
2204 case M32C_OPERAND_DSP_48_U20 :
2205 {
2206 {
2207 long value;
2208 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2209 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2210 fields->f_dsp_48_u16 = value;
2211 }
2212 if (length <= 0) break;
2213 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2214 if (length <= 0) break;
2215 {
2216 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040))));
2217 }
2218 }
2219 break;
2220 case M32C_OPERAND_DSP_48_U24 :
2221 {
2222 {
2223 long value;
2224 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2225 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2226 fields->f_dsp_48_u16 = value;
2227 }
2228 if (length <= 0) break;
2229 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2230 if (length <= 0) break;
2231 {
2232 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2233 }
2234 }
2235 break;
2236 case M32C_OPERAND_DSP_48_U8 :
2237 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2238 break;
2239 case M32C_OPERAND_DSP_8_S24 :
2240 {
2241 long value;
2242 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2243 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2244 fields->f_dsp_8_s24 = value;
2245 }
2246 break;
2247 case M32C_OPERAND_DSP_8_S8 :
2248 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2249 break;
2250 case M32C_OPERAND_DSP_8_U16 :
2251 {
2252 long value;
2253 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2254 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2255 fields->f_dsp_8_u16 = value;
2256 }
2257 break;
2258 case M32C_OPERAND_DSP_8_U24 :
2259 {
2260 long value;
2261 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2262 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2263 fields->f_dsp_8_u24 = value;
2264 }
2265 break;
2266 case M32C_OPERAND_DSP_8_U6 :
2267 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2268 break;
2269 case M32C_OPERAND_DSP_8_U8 :
2270 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2271 break;
2272 case M32C_OPERAND_DST16AN :
2273 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2274 break;
2275 case M32C_OPERAND_DST16AN_S :
2276 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2277 break;
2278 case M32C_OPERAND_DST16ANHI :
2279 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2280 break;
2281 case M32C_OPERAND_DST16ANQI :
2282 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2283 break;
2284 case M32C_OPERAND_DST16ANQI_S :
2285 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2286 break;
2287 case M32C_OPERAND_DST16ANSI :
2288 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2289 break;
2290 case M32C_OPERAND_DST16RNEXTQI :
2291 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2292 break;
2293 case M32C_OPERAND_DST16RNHI :
2294 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2295 break;
2296 case M32C_OPERAND_DST16RNQI :
2297 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2298 break;
2299 case M32C_OPERAND_DST16RNQI_S :
2300 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2301 break;
2302 case M32C_OPERAND_DST16RNSI :
2303 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2304 break;
2305 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2306 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2307 break;
2308 case M32C_OPERAND_DST32ANPREFIXED :
2309 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2310 break;
2311 case M32C_OPERAND_DST32ANPREFIXEDHI :
2312 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2313 break;
2314 case M32C_OPERAND_DST32ANPREFIXEDQI :
2315 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2316 break;
2317 case M32C_OPERAND_DST32ANPREFIXEDSI :
2318 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2319 break;
2320 case M32C_OPERAND_DST32ANUNPREFIXED :
2321 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2322 break;
2323 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2324 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2325 break;
2326 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2327 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2328 break;
2329 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2330 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2331 break;
2332 case M32C_OPERAND_DST32R0HI_S :
2333 break;
2334 case M32C_OPERAND_DST32R0QI_S :
2335 break;
2336 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2337 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2338 break;
2339 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2340 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2341 break;
2342 case M32C_OPERAND_DST32RNPREFIXEDHI :
2343 {
2344 long value;
2345 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2346 value = ((((value) + (2))) % (4));
2347 fields->f_dst32_rn_prefixed_HI = value;
2348 }
2349 break;
2350 case M32C_OPERAND_DST32RNPREFIXEDQI :
2351 {
2352 long value;
2353 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2354 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2355 fields->f_dst32_rn_prefixed_QI = value;
2356 }
2357 break;
2358 case M32C_OPERAND_DST32RNPREFIXEDSI :
2359 {
2360 long value;
2361 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2362 value = ((value) - (2));
2363 fields->f_dst32_rn_prefixed_SI = value;
2364 }
2365 break;
2366 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2367 {
2368 long value;
2369 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2370 value = ((((value) + (2))) % (4));
2371 fields->f_dst32_rn_unprefixed_HI = value;
2372 }
2373 break;
2374 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2375 {
2376 long value;
2377 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2378 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2379 fields->f_dst32_rn_unprefixed_QI = value;
2380 }
2381 break;
2382 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2383 {
2384 long value;
2385 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2386 value = ((value) - (2));
2387 fields->f_dst32_rn_unprefixed_SI = value;
2388 }
2389 break;
2390 case M32C_OPERAND_G :
2391 break;
2392 case M32C_OPERAND_IMM_12_S4 :
2393 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2394 break;
2395 case M32C_OPERAND_IMM_12_S4N :
2396 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2397 break;
2398 case M32C_OPERAND_IMM_13_U3 :
2399 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2400 break;
2401 case M32C_OPERAND_IMM_16_HI :
2402 {
2403 long value;
2404 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2405 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2406 fields->f_dsp_16_s16 = value;
2407 }
2408 break;
2409 case M32C_OPERAND_IMM_16_QI :
2410 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2411 break;
2412 case M32C_OPERAND_IMM_16_SI :
2413 {
2414 {
2415 long value;
2416 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2417 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2418 fields->f_dsp_16_u16 = value;
2419 }
2420 if (length <= 0) break;
2421 {
2422 long value;
2423 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2424 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2425 fields->f_dsp_32_u16 = value;
2426 }
2427 if (length <= 0) break;
2428 {
2429 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2430 }
2431 }
2432 break;
2433 case M32C_OPERAND_IMM_20_S4 :
2434 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2435 break;
2436 case M32C_OPERAND_IMM_24_HI :
2437 {
2438 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2439 if (length <= 0) break;
2440 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2441 if (length <= 0) break;
2442 {
2443 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2444 }
2445 }
2446 break;
2447 case M32C_OPERAND_IMM_24_QI :
2448 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2449 break;
2450 case M32C_OPERAND_IMM_24_SI :
2451 {
2452 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2453 if (length <= 0) break;
2454 {
2455 long value;
2456 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2457 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2458 fields->f_dsp_32_u24 = value;
2459 }
2460 if (length <= 0) break;
2461 {
2462 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2463 }
2464 }
2465 break;
2466 case M32C_OPERAND_IMM_32_HI :
2467 {
2468 long value;
2469 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2470 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2471 fields->f_dsp_32_s16 = value;
2472 }
2473 break;
2474 case M32C_OPERAND_IMM_32_QI :
2475 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2476 break;
2477 case M32C_OPERAND_IMM_32_SI :
2478 {
2479 long value;
2480 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2481 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2482 fields->f_dsp_32_s32 = value;
2483 }
2484 break;
2485 case M32C_OPERAND_IMM_40_HI :
2486 {
2487 long value;
2488 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2489 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2490 fields->f_dsp_40_s16 = value;
2491 }
2492 break;
2493 case M32C_OPERAND_IMM_40_QI :
2494 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2495 break;
2496 case M32C_OPERAND_IMM_40_SI :
2497 {
2498 {
2499 long value;
2500 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2501 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2502 fields->f_dsp_40_u24 = value;
2503 }
2504 if (length <= 0) break;
2505 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2506 if (length <= 0) break;
2507 {
2508 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2509 }
2510 }
2511 break;
2512 case M32C_OPERAND_IMM_48_HI :
2513 {
2514 long value;
2515 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2516 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2517 fields->f_dsp_48_s16 = value;
2518 }
2519 break;
2520 case M32C_OPERAND_IMM_48_QI :
2521 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2522 break;
2523 case M32C_OPERAND_IMM_48_SI :
2524 {
2525 {
2526 long value;
2527 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2528 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2529 fields->f_dsp_48_u16 = value;
2530 }
2531 if (length <= 0) break;
2532 {
2533 long value;
2534 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2535 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2536 fields->f_dsp_64_u16 = value;
2537 }
2538 if (length <= 0) break;
2539 {
2540 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2541 }
2542 }
2543 break;
2544 case M32C_OPERAND_IMM_56_HI :
2545 {
2546 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2547 if (length <= 0) break;
2548 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2549 if (length <= 0) break;
2550 {
2551 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2552 }
2553 }
2554 break;
2555 case M32C_OPERAND_IMM_56_QI :
2556 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2557 break;
2558 case M32C_OPERAND_IMM_64_HI :
2559 {
2560 long value;
2561 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2562 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2563 fields->f_dsp_64_s16 = value;
2564 }
2565 break;
2566 case M32C_OPERAND_IMM_8_HI :
2567 {
2568 long value;
2569 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2570 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2571 fields->f_dsp_8_s16 = value;
2572 }
2573 break;
2574 case M32C_OPERAND_IMM_8_QI :
2575 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2576 break;
2577 case M32C_OPERAND_IMM_8_S4 :
2578 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2579 break;
2580 case M32C_OPERAND_IMM_8_S4N :
2581 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2582 break;
2583 case M32C_OPERAND_IMM_SH_12_S4 :
2584 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2585 break;
2586 case M32C_OPERAND_IMM_SH_20_S4 :
2587 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2588 break;
2589 case M32C_OPERAND_IMM_SH_8_S4 :
2590 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2591 break;
2592 case M32C_OPERAND_IMM1_S :
2593 {
2594 long value;
2595 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2596 value = ((value) + (1));
2597 fields->f_imm1_S = value;
2598 }
2599 break;
2600 case M32C_OPERAND_IMM3_S :
2601 {
2602 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2603 if (length <= 0) break;
2604 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2605 if (length <= 0) break;
2606 {
2607 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2608 }
2609 }
2610 break;
2611 case M32C_OPERAND_LAB_16_8 :
2612 {
2613 long value;
2614 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2615 value = ((value) + (((pc) + (2))));
2616 fields->f_lab_16_8 = value;
2617 }
2618 break;
2619 case M32C_OPERAND_LAB_24_8 :
2620 {
2621 long value;
2622 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2623 value = ((value) + (((pc) + (2))));
2624 fields->f_lab_24_8 = value;
2625 }
2626 break;
2627 case M32C_OPERAND_LAB_32_8 :
2628 {
2629 long value;
2630 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2631 value = ((value) + (((pc) + (2))));
2632 fields->f_lab_32_8 = value;
2633 }
2634 break;
2635 case M32C_OPERAND_LAB_40_8 :
2636 {
2637 long value;
2638 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2639 value = ((value) + (((pc) + (2))));
2640 fields->f_lab_40_8 = value;
2641 }
2642 break;
2643 case M32C_OPERAND_LAB_5_3 :
2644 {
2645 long value;
2646 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2647 value = ((value) + (((pc) + (2))));
2648 fields->f_lab_5_3 = value;
2649 }
2650 break;
2651 case M32C_OPERAND_LAB_8_16 :
2652 {
2653 long value;
2654 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2655 value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2656 fields->f_lab_8_16 = value;
2657 }
2658 break;
2659 case M32C_OPERAND_LAB_8_24 :
2660 {
2661 long value;
2662 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2663 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2664 fields->f_lab_8_24 = value;
2665 }
2666 break;
2667 case M32C_OPERAND_LAB_8_8 :
2668 {
2669 long value;
2670 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2671 value = ((value) + (((pc) + (1))));
2672 fields->f_lab_8_8 = value;
2673 }
2674 break;
2675 case M32C_OPERAND_LAB32_JMP_S :
2676 {
2677 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2678 if (length <= 0) break;
2679 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2680 if (length <= 0) break;
2681 {
2682 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2683 }
2684 }
2685 break;
2686 case M32C_OPERAND_Q :
2687 break;
2688 case M32C_OPERAND_R0 :
2689 break;
2690 case M32C_OPERAND_R0H :
2691 break;
2692 case M32C_OPERAND_R0L :
2693 break;
2694 case M32C_OPERAND_R1 :
2695 break;
2696 case M32C_OPERAND_R1R2R0 :
2697 break;
2698 case M32C_OPERAND_R2 :
2699 break;
2700 case M32C_OPERAND_R2R0 :
2701 break;
2702 case M32C_OPERAND_R3 :
2703 break;
2704 case M32C_OPERAND_R3R1 :
2705 break;
2706 case M32C_OPERAND_REGSETPOP :
2707 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2708 break;
2709 case M32C_OPERAND_REGSETPUSH :
2710 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2711 break;
2712 case M32C_OPERAND_RN16_PUSH_S :
2713 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2714 break;
2715 case M32C_OPERAND_S :
2716 break;
2717 case M32C_OPERAND_SRC16AN :
2718 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2719 break;
2720 case M32C_OPERAND_SRC16ANHI :
2721 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2722 break;
2723 case M32C_OPERAND_SRC16ANQI :
2724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2725 break;
2726 case M32C_OPERAND_SRC16RNHI :
2727 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2728 break;
2729 case M32C_OPERAND_SRC16RNQI :
2730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2731 break;
2732 case M32C_OPERAND_SRC32ANPREFIXED :
2733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2734 break;
2735 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2737 break;
2738 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2740 break;
2741 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2743 break;
2744 case M32C_OPERAND_SRC32ANUNPREFIXED :
2745 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2746 break;
2747 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2748 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2749 break;
2750 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2751 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2752 break;
2753 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2754 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2755 break;
2756 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2757 {
2758 long value;
2759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2760 value = ((((value) + (2))) % (4));
2761 fields->f_src32_rn_prefixed_HI = value;
2762 }
2763 break;
2764 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2765 {
2766 long value;
2767 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2768 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2769 fields->f_src32_rn_prefixed_QI = value;
2770 }
2771 break;
2772 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2773 {
2774 long value;
2775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2776 value = ((value) - (2));
2777 fields->f_src32_rn_prefixed_SI = value;
2778 }
2779 break;
2780 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2781 {
2782 long value;
2783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2784 value = ((((value) + (2))) % (4));
2785 fields->f_src32_rn_unprefixed_HI = value;
2786 }
2787 break;
2788 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2789 {
2790 long value;
2791 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2792 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2793 fields->f_src32_rn_unprefixed_QI = value;
2794 }
2795 break;
2796 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2797 {
2798 long value;
2799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2800 value = ((value) - (2));
2801 fields->f_src32_rn_unprefixed_SI = value;
2802 }
2803 break;
2804 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2805 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2806 break;
2807 case M32C_OPERAND_X :
2808 break;
2809 case M32C_OPERAND_Z :
2810 break;
2811 case M32C_OPERAND_COND16_16 :
2812 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2813 break;
2814 case M32C_OPERAND_COND16_24 :
2815 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2816 break;
2817 case M32C_OPERAND_COND16_32 :
2818 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2819 break;
2820 case M32C_OPERAND_COND16C :
2821 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2822 break;
2823 case M32C_OPERAND_COND16J :
2824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2825 break;
2826 case M32C_OPERAND_COND16J5 :
2827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2828 break;
2829 case M32C_OPERAND_COND32 :
2830 {
2831 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2832 if (length <= 0) break;
2833 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2834 if (length <= 0) break;
2835 {
2836 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2837 }
2838 }
2839 break;
2840 case M32C_OPERAND_COND32_16 :
2841 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2842 break;
2843 case M32C_OPERAND_COND32_24 :
2844 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2845 break;
2846 case M32C_OPERAND_COND32_32 :
2847 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2848 break;
2849 case M32C_OPERAND_COND32_40 :
2850 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2851 break;
2852 case M32C_OPERAND_COND32J :
2853 {
2854 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2855 if (length <= 0) break;
2856 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2857 if (length <= 0) break;
2858 {
2859 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2860 }
2861 }
2862 break;
2863 case M32C_OPERAND_CR1_PREFIXED_32 :
2864 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2865 break;
2866 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2867 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2868 break;
2869 case M32C_OPERAND_CR16 :
2870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2871 break;
2872 case M32C_OPERAND_CR2_32 :
2873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2874 break;
2875 case M32C_OPERAND_CR3_PREFIXED_32 :
2876 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2877 break;
2878 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2880 break;
2881 case M32C_OPERAND_FLAGS16 :
2882 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2883 break;
2884 case M32C_OPERAND_FLAGS32 :
2885 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2886 break;
2887 case M32C_OPERAND_SCCOND32 :
2888 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2889 break;
2890 case M32C_OPERAND_SIZE :
2891 break;
2892
2893 default :
2894 /* xgettext:c-format */
2895 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2896 opindex);
2897 abort ();
2898 }
2899
2900 return length;
2901 }
2902
2903 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2904 {
2905 insert_insn_normal,
2906 };
2907
2908 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2909 {
2910 extract_insn_normal,
2911 };
2912
2913 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2914 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2915
2916 /* Getting values from cgen_fields is handled by a collection of functions.
2917 They are distinguished by the type of the VALUE argument they return.
2918 TODO: floating point, inlining support, remove cases where result type
2919 not appropriate. */
2920
2921 int
2922 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2923 int opindex,
2924 const CGEN_FIELDS * fields)
2925 {
2926 int value;
2927
2928 switch (opindex)
2929 {
2930 case M32C_OPERAND_A0 :
2931 value = 0;
2932 break;
2933 case M32C_OPERAND_A1 :
2934 value = 0;
2935 break;
2936 case M32C_OPERAND_AN16_PUSH_S :
2937 value = fields->f_4_1;
2938 break;
2939 case M32C_OPERAND_BIT16AN :
2940 value = fields->f_dst16_an;
2941 break;
2942 case M32C_OPERAND_BIT16RN :
2943 value = fields->f_dst16_rn;
2944 break;
2945 case M32C_OPERAND_BIT3_S :
2946 value = fields->f_imm3_S;
2947 break;
2948 case M32C_OPERAND_BIT32ANPREFIXED :
2949 value = fields->f_dst32_an_prefixed;
2950 break;
2951 case M32C_OPERAND_BIT32ANUNPREFIXED :
2952 value = fields->f_dst32_an_unprefixed;
2953 break;
2954 case M32C_OPERAND_BIT32RNPREFIXED :
2955 value = fields->f_dst32_rn_prefixed_QI;
2956 break;
2957 case M32C_OPERAND_BIT32RNUNPREFIXED :
2958 value = fields->f_dst32_rn_unprefixed_QI;
2959 break;
2960 case M32C_OPERAND_BITBASE16_16_S8 :
2961 value = fields->f_dsp_16_s8;
2962 break;
2963 case M32C_OPERAND_BITBASE16_16_U16 :
2964 value = fields->f_dsp_16_u16;
2965 break;
2966 case M32C_OPERAND_BITBASE16_16_U8 :
2967 value = fields->f_dsp_16_u8;
2968 break;
2969 case M32C_OPERAND_BITBASE16_8_U11_S :
2970 value = fields->f_bitbase16_u11_S;
2971 break;
2972 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2973 value = fields->f_bitbase32_16_s11_unprefixed;
2974 break;
2975 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2976 value = fields->f_bitbase32_16_s19_unprefixed;
2977 break;
2978 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2979 value = fields->f_bitbase32_16_u11_unprefixed;
2980 break;
2981 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2982 value = fields->f_bitbase32_16_u19_unprefixed;
2983 break;
2984 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2985 value = fields->f_bitbase32_16_u27_unprefixed;
2986 break;
2987 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2988 value = fields->f_bitbase32_24_s11_prefixed;
2989 break;
2990 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2991 value = fields->f_bitbase32_24_s19_prefixed;
2992 break;
2993 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2994 value = fields->f_bitbase32_24_u11_prefixed;
2995 break;
2996 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2997 value = fields->f_bitbase32_24_u19_prefixed;
2998 break;
2999 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3000 value = fields->f_bitbase32_24_u27_prefixed;
3001 break;
3002 case M32C_OPERAND_BITNO16R :
3003 value = fields->f_dsp_16_u8;
3004 break;
3005 case M32C_OPERAND_BITNO32PREFIXED :
3006 value = fields->f_bitno32_prefixed;
3007 break;
3008 case M32C_OPERAND_BITNO32UNPREFIXED :
3009 value = fields->f_bitno32_unprefixed;
3010 break;
3011 case M32C_OPERAND_DSP_10_U6 :
3012 value = fields->f_dsp_10_u6;
3013 break;
3014 case M32C_OPERAND_DSP_16_S16 :
3015 value = fields->f_dsp_16_s16;
3016 break;
3017 case M32C_OPERAND_DSP_16_S8 :
3018 value = fields->f_dsp_16_s8;
3019 break;
3020 case M32C_OPERAND_DSP_16_U16 :
3021 value = fields->f_dsp_16_u16;
3022 break;
3023 case M32C_OPERAND_DSP_16_U20 :
3024 value = fields->f_dsp_16_u24;
3025 break;
3026 case M32C_OPERAND_DSP_16_U24 :
3027 value = fields->f_dsp_16_u24;
3028 break;
3029 case M32C_OPERAND_DSP_16_U8 :
3030 value = fields->f_dsp_16_u8;
3031 break;
3032 case M32C_OPERAND_DSP_24_S16 :
3033 value = fields->f_dsp_24_s16;
3034 break;
3035 case M32C_OPERAND_DSP_24_S8 :
3036 value = fields->f_dsp_24_s8;
3037 break;
3038 case M32C_OPERAND_DSP_24_U16 :
3039 value = fields->f_dsp_24_u16;
3040 break;
3041 case M32C_OPERAND_DSP_24_U20 :
3042 value = fields->f_dsp_24_u24;
3043 break;
3044 case M32C_OPERAND_DSP_24_U24 :
3045 value = fields->f_dsp_24_u24;
3046 break;
3047 case M32C_OPERAND_DSP_24_U8 :
3048 value = fields->f_dsp_24_u8;
3049 break;
3050 case M32C_OPERAND_DSP_32_S16 :
3051 value = fields->f_dsp_32_s16;
3052 break;
3053 case M32C_OPERAND_DSP_32_S8 :
3054 value = fields->f_dsp_32_s8;
3055 break;
3056 case M32C_OPERAND_DSP_32_U16 :
3057 value = fields->f_dsp_32_u16;
3058 break;
3059 case M32C_OPERAND_DSP_32_U20 :
3060 value = fields->f_dsp_32_u24;
3061 break;
3062 case M32C_OPERAND_DSP_32_U24 :
3063 value = fields->f_dsp_32_u24;
3064 break;
3065 case M32C_OPERAND_DSP_32_U8 :
3066 value = fields->f_dsp_32_u8;
3067 break;
3068 case M32C_OPERAND_DSP_40_S16 :
3069 value = fields->f_dsp_40_s16;
3070 break;
3071 case M32C_OPERAND_DSP_40_S8 :
3072 value = fields->f_dsp_40_s8;
3073 break;
3074 case M32C_OPERAND_DSP_40_U16 :
3075 value = fields->f_dsp_40_u16;
3076 break;
3077 case M32C_OPERAND_DSP_40_U20 :
3078 value = fields->f_dsp_40_u20;
3079 break;
3080 case M32C_OPERAND_DSP_40_U24 :
3081 value = fields->f_dsp_40_u24;
3082 break;
3083 case M32C_OPERAND_DSP_40_U8 :
3084 value = fields->f_dsp_40_u8;
3085 break;
3086 case M32C_OPERAND_DSP_48_S16 :
3087 value = fields->f_dsp_48_s16;
3088 break;
3089 case M32C_OPERAND_DSP_48_S8 :
3090 value = fields->f_dsp_48_s8;
3091 break;
3092 case M32C_OPERAND_DSP_48_U16 :
3093 value = fields->f_dsp_48_u16;
3094 break;
3095 case M32C_OPERAND_DSP_48_U20 :
3096 value = fields->f_dsp_48_u20;
3097 break;
3098 case M32C_OPERAND_DSP_48_U24 :
3099 value = fields->f_dsp_48_u24;
3100 break;
3101 case M32C_OPERAND_DSP_48_U8 :
3102 value = fields->f_dsp_48_u8;
3103 break;
3104 case M32C_OPERAND_DSP_8_S24 :
3105 value = fields->f_dsp_8_s24;
3106 break;
3107 case M32C_OPERAND_DSP_8_S8 :
3108 value = fields->f_dsp_8_s8;
3109 break;
3110 case M32C_OPERAND_DSP_8_U16 :
3111 value = fields->f_dsp_8_u16;
3112 break;
3113 case M32C_OPERAND_DSP_8_U24 :
3114 value = fields->f_dsp_8_u24;
3115 break;
3116 case M32C_OPERAND_DSP_8_U6 :
3117 value = fields->f_dsp_8_u6;
3118 break;
3119 case M32C_OPERAND_DSP_8_U8 :
3120 value = fields->f_dsp_8_u8;
3121 break;
3122 case M32C_OPERAND_DST16AN :
3123 value = fields->f_dst16_an;
3124 break;
3125 case M32C_OPERAND_DST16AN_S :
3126 value = fields->f_dst16_an_s;
3127 break;
3128 case M32C_OPERAND_DST16ANHI :
3129 value = fields->f_dst16_an;
3130 break;
3131 case M32C_OPERAND_DST16ANQI :
3132 value = fields->f_dst16_an;
3133 break;
3134 case M32C_OPERAND_DST16ANQI_S :
3135 value = fields->f_dst16_rn_QI_s;
3136 break;
3137 case M32C_OPERAND_DST16ANSI :
3138 value = fields->f_dst16_an;
3139 break;
3140 case M32C_OPERAND_DST16RNEXTQI :
3141 value = fields->f_dst16_rn_ext;
3142 break;
3143 case M32C_OPERAND_DST16RNHI :
3144 value = fields->f_dst16_rn;
3145 break;
3146 case M32C_OPERAND_DST16RNQI :
3147 value = fields->f_dst16_rn;
3148 break;
3149 case M32C_OPERAND_DST16RNQI_S :
3150 value = fields->f_dst16_rn_QI_s;
3151 break;
3152 case M32C_OPERAND_DST16RNSI :
3153 value = fields->f_dst16_rn;
3154 break;
3155 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3156 value = fields->f_dst32_an_unprefixed;
3157 break;
3158 case M32C_OPERAND_DST32ANPREFIXED :
3159 value = fields->f_dst32_an_prefixed;
3160 break;
3161 case M32C_OPERAND_DST32ANPREFIXEDHI :
3162 value = fields->f_dst32_an_prefixed;
3163 break;
3164 case M32C_OPERAND_DST32ANPREFIXEDQI :
3165 value = fields->f_dst32_an_prefixed;
3166 break;
3167 case M32C_OPERAND_DST32ANPREFIXEDSI :
3168 value = fields->f_dst32_an_prefixed;
3169 break;
3170 case M32C_OPERAND_DST32ANUNPREFIXED :
3171 value = fields->f_dst32_an_unprefixed;
3172 break;
3173 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3174 value = fields->f_dst32_an_unprefixed;
3175 break;
3176 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3177 value = fields->f_dst32_an_unprefixed;
3178 break;
3179 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3180 value = fields->f_dst32_an_unprefixed;
3181 break;
3182 case M32C_OPERAND_DST32R0HI_S :
3183 value = 0;
3184 break;
3185 case M32C_OPERAND_DST32R0QI_S :
3186 value = 0;
3187 break;
3188 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3189 value = fields->f_dst32_rn_ext_unprefixed;
3190 break;
3191 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3192 value = fields->f_dst32_rn_ext_unprefixed;
3193 break;
3194 case M32C_OPERAND_DST32RNPREFIXEDHI :
3195 value = fields->f_dst32_rn_prefixed_HI;
3196 break;
3197 case M32C_OPERAND_DST32RNPREFIXEDQI :
3198 value = fields->f_dst32_rn_prefixed_QI;
3199 break;
3200 case M32C_OPERAND_DST32RNPREFIXEDSI :
3201 value = fields->f_dst32_rn_prefixed_SI;
3202 break;
3203 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3204 value = fields->f_dst32_rn_unprefixed_HI;
3205 break;
3206 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3207 value = fields->f_dst32_rn_unprefixed_QI;
3208 break;
3209 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3210 value = fields->f_dst32_rn_unprefixed_SI;
3211 break;
3212 case M32C_OPERAND_G :
3213 value = 0;
3214 break;
3215 case M32C_OPERAND_IMM_12_S4 :
3216 value = fields->f_imm_12_s4;
3217 break;
3218 case M32C_OPERAND_IMM_12_S4N :
3219 value = fields->f_imm_12_s4;
3220 break;
3221 case M32C_OPERAND_IMM_13_U3 :
3222 value = fields->f_imm_13_u3;
3223 break;
3224 case M32C_OPERAND_IMM_16_HI :
3225 value = fields->f_dsp_16_s16;
3226 break;
3227 case M32C_OPERAND_IMM_16_QI :
3228 value = fields->f_dsp_16_s8;
3229 break;
3230 case M32C_OPERAND_IMM_16_SI :
3231 value = fields->f_dsp_16_s32;
3232 break;
3233 case M32C_OPERAND_IMM_20_S4 :
3234 value = fields->f_imm_20_s4;
3235 break;
3236 case M32C_OPERAND_IMM_24_HI :
3237 value = fields->f_dsp_24_s16;
3238 break;
3239 case M32C_OPERAND_IMM_24_QI :
3240 value = fields->f_dsp_24_s8;
3241 break;
3242 case M32C_OPERAND_IMM_24_SI :
3243 value = fields->f_dsp_24_s32;
3244 break;
3245 case M32C_OPERAND_IMM_32_HI :
3246 value = fields->f_dsp_32_s16;
3247 break;
3248 case M32C_OPERAND_IMM_32_QI :
3249 value = fields->f_dsp_32_s8;
3250 break;
3251 case M32C_OPERAND_IMM_32_SI :
3252 value = fields->f_dsp_32_s32;
3253 break;
3254 case M32C_OPERAND_IMM_40_HI :
3255 value = fields->f_dsp_40_s16;
3256 break;
3257 case M32C_OPERAND_IMM_40_QI :
3258 value = fields->f_dsp_40_s8;
3259 break;
3260 case M32C_OPERAND_IMM_40_SI :
3261 value = fields->f_dsp_40_s32;
3262 break;
3263 case M32C_OPERAND_IMM_48_HI :
3264 value = fields->f_dsp_48_s16;
3265 break;
3266 case M32C_OPERAND_IMM_48_QI :
3267 value = fields->f_dsp_48_s8;
3268 break;
3269 case M32C_OPERAND_IMM_48_SI :
3270 value = fields->f_dsp_48_s32;
3271 break;
3272 case M32C_OPERAND_IMM_56_HI :
3273 value = fields->f_dsp_56_s16;
3274 break;
3275 case M32C_OPERAND_IMM_56_QI :
3276 value = fields->f_dsp_56_s8;
3277 break;
3278 case M32C_OPERAND_IMM_64_HI :
3279 value = fields->f_dsp_64_s16;
3280 break;
3281 case M32C_OPERAND_IMM_8_HI :
3282 value = fields->f_dsp_8_s16;
3283 break;
3284 case M32C_OPERAND_IMM_8_QI :
3285 value = fields->f_dsp_8_s8;
3286 break;
3287 case M32C_OPERAND_IMM_8_S4 :
3288 value = fields->f_imm_8_s4;
3289 break;
3290 case M32C_OPERAND_IMM_8_S4N :
3291 value = fields->f_imm_8_s4;
3292 break;
3293 case M32C_OPERAND_IMM_SH_12_S4 :
3294 value = fields->f_imm_12_s4;
3295 break;
3296 case M32C_OPERAND_IMM_SH_20_S4 :
3297 value = fields->f_imm_20_s4;
3298 break;
3299 case M32C_OPERAND_IMM_SH_8_S4 :
3300 value = fields->f_imm_8_s4;
3301 break;
3302 case M32C_OPERAND_IMM1_S :
3303 value = fields->f_imm1_S;
3304 break;
3305 case M32C_OPERAND_IMM3_S :
3306 value = fields->f_imm3_S;
3307 break;
3308 case M32C_OPERAND_LAB_16_8 :
3309 value = fields->f_lab_16_8;
3310 break;
3311 case M32C_OPERAND_LAB_24_8 :
3312 value = fields->f_lab_24_8;
3313 break;
3314 case M32C_OPERAND_LAB_32_8 :
3315 value = fields->f_lab_32_8;
3316 break;
3317 case M32C_OPERAND_LAB_40_8 :
3318 value = fields->f_lab_40_8;
3319 break;
3320 case M32C_OPERAND_LAB_5_3 :
3321 value = fields->f_lab_5_3;
3322 break;
3323 case M32C_OPERAND_LAB_8_16 :
3324 value = fields->f_lab_8_16;
3325 break;
3326 case M32C_OPERAND_LAB_8_24 :
3327 value = fields->f_lab_8_24;
3328 break;
3329 case M32C_OPERAND_LAB_8_8 :
3330 value = fields->f_lab_8_8;
3331 break;
3332 case M32C_OPERAND_LAB32_JMP_S :
3333 value = fields->f_lab32_jmp_s;
3334 break;
3335 case M32C_OPERAND_Q :
3336 value = 0;
3337 break;
3338 case M32C_OPERAND_R0 :
3339 value = 0;
3340 break;
3341 case M32C_OPERAND_R0H :
3342 value = 0;
3343 break;
3344 case M32C_OPERAND_R0L :
3345 value = 0;
3346 break;
3347 case M32C_OPERAND_R1 :
3348 value = 0;
3349 break;
3350 case M32C_OPERAND_R1R2R0 :
3351 value = 0;
3352 break;
3353 case M32C_OPERAND_R2 :
3354 value = 0;
3355 break;
3356 case M32C_OPERAND_R2R0 :
3357 value = 0;
3358 break;
3359 case M32C_OPERAND_R3 :
3360 value = 0;
3361 break;
3362 case M32C_OPERAND_R3R1 :
3363 value = 0;
3364 break;
3365 case M32C_OPERAND_REGSETPOP :
3366 value = fields->f_8_8;
3367 break;
3368 case M32C_OPERAND_REGSETPUSH :
3369 value = fields->f_8_8;
3370 break;
3371 case M32C_OPERAND_RN16_PUSH_S :
3372 value = fields->f_4_1;
3373 break;
3374 case M32C_OPERAND_S :
3375 value = 0;
3376 break;
3377 case M32C_OPERAND_SRC16AN :
3378 value = fields->f_src16_an;
3379 break;
3380 case M32C_OPERAND_SRC16ANHI :
3381 value = fields->f_src16_an;
3382 break;
3383 case M32C_OPERAND_SRC16ANQI :
3384 value = fields->f_src16_an;
3385 break;
3386 case M32C_OPERAND_SRC16RNHI :
3387 value = fields->f_src16_rn;
3388 break;
3389 case M32C_OPERAND_SRC16RNQI :
3390 value = fields->f_src16_rn;
3391 break;
3392 case M32C_OPERAND_SRC32ANPREFIXED :
3393 value = fields->f_src32_an_prefixed;
3394 break;
3395 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3396 value = fields->f_src32_an_prefixed;
3397 break;
3398 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3399 value = fields->f_src32_an_prefixed;
3400 break;
3401 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3402 value = fields->f_src32_an_prefixed;
3403 break;
3404 case M32C_OPERAND_SRC32ANUNPREFIXED :
3405 value = fields->f_src32_an_unprefixed;
3406 break;
3407 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3408 value = fields->f_src32_an_unprefixed;
3409 break;
3410 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3411 value = fields->f_src32_an_unprefixed;
3412 break;
3413 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3414 value = fields->f_src32_an_unprefixed;
3415 break;
3416 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3417 value = fields->f_src32_rn_prefixed_HI;
3418 break;
3419 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3420 value = fields->f_src32_rn_prefixed_QI;
3421 break;
3422 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3423 value = fields->f_src32_rn_prefixed_SI;
3424 break;
3425 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3426 value = fields->f_src32_rn_unprefixed_HI;
3427 break;
3428 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3429 value = fields->f_src32_rn_unprefixed_QI;
3430 break;
3431 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3432 value = fields->f_src32_rn_unprefixed_SI;
3433 break;
3434 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3435 value = fields->f_5_1;
3436 break;
3437 case M32C_OPERAND_X :
3438 value = 0;
3439 break;
3440 case M32C_OPERAND_Z :
3441 value = 0;
3442 break;
3443 case M32C_OPERAND_COND16_16 :
3444 value = fields->f_dsp_16_u8;
3445 break;
3446 case M32C_OPERAND_COND16_24 :
3447 value = fields->f_dsp_24_u8;
3448 break;
3449 case M32C_OPERAND_COND16_32 :
3450 value = fields->f_dsp_32_u8;
3451 break;
3452 case M32C_OPERAND_COND16C :
3453 value = fields->f_cond16;
3454 break;
3455 case M32C_OPERAND_COND16J :
3456 value = fields->f_cond16;
3457 break;
3458 case M32C_OPERAND_COND16J5 :
3459 value = fields->f_cond16j_5;
3460 break;
3461 case M32C_OPERAND_COND32 :
3462 value = fields->f_cond32;
3463 break;
3464 case M32C_OPERAND_COND32_16 :
3465 value = fields->f_dsp_16_u8;
3466 break;
3467 case M32C_OPERAND_COND32_24 :
3468 value = fields->f_dsp_24_u8;
3469 break;
3470 case M32C_OPERAND_COND32_32 :
3471 value = fields->f_dsp_32_u8;
3472 break;
3473 case M32C_OPERAND_COND32_40 :
3474 value = fields->f_dsp_40_u8;
3475 break;
3476 case M32C_OPERAND_COND32J :
3477 value = fields->f_cond32j;
3478 break;
3479 case M32C_OPERAND_CR1_PREFIXED_32 :
3480 value = fields->f_21_3;
3481 break;
3482 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3483 value = fields->f_13_3;
3484 break;
3485 case M32C_OPERAND_CR16 :
3486 value = fields->f_9_3;
3487 break;
3488 case M32C_OPERAND_CR2_32 :
3489 value = fields->f_13_3;
3490 break;
3491 case M32C_OPERAND_CR3_PREFIXED_32 :
3492 value = fields->f_21_3;
3493 break;
3494 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3495 value = fields->f_13_3;
3496 break;
3497 case M32C_OPERAND_FLAGS16 :
3498 value = fields->f_9_3;
3499 break;
3500 case M32C_OPERAND_FLAGS32 :
3501 value = fields->f_13_3;
3502 break;
3503 case M32C_OPERAND_SCCOND32 :
3504 value = fields->f_cond16;
3505 break;
3506 case M32C_OPERAND_SIZE :
3507 value = 0;
3508 break;
3509
3510 default :
3511 /* xgettext:c-format */
3512 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3513 opindex);
3514 abort ();
3515 }
3516
3517 return value;
3518 }
3519
3520 bfd_vma
3521 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3522 int opindex,
3523 const CGEN_FIELDS * fields)
3524 {
3525 bfd_vma value;
3526
3527 switch (opindex)
3528 {
3529 case M32C_OPERAND_A0 :
3530 value = 0;
3531 break;
3532 case M32C_OPERAND_A1 :
3533 value = 0;
3534 break;
3535 case M32C_OPERAND_AN16_PUSH_S :
3536 value = fields->f_4_1;
3537 break;
3538 case M32C_OPERAND_BIT16AN :
3539 value = fields->f_dst16_an;
3540 break;
3541 case M32C_OPERAND_BIT16RN :
3542 value = fields->f_dst16_rn;
3543 break;
3544 case M32C_OPERAND_BIT3_S :
3545 value = fields->f_imm3_S;
3546 break;
3547 case M32C_OPERAND_BIT32ANPREFIXED :
3548 value = fields->f_dst32_an_prefixed;
3549 break;
3550 case M32C_OPERAND_BIT32ANUNPREFIXED :
3551 value = fields->f_dst32_an_unprefixed;
3552 break;
3553 case M32C_OPERAND_BIT32RNPREFIXED :
3554 value = fields->f_dst32_rn_prefixed_QI;
3555 break;
3556 case M32C_OPERAND_BIT32RNUNPREFIXED :
3557 value = fields->f_dst32_rn_unprefixed_QI;
3558 break;
3559 case M32C_OPERAND_BITBASE16_16_S8 :
3560 value = fields->f_dsp_16_s8;
3561 break;
3562 case M32C_OPERAND_BITBASE16_16_U16 :
3563 value = fields->f_dsp_16_u16;
3564 break;
3565 case M32C_OPERAND_BITBASE16_16_U8 :
3566 value = fields->f_dsp_16_u8;
3567 break;
3568 case M32C_OPERAND_BITBASE16_8_U11_S :
3569 value = fields->f_bitbase16_u11_S;
3570 break;
3571 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3572 value = fields->f_bitbase32_16_s11_unprefixed;
3573 break;
3574 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3575 value = fields->f_bitbase32_16_s19_unprefixed;
3576 break;
3577 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3578 value = fields->f_bitbase32_16_u11_unprefixed;
3579 break;
3580 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3581 value = fields->f_bitbase32_16_u19_unprefixed;
3582 break;
3583 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3584 value = fields->f_bitbase32_16_u27_unprefixed;
3585 break;
3586 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3587 value = fields->f_bitbase32_24_s11_prefixed;
3588 break;
3589 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3590 value = fields->f_bitbase32_24_s19_prefixed;
3591 break;
3592 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3593 value = fields->f_bitbase32_24_u11_prefixed;
3594 break;
3595 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3596 value = fields->f_bitbase32_24_u19_prefixed;
3597 break;
3598 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3599 value = fields->f_bitbase32_24_u27_prefixed;
3600 break;
3601 case M32C_OPERAND_BITNO16R :
3602 value = fields->f_dsp_16_u8;
3603 break;
3604 case M32C_OPERAND_BITNO32PREFIXED :
3605 value = fields->f_bitno32_prefixed;
3606 break;
3607 case M32C_OPERAND_BITNO32UNPREFIXED :
3608 value = fields->f_bitno32_unprefixed;
3609 break;
3610 case M32C_OPERAND_DSP_10_U6 :
3611 value = fields->f_dsp_10_u6;
3612 break;
3613 case M32C_OPERAND_DSP_16_S16 :
3614 value = fields->f_dsp_16_s16;
3615 break;
3616 case M32C_OPERAND_DSP_16_S8 :
3617 value = fields->f_dsp_16_s8;
3618 break;
3619 case M32C_OPERAND_DSP_16_U16 :
3620 value = fields->f_dsp_16_u16;
3621 break;
3622 case M32C_OPERAND_DSP_16_U20 :
3623 value = fields->f_dsp_16_u24;
3624 break;
3625 case M32C_OPERAND_DSP_16_U24 :
3626 value = fields->f_dsp_16_u24;
3627 break;
3628 case M32C_OPERAND_DSP_16_U8 :
3629 value = fields->f_dsp_16_u8;
3630 break;
3631 case M32C_OPERAND_DSP_24_S16 :
3632 value = fields->f_dsp_24_s16;
3633 break;
3634 case M32C_OPERAND_DSP_24_S8 :
3635 value = fields->f_dsp_24_s8;
3636 break;
3637 case M32C_OPERAND_DSP_24_U16 :
3638 value = fields->f_dsp_24_u16;
3639 break;
3640 case M32C_OPERAND_DSP_24_U20 :
3641 value = fields->f_dsp_24_u24;
3642 break;
3643 case M32C_OPERAND_DSP_24_U24 :
3644 value = fields->f_dsp_24_u24;
3645 break;
3646 case M32C_OPERAND_DSP_24_U8 :
3647 value = fields->f_dsp_24_u8;
3648 break;
3649 case M32C_OPERAND_DSP_32_S16 :
3650 value = fields->f_dsp_32_s16;
3651 break;
3652 case M32C_OPERAND_DSP_32_S8 :
3653 value = fields->f_dsp_32_s8;
3654 break;
3655 case M32C_OPERAND_DSP_32_U16 :
3656 value = fields->f_dsp_32_u16;
3657 break;
3658 case M32C_OPERAND_DSP_32_U20 :
3659 value = fields->f_dsp_32_u24;
3660 break;
3661 case M32C_OPERAND_DSP_32_U24 :
3662 value = fields->f_dsp_32_u24;
3663 break;
3664 case M32C_OPERAND_DSP_32_U8 :
3665 value = fields->f_dsp_32_u8;
3666 break;
3667 case M32C_OPERAND_DSP_40_S16 :
3668 value = fields->f_dsp_40_s16;
3669 break;
3670 case M32C_OPERAND_DSP_40_S8 :
3671 value = fields->f_dsp_40_s8;
3672 break;
3673 case M32C_OPERAND_DSP_40_U16 :
3674 value = fields->f_dsp_40_u16;
3675 break;
3676 case M32C_OPERAND_DSP_40_U20 :
3677 value = fields->f_dsp_40_u20;
3678 break;
3679 case M32C_OPERAND_DSP_40_U24 :
3680 value = fields->f_dsp_40_u24;
3681 break;
3682 case M32C_OPERAND_DSP_40_U8 :
3683 value = fields->f_dsp_40_u8;
3684 break;
3685 case M32C_OPERAND_DSP_48_S16 :
3686 value = fields->f_dsp_48_s16;
3687 break;
3688 case M32C_OPERAND_DSP_48_S8 :
3689 value = fields->f_dsp_48_s8;
3690 break;
3691 case M32C_OPERAND_DSP_48_U16 :
3692 value = fields->f_dsp_48_u16;
3693 break;
3694 case M32C_OPERAND_DSP_48_U20 :
3695 value = fields->f_dsp_48_u20;
3696 break;
3697 case M32C_OPERAND_DSP_48_U24 :
3698 value = fields->f_dsp_48_u24;
3699 break;
3700 case M32C_OPERAND_DSP_48_U8 :
3701 value = fields->f_dsp_48_u8;
3702 break;
3703 case M32C_OPERAND_DSP_8_S24 :
3704 value = fields->f_dsp_8_s24;
3705 break;
3706 case M32C_OPERAND_DSP_8_S8 :
3707 value = fields->f_dsp_8_s8;
3708 break;
3709 case M32C_OPERAND_DSP_8_U16 :
3710 value = fields->f_dsp_8_u16;
3711 break;
3712 case M32C_OPERAND_DSP_8_U24 :
3713 value = fields->f_dsp_8_u24;
3714 break;
3715 case M32C_OPERAND_DSP_8_U6 :
3716 value = fields->f_dsp_8_u6;
3717 break;
3718 case M32C_OPERAND_DSP_8_U8 :
3719 value = fields->f_dsp_8_u8;
3720 break;
3721 case M32C_OPERAND_DST16AN :
3722 value = fields->f_dst16_an;
3723 break;
3724 case M32C_OPERAND_DST16AN_S :
3725 value = fields->f_dst16_an_s;
3726 break;
3727 case M32C_OPERAND_DST16ANHI :
3728 value = fields->f_dst16_an;
3729 break;
3730 case M32C_OPERAND_DST16ANQI :
3731 value = fields->f_dst16_an;
3732 break;
3733 case M32C_OPERAND_DST16ANQI_S :
3734 value = fields->f_dst16_rn_QI_s;
3735 break;
3736 case M32C_OPERAND_DST16ANSI :
3737 value = fields->f_dst16_an;
3738 break;
3739 case M32C_OPERAND_DST16RNEXTQI :
3740 value = fields->f_dst16_rn_ext;
3741 break;
3742 case M32C_OPERAND_DST16RNHI :
3743 value = fields->f_dst16_rn;
3744 break;
3745 case M32C_OPERAND_DST16RNQI :
3746 value = fields->f_dst16_rn;
3747 break;
3748 case M32C_OPERAND_DST16RNQI_S :
3749 value = fields->f_dst16_rn_QI_s;
3750 break;
3751 case M32C_OPERAND_DST16RNSI :
3752 value = fields->f_dst16_rn;
3753 break;
3754 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3755 value = fields->f_dst32_an_unprefixed;
3756 break;
3757 case M32C_OPERAND_DST32ANPREFIXED :
3758 value = fields->f_dst32_an_prefixed;
3759 break;
3760 case M32C_OPERAND_DST32ANPREFIXEDHI :
3761 value = fields->f_dst32_an_prefixed;
3762 break;
3763 case M32C_OPERAND_DST32ANPREFIXEDQI :
3764 value = fields->f_dst32_an_prefixed;
3765 break;
3766 case M32C_OPERAND_DST32ANPREFIXEDSI :
3767 value = fields->f_dst32_an_prefixed;
3768 break;
3769 case M32C_OPERAND_DST32ANUNPREFIXED :
3770 value = fields->f_dst32_an_unprefixed;
3771 break;
3772 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3773 value = fields->f_dst32_an_unprefixed;
3774 break;
3775 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3776 value = fields->f_dst32_an_unprefixed;
3777 break;
3778 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3779 value = fields->f_dst32_an_unprefixed;
3780 break;
3781 case M32C_OPERAND_DST32R0HI_S :
3782 value = 0;
3783 break;
3784 case M32C_OPERAND_DST32R0QI_S :
3785 value = 0;
3786 break;
3787 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3788 value = fields->f_dst32_rn_ext_unprefixed;
3789 break;
3790 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3791 value = fields->f_dst32_rn_ext_unprefixed;
3792 break;
3793 case M32C_OPERAND_DST32RNPREFIXEDHI :
3794 value = fields->f_dst32_rn_prefixed_HI;
3795 break;
3796 case M32C_OPERAND_DST32RNPREFIXEDQI :
3797 value = fields->f_dst32_rn_prefixed_QI;
3798 break;
3799 case M32C_OPERAND_DST32RNPREFIXEDSI :
3800 value = fields->f_dst32_rn_prefixed_SI;
3801 break;
3802 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3803 value = fields->f_dst32_rn_unprefixed_HI;
3804 break;
3805 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3806 value = fields->f_dst32_rn_unprefixed_QI;
3807 break;
3808 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3809 value = fields->f_dst32_rn_unprefixed_SI;
3810 break;
3811 case M32C_OPERAND_G :
3812 value = 0;
3813 break;
3814 case M32C_OPERAND_IMM_12_S4 :
3815 value = fields->f_imm_12_s4;
3816 break;
3817 case M32C_OPERAND_IMM_12_S4N :
3818 value = fields->f_imm_12_s4;
3819 break;
3820 case M32C_OPERAND_IMM_13_U3 :
3821 value = fields->f_imm_13_u3;
3822 break;
3823 case M32C_OPERAND_IMM_16_HI :
3824 value = fields->f_dsp_16_s16;
3825 break;
3826 case M32C_OPERAND_IMM_16_QI :
3827 value = fields->f_dsp_16_s8;
3828 break;
3829 case M32C_OPERAND_IMM_16_SI :
3830 value = fields->f_dsp_16_s32;
3831 break;
3832 case M32C_OPERAND_IMM_20_S4 :
3833 value = fields->f_imm_20_s4;
3834 break;
3835 case M32C_OPERAND_IMM_24_HI :
3836 value = fields->f_dsp_24_s16;
3837 break;
3838 case M32C_OPERAND_IMM_24_QI :
3839 value = fields->f_dsp_24_s8;
3840 break;
3841 case M32C_OPERAND_IMM_24_SI :
3842 value = fields->f_dsp_24_s32;
3843 break;
3844 case M32C_OPERAND_IMM_32_HI :
3845 value = fields->f_dsp_32_s16;
3846 break;
3847 case M32C_OPERAND_IMM_32_QI :
3848 value = fields->f_dsp_32_s8;
3849 break;
3850 case M32C_OPERAND_IMM_32_SI :
3851 value = fields->f_dsp_32_s32;
3852 break;
3853 case M32C_OPERAND_IMM_40_HI :
3854 value = fields->f_dsp_40_s16;
3855 break;
3856 case M32C_OPERAND_IMM_40_QI :
3857 value = fields->f_dsp_40_s8;
3858 break;
3859 case M32C_OPERAND_IMM_40_SI :
3860 value = fields->f_dsp_40_s32;
3861 break;
3862 case M32C_OPERAND_IMM_48_HI :
3863 value = fields->f_dsp_48_s16;
3864 break;
3865 case M32C_OPERAND_IMM_48_QI :
3866 value = fields->f_dsp_48_s8;
3867 break;
3868 case M32C_OPERAND_IMM_48_SI :
3869 value = fields->f_dsp_48_s32;
3870 break;
3871 case M32C_OPERAND_IMM_56_HI :
3872 value = fields->f_dsp_56_s16;
3873 break;
3874 case M32C_OPERAND_IMM_56_QI :
3875 value = fields->f_dsp_56_s8;
3876 break;
3877 case M32C_OPERAND_IMM_64_HI :
3878 value = fields->f_dsp_64_s16;
3879 break;
3880 case M32C_OPERAND_IMM_8_HI :
3881 value = fields->f_dsp_8_s16;
3882 break;
3883 case M32C_OPERAND_IMM_8_QI :
3884 value = fields->f_dsp_8_s8;
3885 break;
3886 case M32C_OPERAND_IMM_8_S4 :
3887 value = fields->f_imm_8_s4;
3888 break;
3889 case M32C_OPERAND_IMM_8_S4N :
3890 value = fields->f_imm_8_s4;
3891 break;
3892 case M32C_OPERAND_IMM_SH_12_S4 :
3893 value = fields->f_imm_12_s4;
3894 break;
3895 case M32C_OPERAND_IMM_SH_20_S4 :
3896 value = fields->f_imm_20_s4;
3897 break;
3898 case M32C_OPERAND_IMM_SH_8_S4 :
3899 value = fields->f_imm_8_s4;
3900 break;
3901 case M32C_OPERAND_IMM1_S :
3902 value = fields->f_imm1_S;
3903 break;
3904 case M32C_OPERAND_IMM3_S :
3905 value = fields->f_imm3_S;
3906 break;
3907 case M32C_OPERAND_LAB_16_8 :
3908 value = fields->f_lab_16_8;
3909 break;
3910 case M32C_OPERAND_LAB_24_8 :
3911 value = fields->f_lab_24_8;
3912 break;
3913 case M32C_OPERAND_LAB_32_8 :
3914 value = fields->f_lab_32_8;
3915 break;
3916 case M32C_OPERAND_LAB_40_8 :
3917 value = fields->f_lab_40_8;
3918 break;
3919 case M32C_OPERAND_LAB_5_3 :
3920 value = fields->f_lab_5_3;
3921 break;
3922 case M32C_OPERAND_LAB_8_16 :
3923 value = fields->f_lab_8_16;
3924 break;
3925 case M32C_OPERAND_LAB_8_24 :
3926 value = fields->f_lab_8_24;
3927 break;
3928 case M32C_OPERAND_LAB_8_8 :
3929 value = fields->f_lab_8_8;
3930 break;
3931 case M32C_OPERAND_LAB32_JMP_S :
3932 value = fields->f_lab32_jmp_s;
3933 break;
3934 case M32C_OPERAND_Q :
3935 value = 0;
3936 break;
3937 case M32C_OPERAND_R0 :
3938 value = 0;
3939 break;
3940 case M32C_OPERAND_R0H :
3941 value = 0;
3942 break;
3943 case M32C_OPERAND_R0L :
3944 value = 0;
3945 break;
3946 case M32C_OPERAND_R1 :
3947 value = 0;
3948 break;
3949 case M32C_OPERAND_R1R2R0 :
3950 value = 0;
3951 break;
3952 case M32C_OPERAND_R2 :
3953 value = 0;
3954 break;
3955 case M32C_OPERAND_R2R0 :
3956 value = 0;
3957 break;
3958 case M32C_OPERAND_R3 :
3959 value = 0;
3960 break;
3961 case M32C_OPERAND_R3R1 :
3962 value = 0;
3963 break;
3964 case M32C_OPERAND_REGSETPOP :
3965 value = fields->f_8_8;
3966 break;
3967 case M32C_OPERAND_REGSETPUSH :
3968 value = fields->f_8_8;
3969 break;
3970 case M32C_OPERAND_RN16_PUSH_S :
3971 value = fields->f_4_1;
3972 break;
3973 case M32C_OPERAND_S :
3974 value = 0;
3975 break;
3976 case M32C_OPERAND_SRC16AN :
3977 value = fields->f_src16_an;
3978 break;
3979 case M32C_OPERAND_SRC16ANHI :
3980 value = fields->f_src16_an;
3981 break;
3982 case M32C_OPERAND_SRC16ANQI :
3983 value = fields->f_src16_an;
3984 break;
3985 case M32C_OPERAND_SRC16RNHI :
3986 value = fields->f_src16_rn;
3987 break;
3988 case M32C_OPERAND_SRC16RNQI :
3989 value = fields->f_src16_rn;
3990 break;
3991 case M32C_OPERAND_SRC32ANPREFIXED :
3992 value = fields->f_src32_an_prefixed;
3993 break;
3994 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3995 value = fields->f_src32_an_prefixed;
3996 break;
3997 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3998 value = fields->f_src32_an_prefixed;
3999 break;
4000 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4001 value = fields->f_src32_an_prefixed;
4002 break;
4003 case M32C_OPERAND_SRC32ANUNPREFIXED :
4004 value = fields->f_src32_an_unprefixed;
4005 break;
4006 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4007 value = fields->f_src32_an_unprefixed;
4008 break;
4009 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4010 value = fields->f_src32_an_unprefixed;
4011 break;
4012 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4013 value = fields->f_src32_an_unprefixed;
4014 break;
4015 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4016 value = fields->f_src32_rn_prefixed_HI;
4017 break;
4018 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4019 value = fields->f_src32_rn_prefixed_QI;
4020 break;
4021 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4022 value = fields->f_src32_rn_prefixed_SI;
4023 break;
4024 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4025 value = fields->f_src32_rn_unprefixed_HI;
4026 break;
4027 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4028 value = fields->f_src32_rn_unprefixed_QI;
4029 break;
4030 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4031 value = fields->f_src32_rn_unprefixed_SI;
4032 break;
4033 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4034 value = fields->f_5_1;
4035 break;
4036 case M32C_OPERAND_X :
4037 value = 0;
4038 break;
4039 case M32C_OPERAND_Z :
4040 value = 0;
4041 break;
4042 case M32C_OPERAND_COND16_16 :
4043 value = fields->f_dsp_16_u8;
4044 break;
4045 case M32C_OPERAND_COND16_24 :
4046 value = fields->f_dsp_24_u8;
4047 break;
4048 case M32C_OPERAND_COND16_32 :
4049 value = fields->f_dsp_32_u8;
4050 break;
4051 case M32C_OPERAND_COND16C :
4052 value = fields->f_cond16;
4053 break;
4054 case M32C_OPERAND_COND16J :
4055 value = fields->f_cond16;
4056 break;
4057 case M32C_OPERAND_COND16J5 :
4058 value = fields->f_cond16j_5;
4059 break;
4060 case M32C_OPERAND_COND32 :
4061 value = fields->f_cond32;
4062 break;
4063 case M32C_OPERAND_COND32_16 :
4064 value = fields->f_dsp_16_u8;
4065 break;
4066 case M32C_OPERAND_COND32_24 :
4067 value = fields->f_dsp_24_u8;
4068 break;
4069 case M32C_OPERAND_COND32_32 :
4070 value = fields->f_dsp_32_u8;
4071 break;
4072 case M32C_OPERAND_COND32_40 :
4073 value = fields->f_dsp_40_u8;
4074 break;
4075 case M32C_OPERAND_COND32J :
4076 value = fields->f_cond32j;
4077 break;
4078 case M32C_OPERAND_CR1_PREFIXED_32 :
4079 value = fields->f_21_3;
4080 break;
4081 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4082 value = fields->f_13_3;
4083 break;
4084 case M32C_OPERAND_CR16 :
4085 value = fields->f_9_3;
4086 break;
4087 case M32C_OPERAND_CR2_32 :
4088 value = fields->f_13_3;
4089 break;
4090 case M32C_OPERAND_CR3_PREFIXED_32 :
4091 value = fields->f_21_3;
4092 break;
4093 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4094 value = fields->f_13_3;
4095 break;
4096 case M32C_OPERAND_FLAGS16 :
4097 value = fields->f_9_3;
4098 break;
4099 case M32C_OPERAND_FLAGS32 :
4100 value = fields->f_13_3;
4101 break;
4102 case M32C_OPERAND_SCCOND32 :
4103 value = fields->f_cond16;
4104 break;
4105 case M32C_OPERAND_SIZE :
4106 value = 0;
4107 break;
4108
4109 default :
4110 /* xgettext:c-format */
4111 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4112 opindex);
4113 abort ();
4114 }
4115
4116 return value;
4117 }
4118
4119 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4120 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4121
4122 /* Stuffing values in cgen_fields is handled by a collection of functions.
4123 They are distinguished by the type of the VALUE argument they accept.
4124 TODO: floating point, inlining support, remove cases where argument type
4125 not appropriate. */
4126
4127 void
4128 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4129 int opindex,
4130 CGEN_FIELDS * fields,
4131 int value)
4132 {
4133 switch (opindex)
4134 {
4135 case M32C_OPERAND_A0 :
4136 break;
4137 case M32C_OPERAND_A1 :
4138 break;
4139 case M32C_OPERAND_AN16_PUSH_S :
4140 fields->f_4_1 = value;
4141 break;
4142 case M32C_OPERAND_BIT16AN :
4143 fields->f_dst16_an = value;
4144 break;
4145 case M32C_OPERAND_BIT16RN :
4146 fields->f_dst16_rn = value;
4147 break;
4148 case M32C_OPERAND_BIT3_S :
4149 fields->f_imm3_S = value;
4150 break;
4151 case M32C_OPERAND_BIT32ANPREFIXED :
4152 fields->f_dst32_an_prefixed = value;
4153 break;
4154 case M32C_OPERAND_BIT32ANUNPREFIXED :
4155 fields->f_dst32_an_unprefixed = value;
4156 break;
4157 case M32C_OPERAND_BIT32RNPREFIXED :
4158 fields->f_dst32_rn_prefixed_QI = value;
4159 break;
4160 case M32C_OPERAND_BIT32RNUNPREFIXED :
4161 fields->f_dst32_rn_unprefixed_QI = value;
4162 break;
4163 case M32C_OPERAND_BITBASE16_16_S8 :
4164 fields->f_dsp_16_s8 = value;
4165 break;
4166 case M32C_OPERAND_BITBASE16_16_U16 :
4167 fields->f_dsp_16_u16 = value;
4168 break;
4169 case M32C_OPERAND_BITBASE16_16_U8 :
4170 fields->f_dsp_16_u8 = value;
4171 break;
4172 case M32C_OPERAND_BITBASE16_8_U11_S :
4173 fields->f_bitbase16_u11_S = value;
4174 break;
4175 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4176 fields->f_bitbase32_16_s11_unprefixed = value;
4177 break;
4178 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4179 fields->f_bitbase32_16_s19_unprefixed = value;
4180 break;
4181 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4182 fields->f_bitbase32_16_u11_unprefixed = value;
4183 break;
4184 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4185 fields->f_bitbase32_16_u19_unprefixed = value;
4186 break;
4187 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4188 fields->f_bitbase32_16_u27_unprefixed = value;
4189 break;
4190 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4191 fields->f_bitbase32_24_s11_prefixed = value;
4192 break;
4193 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4194 fields->f_bitbase32_24_s19_prefixed = value;
4195 break;
4196 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4197 fields->f_bitbase32_24_u11_prefixed = value;
4198 break;
4199 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4200 fields->f_bitbase32_24_u19_prefixed = value;
4201 break;
4202 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4203 fields->f_bitbase32_24_u27_prefixed = value;
4204 break;
4205 case M32C_OPERAND_BITNO16R :
4206 fields->f_dsp_16_u8 = value;
4207 break;
4208 case M32C_OPERAND_BITNO32PREFIXED :
4209 fields->f_bitno32_prefixed = value;
4210 break;
4211 case M32C_OPERAND_BITNO32UNPREFIXED :
4212 fields->f_bitno32_unprefixed = value;
4213 break;
4214 case M32C_OPERAND_DSP_10_U6 :
4215 fields->f_dsp_10_u6 = value;
4216 break;
4217 case M32C_OPERAND_DSP_16_S16 :
4218 fields->f_dsp_16_s16 = value;
4219 break;
4220 case M32C_OPERAND_DSP_16_S8 :
4221 fields->f_dsp_16_s8 = value;
4222 break;
4223 case M32C_OPERAND_DSP_16_U16 :
4224 fields->f_dsp_16_u16 = value;
4225 break;
4226 case M32C_OPERAND_DSP_16_U20 :
4227 fields->f_dsp_16_u24 = value;
4228 break;
4229 case M32C_OPERAND_DSP_16_U24 :
4230 fields->f_dsp_16_u24 = value;
4231 break;
4232 case M32C_OPERAND_DSP_16_U8 :
4233 fields->f_dsp_16_u8 = value;
4234 break;
4235 case M32C_OPERAND_DSP_24_S16 :
4236 fields->f_dsp_24_s16 = value;
4237 break;
4238 case M32C_OPERAND_DSP_24_S8 :
4239 fields->f_dsp_24_s8 = value;
4240 break;
4241 case M32C_OPERAND_DSP_24_U16 :
4242 fields->f_dsp_24_u16 = value;
4243 break;
4244 case M32C_OPERAND_DSP_24_U20 :
4245 fields->f_dsp_24_u24 = value;
4246 break;
4247 case M32C_OPERAND_DSP_24_U24 :
4248 fields->f_dsp_24_u24 = value;
4249 break;
4250 case M32C_OPERAND_DSP_24_U8 :
4251 fields->f_dsp_24_u8 = value;
4252 break;
4253 case M32C_OPERAND_DSP_32_S16 :
4254 fields->f_dsp_32_s16 = value;
4255 break;
4256 case M32C_OPERAND_DSP_32_S8 :
4257 fields->f_dsp_32_s8 = value;
4258 break;
4259 case M32C_OPERAND_DSP_32_U16 :
4260 fields->f_dsp_32_u16 = value;
4261 break;
4262 case M32C_OPERAND_DSP_32_U20 :
4263 fields->f_dsp_32_u24 = value;
4264 break;
4265 case M32C_OPERAND_DSP_32_U24 :
4266 fields->f_dsp_32_u24 = value;
4267 break;
4268 case M32C_OPERAND_DSP_32_U8 :
4269 fields->f_dsp_32_u8 = value;
4270 break;
4271 case M32C_OPERAND_DSP_40_S16 :
4272 fields->f_dsp_40_s16 = value;
4273 break;
4274 case M32C_OPERAND_DSP_40_S8 :
4275 fields->f_dsp_40_s8 = value;
4276 break;
4277 case M32C_OPERAND_DSP_40_U16 :
4278 fields->f_dsp_40_u16 = value;
4279 break;
4280 case M32C_OPERAND_DSP_40_U20 :
4281 fields->f_dsp_40_u20 = value;
4282 break;
4283 case M32C_OPERAND_DSP_40_U24 :
4284 fields->f_dsp_40_u24 = value;
4285 break;
4286 case M32C_OPERAND_DSP_40_U8 :
4287 fields->f_dsp_40_u8 = value;
4288 break;
4289 case M32C_OPERAND_DSP_48_S16 :
4290 fields->f_dsp_48_s16 = value;
4291 break;
4292 case M32C_OPERAND_DSP_48_S8 :
4293 fields->f_dsp_48_s8 = value;
4294 break;
4295 case M32C_OPERAND_DSP_48_U16 :
4296 fields->f_dsp_48_u16 = value;
4297 break;
4298 case M32C_OPERAND_DSP_48_U20 :
4299 fields->f_dsp_48_u20 = value;
4300 break;
4301 case M32C_OPERAND_DSP_48_U24 :
4302 fields->f_dsp_48_u24 = value;
4303 break;
4304 case M32C_OPERAND_DSP_48_U8 :
4305 fields->f_dsp_48_u8 = value;
4306 break;
4307 case M32C_OPERAND_DSP_8_S24 :
4308 fields->f_dsp_8_s24 = value;
4309 break;
4310 case M32C_OPERAND_DSP_8_S8 :
4311 fields->f_dsp_8_s8 = value;
4312 break;
4313 case M32C_OPERAND_DSP_8_U16 :
4314 fields->f_dsp_8_u16 = value;
4315 break;
4316 case M32C_OPERAND_DSP_8_U24 :
4317 fields->f_dsp_8_u24 = value;
4318 break;
4319 case M32C_OPERAND_DSP_8_U6 :
4320 fields->f_dsp_8_u6 = value;
4321 break;
4322 case M32C_OPERAND_DSP_8_U8 :
4323 fields->f_dsp_8_u8 = value;
4324 break;
4325 case M32C_OPERAND_DST16AN :
4326 fields->f_dst16_an = value;
4327 break;
4328 case M32C_OPERAND_DST16AN_S :
4329 fields->f_dst16_an_s = value;
4330 break;
4331 case M32C_OPERAND_DST16ANHI :
4332 fields->f_dst16_an = value;
4333 break;
4334 case M32C_OPERAND_DST16ANQI :
4335 fields->f_dst16_an = value;
4336 break;
4337 case M32C_OPERAND_DST16ANQI_S :
4338 fields->f_dst16_rn_QI_s = value;
4339 break;
4340 case M32C_OPERAND_DST16ANSI :
4341 fields->f_dst16_an = value;
4342 break;
4343 case M32C_OPERAND_DST16RNEXTQI :
4344 fields->f_dst16_rn_ext = value;
4345 break;
4346 case M32C_OPERAND_DST16RNHI :
4347 fields->f_dst16_rn = value;
4348 break;
4349 case M32C_OPERAND_DST16RNQI :
4350 fields->f_dst16_rn = value;
4351 break;
4352 case M32C_OPERAND_DST16RNQI_S :
4353 fields->f_dst16_rn_QI_s = value;
4354 break;
4355 case M32C_OPERAND_DST16RNSI :
4356 fields->f_dst16_rn = value;
4357 break;
4358 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4359 fields->f_dst32_an_unprefixed = value;
4360 break;
4361 case M32C_OPERAND_DST32ANPREFIXED :
4362 fields->f_dst32_an_prefixed = value;
4363 break;
4364 case M32C_OPERAND_DST32ANPREFIXEDHI :
4365 fields->f_dst32_an_prefixed = value;
4366 break;
4367 case M32C_OPERAND_DST32ANPREFIXEDQI :
4368 fields->f_dst32_an_prefixed = value;
4369 break;
4370 case M32C_OPERAND_DST32ANPREFIXEDSI :
4371 fields->f_dst32_an_prefixed = value;
4372 break;
4373 case M32C_OPERAND_DST32ANUNPREFIXED :
4374 fields->f_dst32_an_unprefixed = value;
4375 break;
4376 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4377 fields->f_dst32_an_unprefixed = value;
4378 break;
4379 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4380 fields->f_dst32_an_unprefixed = value;
4381 break;
4382 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4383 fields->f_dst32_an_unprefixed = value;
4384 break;
4385 case M32C_OPERAND_DST32R0HI_S :
4386 break;
4387 case M32C_OPERAND_DST32R0QI_S :
4388 break;
4389 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4390 fields->f_dst32_rn_ext_unprefixed = value;
4391 break;
4392 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4393 fields->f_dst32_rn_ext_unprefixed = value;
4394 break;
4395 case M32C_OPERAND_DST32RNPREFIXEDHI :
4396 fields->f_dst32_rn_prefixed_HI = value;
4397 break;
4398 case M32C_OPERAND_DST32RNPREFIXEDQI :
4399 fields->f_dst32_rn_prefixed_QI = value;
4400 break;
4401 case M32C_OPERAND_DST32RNPREFIXEDSI :
4402 fields->f_dst32_rn_prefixed_SI = value;
4403 break;
4404 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4405 fields->f_dst32_rn_unprefixed_HI = value;
4406 break;
4407 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4408 fields->f_dst32_rn_unprefixed_QI = value;
4409 break;
4410 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4411 fields->f_dst32_rn_unprefixed_SI = value;
4412 break;
4413 case M32C_OPERAND_G :
4414 break;
4415 case M32C_OPERAND_IMM_12_S4 :
4416 fields->f_imm_12_s4 = value;
4417 break;
4418 case M32C_OPERAND_IMM_12_S4N :
4419 fields->f_imm_12_s4 = value;
4420 break;
4421 case M32C_OPERAND_IMM_13_U3 :
4422 fields->f_imm_13_u3 = value;
4423 break;
4424 case M32C_OPERAND_IMM_16_HI :
4425 fields->f_dsp_16_s16 = value;
4426 break;
4427 case M32C_OPERAND_IMM_16_QI :
4428 fields->f_dsp_16_s8 = value;
4429 break;
4430 case M32C_OPERAND_IMM_16_SI :
4431 fields->f_dsp_16_s32 = value;
4432 break;
4433 case M32C_OPERAND_IMM_20_S4 :
4434 fields->f_imm_20_s4 = value;
4435 break;
4436 case M32C_OPERAND_IMM_24_HI :
4437 fields->f_dsp_24_s16 = value;
4438 break;
4439 case M32C_OPERAND_IMM_24_QI :
4440 fields->f_dsp_24_s8 = value;
4441 break;
4442 case M32C_OPERAND_IMM_24_SI :
4443 fields->f_dsp_24_s32 = value;
4444 break;
4445 case M32C_OPERAND_IMM_32_HI :
4446 fields->f_dsp_32_s16 = value;
4447 break;
4448 case M32C_OPERAND_IMM_32_QI :
4449 fields->f_dsp_32_s8 = value;
4450 break;
4451 case M32C_OPERAND_IMM_32_SI :
4452 fields->f_dsp_32_s32 = value;
4453 break;
4454 case M32C_OPERAND_IMM_40_HI :
4455 fields->f_dsp_40_s16 = value;
4456 break;
4457 case M32C_OPERAND_IMM_40_QI :
4458 fields->f_dsp_40_s8 = value;
4459 break;
4460 case M32C_OPERAND_IMM_40_SI :
4461 fields->f_dsp_40_s32 = value;
4462 break;
4463 case M32C_OPERAND_IMM_48_HI :
4464 fields->f_dsp_48_s16 = value;
4465 break;
4466 case M32C_OPERAND_IMM_48_QI :
4467 fields->f_dsp_48_s8 = value;
4468 break;
4469 case M32C_OPERAND_IMM_48_SI :
4470 fields->f_dsp_48_s32 = value;
4471 break;
4472 case M32C_OPERAND_IMM_56_HI :
4473 fields->f_dsp_56_s16 = value;
4474 break;
4475 case M32C_OPERAND_IMM_56_QI :
4476 fields->f_dsp_56_s8 = value;
4477 break;
4478 case M32C_OPERAND_IMM_64_HI :
4479 fields->f_dsp_64_s16 = value;
4480 break;
4481 case M32C_OPERAND_IMM_8_HI :
4482 fields->f_dsp_8_s16 = value;
4483 break;
4484 case M32C_OPERAND_IMM_8_QI :
4485 fields->f_dsp_8_s8 = value;
4486 break;
4487 case M32C_OPERAND_IMM_8_S4 :
4488 fields->f_imm_8_s4 = value;
4489 break;
4490 case M32C_OPERAND_IMM_8_S4N :
4491 fields->f_imm_8_s4 = value;
4492 break;
4493 case M32C_OPERAND_IMM_SH_12_S4 :
4494 fields->f_imm_12_s4 = value;
4495 break;
4496 case M32C_OPERAND_IMM_SH_20_S4 :
4497 fields->f_imm_20_s4 = value;
4498 break;
4499 case M32C_OPERAND_IMM_SH_8_S4 :
4500 fields->f_imm_8_s4 = value;
4501 break;
4502 case M32C_OPERAND_IMM1_S :
4503 fields->f_imm1_S = value;
4504 break;
4505 case M32C_OPERAND_IMM3_S :
4506 fields->f_imm3_S = value;
4507 break;
4508 case M32C_OPERAND_LAB_16_8 :
4509 fields->f_lab_16_8 = value;
4510 break;
4511 case M32C_OPERAND_LAB_24_8 :
4512 fields->f_lab_24_8 = value;
4513 break;
4514 case M32C_OPERAND_LAB_32_8 :
4515 fields->f_lab_32_8 = value;
4516 break;
4517 case M32C_OPERAND_LAB_40_8 :
4518 fields->f_lab_40_8 = value;
4519 break;
4520 case M32C_OPERAND_LAB_5_3 :
4521 fields->f_lab_5_3 = value;
4522 break;
4523 case M32C_OPERAND_LAB_8_16 :
4524 fields->f_lab_8_16 = value;
4525 break;
4526 case M32C_OPERAND_LAB_8_24 :
4527 fields->f_lab_8_24 = value;
4528 break;
4529 case M32C_OPERAND_LAB_8_8 :
4530 fields->f_lab_8_8 = value;
4531 break;
4532 case M32C_OPERAND_LAB32_JMP_S :
4533 fields->f_lab32_jmp_s = value;
4534 break;
4535 case M32C_OPERAND_Q :
4536 break;
4537 case M32C_OPERAND_R0 :
4538 break;
4539 case M32C_OPERAND_R0H :
4540 break;
4541 case M32C_OPERAND_R0L :
4542 break;
4543 case M32C_OPERAND_R1 :
4544 break;
4545 case M32C_OPERAND_R1R2R0 :
4546 break;
4547 case M32C_OPERAND_R2 :
4548 break;
4549 case M32C_OPERAND_R2R0 :
4550 break;
4551 case M32C_OPERAND_R3 :
4552 break;
4553 case M32C_OPERAND_R3R1 :
4554 break;
4555 case M32C_OPERAND_REGSETPOP :
4556 fields->f_8_8 = value;
4557 break;
4558 case M32C_OPERAND_REGSETPUSH :
4559 fields->f_8_8 = value;
4560 break;
4561 case M32C_OPERAND_RN16_PUSH_S :
4562 fields->f_4_1 = value;
4563 break;
4564 case M32C_OPERAND_S :
4565 break;
4566 case M32C_OPERAND_SRC16AN :
4567 fields->f_src16_an = value;
4568 break;
4569 case M32C_OPERAND_SRC16ANHI :
4570 fields->f_src16_an = value;
4571 break;
4572 case M32C_OPERAND_SRC16ANQI :
4573 fields->f_src16_an = value;
4574 break;
4575 case M32C_OPERAND_SRC16RNHI :
4576 fields->f_src16_rn = value;
4577 break;
4578 case M32C_OPERAND_SRC16RNQI :
4579 fields->f_src16_rn = value;
4580 break;
4581 case M32C_OPERAND_SRC32ANPREFIXED :
4582 fields->f_src32_an_prefixed = value;
4583 break;
4584 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4585 fields->f_src32_an_prefixed = value;
4586 break;
4587 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4588 fields->f_src32_an_prefixed = value;
4589 break;
4590 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4591 fields->f_src32_an_prefixed = value;
4592 break;
4593 case M32C_OPERAND_SRC32ANUNPREFIXED :
4594 fields->f_src32_an_unprefixed = value;
4595 break;
4596 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4597 fields->f_src32_an_unprefixed = value;
4598 break;
4599 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4600 fields->f_src32_an_unprefixed = value;
4601 break;
4602 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4603 fields->f_src32_an_unprefixed = value;
4604 break;
4605 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4606 fields->f_src32_rn_prefixed_HI = value;
4607 break;
4608 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4609 fields->f_src32_rn_prefixed_QI = value;
4610 break;
4611 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4612 fields->f_src32_rn_prefixed_SI = value;
4613 break;
4614 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4615 fields->f_src32_rn_unprefixed_HI = value;
4616 break;
4617 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4618 fields->f_src32_rn_unprefixed_QI = value;
4619 break;
4620 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4621 fields->f_src32_rn_unprefixed_SI = value;
4622 break;
4623 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4624 fields->f_5_1 = value;
4625 break;
4626 case M32C_OPERAND_X :
4627 break;
4628 case M32C_OPERAND_Z :
4629 break;
4630 case M32C_OPERAND_COND16_16 :
4631 fields->f_dsp_16_u8 = value;
4632 break;
4633 case M32C_OPERAND_COND16_24 :
4634 fields->f_dsp_24_u8 = value;
4635 break;
4636 case M32C_OPERAND_COND16_32 :
4637 fields->f_dsp_32_u8 = value;
4638 break;
4639 case M32C_OPERAND_COND16C :
4640 fields->f_cond16 = value;
4641 break;
4642 case M32C_OPERAND_COND16J :
4643 fields->f_cond16 = value;
4644 break;
4645 case M32C_OPERAND_COND16J5 :
4646 fields->f_cond16j_5 = value;
4647 break;
4648 case M32C_OPERAND_COND32 :
4649 fields->f_cond32 = value;
4650 break;
4651 case M32C_OPERAND_COND32_16 :
4652 fields->f_dsp_16_u8 = value;
4653 break;
4654 case M32C_OPERAND_COND32_24 :
4655 fields->f_dsp_24_u8 = value;
4656 break;
4657 case M32C_OPERAND_COND32_32 :
4658 fields->f_dsp_32_u8 = value;
4659 break;
4660 case M32C_OPERAND_COND32_40 :
4661 fields->f_dsp_40_u8 = value;
4662 break;
4663 case M32C_OPERAND_COND32J :
4664 fields->f_cond32j = value;
4665 break;
4666 case M32C_OPERAND_CR1_PREFIXED_32 :
4667 fields->f_21_3 = value;
4668 break;
4669 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4670 fields->f_13_3 = value;
4671 break;
4672 case M32C_OPERAND_CR16 :
4673 fields->f_9_3 = value;
4674 break;
4675 case M32C_OPERAND_CR2_32 :
4676 fields->f_13_3 = value;
4677 break;
4678 case M32C_OPERAND_CR3_PREFIXED_32 :
4679 fields->f_21_3 = value;
4680 break;
4681 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4682 fields->f_13_3 = value;
4683 break;
4684 case M32C_OPERAND_FLAGS16 :
4685 fields->f_9_3 = value;
4686 break;
4687 case M32C_OPERAND_FLAGS32 :
4688 fields->f_13_3 = value;
4689 break;
4690 case M32C_OPERAND_SCCOND32 :
4691 fields->f_cond16 = value;
4692 break;
4693 case M32C_OPERAND_SIZE :
4694 break;
4695
4696 default :
4697 /* xgettext:c-format */
4698 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4699 opindex);
4700 abort ();
4701 }
4702 }
4703
4704 void
4705 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4706 int opindex,
4707 CGEN_FIELDS * fields,
4708 bfd_vma value)
4709 {
4710 switch (opindex)
4711 {
4712 case M32C_OPERAND_A0 :
4713 break;
4714 case M32C_OPERAND_A1 :
4715 break;
4716 case M32C_OPERAND_AN16_PUSH_S :
4717 fields->f_4_1 = value;
4718 break;
4719 case M32C_OPERAND_BIT16AN :
4720 fields->f_dst16_an = value;
4721 break;
4722 case M32C_OPERAND_BIT16RN :
4723 fields->f_dst16_rn = value;
4724 break;
4725 case M32C_OPERAND_BIT3_S :
4726 fields->f_imm3_S = value;
4727 break;
4728 case M32C_OPERAND_BIT32ANPREFIXED :
4729 fields->f_dst32_an_prefixed = value;
4730 break;
4731 case M32C_OPERAND_BIT32ANUNPREFIXED :
4732 fields->f_dst32_an_unprefixed = value;
4733 break;
4734 case M32C_OPERAND_BIT32RNPREFIXED :
4735 fields->f_dst32_rn_prefixed_QI = value;
4736 break;
4737 case M32C_OPERAND_BIT32RNUNPREFIXED :
4738 fields->f_dst32_rn_unprefixed_QI = value;
4739 break;
4740 case M32C_OPERAND_BITBASE16_16_S8 :
4741 fields->f_dsp_16_s8 = value;
4742 break;
4743 case M32C_OPERAND_BITBASE16_16_U16 :
4744 fields->f_dsp_16_u16 = value;
4745 break;
4746 case M32C_OPERAND_BITBASE16_16_U8 :
4747 fields->f_dsp_16_u8 = value;
4748 break;
4749 case M32C_OPERAND_BITBASE16_8_U11_S :
4750 fields->f_bitbase16_u11_S = value;
4751 break;
4752 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4753 fields->f_bitbase32_16_s11_unprefixed = value;
4754 break;
4755 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4756 fields->f_bitbase32_16_s19_unprefixed = value;
4757 break;
4758 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4759 fields->f_bitbase32_16_u11_unprefixed = value;
4760 break;
4761 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4762 fields->f_bitbase32_16_u19_unprefixed = value;
4763 break;
4764 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4765 fields->f_bitbase32_16_u27_unprefixed = value;
4766 break;
4767 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4768 fields->f_bitbase32_24_s11_prefixed = value;
4769 break;
4770 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4771 fields->f_bitbase32_24_s19_prefixed = value;
4772 break;
4773 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4774 fields->f_bitbase32_24_u11_prefixed = value;
4775 break;
4776 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4777 fields->f_bitbase32_24_u19_prefixed = value;
4778 break;
4779 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4780 fields->f_bitbase32_24_u27_prefixed = value;
4781 break;
4782 case M32C_OPERAND_BITNO16R :
4783 fields->f_dsp_16_u8 = value;
4784 break;
4785 case M32C_OPERAND_BITNO32PREFIXED :
4786 fields->f_bitno32_prefixed = value;
4787 break;
4788 case M32C_OPERAND_BITNO32UNPREFIXED :
4789 fields->f_bitno32_unprefixed = value;
4790 break;
4791 case M32C_OPERAND_DSP_10_U6 :
4792 fields->f_dsp_10_u6 = value;
4793 break;
4794 case M32C_OPERAND_DSP_16_S16 :
4795 fields->f_dsp_16_s16 = value;
4796 break;
4797 case M32C_OPERAND_DSP_16_S8 :
4798 fields->f_dsp_16_s8 = value;
4799 break;
4800 case M32C_OPERAND_DSP_16_U16 :
4801 fields->f_dsp_16_u16 = value;
4802 break;
4803 case M32C_OPERAND_DSP_16_U20 :
4804 fields->f_dsp_16_u24 = value;
4805 break;
4806 case M32C_OPERAND_DSP_16_U24 :
4807 fields->f_dsp_16_u24 = value;
4808 break;
4809 case M32C_OPERAND_DSP_16_U8 :
4810 fields->f_dsp_16_u8 = value;
4811 break;
4812 case M32C_OPERAND_DSP_24_S16 :
4813 fields->f_dsp_24_s16 = value;
4814 break;
4815 case M32C_OPERAND_DSP_24_S8 :
4816 fields->f_dsp_24_s8 = value;
4817 break;
4818 case M32C_OPERAND_DSP_24_U16 :
4819 fields->f_dsp_24_u16 = value;
4820 break;
4821 case M32C_OPERAND_DSP_24_U20 :
4822 fields->f_dsp_24_u24 = value;
4823 break;
4824 case M32C_OPERAND_DSP_24_U24 :
4825 fields->f_dsp_24_u24 = value;
4826 break;
4827 case M32C_OPERAND_DSP_24_U8 :
4828 fields->f_dsp_24_u8 = value;
4829 break;
4830 case M32C_OPERAND_DSP_32_S16 :
4831 fields->f_dsp_32_s16 = value;
4832 break;
4833 case M32C_OPERAND_DSP_32_S8 :
4834 fields->f_dsp_32_s8 = value;
4835 break;
4836 case M32C_OPERAND_DSP_32_U16 :
4837 fields->f_dsp_32_u16 = value;
4838 break;
4839 case M32C_OPERAND_DSP_32_U20 :
4840 fields->f_dsp_32_u24 = value;
4841 break;
4842 case M32C_OPERAND_DSP_32_U24 :
4843 fields->f_dsp_32_u24 = value;
4844 break;
4845 case M32C_OPERAND_DSP_32_U8 :
4846 fields->f_dsp_32_u8 = value;
4847 break;
4848 case M32C_OPERAND_DSP_40_S16 :
4849 fields->f_dsp_40_s16 = value;
4850 break;
4851 case M32C_OPERAND_DSP_40_S8 :
4852 fields->f_dsp_40_s8 = value;
4853 break;
4854 case M32C_OPERAND_DSP_40_U16 :
4855 fields->f_dsp_40_u16 = value;
4856 break;
4857 case M32C_OPERAND_DSP_40_U20 :
4858 fields->f_dsp_40_u20 = value;
4859 break;
4860 case M32C_OPERAND_DSP_40_U24 :
4861 fields->f_dsp_40_u24 = value;
4862 break;
4863 case M32C_OPERAND_DSP_40_U8 :
4864 fields->f_dsp_40_u8 = value;
4865 break;
4866 case M32C_OPERAND_DSP_48_S16 :
4867 fields->f_dsp_48_s16 = value;
4868 break;
4869 case M32C_OPERAND_DSP_48_S8 :
4870 fields->f_dsp_48_s8 = value;
4871 break;
4872 case M32C_OPERAND_DSP_48_U16 :
4873 fields->f_dsp_48_u16 = value;
4874 break;
4875 case M32C_OPERAND_DSP_48_U20 :
4876 fields->f_dsp_48_u20 = value;
4877 break;
4878 case M32C_OPERAND_DSP_48_U24 :
4879 fields->f_dsp_48_u24 = value;
4880 break;
4881 case M32C_OPERAND_DSP_48_U8 :
4882 fields->f_dsp_48_u8 = value;
4883 break;
4884 case M32C_OPERAND_DSP_8_S24 :
4885 fields->f_dsp_8_s24 = value;
4886 break;
4887 case M32C_OPERAND_DSP_8_S8 :
4888 fields->f_dsp_8_s8 = value;
4889 break;
4890 case M32C_OPERAND_DSP_8_U16 :
4891 fields->f_dsp_8_u16 = value;
4892 break;
4893 case M32C_OPERAND_DSP_8_U24 :
4894 fields->f_dsp_8_u24 = value;
4895 break;
4896 case M32C_OPERAND_DSP_8_U6 :
4897 fields->f_dsp_8_u6 = value;
4898 break;
4899 case M32C_OPERAND_DSP_8_U8 :
4900 fields->f_dsp_8_u8 = value;
4901 break;
4902 case M32C_OPERAND_DST16AN :
4903 fields->f_dst16_an = value;
4904 break;
4905 case M32C_OPERAND_DST16AN_S :
4906 fields->f_dst16_an_s = value;
4907 break;
4908 case M32C_OPERAND_DST16ANHI :
4909 fields->f_dst16_an = value;
4910 break;
4911 case M32C_OPERAND_DST16ANQI :
4912 fields->f_dst16_an = value;
4913 break;
4914 case M32C_OPERAND_DST16ANQI_S :
4915 fields->f_dst16_rn_QI_s = value;
4916 break;
4917 case M32C_OPERAND_DST16ANSI :
4918 fields->f_dst16_an = value;
4919 break;
4920 case M32C_OPERAND_DST16RNEXTQI :
4921 fields->f_dst16_rn_ext = value;
4922 break;
4923 case M32C_OPERAND_DST16RNHI :
4924 fields->f_dst16_rn = value;
4925 break;
4926 case M32C_OPERAND_DST16RNQI :
4927 fields->f_dst16_rn = value;
4928 break;
4929 case M32C_OPERAND_DST16RNQI_S :
4930 fields->f_dst16_rn_QI_s = value;
4931 break;
4932 case M32C_OPERAND_DST16RNSI :
4933 fields->f_dst16_rn = value;
4934 break;
4935 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4936 fields->f_dst32_an_unprefixed = value;
4937 break;
4938 case M32C_OPERAND_DST32ANPREFIXED :
4939 fields->f_dst32_an_prefixed = value;
4940 break;
4941 case M32C_OPERAND_DST32ANPREFIXEDHI :
4942 fields->f_dst32_an_prefixed = value;
4943 break;
4944 case M32C_OPERAND_DST32ANPREFIXEDQI :
4945 fields->f_dst32_an_prefixed = value;
4946 break;
4947 case M32C_OPERAND_DST32ANPREFIXEDSI :
4948 fields->f_dst32_an_prefixed = value;
4949 break;
4950 case M32C_OPERAND_DST32ANUNPREFIXED :
4951 fields->f_dst32_an_unprefixed = value;
4952 break;
4953 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4954 fields->f_dst32_an_unprefixed = value;
4955 break;
4956 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4957 fields->f_dst32_an_unprefixed = value;
4958 break;
4959 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4960 fields->f_dst32_an_unprefixed = value;
4961 break;
4962 case M32C_OPERAND_DST32R0HI_S :
4963 break;
4964 case M32C_OPERAND_DST32R0QI_S :
4965 break;
4966 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4967 fields->f_dst32_rn_ext_unprefixed = value;
4968 break;
4969 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4970 fields->f_dst32_rn_ext_unprefixed = value;
4971 break;
4972 case M32C_OPERAND_DST32RNPREFIXEDHI :
4973 fields->f_dst32_rn_prefixed_HI = value;
4974 break;
4975 case M32C_OPERAND_DST32RNPREFIXEDQI :
4976 fields->f_dst32_rn_prefixed_QI = value;
4977 break;
4978 case M32C_OPERAND_DST32RNPREFIXEDSI :
4979 fields->f_dst32_rn_prefixed_SI = value;
4980 break;
4981 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4982 fields->f_dst32_rn_unprefixed_HI = value;
4983 break;
4984 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4985 fields->f_dst32_rn_unprefixed_QI = value;
4986 break;
4987 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4988 fields->f_dst32_rn_unprefixed_SI = value;
4989 break;
4990 case M32C_OPERAND_G :
4991 break;
4992 case M32C_OPERAND_IMM_12_S4 :
4993 fields->f_imm_12_s4 = value;
4994 break;
4995 case M32C_OPERAND_IMM_12_S4N :
4996 fields->f_imm_12_s4 = value;
4997 break;
4998 case M32C_OPERAND_IMM_13_U3 :
4999 fields->f_imm_13_u3 = value;
5000 break;
5001 case M32C_OPERAND_IMM_16_HI :
5002 fields->f_dsp_16_s16 = value;
5003 break;
5004 case M32C_OPERAND_IMM_16_QI :
5005 fields->f_dsp_16_s8 = value;
5006 break;
5007 case M32C_OPERAND_IMM_16_SI :
5008 fields->f_dsp_16_s32 = value;
5009 break;
5010 case M32C_OPERAND_IMM_20_S4 :
5011 fields->f_imm_20_s4 = value;
5012 break;
5013 case M32C_OPERAND_IMM_24_HI :
5014 fields->f_dsp_24_s16 = value;
5015 break;
5016 case M32C_OPERAND_IMM_24_QI :
5017 fields->f_dsp_24_s8 = value;
5018 break;
5019 case M32C_OPERAND_IMM_24_SI :
5020 fields->f_dsp_24_s32 = value;
5021 break;
5022 case M32C_OPERAND_IMM_32_HI :
5023 fields->f_dsp_32_s16 = value;
5024 break;
5025 case M32C_OPERAND_IMM_32_QI :
5026 fields->f_dsp_32_s8 = value;
5027 break;
5028 case M32C_OPERAND_IMM_32_SI :
5029 fields->f_dsp_32_s32 = value;
5030 break;
5031 case M32C_OPERAND_IMM_40_HI :
5032 fields->f_dsp_40_s16 = value;
5033 break;
5034 case M32C_OPERAND_IMM_40_QI :
5035 fields->f_dsp_40_s8 = value;
5036 break;
5037 case M32C_OPERAND_IMM_40_SI :
5038 fields->f_dsp_40_s32 = value;
5039 break;
5040 case M32C_OPERAND_IMM_48_HI :
5041 fields->f_dsp_48_s16 = value;
5042 break;
5043 case M32C_OPERAND_IMM_48_QI :
5044 fields->f_dsp_48_s8 = value;
5045 break;
5046 case M32C_OPERAND_IMM_48_SI :
5047 fields->f_dsp_48_s32 = value;
5048 break;
5049 case M32C_OPERAND_IMM_56_HI :
5050 fields->f_dsp_56_s16 = value;
5051 break;
5052 case M32C_OPERAND_IMM_56_QI :
5053 fields->f_dsp_56_s8 = value;
5054 break;
5055 case M32C_OPERAND_IMM_64_HI :
5056 fields->f_dsp_64_s16 = value;
5057 break;
5058 case M32C_OPERAND_IMM_8_HI :
5059 fields->f_dsp_8_s16 = value;
5060 break;
5061 case M32C_OPERAND_IMM_8_QI :
5062 fields->f_dsp_8_s8 = value;
5063 break;
5064 case M32C_OPERAND_IMM_8_S4 :
5065 fields->f_imm_8_s4 = value;
5066 break;
5067 case M32C_OPERAND_IMM_8_S4N :
5068 fields->f_imm_8_s4 = value;
5069 break;
5070 case M32C_OPERAND_IMM_SH_12_S4 :
5071 fields->f_imm_12_s4 = value;
5072 break;
5073 case M32C_OPERAND_IMM_SH_20_S4 :
5074 fields->f_imm_20_s4 = value;
5075 break;
5076 case M32C_OPERAND_IMM_SH_8_S4 :
5077 fields->f_imm_8_s4 = value;
5078 break;
5079 case M32C_OPERAND_IMM1_S :
5080 fields->f_imm1_S = value;
5081 break;
5082 case M32C_OPERAND_IMM3_S :
5083 fields->f_imm3_S = value;
5084 break;
5085 case M32C_OPERAND_LAB_16_8 :
5086 fields->f_lab_16_8 = value;
5087 break;
5088 case M32C_OPERAND_LAB_24_8 :
5089 fields->f_lab_24_8 = value;
5090 break;
5091 case M32C_OPERAND_LAB_32_8 :
5092 fields->f_lab_32_8 = value;
5093 break;
5094 case M32C_OPERAND_LAB_40_8 :
5095 fields->f_lab_40_8 = value;
5096 break;
5097 case M32C_OPERAND_LAB_5_3 :
5098 fields->f_lab_5_3 = value;
5099 break;
5100 case M32C_OPERAND_LAB_8_16 :
5101 fields->f_lab_8_16 = value;
5102 break;
5103 case M32C_OPERAND_LAB_8_24 :
5104 fields->f_lab_8_24 = value;
5105 break;
5106 case M32C_OPERAND_LAB_8_8 :
5107 fields->f_lab_8_8 = value;
5108 break;
5109 case M32C_OPERAND_LAB32_JMP_S :
5110 fields->f_lab32_jmp_s = value;
5111 break;
5112 case M32C_OPERAND_Q :
5113 break;
5114 case M32C_OPERAND_R0 :
5115 break;
5116 case M32C_OPERAND_R0H :
5117 break;
5118 case M32C_OPERAND_R0L :
5119 break;
5120 case M32C_OPERAND_R1 :
5121 break;
5122 case M32C_OPERAND_R1R2R0 :
5123 break;
5124 case M32C_OPERAND_R2 :
5125 break;
5126 case M32C_OPERAND_R2R0 :
5127 break;
5128 case M32C_OPERAND_R3 :
5129 break;
5130 case M32C_OPERAND_R3R1 :
5131 break;
5132 case M32C_OPERAND_REGSETPOP :
5133 fields->f_8_8 = value;
5134 break;
5135 case M32C_OPERAND_REGSETPUSH :
5136 fields->f_8_8 = value;
5137 break;
5138 case M32C_OPERAND_RN16_PUSH_S :
5139 fields->f_4_1 = value;
5140 break;
5141 case M32C_OPERAND_S :
5142 break;
5143 case M32C_OPERAND_SRC16AN :
5144 fields->f_src16_an = value;
5145 break;
5146 case M32C_OPERAND_SRC16ANHI :
5147 fields->f_src16_an = value;
5148 break;
5149 case M32C_OPERAND_SRC16ANQI :
5150 fields->f_src16_an = value;
5151 break;
5152 case M32C_OPERAND_SRC16RNHI :
5153 fields->f_src16_rn = value;
5154 break;
5155 case M32C_OPERAND_SRC16RNQI :
5156 fields->f_src16_rn = value;
5157 break;
5158 case M32C_OPERAND_SRC32ANPREFIXED :
5159 fields->f_src32_an_prefixed = value;
5160 break;
5161 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5162 fields->f_src32_an_prefixed = value;
5163 break;
5164 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5165 fields->f_src32_an_prefixed = value;
5166 break;
5167 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5168 fields->f_src32_an_prefixed = value;
5169 break;
5170 case M32C_OPERAND_SRC32ANUNPREFIXED :
5171 fields->f_src32_an_unprefixed = value;
5172 break;
5173 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5174 fields->f_src32_an_unprefixed = value;
5175 break;
5176 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5177 fields->f_src32_an_unprefixed = value;
5178 break;
5179 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5180 fields->f_src32_an_unprefixed = value;
5181 break;
5182 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5183 fields->f_src32_rn_prefixed_HI = value;
5184 break;
5185 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5186 fields->f_src32_rn_prefixed_QI = value;
5187 break;
5188 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5189 fields->f_src32_rn_prefixed_SI = value;
5190 break;
5191 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5192 fields->f_src32_rn_unprefixed_HI = value;
5193 break;
5194 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5195 fields->f_src32_rn_unprefixed_QI = value;
5196 break;
5197 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5198 fields->f_src32_rn_unprefixed_SI = value;
5199 break;
5200 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5201 fields->f_5_1 = value;
5202 break;
5203 case M32C_OPERAND_X :
5204 break;
5205 case M32C_OPERAND_Z :
5206 break;
5207 case M32C_OPERAND_COND16_16 :
5208 fields->f_dsp_16_u8 = value;
5209 break;
5210 case M32C_OPERAND_COND16_24 :
5211 fields->f_dsp_24_u8 = value;
5212 break;
5213 case M32C_OPERAND_COND16_32 :
5214 fields->f_dsp_32_u8 = value;
5215 break;
5216 case M32C_OPERAND_COND16C :
5217 fields->f_cond16 = value;
5218 break;
5219 case M32C_OPERAND_COND16J :
5220 fields->f_cond16 = value;
5221 break;
5222 case M32C_OPERAND_COND16J5 :
5223 fields->f_cond16j_5 = value;
5224 break;
5225 case M32C_OPERAND_COND32 :
5226 fields->f_cond32 = value;
5227 break;
5228 case M32C_OPERAND_COND32_16 :
5229 fields->f_dsp_16_u8 = value;
5230 break;
5231 case M32C_OPERAND_COND32_24 :
5232 fields->f_dsp_24_u8 = value;
5233 break;
5234 case M32C_OPERAND_COND32_32 :
5235 fields->f_dsp_32_u8 = value;
5236 break;
5237 case M32C_OPERAND_COND32_40 :
5238 fields->f_dsp_40_u8 = value;
5239 break;
5240 case M32C_OPERAND_COND32J :
5241 fields->f_cond32j = value;
5242 break;
5243 case M32C_OPERAND_CR1_PREFIXED_32 :
5244 fields->f_21_3 = value;
5245 break;
5246 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5247 fields->f_13_3 = value;
5248 break;
5249 case M32C_OPERAND_CR16 :
5250 fields->f_9_3 = value;
5251 break;
5252 case M32C_OPERAND_CR2_32 :
5253 fields->f_13_3 = value;
5254 break;
5255 case M32C_OPERAND_CR3_PREFIXED_32 :
5256 fields->f_21_3 = value;
5257 break;
5258 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5259 fields->f_13_3 = value;
5260 break;
5261 case M32C_OPERAND_FLAGS16 :
5262 fields->f_9_3 = value;
5263 break;
5264 case M32C_OPERAND_FLAGS32 :
5265 fields->f_13_3 = value;
5266 break;
5267 case M32C_OPERAND_SCCOND32 :
5268 fields->f_cond16 = value;
5269 break;
5270 case M32C_OPERAND_SIZE :
5271 break;
5272
5273 default :
5274 /* xgettext:c-format */
5275 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5276 opindex);
5277 abort ();
5278 }
5279 }
5280
5281 /* Function to call before using the instruction builder tables. */
5282
5283 void
5284 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5285 {
5286 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5287 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5288
5289 cd->insert_operand = m32c_cgen_insert_operand;
5290 cd->extract_operand = m32c_cgen_extract_operand;
5291
5292 cd->get_int_operand = m32c_cgen_get_int_operand;
5293 cd->set_int_operand = m32c_cgen_set_int_operand;
5294 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5295 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5296 }
A mirror of the official binutils-gdb repository