1 /* micromips-opc.c. microMIPS opcode table.
2 Copyright 2008, 2012 Free Software Foundation, Inc.
3 Contributed by Chao-ying Fu, MIPS Technologies, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
24 #include "opcode/mips.h"
26 #define UBD INSN_UNCOND_BRANCH_DELAY
27 #define CBD INSN_COND_BRANCH_DELAY
28 #define NODS INSN_NO_DELAY_SLOT
29 #define TRAP INSN_NO_DELAY_SLOT
30 #define SM INSN_STORE_MEMORY
31 #define BD16 INSN2_BRANCH_DELAY_16BIT /* Used in pinfo2. */
32 #define BD32 INSN2_BRANCH_DELAY_32BIT /* Used in pinfo2. */
34 /* For 16-bit/32-bit microMIPS instructions. They are used in pinfo2. */
35 #define UBR INSN2_UNCOND_BRANCH
36 #define CBR INSN2_COND_BRANCH
37 #define WR_mb INSN2_WRITE_GPR_MB
38 #define RD_mc INSN2_READ_GPR_MC
39 #define RD_md INSN2_MOD_GPR_MD
40 #define WR_md INSN2_MOD_GPR_MD
41 #define RD_me INSN2_READ_GPR_ME
42 #define RD_mf INSN2_MOD_GPR_MF
43 #define WR_mf INSN2_MOD_GPR_MF
44 #define RD_mg INSN2_READ_GPR_MG
45 #define WR_mhi INSN2_WRITE_GPR_MHI
46 #define RD_mj INSN2_READ_GPR_MJ
47 #define WR_mj INSN2_WRITE_GPR_MJ
48 #define RD_ml RD_mc /* Reuse, since the bit position is the same. */
49 #define RD_mmn INSN2_READ_GPR_MMN
50 #define RD_mp INSN2_READ_GPR_MP
51 #define WR_mp INSN2_WRITE_GPR_MP
52 #define RD_mq INSN2_READ_GPR_MQ
53 #define RD_sp INSN2_MOD_SP
54 #define WR_sp INSN2_MOD_SP
55 #define RD_31 INSN2_READ_GPR_31
56 #define RD_gp INSN2_READ_GP
57 #define RD_pc INSN2_READ_PC
59 /* For 32-bit microMIPS instructions. */
60 #define WR_s INSN_WRITE_GPR_S
61 #define WR_d INSN_WRITE_GPR_D
62 #define WR_t INSN_WRITE_GPR_T
63 #define WR_31 INSN_WRITE_GPR_31
64 #define WR_D INSN_WRITE_FPR_D
65 #define WR_T INSN_WRITE_FPR_T
66 #define WR_S INSN_WRITE_FPR_S
67 #define WR_CC INSN_WRITE_COND_CODE
69 #define RD_s INSN_READ_GPR_S
70 #define RD_b INSN_READ_GPR_S
71 #define RD_t INSN_READ_GPR_T
72 #define RD_T INSN_READ_FPR_T
73 #define RD_S INSN_READ_FPR_S
74 #define RD_R INSN_READ_FPR_R
75 #define RD_D INSN2_READ_FPR_D /* Used in pinfo2. */
76 #define RD_CC INSN_READ_COND_CODE
77 #define RD_C0 INSN_COP
78 #define RD_C1 INSN_COP
79 #define RD_C2 INSN_COP
80 #define WR_C0 INSN_COP
81 #define WR_C1 INSN_COP
82 #define WR_C2 INSN_COP
85 #define WR_HI INSN_WRITE_HI
86 #define RD_HI INSN_READ_HI
88 #define WR_LO INSN_WRITE_LO
89 #define RD_LO INSN_READ_LO
91 #define WR_HILO WR_HI|WR_LO
92 #define RD_HILO RD_HI|RD_LO
93 #define MOD_HILO WR_HILO|RD_HILO
95 /* Reuse INSN_ISA1 for 32-bit microMIPS ISA. All instructions in I1
96 are accepted as 32-bit microMIPS ISA.
97 Reuse INSN_ISA3 for 64-bit microMIPS ISA. All instructions in I3
98 are accepted as 64-bit microMIPS ISA. */
102 /* MIPS DSP ASE support. */
103 #define WR_a WR_HILO /* Write DSP accumulators (reuse WR_HILO). */
104 #define RD_a RD_HILO /* Read DSP accumulators (reuse RD_HILO). */
105 #define MOD_a WR_a|RD_a
106 #define DSP_VOLA INSN_NO_DELAY_SLOT
108 #define D33 ASE_DSPR2
110 /* MIPS MCU (MicroController) ASE support. */
113 /* MIPS Enhanced VA Scheme. */
116 /* TLB invalidate instruction support. */
117 #define TLBINV ASE_EVA
119 /* MIPS Virtualization ASE. */
120 #define IVIRT ASE_VIRT
121 #define IVIRT64 ASE_VIRT64
123 const struct mips_opcode micromips_opcodes
[] =
125 /* These instructions appear first so that the disassembler will find
126 them first. The assemblers uses a hash table based on the
127 instruction name anyhow. */
128 /* name, args, match, mask, pinfo, pinfo2, membership, [ase], [exclusions] */
129 {"pref", "k,~(b)", 0x60002000, 0xfc00f000, RD_b
, 0, I1
},
130 {"pref", "k,o(b)", 0, (int) M_PREF_OB
, INSN_MACRO
, 0, I1
},
131 {"pref", "k,A(b)", 0, (int) M_PREF_AB
, INSN_MACRO
, 0, I1
},
132 {"prefx", "h,t(b)", 0x540001a0, 0xfc0007ff, RD_b
|RD_t
|FP_S
, 0, I1
},
133 {"nop", "", 0x0c00, 0xffff, 0, INSN2_ALIAS
, I1
},
134 {"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
135 {"ssnop", "", 0x00000800, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
136 {"ehb", "", 0x00001800, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
137 {"pause", "", 0x00002800, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
138 {"li", "md,mI", 0xec00, 0xfc00, 0, WR_md
, I1
},
139 {"li", "t,j", 0x30000000, 0xfc1f0000, WR_t
, INSN2_ALIAS
, I1
}, /* addiu */
140 {"li", "t,i", 0x50000000, 0xfc1f0000, WR_t
, INSN2_ALIAS
, I1
}, /* ori */
142 /* Disabled until we can handle 48-bit opcodes. */
143 {"li", "s,I", 0x7c0000010000, 0xfc00001f0000, WR_t
, 0, I3
}, /* li48 */
145 {"li", "t,I", 0, (int) M_LI
, INSN_MACRO
, 0, I1
},
146 {"move", "d,s", 0, (int) M_MOVE
, INSN_MACRO
, 0, I1
},
147 {"move", "mp,mj", 0x0c00, 0xfc00, 0, WR_mp
|RD_mj
, I1
},
148 {"move", "d,s", 0x58000150, 0xffe007ff, WR_d
|RD_s
, INSN2_ALIAS
, I3
}, /* daddu */
149 {"move", "d,s", 0x00000150, 0xffe007ff, WR_d
|RD_s
, INSN2_ALIAS
, I1
}, /* addu */
150 {"move", "d,s", 0x00000290, 0xffe007ff, WR_d
|RD_s
, INSN2_ALIAS
, I1
}, /* or */
151 {"b", "mD", 0xcc00, 0xfc00, UBD
, 0, I1
},
152 {"b", "p", 0x94000000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
}, /* beq 0, 0 */
153 {"b", "p", 0x40400000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
}, /* bgez 0 */
154 {"bal", "p", 0x40600000, 0xffff0000, UBD
|WR_31
, INSN2_ALIAS
|BD32
, I1
}, /* bgezal 0 */
155 {"bals", "p", 0x42600000, 0xffff0000, UBD
|WR_31
, INSN2_ALIAS
|BD16
, I1
}, /* bgezals 0 */
156 {"bc", "p", 0x40e00000, 0xffff0000, NODS
, INSN2_ALIAS
|UBR
, I1
}, /* beqzc 0 */
158 {"abs", "d,v", 0, (int) M_ABS
, INSN_MACRO
, 0, I1
},
159 {"abs.d", "T,V", 0x5400237b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
160 {"abs.s", "T,V", 0x5400037b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
161 {"abs.ps", "T,V", 0x5400437b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
162 {"aclr", "\\,~(b)", 0x2000b000, 0xff00f000, SM
|RD_b
|NODS
, 0, 0, MC
},
163 {"aclr", "\\,o(b)", 0, (int) M_ACLR_OB
, INSN_MACRO
, 0, 0, MC
},
164 {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB
, INSN_MACRO
, 0, 0, MC
},
165 {"add", "d,v,t", 0x00000110, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
166 {"add", "t,r,I", 0, (int) M_ADD_I
, INSN_MACRO
, 0, I1
},
167 {"add.d", "D,V,T", 0x54000130, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
168 {"add.s", "D,V,T", 0x54000030, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
169 {"add.ps", "D,V,T", 0x54000230, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
170 {"addi", "t,r,j", 0x10000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
171 {"addiu", "mp,mj,mZ", 0x0c00, 0xfc00, 0, WR_mp
|RD_mj
, I1
}, /* move */
172 {"addiu", "md,ms,mW", 0x6c01, 0xfc01, 0, WR_md
|RD_sp
, I1
}, /* addiur1sp */
173 {"addiu", "md,mc,mB", 0x6c00, 0xfc01, 0, WR_md
|RD_mc
, I1
}, /* addiur2 */
174 {"addiu", "ms,mt,mY", 0x4c01, 0xfc01, 0, WR_sp
|RD_sp
, I1
}, /* addiusp */
175 {"addiu", "mp,mt,mX", 0x4c00, 0xfc01, 0, WR_mp
|RD_mp
, I1
}, /* addius5 */
176 {"addiu", "mb,mr,mQ", 0x78000000, 0xfc000000, 0, WR_mb
|RD_pc
, I1
}, /* addiupc */
177 {"addiu", "t,r,j", 0x30000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
178 {"addiupc", "mb,mQ", 0x78000000, 0xfc000000, 0, WR_mb
|RD_pc
, I1
},
179 {"addiur1sp", "md,mW", 0x6c01, 0xfc01, 0, WR_md
|RD_sp
, I1
},
180 {"addiur2", "md,mc,mB", 0x6c00, 0xfc01, 0, WR_md
|RD_mc
, I1
},
181 {"addiusp", "mY", 0x4c01, 0xfc01, 0, WR_sp
|RD_sp
, I1
},
182 {"addius5", "mp,mX", 0x4c00, 0xfc01, 0, WR_mp
|RD_mp
, I1
},
183 {"addu", "mp,mj,mz", 0x0c00, 0xfc00, 0, WR_mp
|RD_mj
, I1
}, /* move */
184 {"addu", "mp,mz,mj", 0x0c00, 0xfc00, 0, WR_mp
|RD_mj
, I1
}, /* move */
185 {"addu", "md,me,ml", 0x0400, 0xfc01, 0, WR_md
|RD_me
|RD_ml
, I1
},
186 {"addu", "d,v,t", 0x00000150, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
187 {"addu", "t,r,I", 0, (int) M_ADDU_I
, INSN_MACRO
, 0, I1
},
188 /* We have no flag to mark the read from "y", so we use NODS to disable
189 delay slot scheduling of ALNV.PS altogether. */
190 {"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, NODS
|WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
191 {"and", "mf,mt,mg", 0x4480, 0xffc0, 0, WR_mf
|RD_mf
|RD_mg
, I1
},
192 {"and", "mf,mg,mx", 0x4480, 0xffc0, 0, WR_mf
|RD_mf
|RD_mg
, I1
},
193 {"and", "d,v,t", 0x00000250, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
194 {"and", "t,r,I", 0, (int) M_AND_I
, INSN_MACRO
, 0, I1
},
195 {"andi", "md,mc,mC", 0x2c00, 0xfc00, 0, WR_md
|RD_mc
, I1
},
196 {"andi", "t,r,i", 0xd0000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
197 {"aset", "\\,~(b)", 0x20003000, 0xff00f000, SM
|RD_b
|NODS
, 0, 0, MC
},
198 {"aset", "\\,o(b)", 0, (int) M_ASET_OB
, INSN_MACRO
, 0, 0, MC
},
199 {"aset", "\\,A(b)", 0, (int) M_ASET_AB
, INSN_MACRO
, 0, 0, MC
},
200 /* b is at the top of the table. */
201 /* bal is at the top of the table. */
202 {"bc1f", "p", 0x43800000, 0xffff0000, CBD
|RD_CC
|FP_S
, 0, I1
},
203 {"bc1f", "N,p", 0x43800000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, I1
},
204 {"bc1fl", "p", 0, (int) M_BC1FL
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
205 {"bc1fl", "N,p", 0, (int) M_BC1FL
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
206 {"bc2f", "p", 0x42800000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
207 {"bc2f", "N,p", 0x42800000, 0xffe30000, CBD
|RD_CC
, 0, I1
},
208 {"bc2fl", "p", 0, (int) M_BC2FL
, INSN_MACRO
, 0, I1
},
209 {"bc2fl", "N,p", 0, (int) M_BC2FL
, INSN_MACRO
, 0, I1
},
210 {"bc1t", "p", 0x43a00000, 0xffff0000, CBD
|RD_CC
|FP_S
, 0, I1
},
211 {"bc1t", "N,p", 0x43a00000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, I1
},
212 {"bc1tl", "p", 0, (int) M_BC1TL
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
213 {"bc1tl", "N,p", 0, (int) M_BC1TL
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
214 {"bc2t", "p", 0x42a00000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
215 {"bc2t", "N,p", 0x42a00000, 0xffe30000, CBD
|RD_CC
, 0, I1
},
216 {"bc2tl", "p", 0, (int) M_BC2TL
, INSN_MACRO
, 0, I1
},
217 {"bc2tl", "N,p", 0, (int) M_BC2TL
, INSN_MACRO
, 0, I1
},
218 {"beqz", "md,mE", 0x8c00, 0xfc00, CBD
, RD_md
, I1
},
219 {"beqz", "s,p", 0x94000000, 0xffe00000, CBD
|RD_s
, 0, I1
},
220 {"beqzc", "s,p", 0x40e00000, 0xffe00000, NODS
|RD_s
, CBR
, I1
},
221 {"beqzl", "s,p", 0, (int) M_BEQL
, INSN_MACRO
, 0, I1
},
222 {"beq", "md,mz,mE", 0x8c00, 0xfc00, CBD
, RD_md
, I1
}, /* beqz */
223 {"beq", "mz,md,mE", 0x8c00, 0xfc00, CBD
, RD_md
, I1
}, /* beqz */
224 {"beq", "s,t,p", 0x94000000, 0xfc000000, CBD
|RD_s
|RD_t
, 0, I1
},
225 {"beq", "s,I,p", 0, (int) M_BEQ_I
, INSN_MACRO
, 0, I1
},
226 {"beql", "s,t,p", 0, (int) M_BEQL
, INSN_MACRO
, 0, I1
},
227 {"beql", "s,I,p", 0, (int) M_BEQL_I
, INSN_MACRO
, 0, I1
},
228 {"bge", "s,t,p", 0, (int) M_BGE
, INSN_MACRO
, 0, I1
},
229 {"bge", "s,I,p", 0, (int) M_BGE_I
, INSN_MACRO
, 0, I1
},
230 {"bgel", "s,t,p", 0, (int) M_BGEL
, INSN_MACRO
, 0, I1
},
231 {"bgel", "s,I,p", 0, (int) M_BGEL_I
, INSN_MACRO
, 0, I1
},
232 {"bgeu", "s,t,p", 0, (int) M_BGEU
, INSN_MACRO
, 0, I1
},
233 {"bgeu", "s,I,p", 0, (int) M_BGEU_I
, INSN_MACRO
, 0, I1
},
234 {"bgeul", "s,t,p", 0, (int) M_BGEUL
, INSN_MACRO
, 0, I1
},
235 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I
, INSN_MACRO
, 0, I1
},
236 {"bgez", "s,p", 0x40400000, 0xffe00000, CBD
|RD_s
, 0, I1
},
237 {"bgezl", "s,p", 0, (int) M_BGEZL
, INSN_MACRO
, 0, I1
},
238 {"bgezal", "s,p", 0x40600000, 0xffe00000, CBD
|RD_s
|WR_31
, BD32
, I1
},
239 {"bgezals", "s,p", 0x42600000, 0xffe00000, CBD
|RD_s
|WR_31
, BD16
, I1
},
240 {"bgezall", "s,p", 0, (int) M_BGEZALL
, INSN_MACRO
, 0, I1
},
241 {"bgt", "s,t,p", 0, (int) M_BGT
, INSN_MACRO
, 0, I1
},
242 {"bgt", "s,I,p", 0, (int) M_BGT_I
, INSN_MACRO
, 0, I1
},
243 {"bgtl", "s,t,p", 0, (int) M_BGTL
, INSN_MACRO
, 0, I1
},
244 {"bgtl", "s,I,p", 0, (int) M_BGTL_I
, INSN_MACRO
, 0, I1
},
245 {"bgtu", "s,t,p", 0, (int) M_BGTU
, INSN_MACRO
, 0, I1
},
246 {"bgtu", "s,I,p", 0, (int) M_BGTU_I
, INSN_MACRO
, 0, I1
},
247 {"bgtul", "s,t,p", 0, (int) M_BGTUL
, INSN_MACRO
, 0, I1
},
248 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I
, INSN_MACRO
, 0, I1
},
249 {"bgtz", "s,p", 0x40c00000, 0xffe00000, CBD
|RD_s
, 0, I1
},
250 {"bgtzl", "s,p", 0, (int) M_BGTZL
, INSN_MACRO
, 0, I1
},
251 {"ble", "s,t,p", 0, (int) M_BLE
, INSN_MACRO
, 0, I1
},
252 {"ble", "s,I,p", 0, (int) M_BLE_I
, INSN_MACRO
, 0, I1
},
253 {"blel", "s,t,p", 0, (int) M_BLEL
, INSN_MACRO
, 0, I1
},
254 {"blel", "s,I,p", 0, (int) M_BLEL_I
, INSN_MACRO
, 0, I1
},
255 {"bleu", "s,t,p", 0, (int) M_BLEU
, INSN_MACRO
, 0, I1
},
256 {"bleu", "s,I,p", 0, (int) M_BLEU_I
, INSN_MACRO
, 0, I1
},
257 {"bleul", "s,t,p", 0, (int) M_BLEUL
, INSN_MACRO
, 0, I1
},
258 {"bleul", "s,I,p", 0, (int) M_BLEUL_I
, INSN_MACRO
, 0, I1
},
259 {"blez", "s,p", 0x40800000, 0xffe00000, CBD
|RD_s
, 0, I1
},
260 {"blezl", "s,p", 0, (int) M_BLEZL
, INSN_MACRO
, 0, I1
},
261 {"blt", "s,t,p", 0, (int) M_BLT
, INSN_MACRO
, 0, I1
},
262 {"blt", "s,I,p", 0, (int) M_BLT_I
, INSN_MACRO
, 0, I1
},
263 {"bltl", "s,t,p", 0, (int) M_BLTL
, INSN_MACRO
, 0, I1
},
264 {"bltl", "s,I,p", 0, (int) M_BLTL_I
, INSN_MACRO
, 0, I1
},
265 {"bltu", "s,t,p", 0, (int) M_BLTU
, INSN_MACRO
, 0, I1
},
266 {"bltu", "s,I,p", 0, (int) M_BLTU_I
, INSN_MACRO
, 0, I1
},
267 {"bltul", "s,t,p", 0, (int) M_BLTUL
, INSN_MACRO
, 0, I1
},
268 {"bltul", "s,I,p", 0, (int) M_BLTUL_I
, INSN_MACRO
, 0, I1
},
269 {"bltz", "s,p", 0x40000000, 0xffe00000, CBD
|RD_s
, 0, I1
},
270 {"bltzl", "s,p", 0, (int) M_BLTZL
, INSN_MACRO
, 0, I1
},
271 {"bltzal", "s,p", 0x40200000, 0xffe00000, CBD
|RD_s
|WR_31
, BD32
, I1
},
272 {"bltzals", "s,p", 0x42200000, 0xffe00000, CBD
|RD_s
|WR_31
, BD16
, I1
},
273 {"bltzall", "s,p", 0, (int) M_BLTZALL
, INSN_MACRO
, 0, I1
},
274 {"bnez", "md,mE", 0xac00, 0xfc00, CBD
, RD_md
, I1
},
275 {"bnez", "s,p", 0xb4000000, 0xffe00000, CBD
|RD_s
, 0, I1
},
276 {"bnezc", "s,p", 0x40a00000, 0xffe00000, NODS
|RD_s
, CBR
, I1
},
277 {"bnezl", "s,p", 0, (int) M_BNEL
, INSN_MACRO
, 0, I1
},
278 {"bne", "md,mz,mE", 0xac00, 0xfc00, CBD
, RD_md
, I1
}, /* bnez */
279 {"bne", "mz,md,mE", 0xac00, 0xfc00, CBD
, RD_md
, I1
}, /* bnez */
280 {"bne", "s,t,p", 0xb4000000, 0xfc000000, CBD
|RD_s
|RD_t
, 0, I1
},
281 {"bne", "s,I,p", 0, (int) M_BNE_I
, INSN_MACRO
, 0, I1
},
282 {"bnel", "s,t,p", 0, (int) M_BNEL
, INSN_MACRO
, 0, I1
},
283 {"bnel", "s,I,p", 0, (int) M_BNEL_I
, INSN_MACRO
, 0, I1
},
284 {"break", "", 0x4680, 0xffff, TRAP
, 0, I1
},
285 {"break", "", 0x00000007, 0xffffffff, TRAP
, 0, I1
},
286 {"break", "mF", 0x4680, 0xfff0, TRAP
, 0, I1
},
287 {"break", "c", 0x00000007, 0xfc00ffff, TRAP
, 0, I1
},
288 {"break", "c,q", 0x00000007, 0xfc00003f, TRAP
, 0, I1
},
289 {"c.f.d", "S,T", 0x5400043c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
290 {"c.f.d", "M,S,T", 0x5400043c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
291 {"c.f.s", "S,T", 0x5400003c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
292 {"c.f.s", "M,S,T", 0x5400003c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
293 {"c.f.ps", "S,T", 0x5400083c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
294 {"c.f.ps", "M,S,T", 0x5400083c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
295 {"c.un.d", "S,T", 0x5400047c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
296 {"c.un.d", "M,S,T", 0x5400047c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
297 {"c.un.s", "S,T", 0x5400007c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
298 {"c.un.s", "M,S,T", 0x5400007c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
299 {"c.un.ps", "S,T", 0x5400087c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
300 {"c.un.ps", "M,S,T", 0x5400087c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
301 {"c.eq.d", "S,T", 0x540004bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
302 {"c.eq.d", "M,S,T", 0x540004bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
303 {"c.eq.s", "S,T", 0x540000bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
304 {"c.eq.s", "M,S,T", 0x540000bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
305 {"c.eq.ps", "S,T", 0x540008bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
306 {"c.eq.ps", "M,S,T", 0x540008bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
307 {"c.ueq.d", "S,T", 0x540004fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
308 {"c.ueq.d", "M,S,T", 0x540004fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
309 {"c.ueq.s", "S,T", 0x540000fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
310 {"c.ueq.s", "M,S,T", 0x540000fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
311 {"c.ueq.ps", "S,T", 0x540008fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
312 {"c.ueq.ps", "M,S,T", 0x540008fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
313 {"c.olt.d", "S,T", 0x5400053c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
314 {"c.olt.d", "M,S,T", 0x5400053c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
315 {"c.olt.s", "S,T", 0x5400013c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
316 {"c.olt.s", "M,S,T", 0x5400013c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
317 {"c.olt.ps", "S,T", 0x5400093c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
318 {"c.olt.ps", "M,S,T", 0x5400093c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
319 {"c.ult.d", "S,T", 0x5400057c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
320 {"c.ult.d", "M,S,T", 0x5400057c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
321 {"c.ult.s", "S,T", 0x5400017c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
322 {"c.ult.s", "M,S,T", 0x5400017c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
323 {"c.ult.ps", "S,T", 0x5400097c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
324 {"c.ult.ps", "M,S,T", 0x5400097c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
325 {"c.ole.d", "S,T", 0x540005bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
326 {"c.ole.d", "M,S,T", 0x540005bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
327 {"c.ole.s", "S,T", 0x540001bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
328 {"c.ole.s", "M,S,T", 0x540001bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
329 {"c.ole.ps", "S,T", 0x540009bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
330 {"c.ole.ps", "M,S,T", 0x540009bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
331 {"c.ule.d", "S,T", 0x540005fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
332 {"c.ule.d", "M,S,T", 0x540005fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
333 {"c.ule.s", "S,T", 0x540001fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
334 {"c.ule.s", "M,S,T", 0x540001fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
335 {"c.ule.ps", "S,T", 0x540009fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
336 {"c.ule.ps", "M,S,T", 0x540009fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
337 {"c.sf.d", "S,T", 0x5400063c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
338 {"c.sf.d", "M,S,T", 0x5400063c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
339 {"c.sf.s", "S,T", 0x5400023c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
340 {"c.sf.s", "M,S,T", 0x5400023c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
341 {"c.sf.ps", "S,T", 0x54000a3c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
342 {"c.sf.ps", "M,S,T", 0x54000a3c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
343 {"c.ngle.d", "S,T", 0x5400067c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
344 {"c.ngle.d", "M,S,T", 0x5400067c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
345 {"c.ngle.s", "S,T", 0x5400027c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
346 {"c.ngle.s", "M,S,T", 0x5400027c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
347 {"c.ngle.ps", "S,T", 0x54000a7c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
348 {"c.ngle.ps", "M,S,T", 0x54000a7c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
349 {"c.seq.d", "S,T", 0x540006bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
350 {"c.seq.d", "M,S,T", 0x540006bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
351 {"c.seq.s", "S,T", 0x540002bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
352 {"c.seq.s", "M,S,T", 0x540002bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
353 {"c.seq.ps", "S,T", 0x54000abc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
354 {"c.seq.ps", "M,S,T", 0x54000abc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
355 {"c.ngl.d", "S,T", 0x540006fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
356 {"c.ngl.d", "M,S,T", 0x540006fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
357 {"c.ngl.s", "S,T", 0x540002fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
358 {"c.ngl.s", "M,S,T", 0x540002fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
359 {"c.ngl.ps", "S,T", 0x54000afc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
360 {"c.ngl.ps", "M,S,T", 0x54000afc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
361 {"c.lt.d", "S,T", 0x5400073c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
362 {"c.lt.d", "M,S,T", 0x5400073c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
363 {"c.lt.s", "S,T", 0x5400033c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
364 {"c.lt.s", "M,S,T", 0x5400033c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
365 {"c.lt.ps", "S,T", 0x54000b3c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
366 {"c.lt.ps", "M,S,T", 0x54000b3c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
367 {"c.nge.d", "S,T", 0x5400077c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
368 {"c.nge.d", "M,S,T", 0x5400077c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
369 {"c.nge.s", "S,T", 0x5400037c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
370 {"c.nge.s", "M,S,T", 0x5400037c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
371 {"c.nge.ps", "S,T", 0x54000b7c, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
372 {"c.nge.ps", "M,S,T", 0x54000b7c, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
373 {"c.le.d", "S,T", 0x540007bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
374 {"c.le.d", "M,S,T", 0x540007bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
375 {"c.le.s", "S,T", 0x540003bc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
376 {"c.le.s", "M,S,T", 0x540003bc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
377 {"c.le.ps", "S,T", 0x54000bbc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
378 {"c.le.ps", "M,S,T", 0x54000bbc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
379 {"c.ngt.d", "S,T", 0x540007fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
380 {"c.ngt.d", "M,S,T", 0x540007fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
381 {"c.ngt.s", "S,T", 0x540003fc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
382 {"c.ngt.s", "M,S,T", 0x540003fc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
383 {"c.ngt.ps", "S,T", 0x54000bfc, 0xfc00ffff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
384 {"c.ngt.ps", "M,S,T", 0x54000bfc, 0xfc001fff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
385 {"cache", "k,~(b)", 0x20006000, 0xfc00f000, RD_b
, 0, I1
},
386 {"cache", "k,o(b)", 0, (int) M_CACHE_OB
, INSN_MACRO
, 0, I1
},
387 {"cache", "k,A(b)", 0, (int) M_CACHE_AB
, INSN_MACRO
, 0, I1
},
388 {"ceil.l.d", "T,S", 0x5400533b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
389 {"ceil.l.s", "T,S", 0x5400133b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
390 {"ceil.w.d", "T,S", 0x54005b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
391 {"ceil.w.s", "T,S", 0x54001b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
392 {"cfc1", "t,G", 0x5400103b, 0xfc00ffff, WR_t
|RD_C1
|FP_S
, 0, I1
},
393 {"cfc1", "t,S", 0x5400103b, 0xfc00ffff, WR_t
|RD_C1
|FP_S
, 0, I1
},
394 {"cfc2", "t,G", 0x0000cd3c, 0xfc00ffff, WR_t
|RD_C2
, 0, I1
},
395 {"clo", "t,s", 0x00004b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I1
},
396 {"clz", "t,s", 0x00005b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I1
},
397 {"cop2", "C", 0x00000002, 0xfc000007, CP
, 0, I1
},
398 {"ctc1", "t,G", 0x5400183b, 0xfc00ffff, RD_t
|WR_CC
|FP_S
, 0, I1
},
399 {"ctc1", "t,S", 0x5400183b, 0xfc00ffff, RD_t
|WR_CC
|FP_S
, 0, I1
},
400 {"ctc2", "t,G", 0x0000dd3c, 0xfc00ffff, RD_t
|WR_C2
|WR_CC
, 0, I1
},
401 {"cvt.d.l", "T,S", 0x5400537b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
402 {"cvt.d.s", "T,S", 0x5400137b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
403 {"cvt.d.w", "T,S", 0x5400337b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
404 {"cvt.l.d", "T,S", 0x5400413b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
405 {"cvt.l.s", "T,S", 0x5400013b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
406 {"cvt.s.l", "T,S", 0x54005b7b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
407 {"cvt.s.d", "T,S", 0x54001b7b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
408 {"cvt.s.w", "T,S", 0x54003b7b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
409 {"cvt.s.pl", "T,S", 0x5400213b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
410 {"cvt.s.pu", "T,S", 0x5400293b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
411 {"cvt.w.d", "T,S", 0x5400493b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
412 {"cvt.w.s", "T,S", 0x5400093b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
413 {"cvt.ps.s", "D,V,T", 0x54000180, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_S
|FP_D
, 0, I1
},
414 {"dabs", "d,v", 0, (int) M_DABS
, INSN_MACRO
, 0, I3
},
415 {"dadd", "d,v,t", 0x58000110, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
416 {"dadd", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, 0, I3
},
417 {"daddi", "t,r,.", 0x5800001c, 0xfc00003f, WR_t
|RD_s
, 0, I3
},
418 {"daddi", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, 0, I3
},
419 {"daddiu", "t,r,j", 0x5c000000, 0xfc000000, WR_t
|RD_s
, 0, I3
},
420 {"daddu", "d,v,t", 0x58000150, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
421 {"daddu", "t,r,I", 0, (int) M_DADDU_I
, INSN_MACRO
, 0, I3
},
422 {"dclo", "t,s", 0x58004b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I3
},
423 {"dclz", "t,s", 0x58005b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I3
},
424 {"deret", "", 0x0000e37c, 0xffffffff, NODS
, 0, I1
},
425 {"dext", "t,r,I,+I", 0, (int) M_DEXT
, INSN_MACRO
, 0, I3
},
426 {"dext", "t,r,+A,+C",0x5800002c, 0xfc00003f, WR_t
|RD_s
, 0, I3
},
427 {"dextm", "t,r,+A,+G",0x58000024, 0xfc00003f, WR_t
|RD_s
, 0, I3
},
428 {"dextu", "t,r,+E,+H",0x58000014, 0xfc00003f, WR_t
|RD_s
, 0, I3
},
429 /* For ddiv, see the comments about div. */
430 {"ddiv", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
431 {"ddiv", "z,t", 0x5800ab3c, 0xfc1fffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
432 {"ddiv", "d,v,t", 0, (int) M_DDIV_3
, INSN_MACRO
, 0, I3
},
433 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I
, INSN_MACRO
, 0, I3
},
434 /* For ddivu, see the comments about div. */
435 {"ddivu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
436 {"ddivu", "z,t", 0x5800bb3c, 0xfc1fffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
437 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3
, INSN_MACRO
, 0, I3
},
438 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I
, INSN_MACRO
, 0, I3
},
439 {"di", "", 0x0000477c, 0xffffffff, WR_s
|RD_C0
, 0, I1
},
440 {"di", "s", 0x0000477c, 0xffe0ffff, WR_s
|RD_C0
, 0, I1
},
441 {"dins", "t,r,I,+I", 0, (int) M_DINS
, INSN_MACRO
, 0, I3
},
442 {"dins", "t,r,+A,+B",0x5800000c, 0xfc00003f, WR_t
|RD_s
, 0, I3
},
443 {"dinsm", "t,r,+A,+F",0x58000004, 0xfc00003f, WR_t
|RD_s
, 0, I3
},
444 {"dinsu", "t,r,+E,+F",0x58000034, 0xfc00003f, WR_t
|RD_s
, 0, I3
},
445 /* The MIPS assembler treats the div opcode with two operands as
446 though the first operand appeared twice (the first operand is both
447 a source and a destination). To get the div machine instruction,
448 you must use an explicit destination of $0. */
449 {"div", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
450 {"div", "z,t", 0x0000ab3c, 0xfc1fffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
451 {"div", "d,v,t", 0, (int) M_DIV_3
, INSN_MACRO
, 0, I1
},
452 {"div", "d,v,I", 0, (int) M_DIV_3I
, INSN_MACRO
, 0, I1
},
453 {"div.d", "D,V,T", 0x540001f0, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
454 {"div.s", "D,V,T", 0x540000f0, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
455 /* For divu, see the comments about div. */
456 {"divu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
457 {"divu", "z,t", 0x0000bb3c, 0xfc1fffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
458 {"divu", "d,v,t", 0, (int) M_DIVU_3
, INSN_MACRO
, 0, I1
},
459 {"divu", "d,v,I", 0, (int) M_DIVU_3I
, INSN_MACRO
, 0, I1
},
460 {"dla", "t,A(b)", 0, (int) M_DLA_AB
, INSN_MACRO
, 0, I3
},
461 {"dlca", "t,A(b)", 0, (int) M_DLCA_AB
, INSN_MACRO
, 0, I3
},
462 {"dli", "t,j", 0x30000000, 0xfc1f0000, WR_t
, 0, I3
}, /* addiu */
463 {"dli", "t,i", 0x50000000, 0xfc1f0000, WR_t
, 0, I3
}, /* ori */
464 {"dli", "t,I", 0, (int) M_DLI
, INSN_MACRO
, 0, I3
},
465 {"dmfc0", "t,G", 0x580000fc, 0xfc00ffff, WR_t
|RD_C0
, 0, I3
},
466 {"dmfc0", "t,G,H", 0x580000fc, 0xfc00c7ff, WR_t
|RD_C0
, 0, I3
},
467 {"dmfgc0", "t,G", 0x580000e7, 0xfc00ffff, WR_t
|RD_C0
, 0, 0, IVIRT64
},
468 {"dmfgc0", "t,G,H", 0x580000e7, 0xfc00c7ff, WR_t
|RD_C0
, 0, 0, IVIRT64
},
469 {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_t
|WR_C0
|WR_CC
, 0, I3
},
470 {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_t
|WR_C0
|WR_CC
, 0, I3
},
471 {"dmtgc0", "t,G", 0x580002e7, 0xfc00ffff, RD_t
|WR_C0
|WR_CC
, 0, 0, IVIRT64
},
472 {"dmtgc0", "t,G,H", 0x580002e7, 0xfc00c7ff, RD_t
|WR_C0
|WR_CC
, 0, 0, IVIRT64
},
473 {"dmfc1", "t,S", 0x5400243b, 0xfc00ffff, WR_t
|RD_S
|FP_S
, 0, I3
},
474 {"dmfc1", "t,G", 0x5400243b, 0xfc00ffff, WR_t
|RD_S
|FP_S
, 0, I3
},
475 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_t
|WR_S
|FP_S
, 0, I3
},
476 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_t
|WR_S
|FP_S
, 0, I3
},
477 {"dmfc2", "t,G", 0x00006d3c, 0xfc00ffff, WR_t
|RD_C2
, 0, I3
},
478 /*{"dmfc2", "t,G,H", 0x58000283, 0xfc001fff, WR_t|RD_C2, 0, I3 },*/
479 {"dmtc2", "t,G", 0x00007d3c, 0xfc00ffff, RD_t
|WR_C2
|WR_CC
, 0, I3
},
480 /*{"dmtc2", "t,G,H", 0x58000683, 0xfc001fff, RD_t|WR_C2|WR_CC, 0, I3 },*/
481 {"dmul", "d,v,t", 0, (int) M_DMUL
, INSN_MACRO
, 0, I3
},
482 {"dmul", "d,v,I", 0, (int) M_DMUL_I
, INSN_MACRO
, 0, I3
},
483 {"dmulo", "d,v,t", 0, (int) M_DMULO
, INSN_MACRO
, 0, I3
},
484 {"dmulo", "d,v,I", 0, (int) M_DMULO_I
, INSN_MACRO
, 0, I3
},
485 {"dmulou", "d,v,t", 0, (int) M_DMULOU
, INSN_MACRO
, 0, I3
},
486 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I
, INSN_MACRO
, 0, I3
},
487 {"dmult", "s,t", 0x58008b3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
488 {"dmultu", "s,t", 0x58009b3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
489 {"dneg", "d,w", 0x58000190, 0xfc1f07ff, WR_d
|RD_t
, 0, I3
}, /* dsub 0 */
490 {"dnegu", "d,w", 0x580001d0, 0xfc1f07ff, WR_d
|RD_t
, 0, I3
}, /* dsubu 0 */
491 {"drem", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
492 {"drem", "d,v,t", 0, (int) M_DREM_3
, INSN_MACRO
, 0, I3
},
493 {"drem", "d,v,I", 0, (int) M_DREM_3I
, INSN_MACRO
, 0, I3
},
494 {"dremu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
495 {"dremu", "d,v,t", 0, (int) M_DREMU_3
, INSN_MACRO
, 0, I3
},
496 {"dremu", "d,v,I", 0, (int) M_DREMU_3I
, INSN_MACRO
, 0, I3
},
497 {"drol", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I3
},
498 {"drol", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I3
},
499 {"dror", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I3
},
500 {"dror", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I3
},
501 {"dror", "t,r,<", 0x580000c0, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
502 {"drorv", "d,t,s", 0x580000d0, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I3
},
503 {"dror32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
504 {"drotl", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I3
},
505 {"drotl", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I3
},
506 {"drotr", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I3
},
507 {"drotr", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I3
},
508 {"drotrv", "d,t,s", 0x580000d0, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I3
},
509 {"drotr32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
510 {"dsbh", "t,r", 0x58007b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I3
},
511 {"dshd", "t,r", 0x5800fb3c, 0xfc00ffff, WR_t
|RD_s
, 0, I3
},
512 {"dsllv", "d,t,s", 0x58000010, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
513 {"dsll32", "t,r,<", 0x58000008, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
514 {"dsll", "d,t,s", 0x58000010, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsllv */
515 {"dsll", "t,r,>", 0x58000008, 0xfc0007ff, WR_t
|RD_s
, 0, I3
}, /* dsll32 */
516 {"dsll", "t,r,<", 0x58000000, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
517 {"dsrav", "d,t,s", 0x58000090, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
518 {"dsra32", "t,r,<", 0x58000088, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
519 {"dsra", "d,t,s", 0x58000090, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsrav */
520 {"dsra", "t,r,>", 0x58000088, 0xfc0007ff, WR_t
|RD_s
, 0, I3
}, /* dsra32 */
521 {"dsra", "t,r,<", 0x58000080, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
522 {"dsrlv", "d,t,s", 0x58000050, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
523 {"dsrl32", "t,r,<", 0x58000048, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
524 {"dsrl", "d,t,s", 0x58000050, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsrlv */
525 {"dsrl", "t,r,>", 0x58000048, 0xfc0007ff, WR_t
|RD_s
, 0, I3
}, /* dsrl32 */
526 {"dsrl", "t,r,<", 0x58000040, 0xfc0007ff, WR_t
|RD_s
, 0, I3
},
527 {"dsub", "d,v,t", 0x58000190, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
528 {"dsub", "d,v,I", 0, (int) M_DSUB_I
, INSN_MACRO
, 0, I3
},
529 {"dsubu", "d,v,t", 0x580001d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
530 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I
, INSN_MACRO
, 0, I3
},
531 {"ei", "", 0x0000577c, 0xffffffff, WR_s
|WR_C0
, 0, I1
},
532 {"ei", "s", 0x0000577c, 0xffe0ffff, WR_s
|WR_C0
, 0, I1
},
533 {"eret", "", 0x0000f37c, 0xffffffff, NODS
, 0, I1
},
534 {"ext", "t,r,+A,+C", 0x0000002c, 0xfc00003f, WR_t
|RD_s
, 0, I1
},
535 {"floor.l.d", "T,V", 0x5400433b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
536 {"floor.l.s", "T,V", 0x5400033b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
537 {"floor.w.d", "T,V", 0x54004b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
538 {"floor.w.s", "T,V", 0x54000b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
539 {"hypcall", "", 0x0000c37c, 0xffffffff, TRAP
, 0, 0, IVIRT
},
540 {"hypcall", "B", 0x0000c37c, 0xfc00ffff, TRAP
, 0, 0, IVIRT
},
541 {"ins", "t,r,+A,+B", 0x0000000c, 0xfc00003f, WR_t
|RD_s
, 0, I1
},
542 {"iret", "", 0x0000d37c, 0xffffffff, NODS
, 0, 0, MC
},
543 {"jr", "mj", 0x4580, 0xffe0, UBD
, RD_mj
, I1
},
544 {"jr", "s", 0x00000f3c, 0xffe0ffff, UBD
|RD_s
, BD32
, I1
}, /* jalr */
545 {"jrs", "s", 0x00004f3c, 0xffe0ffff, UBD
|RD_s
, BD16
, I1
}, /* jalrs */
546 {"jraddiusp", "mP", 0x4700, 0xffe0, NODS
, UBR
|RD_31
|WR_sp
|RD_sp
, I1
},
547 /* This macro is after the real instruction so that it only matches with
549 {"jraddiusp", "mP", 0, (int) M_JRADDIUSP
, INSN_MACRO
, 0, I1
},
550 {"jrc", "mj", 0x45a0, 0xffe0, NODS
, UBR
|RD_mj
, I1
},
551 /* This macro is after the real instruction so that it only matches with
553 {"jrc", "s", 0, (int) M_JRC
, INSN_MACRO
, 0, I1
},
554 {"jr.hb", "s", 0x00001f3c, 0xffe0ffff, UBD
|RD_s
, BD32
, I1
}, /* jalr.hb */
555 {"jrs.hb", "s", 0x00005f3c, 0xffe0ffff, UBD
|RD_s
, BD16
, I1
}, /* jalrs.hb */
556 {"j", "mj", 0x4580, 0xffe0, UBD
, RD_mj
, I1
}, /* jr */
557 {"j", "s", 0x00000f3c, 0xffe0ffff, UBD
|RD_s
, BD32
, I1
}, /* jr */
558 /* SVR4 PIC code requires special handling for j, so it must be a
560 {"j", "a", 0, (int) M_J_A
, INSN_MACRO
, 0, I1
},
561 /* This form of j is used by the disassembler and internally by the
562 assembler, but will never match user input (because the line above
563 will match first). */
564 {"j", "a", 0xd4000000, 0xfc000000, UBD
, 0, I1
},
565 {"jalr", "mj", 0x45c0, 0xffe0, UBD
|WR_31
, RD_mj
|BD32
, I1
},
566 {"jalr", "my,mj", 0x45c0, 0xffe0, UBD
|WR_31
, RD_mj
|BD32
, I1
},
567 {"jalr", "s", 0x03e00f3c, 0xffe0ffff, UBD
|RD_s
|WR_t
, BD32
, I1
},
568 {"jalr", "t,s", 0x00000f3c, 0xfc00ffff, UBD
|RD_s
|WR_t
, BD32
, I1
},
569 {"jalr.hb", "s", 0x03e01f3c, 0xffe0ffff, UBD
|RD_s
|WR_t
, BD32
, I1
},
570 {"jalr.hb", "t,s", 0x00001f3c, 0xfc00ffff, UBD
|RD_s
|WR_t
, BD32
, I1
},
571 {"jalrs", "mj", 0x45e0, 0xffe0, UBD
|WR_31
, RD_mj
|BD16
, I1
},
572 {"jalrs", "my,mj", 0x45e0, 0xffe0, UBD
|WR_31
, RD_mj
|BD16
, I1
},
573 {"jalrs", "s", 0x03e04f3c, 0xffe0ffff, UBD
|RD_s
|WR_t
, BD16
, I1
},
574 {"jalrs", "t,s", 0x00004f3c, 0xfc00ffff, UBD
|RD_s
|WR_t
, BD16
, I1
},
575 {"jalrs.hb", "s", 0x03e05f3c, 0xffe0ffff, UBD
|RD_s
|WR_t
, BD16
, I1
},
576 {"jalrs.hb", "t,s", 0x00005f3c, 0xfc00ffff, UBD
|RD_s
|WR_t
, BD16
, I1
},
577 /* SVR4 PIC code requires special handling for jal, so it must be a
579 {"jal", "d,s", 0, (int) M_JAL_2
, INSN_MACRO
, 0, I1
},
580 {"jal", "s", 0, (int) M_JAL_1
, INSN_MACRO
, 0, I1
},
581 {"jal", "a", 0, (int) M_JAL_A
, INSN_MACRO
, 0, I1
},
582 /* This form of jal is used by the disassembler and internally by the
583 assembler, but will never match user input (because the line above
584 will match first). */
585 {"jal", "a", 0xf4000000, 0xfc000000, UBD
|WR_31
, BD32
, I1
},
586 {"jals", "d,s", 0, (int) M_JALS_2
, INSN_MACRO
, 0, I1
},
587 {"jals", "s", 0, (int) M_JALS_1
, INSN_MACRO
, 0, I1
},
588 {"jals", "a", 0, (int) M_JALS_A
, INSN_MACRO
, 0, I1
},
589 {"jals", "a", 0x74000000, 0xfc000000, UBD
|WR_31
, BD16
, I1
},
590 {"jalx", "a", 0xf0000000, 0xfc000000, UBD
|WR_31
, BD32
, I1
},
591 {"la", "t,A(b)", 0, (int) M_LA_AB
, INSN_MACRO
, 0, I1
},
592 {"lb", "t,o(b)", 0x1c000000, 0xfc000000, RD_b
|WR_t
, 0, I1
},
593 {"lb", "t,A(b)", 0, (int) M_LB_AB
, INSN_MACRO
, 0, I1
},
594 {"lbu", "md,mG(ml)", 0x0800, 0xfc00, 0, WR_md
|RD_ml
, I1
},
595 {"lbu", "t,o(b)", 0x14000000, 0xfc000000, RD_b
|WR_t
, 0, I1
},
596 {"lbu", "t,A(b)", 0, (int) M_LBU_AB
, INSN_MACRO
, 0, I1
},
597 {"lca", "t,A(b)", 0, (int) M_LCA_AB
, INSN_MACRO
, 0, I1
},
598 /* The macro has to be first to handle o32 correctly. */
599 {"ld", "t,o(b)", 0, (int) M_LD_OB
, INSN_MACRO
, 0, I1
},
600 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, RD_b
|WR_t
, 0, I3
},
601 {"ld", "t,A(b)", 0, (int) M_LD_AB
, INSN_MACRO
, 0, I1
},
602 {"ldc1", "T,o(b)", 0xbc000000, 0xfc000000, RD_b
|WR_T
|FP_D
, 0, I1
},
603 {"ldc1", "E,o(b)", 0xbc000000, 0xfc000000, RD_b
|WR_T
|FP_D
, 0, I1
},
604 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
605 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
606 {"ldc2", "E,~(b)", 0x20002000, 0xfc00f000, RD_b
|WR_CC
, 0, I1
},
607 {"ldc2", "E,o(b)", 0, (int) M_LDC2_OB
, INSN_MACRO
, 0, I1
},
608 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB
, INSN_MACRO
, 0, I1
},
609 {"l.d", "T,o(b)", 0xbc000000, 0xfc000000, RD_b
|WR_T
|FP_D
, 0, I1
}, /* ldc1 */
610 {"l.d", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
611 {"ldl", "t,~(b)", 0x60004000, 0xfc00f000, WR_t
|RD_b
, 0, I3
},
612 {"ldl", "t,o(b)", 0, (int) M_LDL_OB
, INSN_MACRO
, 0, I3
},
613 {"ldl", "t,A(b)", 0, (int) M_LDL_AB
, INSN_MACRO
, 0, I3
},
614 {"ldm", "n,~(b)", 0x20007000, 0xfc00f000, RD_b
, 0, I3
},
615 {"ldm", "n,o(b)", 0, (int) M_LDM_OB
, INSN_MACRO
, 0, I3
},
616 {"ldm", "n,A(b)", 0, (int) M_LDM_AB
, INSN_MACRO
, 0, I3
},
617 {"ldp", "t,~(b)", 0x20004000, 0xfc00f000, RD_b
|WR_t
, 0, I3
},
618 {"ldp", "t,o(b)", 0, (int) M_LDP_OB
, INSN_MACRO
, 0, I3
},
619 {"ldp", "t,A(b)", 0, (int) M_LDP_AB
, INSN_MACRO
, 0, I3
},
620 {"ldr", "t,~(b)", 0x60005000, 0xfc00f000, WR_t
|RD_b
, 0, I3
},
621 {"ldr", "t,o(b)", 0, (int) M_LDR_OB
, INSN_MACRO
, 0, I3
},
622 {"ldr", "t,A(b)", 0, (int) M_LDR_AB
, INSN_MACRO
, 0, I3
},
623 {"ldxc1", "D,t(b)", 0x540000c8, 0xfc0007ff, WR_D
|RD_t
|RD_b
|FP_D
, 0, I1
},
624 {"lh", "t,o(b)", 0x3c000000, 0xfc000000, RD_b
|WR_t
, 0, I1
},
625 {"lh", "t,A(b)", 0, (int) M_LH_AB
, INSN_MACRO
, 0, I1
},
626 {"lhu", "md,mH(ml)", 0x2800, 0xfc00, 0, WR_md
|RD_ml
, I1
},
627 {"lhu", "t,o(b)", 0x34000000, 0xfc000000, RD_b
|WR_t
, 0, I1
},
628 {"lhu", "t,A(b)", 0, (int) M_LHU_AB
, INSN_MACRO
, 0, I1
},
629 /* li is at the start of the table. */
630 {"li.d", "t,F", 0, (int) M_LI_D
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
631 {"li.d", "T,L", 0, (int) M_LI_DD
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
632 {"li.s", "t,f", 0, (int) M_LI_S
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
633 {"li.s", "T,l", 0, (int) M_LI_SS
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
634 {"ll", "t,~(b)", 0x60003000, 0xfc00f000, RD_b
|WR_t
, 0, I1
},
635 {"ll", "t,o(b)", 0, (int) M_LL_OB
, INSN_MACRO
, 0, I1
},
636 {"ll", "t,A(b)", 0, (int) M_LL_AB
, INSN_MACRO
, 0, I1
},
637 {"lld", "t,~(b)", 0x60007000, 0xfc00f000, RD_b
|WR_t
, 0, I3
},
638 {"lld", "t,o(b)", 0, (int) M_LLD_OB
, INSN_MACRO
, 0, I3
},
639 {"lld", "t,A(b)", 0, (int) M_LLD_AB
, INSN_MACRO
, 0, I3
},
640 {"lui", "s,u", 0x41a00000, 0xffe00000, WR_s
, 0, I1
},
641 {"luxc1", "D,t(b)", 0x54000148, 0xfc0007ff, WR_D
|RD_t
|RD_b
|FP_D
, 0, I1
},
642 {"lw", "md,mJ(ml)", 0x6800, 0xfc00, 0, WR_md
|RD_ml
, I1
},
643 {"lw", "mp,mU(ms)", 0x4800, 0xfc00, 0, WR_mp
|RD_sp
, I1
}, /* lwsp */
644 {"lw", "md,mA(ma)", 0x6400, 0xfc00, 0, WR_md
|RD_gp
, I1
}, /* lwgp */
645 {"lw", "t,o(b)", 0xfc000000, 0xfc000000, RD_b
|WR_t
, 0, I1
},
646 {"lw", "t,A(b)", 0, (int) M_LW_AB
, INSN_MACRO
, 0, I1
},
647 {"lwc1", "T,o(b)", 0x9c000000, 0xfc000000, RD_b
|WR_T
|FP_S
, 0, I1
},
648 {"lwc1", "E,o(b)", 0x9c000000, 0xfc000000, RD_b
|WR_T
|FP_S
, 0, I1
},
649 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
650 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
651 {"lwc2", "E,~(b)", 0x20000000, 0xfc00f000, RD_b
|WR_CC
, 0, I1
},
652 {"lwc2", "E,o(b)", 0, (int) M_LWC2_OB
, INSN_MACRO
, 0, I1
},
653 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB
, INSN_MACRO
, 0, I1
},
654 {"l.s", "T,o(b)", 0x9c000000, 0xfc000000, RD_b
|WR_T
|FP_S
, 0, I1
}, /* lwc1 */
655 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
656 {"lwl", "t,~(b)", 0x60000000, 0xfc00f000, RD_b
|WR_t
, 0, I1
},
657 {"lwl", "t,o(b)", 0, (int) M_LWL_OB
, INSN_MACRO
, 0, I1
},
658 {"lwl", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I1
},
659 {"lcache", "t,~(b)", 0x60000000, 0xfc00f000, RD_b
|WR_t
, 0, I1
}, /* same */
660 {"lcache", "t,o(b)", 0, (int) M_LWL_OB
, INSN_MACRO
, 0, I1
},
661 {"lcache", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I1
},
662 {"lwm", "mN,mJ(ms)", 0x4500, 0xffc0, NODS
, RD_sp
, I1
},
663 {"lwm", "n,~(b)", 0x20005000, 0xfc00f000, RD_b
|NODS
, 0, I1
},
664 {"lwm", "n,o(b)", 0, (int) M_LWM_OB
, INSN_MACRO
, 0, I1
},
665 {"lwm", "n,A(b)", 0, (int) M_LWM_AB
, INSN_MACRO
, 0, I1
},
666 {"lwp", "t,~(b)", 0x20001000, 0xfc00f000, RD_b
|WR_t
|NODS
, 0, I1
},
667 {"lwp", "t,o(b)", 0, (int) M_LWP_OB
, INSN_MACRO
, 0, I1
},
668 {"lwp", "t,A(b)", 0, (int) M_LWP_AB
, INSN_MACRO
, 0, I1
},
669 {"lwr", "t,~(b)", 0x60001000, 0xfc00f000, RD_b
|WR_t
, 0, I1
},
670 {"lwr", "t,o(b)", 0, (int) M_LWR_OB
, INSN_MACRO
, 0, I1
},
671 {"lwr", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I1
},
672 {"lwu", "t,~(b)", 0x6000e000, 0xfc00f000, RD_b
|WR_t
, 0, I3
},
673 {"lwu", "t,o(b)", 0, (int) M_LWU_OB
, INSN_MACRO
, 0, I3
},
674 {"lwu", "t,A(b)", 0, (int) M_LWU_AB
, INSN_MACRO
, 0, I3
},
675 {"lwxc1", "D,t(b)", 0x54000048, 0xfc0007ff, WR_D
|RD_t
|RD_b
|FP_S
, 0, I1
},
676 {"flush", "t,~(b)", 0x60001000, 0xfc00f000, RD_b
|WR_t
, 0, I1
}, /* same */
677 {"flush", "t,o(b)", 0, (int) M_LWR_OB
, INSN_MACRO
, 0, I1
},
678 {"flush", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I1
},
679 {"lwxs", "d,t(b)", 0x00000118, 0xfc0007ff, RD_b
|RD_t
|WR_d
, 0, I1
},
680 {"madd", "s,t", 0x0000cb3c, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I1
},
681 {"madd", "7,s,t", 0x00000abc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
682 {"madd.d", "D,R,S,T", 0x54000009, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
683 {"madd.s", "D,R,S,T", 0x54000001, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I1
},
684 {"madd.ps", "D,R,S,T", 0x54000011, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
685 {"maddu", "s,t", 0x0000db3c, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I1
},
686 {"maddu", "7,s,t", 0x00001abc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
687 {"mfc0", "t,G", 0x000000fc, 0xfc00ffff, WR_t
|RD_C0
, 0, I1
},
688 {"mfc0", "t,G,H", 0x000000fc, 0xfc00c7ff, WR_t
|RD_C0
, 0, I1
},
689 {"mfc1", "t,S", 0x5400203b, 0xfc00ffff, WR_t
|RD_S
|FP_S
, 0, I1
},
690 {"mfc1", "t,G", 0x5400203b, 0xfc00ffff, WR_t
|RD_S
|FP_S
, 0, I1
},
691 {"mfc2", "t,G", 0x00004d3c, 0xfc00ffff, WR_t
|RD_C2
, 0, I1
},
692 {"mfgc0", "t,G", 0x000004fc, 0xfc00ffff, WR_t
|RD_C0
, 0, 0, IVIRT
},
693 {"mfgc0", "t,G,H", 0x000004fc, 0xfc00c7ff, WR_t
|RD_C0
, 0, 0, IVIRT
},
694 {"mfhc1", "t,S", 0x5400303b, 0xfc00ffff, WR_t
|RD_S
|FP_D
, 0, I1
},
695 {"mfhc1", "t,G", 0x5400303b, 0xfc00ffff, WR_t
|RD_S
|FP_D
, 0, I1
},
696 {"mfhc2", "t,G", 0x00008d3c, 0xfc00ffff, WR_t
|RD_C2
, 0, I1
},
697 {"mfhi", "mj", 0x4600, 0xffe0, RD_HI
, WR_mj
, I1
},
698 {"mfhi", "s", 0x00000d7c, 0xffe0ffff, WR_s
|RD_HI
, 0, I1
},
699 {"mfhi", "s,7", 0x0000007c, 0xffe03fff, WR_s
|RD_HI
, 0, 0, D32
},
700 {"mflo", "mj", 0x4640, 0xffe0, RD_LO
, WR_mj
, I1
},
701 {"mflo", "s", 0x00001d7c, 0xffe0ffff, WR_s
|RD_LO
, 0, I1
},
702 {"mflo", "s,7", 0x0000107c, 0xffe03fff, WR_s
|RD_LO
, 0, 0, D32
},
703 {"mov.d", "T,S", 0x5400207b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
704 {"mov.s", "T,S", 0x5400007b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
705 {"mov.ps", "T,S", 0x5400407b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
706 {"movep", "mh,mi,mm,mn", 0x8400, 0xfc01, NODS
, WR_mhi
|RD_mmn
, I1
},
707 /* This macro is after the real instruction so that it only matches with
709 {"movep", "mh,mi,mm,mn", 0, (int) M_MOVEP
, INSN_MACRO
, 0, I1
},
710 {"movf", "t,s,M", 0x5400017b, 0xfc001fff, WR_t
|RD_s
|RD_CC
|FP_S
|FP_D
, 0, I1
},
711 {"movf.d", "T,S,M", 0x54000220, 0xfc001fff, WR_T
|RD_S
|RD_CC
|FP_D
, 0, I1
},
712 {"movf.s", "T,S,M", 0x54000020, 0xfc001fff, WR_T
|RD_S
|RD_CC
|FP_S
, 0, I1
},
713 {"movf.ps", "T,S,M", 0x54000420, 0xfc001fff, WR_T
|RD_S
|RD_CC
|FP_D
, 0, I1
},
714 {"movn", "d,v,t", 0x00000018, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
715 {"movn.d", "D,S,t", 0x54000138, 0xfc0007ff, WR_D
|RD_S
|RD_t
|FP_D
, 0, I1
},
716 {"movn.s", "D,S,t", 0x54000038, 0xfc0007ff, WR_D
|RD_S
|RD_t
|FP_S
, 0, I1
},
717 {"movn.ps", "D,S,t", 0x54000238, 0xfc0007ff, WR_D
|RD_S
|RD_t
|FP_D
, 0, I1
},
718 {"movt", "t,s,M", 0x5400097b, 0xfc001fff, WR_t
|RD_s
|RD_CC
|FP_S
|FP_D
, 0, I1
},
719 {"movt.d", "T,S,M", 0x54000260, 0xfc001fff, WR_T
|RD_S
|RD_CC
|FP_D
, 0, I1
},
720 {"movt.s", "T,S,M", 0x54000060, 0xfc001fff, WR_T
|RD_S
|RD_CC
|FP_S
, 0, I1
},
721 {"movt.ps", "T,S,M", 0x54000460, 0xfc001fff, WR_T
|RD_S
|RD_CC
|FP_D
, 0, I1
},
722 {"movz", "d,v,t", 0x00000058, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
723 {"movz.d", "D,S,t", 0x54000178, 0xfc0007ff, WR_D
|RD_S
|RD_t
|FP_D
, 0, I1
},
724 {"movz.s", "D,S,t", 0x54000078, 0xfc0007ff, WR_D
|RD_S
|RD_t
|FP_S
, 0, I1
},
725 {"movz.ps", "D,S,t", 0x54000278, 0xfc0007ff, WR_D
|RD_S
|RD_t
|FP_D
, 0, I1
},
726 {"msub", "s,t", 0x0000eb3c, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I1
},
727 {"msub", "7,s,t", 0x00002abc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
728 {"msub.d", "D,R,S,T", 0x54000029, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
729 {"msub.s", "D,R,S,T", 0x54000021, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I1
},
730 {"msub.ps", "D,R,S,T", 0x54000031, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
731 {"msubu", "s,t", 0x0000fb3c, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I1
},
732 {"msubu", "7,s,t", 0x00003abc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
733 {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_t
|WR_C0
|WR_CC
, 0, I1
},
734 {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_t
|WR_C0
|WR_CC
, 0, I1
},
735 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_t
|WR_S
|FP_S
, 0, I1
},
736 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_t
|WR_S
|FP_S
, 0, I1
},
737 {"mtc2", "t,G", 0x00005d3c, 0xfc00ffff, RD_t
|WR_C2
|WR_CC
, 0, I1
},
738 {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_t
|WR_C0
|WR_CC
, 0, 0, IVIRT
},
739 {"mtgc0", "t,G,H", 0x000006fc, 0xfc00c7ff, RD_t
|WR_C0
|WR_CC
, 0, 0, IVIRT
},
740 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_t
|WR_S
|FP_D
, 0, I1
},
741 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_t
|WR_S
|FP_D
, 0, I1
},
742 {"mthc2", "t,G", 0x00009d3c, 0xfc00ffff, RD_t
|WR_C2
|WR_CC
, 0, I1
},
743 {"mthi", "s", 0x00002d7c, 0xffe0ffff, RD_s
|WR_HI
, 0, I1
},
744 {"mthi", "s,7", 0x0000207c, 0xffe03fff, RD_s
|WR_HI
, 0, 0, D32
},
745 {"mtlo", "s", 0x00003d7c, 0xffe0ffff, RD_s
|WR_LO
, 0, I1
},
746 {"mtlo", "s,7", 0x0000307c, 0xffe03fff, RD_s
|WR_LO
, 0, 0, D32
},
747 {"mul", "d,v,t", 0x00000210, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, I1
},
748 {"mul", "d,v,I", 0, (int) M_MUL_I
, INSN_MACRO
, 0, I1
},
749 {"mul.d", "D,V,T", 0x540001b0, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
750 {"mul.s", "D,V,T", 0x540000b0, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
751 {"mul.ps", "D,V,T", 0x540002b0, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
752 {"mulo", "d,v,t", 0, (int) M_MULO
, INSN_MACRO
, 0, I1
},
753 {"mulo", "d,v,I", 0, (int) M_MULO_I
, INSN_MACRO
, 0, I1
},
754 {"mulou", "d,v,t", 0, (int) M_MULOU
, INSN_MACRO
, 0, I1
},
755 {"mulou", "d,v,I", 0, (int) M_MULOU_I
, INSN_MACRO
, 0, I1
},
756 {"mult", "s,t", 0x00008b3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
757 {"mult", "7,s,t", 0x00000cbc, 0xfc003fff, WR_a
|RD_s
|RD_t
, 0, 0, D32
},
758 {"multu", "s,t", 0x00009b3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
759 {"multu", "7,s,t", 0x00001cbc, 0xfc003fff, WR_a
|RD_s
|RD_t
, 0, 0, D32
},
760 {"neg", "d,w", 0x00000190, 0xfc1f07ff, WR_d
|RD_t
, 0, I1
}, /* sub 0 */
761 {"negu", "d,w", 0x000001d0, 0xfc1f07ff, WR_d
|RD_t
, 0, I1
}, /* subu 0 */
762 {"neg.d", "T,V", 0x54002b7b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
763 {"neg.s", "T,V", 0x54000b7b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
764 {"neg.ps", "T,V", 0x54004b7b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
765 {"nmadd.d", "D,R,S,T", 0x5400000a, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
766 {"nmadd.s", "D,R,S,T", 0x54000002, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I1
},
767 {"nmadd.ps", "D,R,S,T", 0x54000012, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
768 {"nmsub.d", "D,R,S,T", 0x5400002a, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
769 {"nmsub.s", "D,R,S,T", 0x54000022, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I1
},
770 {"nmsub.ps", "D,R,S,T", 0x54000032, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I1
},
771 /* nop is at the start of the table. */
772 {"not", "mf,mg", 0x4400, 0xffc0, 0, WR_mf
|RD_mg
, I1
}, /* put not before nor */
773 {"not", "d,v", 0x000002d0, 0xffe007ff, WR_d
|RD_s
|RD_t
, 0, I1
}, /* nor d,s,0 */
774 {"nor", "mf,mz,mg", 0x4400, 0xffc0, 0, WR_mf
|RD_mg
, I1
}, /* not */
775 {"nor", "mf,mg,mz", 0x4400, 0xffc0, 0, WR_mf
|RD_mg
, I1
}, /* not */
776 {"nor", "d,v,t", 0x000002d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
777 {"nor", "t,r,I", 0, (int) M_NOR_I
, INSN_MACRO
, 0, I1
},
778 {"or", "mp,mj,mz", 0x0c00, 0xfc00, 0, WR_mp
|RD_mj
, I1
}, /* move */
779 {"or", "mp,mz,mj", 0x0c00, 0xfc00, 0, WR_mp
|RD_mj
, I1
}, /* move */
780 {"or", "mf,mt,mg", 0x44c0, 0xffc0, 0, WR_mf
|RD_mf
|RD_mg
, I1
},
781 {"or", "mf,mg,mx", 0x44c0, 0xffc0, 0, WR_mf
|RD_mf
|RD_mg
, I1
},
782 {"or", "d,v,t", 0x00000290, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
783 {"or", "t,r,I", 0, (int) M_OR_I
, INSN_MACRO
, 0, I1
},
784 {"ori", "mp,mj,mZ", 0x0c00, 0xfc00, 0, WR_mp
|RD_mj
, I1
}, /* move */
785 {"ori", "t,r,i", 0x50000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
786 {"pll.ps", "D,V,T", 0x54000080, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
787 {"plu.ps", "D,V,T", 0x540000c0, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
788 {"pul.ps", "D,V,T", 0x54000100, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
789 {"puu.ps", "D,V,T", 0x54000140, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
790 /* pref is at the start of the table. */
791 {"recip.d", "T,S", 0x5400523b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
792 {"recip.s", "T,S", 0x5400123b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
793 {"rem", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
794 {"rem", "d,v,t", 0, (int) M_REM_3
, INSN_MACRO
, 0, I1
},
795 {"rem", "d,v,I", 0, (int) M_REM_3I
, INSN_MACRO
, 0, I1
},
796 {"remu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
797 {"remu", "d,v,t", 0, (int) M_REMU_3
, INSN_MACRO
, 0, I1
},
798 {"remu", "d,v,I", 0, (int) M_REMU_3I
, INSN_MACRO
, 0, I1
},
799 {"rdhwr", "t,K", 0x00006b3c, 0xfc00ffff, 0, WR_t
, I1
},
800 {"rdpgpr", "t,r", 0x0000e17c, 0xfc00ffff, WR_t
, 0, I1
},
801 {"rol", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I1
},
802 {"rol", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I1
},
803 {"ror", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I1
},
804 {"ror", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I1
},
805 {"ror", "t,r,<", 0x000000c0, 0xfc0007ff, WR_t
|RD_s
, 0, I1
},
806 {"rorv", "d,t,s", 0x000000d0, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I1
},
807 {"rotl", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I1
},
808 {"rotl", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I1
},
809 {"rotr", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I1
},
810 {"rotr", "t,r,<", 0x000000c0, 0xfc0007ff, WR_t
|RD_s
, 0, I1
},
811 {"rotrv", "d,t,s", 0x000000d0, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I1
},
812 {"round.l.d", "T,S", 0x5400733b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
813 {"round.l.s", "T,S", 0x5400333b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
814 {"round.w.d", "T,S", 0x54007b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
815 {"round.w.s", "T,S", 0x54003b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
816 {"rsqrt.d", "T,S", 0x5400423b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
817 {"rsqrt.s", "T,S", 0x5400023b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
818 {"sb", "mq,mL(ml)", 0x8800, 0xfc00, SM
, RD_mq
|RD_ml
, I1
},
819 {"sb", "t,o(b)", 0x18000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
820 {"sb", "t,A(b)", 0, (int) M_SB_AB
, INSN_MACRO
, 0, I1
},
821 {"sc", "t,~(b)", 0x6000b000, 0xfc00f000, SM
|RD_t
|WR_t
|RD_b
, 0, I1
},
822 {"sc", "t,o(b)", 0, (int) M_SC_OB
, INSN_MACRO
, 0, I1
},
823 {"sc", "t,A(b)", 0, (int) M_SC_AB
, INSN_MACRO
, 0, I1
},
824 {"scd", "t,~(b)", 0x6000f000, 0xfc00f000, SM
|RD_t
|WR_t
|RD_b
, 0, I3
},
825 {"scd", "t,o(b)", 0, (int) M_SCD_OB
, INSN_MACRO
, 0, I3
},
826 {"scd", "t,A(b)", 0, (int) M_SCD_AB
, INSN_MACRO
, 0, I3
},
827 /* The macro has to be first to handle o32 correctly. */
828 {"sd", "t,o(b)", 0, (int) M_SD_OB
, INSN_MACRO
, 0, I1
},
829 {"sd", "t,o(b)", 0xd8000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I3
},
830 {"sd", "t,A(b)", 0, (int) M_SD_AB
, INSN_MACRO
, 0, I1
},
831 {"sdbbp", "", 0x46c0, 0xffff, TRAP
, 0, I1
},
832 {"sdbbp", "", 0x0000db7c, 0xffffffff, TRAP
, 0, I1
},
833 {"sdbbp", "mO", 0x46c0, 0xfff0, TRAP
, 0, I1
},
834 {"sdbbp", "B", 0x0000db7c, 0xfc00ffff, TRAP
, 0, I1
},
835 {"sdc1", "T,o(b)", 0xb8000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I1
},
836 {"sdc1", "E,o(b)", 0xb8000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I1
},
837 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
838 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
839 {"sdc2", "E,~(b)", 0x2000a000, 0xfc00f000, SM
|RD_C2
|RD_b
, 0, I1
},
840 {"sdc2", "E,o(b)", 0, (int) M_SDC2_OB
, INSN_MACRO
, 0, I1
},
841 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB
, INSN_MACRO
, 0, I1
},
842 {"s.d", "T,o(b)", 0xb8000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I1
}, /* sdc1 */
843 {"s.d", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
844 {"sdl", "t,~(b)", 0x6000c000, 0xfc00f000, SM
|RD_t
|RD_b
, 0, I3
},
845 {"sdl", "t,o(b)", 0, (int) M_SDL_OB
, INSN_MACRO
, 0, I3
},
846 {"sdl", "t,A(b)", 0, (int) M_SDL_AB
, INSN_MACRO
, 0, I3
},
847 {"sdm", "n,~(b)", 0x2000f000, 0xfc00f000, SM
|RD_b
, 0, I3
},
848 {"sdm", "n,o(b)", 0, (int) M_SDM_OB
, INSN_MACRO
, 0, I3
},
849 {"sdm", "n,A(b)", 0, (int) M_SDM_AB
, INSN_MACRO
, 0, I3
},
850 {"sdp", "t,~(b)", 0x2000c000, 0xfc00f000, SM
|RD_t
|RD_b
, 0, I3
},
851 {"sdp", "t,o(b)", 0, (int) M_SDP_OB
, INSN_MACRO
, 0, I3
},
852 {"sdp", "t,A(b)", 0, (int) M_SDP_AB
, INSN_MACRO
, 0, I3
},
853 {"sdr", "t,~(b)", 0x6000d000, 0xfc00f000, SM
|RD_t
|RD_b
, 0, I3
},
854 {"sdr", "t,o(b)", 0, (int) M_SDR_OB
, INSN_MACRO
, 0, I3
},
855 {"sdr", "t,A(b)", 0, (int) M_SDR_AB
, INSN_MACRO
, 0, I3
},
856 {"sdxc1", "D,t(b)", 0x54000108, 0xfc0007ff, SM
|RD_t
|RD_b
|FP_D
, RD_D
, I1
},
857 {"seb", "t,r", 0x00002b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I1
},
858 {"seh", "t,r", 0x00003b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I1
},
859 {"seq", "d,v,t", 0, (int) M_SEQ
, INSN_MACRO
, 0, I1
},
860 {"seq", "d,v,I", 0, (int) M_SEQ_I
, INSN_MACRO
, 0, I1
},
861 {"sge", "d,v,t", 0, (int) M_SGE
, INSN_MACRO
, 0, I1
},
862 {"sge", "d,v,I", 0, (int) M_SGE_I
, INSN_MACRO
, 0, I1
},
863 {"sgeu", "d,v,t", 0, (int) M_SGEU
, INSN_MACRO
, 0, I1
},
864 {"sgeu", "d,v,I", 0, (int) M_SGEU_I
, INSN_MACRO
, 0, I1
},
865 {"sgt", "d,v,t", 0, (int) M_SGT
, INSN_MACRO
, 0, I1
},
866 {"sgt", "d,v,I", 0, (int) M_SGT_I
, INSN_MACRO
, 0, I1
},
867 {"sgtu", "d,v,t", 0, (int) M_SGTU
, INSN_MACRO
, 0, I1
},
868 {"sgtu", "d,v,I", 0, (int) M_SGTU_I
, INSN_MACRO
, 0, I1
},
869 {"sh", "mq,mH(ml)", 0xa800, 0xfc00, SM
, RD_mq
|RD_ml
, I1
},
870 {"sh", "t,o(b)", 0x38000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
871 {"sh", "t,A(b)", 0, (int) M_SH_AB
, INSN_MACRO
, 0, I1
},
872 {"sle", "d,v,t", 0, (int) M_SLE
, INSN_MACRO
, 0, I1
},
873 {"sle", "d,v,I", 0, (int) M_SLE_I
, INSN_MACRO
, 0, I1
},
874 {"sleu", "d,v,t", 0, (int) M_SLEU
, INSN_MACRO
, 0, I1
},
875 {"sleu", "d,v,I", 0, (int) M_SLEU_I
, INSN_MACRO
, 0, I1
},
876 {"sllv", "d,t,s", 0x00000010, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
877 {"sll", "md,mc,mM", 0x2400, 0xfc01, 0, WR_md
|RD_mc
, I1
},
878 {"sll", "d,w,s", 0x00000010, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
}, /* sllv */
879 {"sll", "t,r,<", 0x00000000, 0xfc0007ff, WR_t
|RD_s
, 0, I1
},
880 {"slt", "d,v,t", 0x00000350, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
881 {"slt", "d,v,I", 0, (int) M_SLT_I
, INSN_MACRO
, 0, I1
},
882 {"slti", "t,r,j", 0x90000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
883 {"sltiu", "t,r,j", 0xb0000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
884 {"sltu", "d,v,t", 0x00000390, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
885 {"sltu", "d,v,I", 0, (int) M_SLTU_I
, INSN_MACRO
, 0, I1
},
886 {"sne", "d,v,t", 0, (int) M_SNE
, INSN_MACRO
, 0, I1
},
887 {"sne", "d,v,I", 0, (int) M_SNE_I
, INSN_MACRO
, 0, I1
},
888 {"sqrt.d", "T,S", 0x54004a3b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
889 {"sqrt.s", "T,S", 0x54000a3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
890 {"srav", "d,t,s", 0x00000090, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
891 {"sra", "d,w,s", 0x00000090, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* srav */
892 {"sra", "t,r,<", 0x00000080, 0xfc0007ff, WR_t
|RD_s
, 0, I1
},
893 {"srlv", "d,t,s", 0x00000050, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
894 {"srl", "md,mc,mM", 0x2401, 0xfc01, 0, WR_md
|RD_mc
, I1
},
895 {"srl", "d,w,s", 0x00000050, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* srlv */
896 {"srl", "t,r,<", 0x00000040, 0xfc0007ff, WR_t
|RD_s
, 0, I1
},
897 /* ssnop is at the start of the table. */
898 {"sub", "d,v,t", 0x00000190, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
899 {"sub", "d,v,I", 0, (int) M_SUB_I
, INSN_MACRO
, 0, I1
},
900 {"sub.d", "D,V,T", 0x54000170, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
901 {"sub.s", "D,V,T", 0x54000070, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
902 {"sub.ps", "D,V,T", 0x54000270, 0xfc0007ff, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
903 {"subu", "md,me,ml", 0x0401, 0xfc01, 0, WR_md
|RD_me
|RD_ml
, I1
},
904 {"subu", "d,v,t", 0x000001d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
905 {"subu", "d,v,I", 0, (int) M_SUBU_I
, INSN_MACRO
, 0, I1
},
906 {"suxc1", "D,t(b)", 0x54000188, 0xfc0007ff, SM
|RD_t
|RD_b
|FP_D
, RD_D
, I1
},
907 {"sw", "mq,mJ(ml)", 0xe800, 0xfc00, SM
, RD_mq
|RD_ml
, I1
},
908 {"sw", "mp,mU(ms)", 0xc800, 0xfc00, SM
, RD_mp
|RD_sp
, I1
}, /* swsp */
909 {"sw", "t,o(b)", 0xf8000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
910 {"sw", "t,A(b)", 0, (int) M_SW_AB
, INSN_MACRO
, 0, I1
},
911 {"swc1", "T,o(b)", 0x98000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
},
912 {"swc1", "E,o(b)", 0x98000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
},
913 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
914 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
915 {"swc2", "E,~(b)", 0x20008000, 0xfc00f000, SM
|RD_C2
|RD_b
, 0, I1
},
916 {"swc2", "E,o(b)", 0, (int) M_SWC2_OB
, INSN_MACRO
, 0, I1
},
917 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB
, INSN_MACRO
, 0, I1
},
918 {"s.s", "T,o(b)", 0x98000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
}, /* swc1 */
919 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
920 {"swl", "t,~(b)", 0x60008000, 0xfc00f000, SM
|RD_t
|RD_b
, 0, I1
},
921 {"swl", "t,o(b)", 0, (int) M_SWL_OB
, INSN_MACRO
, 0, I1
},
922 {"swl", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I1
},
923 {"scache", "t,~(b)", 0x60008000, 0xfc00f000, SM
|RD_t
|RD_b
, 0, I1
}, /* same */
924 {"scache", "t,o(b)", 0, (int) M_SWL_OB
, INSN_MACRO
, 0, I1
},
925 {"scache", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I1
},
926 {"swm", "mN,mJ(ms)", 0x4540, 0xffc0, NODS
, RD_sp
, I1
},
927 {"swm", "n,~(b)", 0x2000d000, 0xfc00f000, SM
|RD_b
|NODS
, 0, I1
},
928 {"swm", "n,o(b)", 0, (int) M_SWM_OB
, INSN_MACRO
, 0, I1
},
929 {"swm", "n,A(b)", 0, (int) M_SWM_AB
, INSN_MACRO
, 0, I1
},
930 {"swp", "t,~(b)", 0x20009000, 0xfc00f000, SM
|RD_t
|RD_b
|NODS
, 0, I1
},
931 {"swp", "t,o(b)", 0, (int) M_SWP_OB
, INSN_MACRO
, 0, I1
},
932 {"swp", "t,A(b)", 0, (int) M_SWP_AB
, INSN_MACRO
, 0, I1
},
933 {"swr", "t,~(b)", 0x60009000, 0xfc00f000, SM
|RD_b
|RD_t
, 0, I1
},
934 {"swr", "t,o(b)", 0, (int) M_SWR_OB
, INSN_MACRO
, 0, I1
},
935 {"swr", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, 0, I1
},
936 {"invalidate", "t,~(b)",0x60009000, 0xfc00f000, SM
|RD_b
|RD_t
, 0, I1
}, /* same */
937 {"invalidate", "t,o(b)",0, (int) M_SWR_OB
, INSN_MACRO
, 0, I1
},
938 {"invalidate", "t,A(b)",0, (int) M_SWR_AB
, INSN_MACRO
, 0, I1
},
939 {"swxc1", "D,t(b)", 0x54000088, 0xfc0007ff, SM
|RD_t
|RD_b
|FP_S
, RD_D
, I1
},
940 {"sync_acquire", "", 0x00116b7c, 0xffffffff, NODS
, 0, I1
},
941 {"sync_mb", "", 0x00106b7c, 0xffffffff, NODS
, 0, I1
},
942 {"sync_release", "", 0x00126b7c, 0xffffffff, NODS
, 0, I1
},
943 {"sync_rmb", "", 0x00136b7c, 0xffffffff, NODS
, 0, I1
},
944 {"sync_wmb", "", 0x00046b7c, 0xffffffff, NODS
, 0, I1
},
945 {"sync", "", 0x00006b7c, 0xffffffff, NODS
, 0, I1
},
946 {"sync", "1", 0x00006b7c, 0xffe0ffff, NODS
, 0, I1
},
947 {"synci", "o(b)", 0x42000000, 0xffe00000, SM
|RD_b
, 0, I1
},
948 {"syscall", "", 0x00008b7c, 0xffffffff, TRAP
, 0, I1
},
949 {"syscall", "B", 0x00008b7c, 0xfc00ffff, TRAP
, 0, I1
},
950 {"teqi", "s,j", 0x41c00000, 0xffe00000, RD_s
|TRAP
, 0, I1
},
951 {"teq", "s,t", 0x0000003c, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I1
},
952 {"teq", "s,t,|", 0x0000003c, 0xfc000fff, RD_s
|RD_t
|TRAP
, 0, I1
},
953 {"teq", "s,j", 0x41c00000, 0xffe00000, RD_s
|TRAP
, 0, I1
}, /* teqi */
954 {"teq", "s,I", 0, (int) M_TEQ_I
, INSN_MACRO
, 0, I1
},
955 {"tgei", "s,j", 0x41200000, 0xffe00000, RD_s
|TRAP
, 0, I1
},
956 {"tge", "s,t", 0x0000023c, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I1
},
957 {"tge", "s,t,|", 0x0000023c, 0xfc000fff, RD_s
|RD_t
|TRAP
, 0, I1
},
958 {"tge", "s,j", 0x41200000, 0xffe00000, RD_s
|TRAP
, 0, I1
}, /* tgei */
959 {"tge", "s,I", 0, (int) M_TGE_I
, INSN_MACRO
, 0, I1
},
960 {"tgeiu", "s,j", 0x41600000, 0xffe00000, RD_s
|TRAP
, 0, I1
},
961 {"tgeu", "s,t", 0x0000043c, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I1
},
962 {"tgeu", "s,t,|", 0x0000043c, 0xfc000fff, RD_s
|RD_t
|TRAP
, 0, I1
},
963 {"tgeu", "s,j", 0x41600000, 0xffe00000, RD_s
|TRAP
, 0, I1
}, /* tgeiu */
964 {"tgeu", "s,I", 0, (int) M_TGEU_I
, INSN_MACRO
, 0, I1
},
965 {"tlbinv", "", 0x0000437c, 0xffffffff, INSN_TLB
, 0, 0, TLBINV
},
966 {"tlbinvf", "", 0x0000537c, 0xffffffff, INSN_TLB
, 0, 0, TLBINV
},
967 {"tlbginv", "", 0x0000417c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
},
968 {"tlbginvf","", 0x0000517c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
},
969 {"tlbgp", "", 0x0000017c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
},
970 {"tlbgr", "", 0x0000117c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
},
971 {"tlbgwi", "", 0x0000217c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
},
972 {"tlbgwr", "", 0x0000317c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
},
973 {"tlbp", "", 0x0000037c, 0xffffffff, INSN_TLB
, 0, I1
},
974 {"tlbr", "", 0x0000137c, 0xffffffff, INSN_TLB
, 0, I1
},
975 {"tlbwi", "", 0x0000237c, 0xffffffff, INSN_TLB
, 0, I1
},
976 {"tlbwr", "", 0x0000337c, 0xffffffff, INSN_TLB
, 0, I1
},
977 {"tlti", "s,j", 0x41000000, 0xffe00000, RD_s
|TRAP
, 0, I1
},
978 {"tlt", "s,t", 0x0000083c, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I1
},
979 {"tlt", "s,t,|", 0x0000083c, 0xfc000fff, RD_s
|RD_t
|TRAP
, 0, I1
},
980 {"tlt", "s,j", 0x41000000, 0xffe00000, RD_s
|TRAP
, 0, I1
}, /* tlti */
981 {"tlt", "s,I", 0, (int) M_TLT_I
, INSN_MACRO
, 0, I1
},
982 {"tltiu", "s,j", 0x41400000, 0xffe00000, RD_s
|TRAP
, 0, I1
},
983 {"tltu", "s,t", 0x00000a3c, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I1
},
984 {"tltu", "s,t,|", 0x00000a3c, 0xfc000fff, RD_s
|RD_t
|TRAP
, 0, I1
},
985 {"tltu", "s,j", 0x41400000, 0xffe00000, RD_s
|TRAP
, 0, I1
}, /* tltiu */
986 {"tltu", "s,I", 0, (int) M_TLTU_I
, INSN_MACRO
, 0, I1
},
987 {"tnei", "s,j", 0x41800000, 0xffe00000, RD_s
|TRAP
, 0, I1
},
988 {"tne", "s,t", 0x00000c3c, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I1
},
989 {"tne", "s,t,|", 0x00000c3c, 0xfc000fff, RD_s
|RD_t
|TRAP
, 0, I1
},
990 {"tne", "s,j", 0x41800000, 0xffe00000, RD_s
|TRAP
, 0, I1
}, /* tnei */
991 {"tne", "s,I", 0, (int) M_TNE_I
, INSN_MACRO
, 0, I1
},
992 {"trunc.l.d", "T,S", 0x5400633b, 0xfc00ffff, WR_T
|RD_S
|FP_D
, 0, I1
},
993 {"trunc.l.s", "T,S", 0x5400233b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
994 {"trunc.w.d", "T,S", 0x54006b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
|FP_D
, 0, I1
},
995 {"trunc.w.s", "T,S", 0x54002b3b, 0xfc00ffff, WR_T
|RD_S
|FP_S
, 0, I1
},
996 {"uld", "t,o(b)", 0, (int) M_ULD
, INSN_MACRO
, 0, I3
},
997 {"uld", "t,A(b)", 0, (int) M_ULD_A
, INSN_MACRO
, 0, I3
},
998 {"ulh", "t,o(b)", 0, (int) M_ULH
, INSN_MACRO
, 0, I1
},
999 {"ulh", "t,A(b)", 0, (int) M_ULH_A
, INSN_MACRO
, 0, I1
},
1000 {"ulhu", "t,o(b)", 0, (int) M_ULHU
, INSN_MACRO
, 0, I1
},
1001 {"ulhu", "t,A(b)", 0, (int) M_ULHU_A
, INSN_MACRO
, 0, I1
},
1002 {"ulw", "t,o(b)", 0, (int) M_ULW
, INSN_MACRO
, 0, I1
},
1003 {"ulw", "t,A(b)", 0, (int) M_ULW_A
, INSN_MACRO
, 0, I1
},
1004 {"usd", "t,o(b)", 0, (int) M_USD
, INSN_MACRO
, 0, I1
},
1005 {"usd", "t,A(b)", 0, (int) M_USD_A
, INSN_MACRO
, 0, I1
},
1006 {"ush", "t,o(b)", 0, (int) M_USH
, INSN_MACRO
, 0, I1
},
1007 {"ush", "t,A(b)", 0, (int) M_USH_A
, INSN_MACRO
, 0, I1
},
1008 {"usw", "t,o(b)", 0, (int) M_USW
, INSN_MACRO
, 0, I1
},
1009 {"usw", "t,A(b)", 0, (int) M_USW_A
, INSN_MACRO
, 0, I1
},
1010 {"wait", "", 0x0000937c, 0xffffffff, NODS
, 0, I1
},
1011 {"wait", "B", 0x0000937c, 0xfc00ffff, NODS
, 0, I1
},
1012 {"wrpgpr", "t,r", 0x0000f17c, 0xfc00ffff, RD_s
, 0, I1
},
1013 {"wsbh", "t,r", 0x00007b3c, 0xfc00ffff, WR_t
|RD_s
, 0, I1
},
1014 {"xor", "mf,mt,mg", 0x4440, 0xffc0, 0, WR_mf
|RD_mf
|RD_mg
, I1
},
1015 {"xor", "mf,mg,mx", 0x4440, 0xffc0, 0, WR_mf
|RD_mf
|RD_mg
, I1
},
1016 {"xor", "d,v,t", 0x00000310, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1017 {"xor", "t,r,I", 0, (int) M_XOR_I
, INSN_MACRO
, 0, I1
},
1018 {"xori", "t,r,i", 0x70000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1019 /* microMIPS Enhanced VA Scheme */
1020 {"lbue", "t,+j(b)", 0x60006000, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1021 {"lbue", "t,o(b)", 0, (int) M_LBUE_OB
, INSN_MACRO
, 0, 0, EVA
},
1022 {"lbue", "t,A(b)", 0, (int) M_LBUE_AB
, INSN_MACRO
, 0, 0, EVA
},
1023 {"lhue", "t,+j(b)", 0x60006200, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1024 {"lhue", "t,o(b)", 0, (int) M_LHUE_OB
, INSN_MACRO
, 0, 0, EVA
},
1025 {"lhue", "t,A(b)", 0, (int) M_LHUE_AB
, INSN_MACRO
, 0, 0, EVA
},
1026 {"lbe", "t,+j(b)", 0x60006800, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1027 {"lbe", "t,o(b)", 0, (int) M_LBE_OB
, INSN_MACRO
, 0, 0, EVA
},
1028 {"lbe", "t,A(b)", 0, (int) M_LBE_AB
, INSN_MACRO
, 0, 0, EVA
},
1029 {"lhe", "t,+j(b)", 0x60006a00, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1030 {"lhe", "t,o(b)", 0, (int) M_LHE_OB
, INSN_MACRO
, 0, 0, EVA
},
1031 {"lhe", "t,A(b)", 0, (int) M_LHE_AB
, INSN_MACRO
, 0, 0, EVA
},
1032 {"lle", "t,+j(b)", 0x60006c00, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1033 {"lle", "t,o(b)", 0, (int) M_LLE_OB
, INSN_MACRO
, 0, 0, EVA
},
1034 {"lle", "t,A(b)", 0, (int) M_LLE_AB
, INSN_MACRO
, 0, 0, EVA
},
1035 {"lwe", "t,+j(b)", 0x60006e00, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1036 {"lwe", "t,o(b)", 0, (int) M_LWE_OB
, INSN_MACRO
, 0, 0, EVA
},
1037 {"lwe", "t,A(b)", 0, (int) M_LWE_AB
, INSN_MACRO
, 0, 0, EVA
},
1038 {"lwle", "t,+j(b)", 0x60006400, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1039 {"lwle", "t,o(b)", 0, (int) M_LWLE_OB
, INSN_MACRO
, 0, 0, EVA
},
1040 {"lwle", "t,A(b)", 0, (int) M_LWLE_AB
, INSN_MACRO
, 0, 0, EVA
},
1041 {"lwre", "t,+j(b)", 0x60006600, 0xfc00fe00, RD_b
|WR_t
, 0, 0, EVA
},
1042 {"lwre", "t,o(b)", 0, (int) M_LWRE_OB
, INSN_MACRO
, 0, 0, EVA
},
1043 {"lwre", "t,A(b)", 0, (int) M_LWRE_AB
, INSN_MACRO
, 0, 0, EVA
},
1044 {"sbe", "t,+j(b)", 0x6000a800, 0xfc00fe00, SM
|RD_b
|WR_t
, 0, 0, EVA
},
1045 {"sbe", "t,o(b)", 0, (int) M_SBE_OB
, INSN_MACRO
, 0, 0, EVA
},
1046 {"sbe", "t,A(b)", 0, (int) M_SBE_AB
, INSN_MACRO
, 0, 0, EVA
},
1047 {"sce", "t,+j(b)", 0x6000ac00, 0xfc00fe00, SM
|RD_t
|WR_t
|RD_b
, 0, 0, EVA
},
1048 {"sce", "t,o(b)", 0, (int) M_SCE_OB
, INSN_MACRO
, 0, 0, EVA
},
1049 {"sce", "t,A(b)", 0, (int) M_SCE_AB
, INSN_MACRO
, 0, 0, EVA
},
1050 {"she", "t,+j(b)", 0x6000aa00, 0xfc00fe00, SM
|RD_b
|WR_t
, 0, 0, EVA
},
1051 {"she", "t,o(b)", 0, (int) M_SHE_OB
, INSN_MACRO
, 0, 0, EVA
},
1052 {"she", "t,A(b)", 0, (int) M_SHE_AB
, INSN_MACRO
, 0, 0, EVA
},
1053 {"swe", "t,+j(b)", 0x6000ae00, 0xfc00fe00, SM
|RD_b
|WR_t
, 0, 0, EVA
},
1054 {"swe", "t,o(b)", 0, (int) M_SWE_OB
, INSN_MACRO
, 0, 0, EVA
},
1055 {"swe", "t,A(b)", 0, (int) M_SWE_AB
, INSN_MACRO
, 0, 0, EVA
},
1056 {"swle", "t,+j(b)", 0x6000a000, 0xfc00fe00, SM
|RD_b
|WR_t
, 0, 0, EVA
},
1057 {"swle", "t,o(b)", 0, (int) M_SWLE_OB
, INSN_MACRO
, 0, 0, EVA
},
1058 {"swle", "t,A(b)", 0, (int) M_SWLE_AB
, INSN_MACRO
, 0, 0, EVA
},
1059 {"swre", "t,+j(b)", 0x6000a200, 0xfc00fe00, SM
|RD_b
|WR_t
, 0, 0, EVA
},
1060 {"swre", "t,o(b)", 0, (int) M_SWRE_OB
, INSN_MACRO
, 0, 0, EVA
},
1061 {"swre", "t,A(b)", 0, (int) M_SWRE_AB
, INSN_MACRO
, 0, 0, EVA
},
1062 {"cachee", "k,+j(b)", 0x6000a600, 0xfc00fe00, RD_b
, 0, 0, EVA
},
1063 {"cachee", "k,o(b)", 0, (int) M_CACHEE_OB
,INSN_MACRO
, 0, 0, EVA
},
1064 {"cachee", "k,A(b)", 0, (int) M_CACHEE_AB
,INSN_MACRO
, 0, 0, EVA
},
1065 {"prefe", "k,+j(b)", 0x6000a400, 0xfc00fe00, RD_b
, 0, 0, EVA
},
1066 {"prefe", "k,o(b)", 0, (int) M_PREFE_OB
, INSN_MACRO
, 0, 0, EVA
},
1067 {"prefe", "k,A(b)", 0, (int) M_PREFE_AB
, INSN_MACRO
, 0, 0, EVA
},
1069 {"absq_s.ph", "t,s", 0x0000113c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1070 {"absq_s.w", "t,s", 0x0000213c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1071 {"addq.ph", "d,s,t", 0x0000000d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1072 {"addq_s.ph", "d,s,t", 0x0000040d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1073 {"addq_s.w", "d,s,t", 0x00000305, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1074 {"addsc", "d,s,t", 0x00000385, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1075 {"addu.qb", "d,s,t", 0x000000cd, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1076 {"addu_s.qb", "d,s,t", 0x000004cd, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1077 {"addwc", "d,s,t", 0x000003c5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1078 {"bitrev", "t,s", 0x0000313c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1079 {"bposge32", "p", 0x43600000, 0xffff0000, CBD
, 0, 0, D32
},
1080 {"cmp.eq.ph", "s,t", 0x00000005, 0xfc00ffff, RD_s
|RD_t
, 0, 0, D32
},
1081 {"cmpgu.eq.qb", "d,s,t", 0x000000c5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1082 {"cmp.le.ph", "s,t", 0x00000085, 0xfc00ffff, RD_s
|RD_t
, 0, 0, D32
},
1083 {"cmpgu.le.qb", "d,s,t", 0x00000145, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1084 {"cmp.lt.ph", "s,t", 0x00000045, 0xfc00ffff, RD_s
|RD_t
, 0, 0, D32
},
1085 {"cmpgu.lt.qb", "d,s,t", 0x00000105, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1086 {"cmpu.eq.qb", "s,t", 0x00000245, 0xfc00ffff, RD_s
|RD_t
, 0, 0, D32
},
1087 {"cmpu.le.qb", "s,t", 0x000002c5, 0xfc00ffff, RD_s
|RD_t
, 0, 0, D32
},
1088 {"cmpu.lt.qb", "s,t", 0x00000285, 0xfc00ffff, RD_s
|RD_t
, 0, 0, D32
},
1089 {"dpaq_sa.l.w", "7,s,t", 0x000012bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1090 {"dpaq_s.w.ph", "7,s,t", 0x000002bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1091 {"dpau.h.qbl", "7,s,t", 0x000020bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1092 {"dpau.h.qbr", "7,s,t", 0x000030bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1093 {"dpsq_sa.l.w", "7,s,t", 0x000016bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1094 {"dpsq_s.w.ph", "7,s,t", 0x000006bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1095 {"dpsu.h.qbl", "7,s,t", 0x000024bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1096 {"dpsu.h.qbr", "7,s,t", 0x000034bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1097 {"extpdp", "t,7,6", 0x0000367c, 0xfc003fff, WR_t
|RD_a
|DSP_VOLA
, 0, 0, D32
},
1098 {"extpdpv", "t,7,s", 0x000038bc, 0xfc003fff, WR_t
|RD_a
|RD_s
|DSP_VOLA
, 0, 0, D32
},
1099 {"extp", "t,7,6", 0x0000267c, 0xfc003fff, WR_t
|RD_a
, 0, 0, D32
},
1100 {"extpv", "t,7,s", 0x000028bc, 0xfc003fff, WR_t
|RD_a
|RD_s
, 0, 0, D32
},
1101 {"extr_rs.w", "t,7,6", 0x00002e7c, 0xfc003fff, WR_t
|RD_a
, 0, 0, D32
},
1102 {"extr_r.w", "t,7,6", 0x00001e7c, 0xfc003fff, WR_t
|RD_a
, 0, 0, D32
},
1103 {"extr_s.h", "t,7,6", 0x00003e7c, 0xfc003fff, WR_t
|RD_a
, 0, 0, D32
},
1104 {"extrv_rs.w", "t,7,s", 0x00002ebc, 0xfc003fff, WR_t
|RD_a
|RD_s
, 0, 0, D32
},
1105 {"extrv_r.w", "t,7,s", 0x00001ebc, 0xfc003fff, WR_t
|RD_a
|RD_s
, 0, 0, D32
},
1106 {"extrv_s.h", "t,7,s", 0x00003ebc, 0xfc003fff, WR_t
|RD_a
|RD_s
, 0, 0, D32
},
1107 {"extrv.w", "t,7,s", 0x00000ebc, 0xfc003fff, WR_t
|RD_a
|RD_s
, 0, 0, D32
},
1108 {"extr.w", "t,7,6", 0x00000e7c, 0xfc003fff, WR_t
|RD_a
, 0, 0, D32
},
1109 {"insv", "t,s", 0x0000413c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1110 {"lbux", "d,t(b)", 0x00000225, 0xfc0007ff, WR_d
|RD_b
|RD_t
, 0, 0, D32
},
1111 {"lhx", "d,t(b)", 0x00000165, 0xfc0007ff, WR_d
|RD_b
|RD_t
, 0, 0, D32
},
1112 {"lwx", "d,t(b)", 0x000001a5, 0xfc0007ff, WR_d
|RD_b
|RD_t
, 0, 0, D32
},
1113 {"maq_sa.w.phl", "7,s,t", 0x00003a7c, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1114 {"maq_sa.w.phr", "7,s,t", 0x00002a7c, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1115 {"maq_s.w.phl", "7,s,t", 0x00001a7c, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1116 {"maq_s.w.phr", "7,s,t", 0x00000a7c, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1117 {"modsub", "d,s,t", 0x00000295, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1118 {"mthlip", "s,7", 0x0000027c, 0xffe03fff, RD_s
|MOD_a
|DSP_VOLA
, 0, 0, D32
},
1119 {"muleq_s.w.phl", "d,s,t", 0x00000025, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D32
},
1120 {"muleq_s.w.phr", "d,s,t", 0x00000065, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D32
},
1121 {"muleu_s.ph.qbl", "d,s,t", 0x00000095, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D32
},
1122 {"muleu_s.ph.qbr", "d,s,t", 0x000000d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D32
},
1123 {"mulq_rs.ph", "d,s,t", 0x00000115, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D32
},
1124 {"mulsaq_s.w.ph", "7,s,t", 0x00003cbc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D32
},
1125 {"packrl.ph", "d,s,t", 0x000001ad, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1126 {"pick.ph", "d,s,t", 0x0000022d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1127 {"pick.qb", "d,s,t", 0x000001ed, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1128 {"precequ.ph.qbla", "t,s", 0x0000733c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1129 {"precequ.ph.qbl", "t,s", 0x0000713c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1130 {"precequ.ph.qbra", "t,s", 0x0000933c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1131 {"precequ.ph.qbr", "t,s", 0x0000913c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1132 {"preceq.w.phl", "t,s", 0x0000513c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1133 {"preceq.w.phr", "t,s", 0x0000613c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1134 {"preceu.ph.qbla", "t,s", 0x0000b33c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1135 {"preceu.ph.qbl", "t,s", 0x0000b13c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1136 {"preceu.ph.qbra", "t,s",0x0000d33c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1137 {"preceu.ph.qbr", "t,s", 0x0000d13c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1138 {"precrq.ph.w", "d,s,t", 0x000000ed, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1139 {"precrq.qb.ph", "d,s,t", 0x000000ad, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1140 {"precrq_rs.ph.w", "d,s,t", 0x0000012d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1141 {"precrqu_s.qb.ph", "d,s,t", 0x0000016d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1142 {"raddu.w.qb", "t,s", 0x0000f13c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1143 {"rddsp", "t", 0x000fc67c, 0xfc1fffff, WR_t
, 0, 0, D32
},
1144 {"rddsp", "t,8", 0x0000067c, 0xfc103fff, WR_t
, 0, 0, D32
},
1145 {"repl.ph", "d,@", 0x0000003d, 0xfc0007ff, WR_d
, 0, 0, D32
},
1146 {"repl.qb", "t,5", 0x000005fc, 0xfc001fff, WR_t
, 0, 0, D32
},
1147 {"replv.ph", "t,s", 0x0000033c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1148 {"replv.qb", "t,s", 0x0000133c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D32
},
1149 {"shilo", "7,0", 0x0000001d, 0xffc03fff, MOD_a
, 0, 0, D32
},
1150 {"shilov", "7,s", 0x0000127c, 0xffe03fff, MOD_a
|RD_s
, 0, 0, D32
},
1151 {"shll.ph", "t,s,4", 0x000003b5, 0xfc000fff, WR_t
|RD_s
, 0, 0, D32
},
1152 {"shll.qb", "t,s,3", 0x0000087c, 0xfc001fff, WR_t
|RD_s
, 0, 0, D32
},
1153 {"shll_s.ph", "t,s,4", 0x00000bb5, 0xfc000fff, WR_t
|RD_s
, 0, 0, D32
},
1154 {"shll_s.w", "t,s,^", 0x000003f5, 0xfc0007ff, WR_t
|RD_s
, 0, 0, D32
},
1155 {"shllv.ph", "d,t,s", 0x0000038d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1156 {"shllv.qb", "d,t,s", 0x00000395, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1157 {"shllv_s.ph", "d,t,s", 0x0000078d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1158 {"shllv_s.w", "d,t,s", 0x000003d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1159 {"shra.ph", "t,s,4", 0x00000335, 0xfc000fff, WR_t
|RD_s
, 0, 0, D32
},
1160 {"shra_r.ph", "t,s,4", 0x00000735, 0xfc000fff, WR_t
|RD_s
, 0, 0, D32
},
1161 {"shra_r.w", "t,s,^", 0x000002f5, 0xfc0007ff, WR_t
|RD_s
, 0, 0, D32
},
1162 {"shrav.ph", "d,t,s", 0x0000018d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1163 {"shrav_r.ph", "d,t,s", 0x0000058d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1164 {"shrav_r.w", "d,t,s", 0x000002d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1165 {"shrl.qb", "t,s,3", 0x0000187c, 0xfc001fff, WR_t
|RD_s
, 0, 0, D32
},
1166 {"shrlv.qb", "d,t,s", 0x00000355, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1167 {"subq.ph", "d,s,t", 0x0000020d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1168 {"subq_s.ph", "d,s,t", 0x0000060d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1169 {"subq_s.w", "d,s,t", 0x00000345, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1170 {"subu.qb", "d,s,t", 0x000002cd, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1171 {"subu_s.qb", "d,s,t", 0x000006cd, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D32
},
1172 {"wrdsp", "t", 0x000fd67c, 0xfc1fffff, RD_t
|DSP_VOLA
, 0, 0, D32
},
1173 {"wrdsp", "t,8", 0x0000167c, 0xfc103fff, RD_t
|DSP_VOLA
, 0, 0, D32
},
1174 /* MIPS DSP ASE Rev2. */
1175 {"absq_s.qb", "t,s", 0x0000013c, 0xfc00ffff, WR_t
|RD_s
, 0, 0, D33
},
1176 {"addqh.ph", "d,s,t", 0x0000004d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1177 {"addqh_r.ph", "d,s,t", 0x0000044d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1178 {"addqh.w", "d,s,t", 0x0000008d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1179 {"addqh_r.w", "d,s,t", 0x0000048d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1180 {"addu.ph", "d,s,t", 0x0000010d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1181 {"addu_s.ph", "d,s,t", 0x0000050d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1182 {"adduh.qb", "d,s,t", 0x0000014d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1183 {"adduh_r.qb", "d,s,t", 0x0000054d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1184 {"append", "t,s,h", 0x00000215, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, 0, D33
},
1185 {"balign", "t,s,I", 0, (int) M_BALIGN
, INSN_MACRO
, 0, 0, D33
},
1186 {"balign", "t,s,2", 0x000008bc, 0xfc003fff, WR_t
|RD_t
|RD_s
, 0, 0, D33
},
1187 {"cmpgdu.eq.qb", "d,s,t", 0x00000185, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1188 {"cmpgdu.lt.qb", "d,s,t", 0x000001c5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1189 {"cmpgdu.le.qb", "d,s,t", 0x00000205, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1190 {"dpa.w.ph", "7,s,t", 0x000000bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1191 {"dpaqx_s.w.ph", "7,s,t", 0x000022bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1192 {"dpaqx_sa.w.ph", "7,s,t", 0x000032bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1193 {"dpax.w.ph", "7,s,t", 0x000010bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1194 {"dps.w.ph", "7,s,t", 0x000004bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1195 {"dpsqx_s.w.ph", "7,s,t", 0x000026bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1196 {"dpsqx_sa.w.ph", "7,s,t", 0x000036bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1197 {"dpsx.w.ph", "7,s,t", 0x000014bc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1198 {"mul.ph", "d,s,t", 0x0000002d, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D33
},
1199 {"mul_s.ph", "d,s,t", 0x0000042d, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D33
},
1200 {"mulq_rs.w", "d,s,t", 0x00000195, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D33
},
1201 {"mulq_s.ph", "d,s,t", 0x00000155, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D33
},
1202 {"mulq_s.w", "d,s,t", 0x000001d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, 0, D33
},
1203 {"mulsa.w.ph", "7,s,t", 0x00002cbc, 0xfc003fff, MOD_a
|RD_s
|RD_t
, 0, 0, D33
},
1204 {"precr.qb.ph", "d,s,t", 0x0000006d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1205 {"precr_sra.ph.w", "t,s,h", 0x000003cd, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, 0, D33
},
1206 {"precr_sra_r.ph.w", "t,s,h", 0x000007cd, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, 0, D33
},
1207 {"prepend", "t,s,h", 0x00000255, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, 0, D33
},
1208 {"shra.qb", "t,s,3", 0x000001fc, 0xfc001fff, WR_t
|RD_s
, 0, 0, D33
},
1209 {"shra_r.qb", "t,s,3", 0x000011fc, 0xfc001fff, WR_t
|RD_s
, 0, 0, D33
},
1210 {"shrav.qb", "d,t,s", 0x000001cd, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1211 {"shrav_r.qb", "d,t,s", 0x000005cd, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1212 {"shrl.ph", "t,s,4", 0x000003fc, 0xfc000fff, WR_t
|RD_s
, 0, 0, D33
},
1213 {"shrlv.ph", "d,t,s", 0x00000315, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1214 {"subu.ph", "d,s,t", 0x0000030d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1215 {"subu_s.ph", "d,s,t", 0x0000070d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1216 {"subuh.qb", "d,s,t", 0x0000034d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1217 {"subuh_r.qb", "d,s,t", 0x0000074d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1218 {"subqh.ph", "d,s,t", 0x0000024d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1219 {"subqh_r.ph", "d,s,t", 0x0000064d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1220 {"subqh.w", "d,s,t", 0x0000028d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1221 {"subqh_r.w", "d,s,t", 0x0000068d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, 0, D33
},
1224 const int bfd_micromips_num_opcodes
=
1225 ((sizeof micromips_opcodes
) / (sizeof (micromips_opcodes
[0])));
projects / thirdparty / binutils-gdb.git / blob