opcodes/xstormy16-desc.h

   1 /* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
   2 /* CPU data header for xstormy16.
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5
   6 Copyright (C) 1996-2020 Free Software Foundation, Inc.
   7
   8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
   9
  10    This file is free software; you can redistribute it and/or modify
  11    it under the terms of the GNU General Public License as published by
  12    the Free Software Foundation; either version 3, or (at your option)
  13    any later version.
  14
  15    It is distributed in the hope that it will be useful, but WITHOUT
  16    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  17    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  18    License for more details.
  19
  20    You should have received a copy of the GNU General Public License along
  21    with this program; if not, write to the Free Software Foundation, Inc.,
  22    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  23
  24 */
  25
  26 #ifndef XSTORMY16_CPU_H
  27 #define XSTORMY16_CPU_H
  28
  29 #ifdef __cplusplus
  30 extern "C" {
  31 #endif
  32
  33 #define CGEN_ARCH xstormy16
  34
  35 /* Given symbol S, return xstormy16_cgen_<S>.  */
  36 #define CGEN_SYM(s) xstormy16##_cgen_##s
  37
  38
  39 /* Selected cpu families.  */
  40 #define HAVE_CPU_XSTORMY16
  41
  42 #define CGEN_INSN_LSB0_P 0
  43
  44 /* Minimum size of any insn (in bytes).  */
  45 #define CGEN_MIN_INSN_SIZE 2
  46
  47 /* Maximum size of any insn (in bytes).  */
  48 #define CGEN_MAX_INSN_SIZE 4
  49
  50 #define CGEN_INT_INSN_P 1
  51
  52 /* Maximum number of syntax elements in an instruction.  */
  53 #define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 19
  54
  55 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
  56    e.g. In "b,a foo" the ",a" is an operand.  If mnemonics have operands
  57    we can't hash on everything up to the space.  */
  58 #define CGEN_MNEMONIC_OPERANDS
  59
  60 /* Maximum number of fields in an instruction.  */
  61 #define CGEN_ACTUAL_MAX_IFMT_OPERANDS 9
  62
  63 /* Enums.  */
  64
  65 /* Enum declaration for .  */
  66 typedef enum gr_names {
  67   H_GR_R0 = 0, H_GR_R1 = 1, H_GR_R2 = 2, H_GR_R3 = 3
  68  , H_GR_R4 = 4, H_GR_R5 = 5, H_GR_R6 = 6, H_GR_R7 = 7
  69  , H_GR_R8 = 8, H_GR_R9 = 9, H_GR_R10 = 10, H_GR_R11 = 11
  70  , H_GR_R12 = 12, H_GR_R13 = 13, H_GR_R14 = 14, H_GR_R15 = 15
  71  , H_GR_PSW = 14, H_GR_SP = 15
  72 } GR_NAMES;
  73
  74 /* Enum declaration for .  */
  75 typedef enum gr_rb_names {
  76   H_RBJ_R8 = 0, H_RBJ_R9 = 1, H_RBJ_R10 = 2, H_RBJ_R11 = 3
  77  , H_RBJ_R12 = 4, H_RBJ_R13 = 5, H_RBJ_R14 = 6, H_RBJ_R15 = 7
  78  , H_RBJ_PSW = 6, H_RBJ_SP = 7
  79 } GR_RB_NAMES;
  80
  81 /* Enum declaration for insn op enums.  */
  82 typedef enum insn_op1 {
  83   OP1_0, OP1_1, OP1_2, OP1_3
  84  , OP1_4, OP1_5, OP1_6, OP1_7
  85  , OP1_8, OP1_9, OP1_A, OP1_B
  86  , OP1_C, OP1_D, OP1_E, OP1_F
  87 } INSN_OP1;
  88
  89 /* Enum declaration for insn op enums.  */
  90 typedef enum insn_op2 {
  91   OP2_0, OP2_1, OP2_2, OP2_3
  92  , OP2_4, OP2_5, OP2_6, OP2_7
  93  , OP2_8, OP2_9, OP2_A, OP2_B
  94  , OP2_C, OP2_D, OP2_E, OP2_F
  95 } INSN_OP2;
  96
  97 /* Enum declaration for insn op enums.  */
  98 typedef enum insn_op2a {
  99   OP2A_0, OP2A_2, OP2A_4, OP2A_6
 100  , OP2A_8, OP2A_A, OP2A_C, OP2A_E
 101 } INSN_OP2A;
 102
 103 /* Enum declaration for insn op enums.  */
 104 typedef enum insn_op2m {
 105   OP2M_0, OP2M_1
 106 } INSN_OP2M;
 107
 108 /* Enum declaration for insn op enums.  */
 109 typedef enum insn_op3 {
 110   OP3_0, OP3_1, OP3_2, OP3_3
 111  , OP3_4, OP3_5, OP3_6, OP3_7
 112  , OP3_8, OP3_9, OP3_A, OP3_B
 113  , OP3_C, OP3_D, OP3_E, OP3_F
 114 } INSN_OP3;
 115
 116 /* Enum declaration for insn op enums.  */
 117 typedef enum insn_op3a {
 118   OP3A_0, OP3A_1, OP3A_2, OP3A_3
 119 } INSN_OP3A;
 120
 121 /* Enum declaration for insn op enums.  */
 122 typedef enum insn_op3b {
 123   OP3B_0, OP3B_2, OP3B_4, OP3B_6
 124  , OP3B_8, OP3B_A, OP3B_C, OP3B_E
 125 } INSN_OP3B;
 126
 127 /* Enum declaration for insn op enums.  */
 128 typedef enum insn_op4 {
 129   OP4_0, OP4_1, OP4_2, OP4_3
 130  , OP4_4, OP4_5, OP4_6, OP4_7
 131  , OP4_8, OP4_9, OP4_A, OP4_B
 132  , OP4_C, OP4_D, OP4_E, OP4_F
 133 } INSN_OP4;
 134
 135 /* Enum declaration for insn op enums.  */
 136 typedef enum insn_op4m {
 137   OP4M_0, OP4M_1
 138 } INSN_OP4M;
 139
 140 /* Enum declaration for insn op enums.  */
 141 typedef enum insn_op4b {
 142   OP4B_0, OP4B_1
 143 } INSN_OP4B;
 144
 145 /* Enum declaration for insn op enums.  */
 146 typedef enum insn_op5 {
 147   OP5_0, OP5_1, OP5_2, OP5_3
 148  , OP5_4, OP5_5, OP5_6, OP5_7
 149  , OP5_8, OP5_9, OP5_A, OP5_B
 150  , OP5_C, OP5_D, OP5_E, OP5_F
 151 } INSN_OP5;
 152
 153 /* Enum declaration for insn op enums.  */
 154 typedef enum insn_op5a {
 155   OP5A_0, OP5A_1
 156 } INSN_OP5A;
 157
 158 /* Attributes.  */
 159
 160 /* Enum declaration for machine type selection.  */
 161 typedef enum mach_attr {
 162   MACH_BASE, MACH_XSTORMY16, MACH_MAX
 163 } MACH_ATTR;
 164
 165 /* Enum declaration for instruction set selection.  */
 166 typedef enum isa_attr {
 167   ISA_XSTORMY16, ISA_MAX
 168 } ISA_ATTR;
 169
 170 /* Number of architecture variants.  */
 171 #define MAX_ISAS  1
 172 #define MAX_MACHS ((int) MACH_MAX)
 173
 174 /* Ifield support.  */
 175
 176 /* Ifield attribute indices.  */
 177
 178 /* Enum declaration for cgen_ifld attrs.  */
 179 typedef enum cgen_ifld_attr {
 180   CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
 181  , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
 182  , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
 183 } CGEN_IFLD_ATTR;
 184
 185 /* Number of non-boolean elements in cgen_ifld_attr.  */
 186 #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
 187
 188 /* cgen_ifld attribute accessor macros.  */
 189 #define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
 190 #define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_VIRTUAL)) != 0)
 191 #define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
 192 #define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
 193 #define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_RESERVED)) != 0)
 194 #define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
 195 #define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGNED)) != 0)
 196
 197 /* Enum declaration for xstormy16 ifield types.  */
 198 typedef enum ifield_type {
 199   XSTORMY16_F_NIL, XSTORMY16_F_ANYOF, XSTORMY16_F_RD, XSTORMY16_F_RDM
 200  , XSTORMY16_F_RM, XSTORMY16_F_RS, XSTORMY16_F_RB, XSTORMY16_F_RBJ
 201  , XSTORMY16_F_OP1, XSTORMY16_F_OP2, XSTORMY16_F_OP2A, XSTORMY16_F_OP2M
 202  , XSTORMY16_F_OP3, XSTORMY16_F_OP3A, XSTORMY16_F_OP3B, XSTORMY16_F_OP4
 203  , XSTORMY16_F_OP4M, XSTORMY16_F_OP4B, XSTORMY16_F_OP5, XSTORMY16_F_OP5A
 204  , XSTORMY16_F_OP, XSTORMY16_F_IMM2, XSTORMY16_F_IMM3, XSTORMY16_F_IMM3B
 205  , XSTORMY16_F_IMM4, XSTORMY16_F_IMM8, XSTORMY16_F_IMM12, XSTORMY16_F_IMM16
 206  , XSTORMY16_F_LMEM8, XSTORMY16_F_HMEM8, XSTORMY16_F_REL8_2, XSTORMY16_F_REL8_4
 207  , XSTORMY16_F_REL12, XSTORMY16_F_REL12A, XSTORMY16_F_ABS24_1, XSTORMY16_F_ABS24_2
 208  , XSTORMY16_F_ABS24, XSTORMY16_F_MAX
 209 } IFIELD_TYPE;
 210
 211 #define MAX_IFLD ((int) XSTORMY16_F_MAX)
 212
 213 /* Hardware attribute indices.  */
 214
 215 /* Enum declaration for cgen_hw attrs.  */
 216 typedef enum cgen_hw_attr {
 217   CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
 218  , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
 219 } CGEN_HW_ATTR;
 220
 221 /* Number of non-boolean elements in cgen_hw_attr.  */
 222 #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
 223
 224 /* cgen_hw attribute accessor macros.  */
 225 #define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
 226 #define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_VIRTUAL)) != 0)
 227 #define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_CACHE_ADDR)) != 0)
 228 #define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PC)) != 0)
 229 #define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PROFILE)) != 0)
 230
 231 /* Enum declaration for xstormy16 hardware types.  */
 232 typedef enum cgen_hw_type {
 233   HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
 234  , HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_RB
 235  , HW_H_RBJ, HW_H_RPSW, HW_H_Z8, HW_H_Z16
 236  , HW_H_CY, HW_H_HC, HW_H_OV, HW_H_PT
 237  , HW_H_S, HW_H_BRANCHCOND, HW_H_WORDSIZE, HW_MAX
 238 } CGEN_HW_TYPE;
 239
 240 #define MAX_HW ((int) HW_MAX)
 241
 242 /* Operand attribute indices.  */
 243
 244 /* Enum declaration for cgen_operand attrs.  */
 245 typedef enum cgen_operand_attr {
 246   CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
 247  , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
 248  , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
 249 } CGEN_OPERAND_ATTR;
 250
 251 /* Number of non-boolean elements in cgen_operand_attr.  */
 252 #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
 253
 254 /* cgen_operand attribute accessor macros.  */
 255 #define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
 256 #define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
 257 #define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
 258 #define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
 259 #define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
 260 #define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGNED)) != 0)
 261 #define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
 262 #define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_RELAX)) != 0)
 263 #define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
 264
 265 /* Enum declaration for xstormy16 operand types.  */
 266 typedef enum cgen_operand_type {
 267   XSTORMY16_OPERAND_PC, XSTORMY16_OPERAND_PSW_Z8, XSTORMY16_OPERAND_PSW_Z16, XSTORMY16_OPERAND_PSW_CY
 268  , XSTORMY16_OPERAND_PSW_HC, XSTORMY16_OPERAND_PSW_OV, XSTORMY16_OPERAND_PSW_PT, XSTORMY16_OPERAND_PSW_S
 269  , XSTORMY16_OPERAND_RD, XSTORMY16_OPERAND_RDM, XSTORMY16_OPERAND_RM, XSTORMY16_OPERAND_RS
 270  , XSTORMY16_OPERAND_RB, XSTORMY16_OPERAND_RBJ, XSTORMY16_OPERAND_BCOND2, XSTORMY16_OPERAND_WS2
 271  , XSTORMY16_OPERAND_BCOND5, XSTORMY16_OPERAND_IMM2, XSTORMY16_OPERAND_IMM3, XSTORMY16_OPERAND_IMM3B
 272  , XSTORMY16_OPERAND_IMM4, XSTORMY16_OPERAND_IMM8, XSTORMY16_OPERAND_IMM8SMALL, XSTORMY16_OPERAND_IMM12
 273  , XSTORMY16_OPERAND_IMM16, XSTORMY16_OPERAND_LMEM8, XSTORMY16_OPERAND_HMEM8, XSTORMY16_OPERAND_REL8_2
 274  , XSTORMY16_OPERAND_REL8_4, XSTORMY16_OPERAND_REL12, XSTORMY16_OPERAND_REL12A, XSTORMY16_OPERAND_ABS24
 275  , XSTORMY16_OPERAND_PSW, XSTORMY16_OPERAND_RPSW, XSTORMY16_OPERAND_SP, XSTORMY16_OPERAND_R0
 276  , XSTORMY16_OPERAND_R1, XSTORMY16_OPERAND_R2, XSTORMY16_OPERAND_R8, XSTORMY16_OPERAND_MAX
 277 } CGEN_OPERAND_TYPE;
 278
 279 /* Number of operands types.  */
 280 #define MAX_OPERANDS 39
 281
 282 /* Maximum number of operands referenced by any insn.  */
 283 #define MAX_OPERAND_INSTANCES 8
 284
 285 /* Insn attribute indices.  */
 286
 287 /* Enum declaration for cgen_insn attrs.  */
 288 typedef enum cgen_insn_attr {
 289   CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
 290  , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
 291  , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
 292  , CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
 293 } CGEN_INSN_ATTR;
 294
 295 /* Number of non-boolean elements in cgen_insn_attr.  */
 296 #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
 297
 298 /* cgen_insn attribute accessor macros.  */
 299 #define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
 300 #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_ALIAS)) != 0)
 301 #define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_VIRTUAL)) != 0)
 302 #define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
 303 #define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_COND_CTI)) != 0)
 304 #define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_SKIP_CTI)) != 0)
 305 #define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
 306 #define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXABLE)) != 0)
 307 #define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXED)) != 0)
 308 #define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_NO_DIS)) != 0)
 309 #define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_PBB)) != 0)
 310
 311 /* cgen.h uses things we just defined.  */
 312 #include "opcode/cgen.h"
 313
 314 extern const struct cgen_ifld xstormy16_cgen_ifld_table[];
 315
 316 /* Attributes.  */
 317 extern const CGEN_ATTR_TABLE xstormy16_cgen_hardware_attr_table[];
 318 extern const CGEN_ATTR_TABLE xstormy16_cgen_ifield_attr_table[];
 319 extern const CGEN_ATTR_TABLE xstormy16_cgen_operand_attr_table[];
 320 extern const CGEN_ATTR_TABLE xstormy16_cgen_insn_attr_table[];
 321
 322 /* Hardware decls.  */
 323
 324 extern CGEN_KEYWORD xstormy16_cgen_opval_gr_names;
 325 extern CGEN_KEYWORD xstormy16_cgen_opval_gr_Rb_names;
 326 extern CGEN_KEYWORD xstormy16_cgen_opval_gr_Rb_names;
 327 extern CGEN_KEYWORD xstormy16_cgen_opval_h_branchcond;
 328 extern CGEN_KEYWORD xstormy16_cgen_opval_h_wordsize;
 329
 330 extern const CGEN_HW_ENTRY xstormy16_cgen_hw_table[];
 331
 332
 333
 334    #ifdef __cplusplus
 335    }
 336    #endif
 337
 338 #endif /* XSTORMY16_CPU_H */