sim/testsuite/sim/cris/asm/sfe.ms

   1 # mach: crisv32
   2 # output: 4000c800\nc3221800\nc8606400\n48606400\n419d8260\n
   3
   4 ; Check that SFE affects CCS the right way.
   5
   6  .include "testutils.inc"
   7  start
   8
   9 ; Set SPC to 1 to disable single step exceptions when S flag is set.
  10  move 1,spc
  11
  12 ; CCS:
  13 ;  31            24 23           16 15            8 7             0
  14 ;  +---+-----------+-------+-------+-----------+---+---------------+
  15 ;  |Q M|S R P U I X N Z V C|S R P U I X N Z V C|S R P U I X N Z V C|
  16 ;  |   |2 2 2 2 2 2 2 2 2 2|1 1 1 1 1 1 1 1 1 1|                   |
  17 ;  +---+-----------+-------+-------+-----------+---+---------------+
  18
  19  move 0x40000000,ccs
  20  setf ixv
  21  sfe
  22  move ccs,r3
  23  dumpr3                 ; 0x4000c800
  24  or.d 0x80000000,r3
  25  move r3,ccs
  26
  27  setf pzv
  28  sfe
  29  move ccs,r3
  30  dumpr3                 ; 0xc3221800
  31
  32  setf xnc
  33  sfe
  34  move ccs,r3
  35  dumpr3                 ; 0xc8606400
  36
  37 ; Clear Q, so we don't get S and Q at the same time when we set S.
  38  lslq 1,r3
  39  lsrq 1,r3
  40  move r3,ccs
  41  move ccs,r3
  42  dumpr3                 ; 0x48606400
  43
  44  or.w 0x300,r3
  45  move r3,ccs
  46  setf ui
  47  sfe
  48  move ccs,r3
  49  dumpr3                 ; 0x419d8260
  50
  51  quit