sim/testsuite/sim/frv/interrupts/privileged_instruction.cgs

   1 # frv testcase to generate privileged_instruction interrupt
   2 # mach: frv
   3
   4         .include "testutils.inc"
   5
   6         start
   7
   8         .global dsr
   9 dsr:
  10         and_spr_immed   -4081,tbr               ; clear tbr.tt
  11         set_gr_spr      tbr,gr17
  12         inc_gr_immed    0x060,gr17              ; address of exception handler
  13         set_bctrlr_0_0  gr17
  14         set_spr_immed   128,lcr
  15         set_psr_et      1
  16         and_spr_immed   0xfffffffb,psr          ; clear psr.s
  17
  18         set_spr_addr    handler,lr
  19         set_gr_immed    0,gr16
  20
  21         set_gr_addr     bad1,gr17
  22 bad1:   rett            0               ; cause interrupt
  23         test_gr_immed   1,gr16
  24         set_gr_addr     bad2,gr17
  25 bad2:   rei             0               ; cause interrupt
  26         test_gr_immed   2,gr16
  27         set_gr_addr     bad3,gr17
  28 bad3:   witlb           gr0,@(gr0,gr0)  ; cause interrupt
  29         test_gr_immed   3,gr16
  30         set_gr_addr     bad4,gr17
  31 bad4:   wdtlb           gr0,@(gr0,gr0)  ; cause interrupt
  32         test_gr_immed   4,gr16
  33         set_gr_addr     bad5,gr17
  34 bad5:   itlbi           @(gr0,gr0)      ; cause interrupt
  35         test_gr_immed   5,gr16
  36         set_gr_addr     bad6,gr17
  37 bad6:   dtlbi           @(gr0,gr0)      ; cause interrupt
  38         test_gr_immed   6,gr16
  39
  40         pass
  41 handler:
  42         ; check interrupts
  43         test_spr_immed  0x1,esfr1               ; esr0 is active
  44         test_spr_gr     epcr0,gr17
  45         test_spr_bits   0x0001,0,0x1,esr0       ; esr0 is valid
  46         test_spr_bits   0x003e,1,0x4,esr0       ; esr0.ec is set
  47         test_spr_bits   0x0800,11,0x0,esr0      ; esr0.eav is not set
  48
  49         addi            gr16,1,gr16
  50         movsg           pcsr,gr8
  51         addi            gr8,4,gr8
  52         movgs           gr8,pcsr
  53         rett            0
  54         fail