]> git.ipfire.org Git - thirdparty/pciutils.git/blame - lspci.c
Fix check whether dump.name was given
[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
4284af58 2 * The PCI Utilities -- List All PCI Devices
98e39e09 3 *
103f074c 4 * Copyright (c) 1997--2008 Martin Mares <mj@ucw.cz>
98e39e09
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
98e39e09 13
c7a34993 14#include "lspci.h"
98e39e09
MM
15
16/* Options */
17
c7a34993 18int verbose; /* Show detailed information */
a387042e 19static int opt_hex; /* Show contents of config space as hexadecimal numbers */
c7a34993 20struct pci_filter filter; /* Device filter */
a387042e
MM
21static int opt_tree; /* Show bus tree */
22static int opt_machine; /* Generate machine-readable output */
23static int opt_map_mode; /* Bus mapping mode enabled */
24static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
11339c0d 25static int opt_kernel; /* Show kernel drivers */
cca2f7c6
MM
26static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
27static int opt_query_all; /* Query the DNS for all entries */
c7a34993 28char *opt_pcimap; /* Override path to Linux modules.pcimap */
98e39e09 29
81afa98c
MM
30const char program_name[] = "lspci";
31
cca2f7c6
MM
32static char options[] = "nvbxs:d:ti:mgp:qkMDQ" GENERIC_OPTIONS ;
33
34static char help_msg[] =
35"Usage: lspci [<switches>]\n"
36"\n"
1b99a704
MM
37"Basic display modes:\n"
38"-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
39"-t\t\tShow bus tree\n"
40"\n"
41"Display options:\n"
42"-v\t\tBe verbose (-vv for very verbose)\n"
43#ifdef PCI_OS_LINUX
44"-k\t\tShow kernel drivers handling each device\n"
45#endif
46"-x\t\tShow hex-dump of the standard part of the config space\n"
47"-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
48"-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
49"-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
50"-D\t\tAlways show domain numbers\n"
51"\n"
52"Resolving of device ID's to names:\n"
cca2f7c6
MM
53"-n\t\tShow numeric ID's\n"
54"-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
55#ifdef PCI_USE_DNS
56"-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
57"-qq\t\tAs above, but re-query locally cached entries\n"
58"-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
59#endif
1b99a704
MM
60"\n"
61"Selection of devices:\n"
cca2f7c6 62"-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
1b99a704
MM
63"-d [<vendor>]:[<device>]\t\t\tShow only devices with specified ID's\n"
64"\n"
65"Other options:\n"
cca2f7c6 66"-i <file>\tUse specified ID database instead of %s\n"
c1c952d2 67#ifdef PCI_OS_LINUX
cca2f7c6 68"-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
c1c952d2 69#endif
cca2f7c6 70"-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
1b99a704
MM
71"\n"
72"PCI access options:\n"
727ce158
MM
73GENERIC_HELP
74;
98e39e09 75
a387042e 76/*** Our view of the PCI bus ***/
98e39e09 77
c7a34993
MM
78struct pci_access *pacc;
79struct device *first_dev;
934e7e36 80static int seen_errors;
98e39e09 81
c7a34993 82int
ec25b52d
MM
83config_fetch(struct device *d, unsigned int pos, unsigned int len)
84{
85 unsigned int end = pos+len;
86 int result;
84d437d6
MM
87
88 while (pos < d->config_bufsize && len && d->present[pos])
89 pos++, len--;
90 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
91 len--;
92 if (!len)
ec25b52d 93 return 1;
84d437d6 94
ec25b52d
MM
95 if (end > d->config_bufsize)
96 {
84d437d6 97 int orig_size = d->config_bufsize;
ec25b52d
MM
98 while (end > d->config_bufsize)
99 d->config_bufsize *= 2;
100 d->config = xrealloc(d->config, d->config_bufsize);
84d437d6 101 d->present = xrealloc(d->present, d->config_bufsize);
1ac3a99d 102 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
ec25b52d
MM
103 }
104 result = pci_read_block(d->dev, pos, d->config + pos, len);
84d437d6
MM
105 if (result)
106 memset(d->present + pos, 1, len);
ec25b52d
MM
107 return result;
108}
109
c7a34993 110struct device *
1812a795
MM
111scan_device(struct pci_dev *p)
112{
1812a795
MM
113 struct device *d;
114
a387042e
MM
115 if (p->domain && !opt_domains)
116 opt_domains = 1;
1812a795
MM
117 if (!pci_filter_match(&filter, p))
118 return NULL;
119 d = xmalloc(sizeof(struct device));
1ac3a99d 120 memset(d, 0, sizeof(*d));
1812a795 121 d->dev = p;
84d437d6 122 d->config_cached = d->config_bufsize = 64;
ec25b52d 123 d->config = xmalloc(64);
84d437d6
MM
124 d->present = xmalloc(64);
125 memset(d->present, 1, 64);
09817437 126 if (!pci_read_block(p, 0, d->config, 64))
934e7e36
MM
127 {
128 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
129 p->domain, p->bus, p->dev, p->func);
130 seen_errors++;
131 return NULL;
132 }
09817437 133 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
1812a795 134 {
ec25b52d
MM
135 /* For cardbus bridges, we need to fetch 64 bytes more to get the
136 * full standard header... */
84d437d6
MM
137 if (config_fetch(d, 64, 64))
138 d->config_cached += 64;
1812a795 139 }
84d437d6 140 pci_setup_cache(p, d->config, d->config_cached);
2849a165 141 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_PHYS_SLOT);
1812a795
MM
142 return d;
143}
144
98e39e09 145static void
727ce158 146scan_devices(void)
98e39e09
MM
147{
148 struct device *d;
727ce158 149 struct pci_dev *p;
98e39e09 150
727ce158 151 pci_scan_bus(pacc);
de7ef8bc 152 for (p=pacc->devices; p; p=p->next)
1812a795
MM
153 if (d = scan_device(p))
154 {
155 d->next = first_dev;
156 first_dev = d;
157 }
98e39e09
MM
158}
159
a387042e 160/*** Config space accesses ***/
98e39e09 161
84d437d6
MM
162static void
163check_conf_range(struct device *d, unsigned int pos, unsigned int len)
164{
165 while (len)
166 if (!d->present[pos])
167 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
168 else
169 pos++, len--;
170}
171
c7a34993 172byte
98e39e09
MM
173get_conf_byte(struct device *d, unsigned int pos)
174{
84d437d6 175 check_conf_range(d, pos, 1);
98e39e09
MM
176 return d->config[pos];
177}
178
c7a34993 179word
98e39e09
MM
180get_conf_word(struct device *d, unsigned int pos)
181{
84d437d6 182 check_conf_range(d, pos, 2);
98e39e09
MM
183 return d->config[pos] | (d->config[pos+1] << 8);
184}
185
c7a34993 186u32
98e39e09
MM
187get_conf_long(struct device *d, unsigned int pos)
188{
84d437d6 189 check_conf_range(d, pos, 4);
98e39e09
MM
190 return d->config[pos] |
191 (d->config[pos+1] << 8) |
192 (d->config[pos+2] << 16) |
193 (d->config[pos+3] << 24);
194}
195
a387042e 196/*** Sorting ***/
98e39e09
MM
197
198static int
199compare_them(const void *A, const void *B)
200{
727ce158
MM
201 const struct pci_dev *a = (*(const struct device **)A)->dev;
202 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09 203
84c8d1bb
MM
204 if (a->domain < b->domain)
205 return -1;
206 if (a->domain > b->domain)
207 return 1;
98e39e09
MM
208 if (a->bus < b->bus)
209 return -1;
210 if (a->bus > b->bus)
211 return 1;
727ce158
MM
212 if (a->dev < b->dev)
213 return -1;
214 if (a->dev > b->dev)
215 return 1;
216 if (a->func < b->func)
98e39e09 217 return -1;
727ce158 218 if (a->func > b->func)
98e39e09
MM
219 return 1;
220 return 0;
221}
222
223static void
224sort_them(void)
225{
727ce158 226 struct device **index, **h, **last_dev;
98e39e09
MM
227 int cnt;
228 struct device *d;
229
c7a34993
MM
230 cnt = 0;
231 for (d=first_dev; d; d=d->next)
232 cnt++;
233 h = index = alloca(sizeof(struct device *) * cnt);
234 for (d=first_dev; d; d=d->next)
235 *h++ = d;
236 qsort(index, cnt, sizeof(struct device *), compare_them);
237 last_dev = &first_dev;
238 h = index;
239 while (cnt--)
240 {
241 *last_dev = *h;
242 last_dev = &(*h)->next;
243 h++;
c1c952d2 244 }
c7a34993 245 *last_dev = NULL;
c1c952d2
MM
246}
247
c7a34993 248/*** Normal output ***/
11339c0d 249
c7a34993
MM
250static void
251show_slot_name(struct device *d)
c1c952d2 252{
c7a34993 253 struct pci_dev *p = d->dev;
c1c952d2 254
c7a34993
MM
255 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
256 printf("%04x:", p->domain);
257 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
c1c952d2
MM
258}
259
c7a34993
MM
260void
261get_subid(struct device *d, word *subvp, word *subdp)
c1c952d2 262{
c7a34993 263 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
11339c0d 264
c7a34993
MM
265 if (htype == PCI_HEADER_TYPE_NORMAL)
266 {
267 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
268 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
269 }
270 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
271 {
272 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
273 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
274 }
275 else
276 *subvp = *subdp = 0xffff;
c1c952d2
MM
277}
278
11339c0d 279static void
c7a34993 280show_terse(struct device *d)
11339c0d 281{
c7a34993
MM
282 int c;
283 struct pci_dev *p = d->dev;
284 char classbuf[128], devbuf[128];
11339c0d 285
c7a34993
MM
286 show_slot_name(d);
287 printf(" %s: %s",
288 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
289 PCI_LOOKUP_CLASS,
290 p->device_class),
291 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
292 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
293 p->vendor_id, p->device_id));
294 if (c = get_conf_byte(d, PCI_REVISION_ID))
295 printf(" (rev %02x)", c);
296 if (verbose)
297 {
298 char *x;
299 c = get_conf_byte(d, PCI_CLASS_PROG);
300 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
301 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
302 p->device_class, c);
303 if (c || x)
304 {
305 printf(" (prog-if %02x", c);
306 if (x)
307 printf(" [%s]", x);
308 putchar(')');
309 }
310 }
311 putchar('\n');
c1c952d2 312
c7a34993
MM
313 if (verbose || opt_kernel)
314 {
315 word subsys_v, subsys_d;
316 char ssnamebuf[256];
c1c952d2 317
c7a34993
MM
318 get_subid(d, &subsys_v, &subsys_d);
319 if (subsys_v && subsys_v != 0xffff)
320 printf("\tSubsystem: %s\n",
321 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
322 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
323 p->vendor_id, p->device_id, subsys_v, subsys_d));
324 }
c1c952d2
MM
325}
326
a387042e
MM
327/*** Verbose output ***/
328
329static void
330show_size(pciaddr_t x)
331{
0188807c 332 static const char suffix[][2] = { "", "K", "M", "G", "T" };
f2f8adaa 333 unsigned i;
a387042e
MM
334 if (!x)
335 return;
f2f8adaa
MW
336 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
337 if (x < 1024)
338 break;
339 x /= 1024;
340 }
341 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
a387042e
MM
342}
343
344static void
345show_bases(struct device *d, int cnt)
346{
347 struct pci_dev *p = d->dev;
348 word cmd = get_conf_word(d, PCI_COMMAND);
349 int i;
659d438b 350 int virtual = 0;
a387042e 351
de7ef8bc 352 for (i=0; i<cnt; i++)
a387042e
MM
353 {
354 pciaddr_t pos = p->base_addr[i];
355 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
356 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
357 if (flg == 0xffffffff)
358 flg = 0;
359 if (!pos && !flg && !len)
360 continue;
361 if (verbose > 1)
362 printf("\tRegion %d: ", i);
363 else
364 putchar('\t');
365 if (pos && !flg) /* Reported by the OS, but not by the device */
366 {
367 printf("[virtual] ");
368 flg = pos;
659d438b 369 virtual = 1;
a387042e
MM
370 }
371 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
372 {
373 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
374 printf("I/O ports at ");
375 if (a)
376 printf(PCIADDR_PORT_FMT, a);
377 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
378 printf("<ignored>");
379 else
380 printf("<unassigned>");
659d438b 381 if (!virtual && !(cmd & PCI_COMMAND_IO))
a387042e
MM
382 printf(" [disabled]");
383 }
384 else
385 {
386 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
387 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
388 int done = 0;
389 u32 z = 0;
390
391 printf("Memory at ");
392 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
393 {
394 if (i >= cnt - 1)
395 {
396 printf("<invalid-64bit-slot>");
397 done = 1;
398 }
399 else
400 {
401 i++;
402 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
a387042e
MM
403 }
404 }
405 if (!done)
406 {
407 if (a)
408 printf(PCIADDR_T_FMT, a);
409 else
410 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
411 }
412 printf(" (%s, %sprefetchable)",
413 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
414 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
415 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
416 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
659d438b 417 if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
418 printf(" [disabled]");
419 }
420 show_size(len);
421 putchar('\n');
422 }
423}
424
425static void
426show_rom(struct device *d, int reg)
427{
428 struct pci_dev *p = d->dev;
429 pciaddr_t rom = p->rom_base_addr;
430 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
431 u32 flg = get_conf_long(d, reg);
432 word cmd = get_conf_word(d, PCI_COMMAND);
659d438b 433 int virtual = 0;
a387042e
MM
434
435 if (!rom && !flg && !len)
436 return;
437 putchar('\t');
438 if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
439 {
440 printf("[virtual] ");
441 flg = rom;
659d438b 442 virtual = 1;
a387042e
MM
443 }
444 printf("Expansion ROM at ");
445 if (rom & PCI_ROM_ADDRESS_MASK)
446 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
447 else if (flg & PCI_ROM_ADDRESS_MASK)
448 printf("<ignored>");
449 else
450 printf("<unassigned>");
451 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
452 printf(" [disabled]");
659d438b 453 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
454 printf(" [disabled by cmd]");
455 show_size(len);
456 putchar('\n');
457}
458
e95c8373
MM
459static void
460show_htype0(struct device *d)
461{
462 show_bases(d, 6);
6aa54f1b 463 show_rom(d, PCI_ROM_ADDRESS);
e95c8373
MM
464 show_caps(d);
465}
466
98e39e09
MM
467static void
468show_htype1(struct device *d)
469{
470 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
471 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
472 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
473 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
474 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
475 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
476 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
477 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
478 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
138c0385 479 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
98e39e09 480 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
e306e911 481 int verb = verbose > 2;
98e39e09
MM
482
483 show_bases(d, 2);
484 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
485 get_conf_byte(d, PCI_PRIMARY_BUS),
486 get_conf_byte(d, PCI_SECONDARY_BUS),
487 get_conf_byte(d, PCI_SUBORDINATE_BUS),
488 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
489
490 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
491 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
492 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
493 else
494 {
495 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
496 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
497 if (io_type == PCI_IO_RANGE_TYPE_32)
498 {
499 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
500 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
501 }
e306e911 502 if (io_base <= io_limit || verb)
98e39e09
MM
503 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
504 }
505
506 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
507 mem_type)
508 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 509 else
98e39e09
MM
510 {
511 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
512 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
e306e911
MM
513 if (mem_base <= mem_limit || verb)
514 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
98e39e09
MM
515 }
516
517 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
518 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
519 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 520 else
98e39e09
MM
521 {
522 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
523 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
e306e911
MM
524 if (pref_base <= pref_limit || verb)
525 {
526 if (pref_type == PCI_PREF_RANGE_TYPE_32)
527 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
528 else
529 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
530 get_conf_long(d, PCI_PREF_BASE_UPPER32),
531 pref_base,
532 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
f29dcc87 533 pref_limit + 0xfffff);
e306e911 534 }
98e39e09
MM
535 }
536
138c0385 537 if (verbose > 1)
c1c2c30e 538 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
138c0385
MM
539 FLAG(sec_stat, PCI_STATUS_66MHZ),
540 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
541 FLAG(sec_stat, PCI_STATUS_PARITY),
542 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
543 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
544 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
545 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
546 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
547 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
548 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
549 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
98e39e09 550
6aa54f1b 551 show_rom(d, PCI_ROM_ADDRESS1);
98e39e09
MM
552
553 if (verbose > 1)
da322bfb
MM
554 {
555 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
556 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
557 FLAG(brc, PCI_BRIDGE_CTL_SERR),
558 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
559 FLAG(brc, PCI_BRIDGE_CTL_VGA),
560 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
561 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
562 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
563 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
564 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
565 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
566 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
567 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
568 }
e95c8373
MM
569
570 show_caps(d);
98e39e09
MM
571}
572
2f48f637
MM
573static void
574show_htype2(struct device *d)
575{
96e4f295
MM
576 int i;
577 word cmd = get_conf_word(d, PCI_COMMAND);
578 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
84d437d6 579 word exca;
e306e911 580 int verb = verbose > 2;
96e4f295
MM
581
582 show_bases(d, 1);
583 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
584 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
585 get_conf_byte(d, PCI_CB_CARD_BUS),
586 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
587 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
de7ef8bc 588 for (i=0; i<2; i++)
96e4f295
MM
589 {
590 int p = 8*i;
591 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
592 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
e306e911 593 if (limit > base || verb)
81077814 594 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM
595 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
596 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
597 }
de7ef8bc 598 for (i=0; i<2; i++)
96e4f295
MM
599 {
600 int p = 8*i;
601 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
602 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
603 if (!(base & PCI_IO_RANGE_TYPE_32))
604 {
605 base &= 0xffff;
606 limit &= 0xffff;
607 }
608 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 609 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM
610 if (base <= limit || verb)
611 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
612 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM
613 }
614
615 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
616 printf("\tSecondary status: SERR\n");
617 if (verbose > 1)
618 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM
619 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
620 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
621 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
622 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
623 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
624 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
625 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
626 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
84d437d6
MM
627
628 if (d->config_cached < 128)
629 {
630 printf("\t<access denied to the rest>\n");
631 return;
632 }
633
634 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
96e4f295
MM
635 if (exca)
636 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM
637}
638
98e39e09
MM
639static void
640show_verbose(struct device *d)
641{
727ce158 642 struct pci_dev *p = d->dev;
98e39e09
MM
643 word status = get_conf_word(d, PCI_STATUS);
644 word cmd = get_conf_word(d, PCI_COMMAND);
c2b144ef 645 word class = p->device_class;
98e39e09
MM
646 byte bist = get_conf_byte(d, PCI_BIST);
647 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
648 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
649 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
650 byte max_lat, min_gnt;
651 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
727ce158 652 unsigned int irq = p->irq;
98e39e09
MM
653
654 show_terse(d);
655
98e39e09
MM
656 switch (htype)
657 {
2f48f637
MM
658 case PCI_HEADER_TYPE_NORMAL:
659 if (class == PCI_CLASS_BRIDGE_PCI)
56164f4f 660 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
98e39e09
MM
661 max_lat = get_conf_byte(d, PCI_MAX_LAT);
662 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
98e39e09 663 break;
2f48f637 664 case PCI_HEADER_TYPE_BRIDGE:
cce2caac 665 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 666 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
727ce158 667 irq = int_pin = min_gnt = max_lat = 0;
2f48f637
MM
668 break;
669 case PCI_HEADER_TYPE_CARDBUS:
670 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 671 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
96e4f295 672 min_gnt = max_lat = 0;
98e39e09
MM
673 break;
674 default:
675 printf("\t!!! Unknown header type %02x\n", htype);
676 return;
677 }
678
2849a165
AC
679 if (p->phy_slot)
680 printf("\tPhysical Slot: %s\n", p->phy_slot);
681
98e39e09
MM
682 if (verbose > 1)
683 {
da322bfb 684 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
1c31d620
MM
685 FLAG(cmd, PCI_COMMAND_IO),
686 FLAG(cmd, PCI_COMMAND_MEMORY),
687 FLAG(cmd, PCI_COMMAND_MASTER),
688 FLAG(cmd, PCI_COMMAND_SPECIAL),
689 FLAG(cmd, PCI_COMMAND_INVALIDATE),
690 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
691 FLAG(cmd, PCI_COMMAND_PARITY),
692 FLAG(cmd, PCI_COMMAND_WAIT),
693 FLAG(cmd, PCI_COMMAND_SERR),
da322bfb
MM
694 FLAG(cmd, PCI_COMMAND_FAST_BACK),
695 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
696 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
1c31d620
MM
697 FLAG(status, PCI_STATUS_CAP_LIST),
698 FLAG(status, PCI_STATUS_66MHZ),
699 FLAG(status, PCI_STATUS_UDF),
700 FLAG(status, PCI_STATUS_FAST_BACK),
701 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM
702 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
703 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
704 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM
705 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
706 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
707 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
708 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
da322bfb
MM
709 FLAG(status, PCI_STATUS_DETECTED_PARITY),
710 FLAG(status, PCI_STATUS_INTx));
98e39e09
MM
711 if (cmd & PCI_COMMAND_MASTER)
712 {
56164f4f
MM
713 printf("\tLatency: %d", latency);
714 if (min_gnt || max_lat)
715 {
716 printf(" (");
717 if (min_gnt)
718 printf("%dns min", min_gnt*250);
719 if (min_gnt && max_lat)
720 printf(", ");
721 if (max_lat)
722 printf("%dns max", max_lat*250);
723 putchar(')');
724 }
98e39e09 725 if (cache_line)
7a61b93c 726 printf(", Cache Line Size: %d bytes", cache_line * 4);
98e39e09
MM
727 putchar('\n');
728 }
727ce158 729 if (int_pin || irq)
9739916e 730 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
727ce158 731 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
98e39e09
MM
732 }
733 else
734 {
735 printf("\tFlags: ");
736 if (cmd & PCI_COMMAND_MASTER)
737 printf("bus master, ");
738 if (cmd & PCI_COMMAND_VGA_PALETTE)
739 printf("VGA palette snoop, ");
740 if (cmd & PCI_COMMAND_WAIT)
741 printf("stepping, ");
742 if (cmd & PCI_COMMAND_FAST_BACK)
743 printf("fast Back2Back, ");
744 if (status & PCI_STATUS_66MHZ)
c1c2c30e 745 printf("66MHz, ");
98e39e09
MM
746 if (status & PCI_STATUS_UDF)
747 printf("user-definable features, ");
748 printf("%s devsel",
749 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
750 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
751 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
752 if (cmd & PCI_COMMAND_MASTER)
753 printf(", latency %d", latency);
727ce158 754 if (irq)
9739916e 755 printf(", IRQ " PCIIRQ_FMT, irq);
98e39e09
MM
756 putchar('\n');
757 }
758
759 if (bist & PCI_BIST_CAPABLE)
760 {
761 if (bist & PCI_BIST_START)
762 printf("\tBIST is running\n");
763 else
764 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
765 }
766
767 switch (htype)
768 {
2f48f637 769 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
770 show_htype0(d);
771 break;
2f48f637 772 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
773 show_htype1(d);
774 break;
2f48f637
MM
775 case PCI_HEADER_TYPE_CARDBUS:
776 show_htype2(d);
777 break;
98e39e09
MM
778 }
779}
780
a387042e
MM
781/*** Machine-readable dumps ***/
782
98e39e09
MM
783static void
784show_hex_dump(struct device *d)
785{
09817437 786 unsigned int i, cnt;
98e39e09 787
84d437d6 788 cnt = d->config_cached;
a387042e 789 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
09817437
MM
790 {
791 cnt = 256;
a387042e 792 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
09817437
MM
793 cnt = 4096;
794 }
795
de7ef8bc 796 for (i=0; i<cnt; i++)
98e39e09
MM
797 {
798 if (! (i & 15))
799 printf("%02x:", i);
800 printf(" %02x", get_conf_byte(d, i));
801 if ((i & 15) == 15)
802 putchar('\n');
803 }
804}
805
13081e57
MM
806static void
807print_shell_escaped(char *c)
808{
809 printf(" \"");
810 while (*c)
811 {
812 if (*c == '"' || *c == '\\')
813 putchar('\\');
814 putchar(*c++);
815 }
816 putchar('"');
817}
818
0a33d0ec
MM
819static void
820show_machine(struct device *d)
821{
727ce158 822 struct pci_dev *p = d->dev;
0a33d0ec 823 int c;
c1c952d2 824 word sv_id, sd_id;
727ce158 825 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f 826
c1c952d2 827 get_subid(d, &sv_id, &sd_id);
0a33d0ec
MM
828
829 if (verbose)
830 {
a387042e 831 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
84c8d1bb
MM
832 show_slot_name(d);
833 putchar('\n');
727ce158 834 printf("Class:\t%s\n",
c2b144ef 835 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
727ce158 836 printf("Vendor:\t%s\n",
224707ba 837 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
727ce158 838 printf("Device:\t%s\n",
224707ba 839 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
ce503b7f
MM
840 if (sv_id && sv_id != 0xffff)
841 {
727ce158 842 printf("SVendor:\t%s\n",
a99c0d69 843 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
727ce158 844 printf("SDevice:\t%s\n",
d4798a32 845 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 846 }
2849a165
AC
847 if (p->phy_slot)
848 printf("PhySlot:\t%s\n", p->phy_slot);
0a33d0ec
MM
849 if (c = get_conf_byte(d, PCI_REVISION_ID))
850 printf("Rev:\t%02x\n", c);
851 if (c = get_conf_byte(d, PCI_CLASS_PROG))
852 printf("ProgIf:\t%02x\n", c);
11339c0d
MM
853 if (opt_kernel)
854 show_kernel_machine(d);
0a33d0ec
MM
855 }
856 else
857 {
84c8d1bb 858 show_slot_name(d);
13081e57
MM
859 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
860 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
861 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
0a33d0ec
MM
862 if (c = get_conf_byte(d, PCI_REVISION_ID))
863 printf(" -r%02x", c);
864 if (c = get_conf_byte(d, PCI_CLASS_PROG))
865 printf(" -p%02x", c);
ce503b7f 866 if (sv_id && sv_id != 0xffff)
13081e57
MM
867 {
868 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
869 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
870 }
ce503b7f
MM
871 else
872 printf(" \"\" \"\"");
0a33d0ec
MM
873 putchar('\n');
874 }
875}
876
a387042e
MM
877/*** Main show function ***/
878
c7a34993 879void
1812a795
MM
880show_device(struct device *d)
881{
a387042e 882 if (opt_machine)
1812a795 883 show_machine(d);
1812a795 884 else
11339c0d
MM
885 {
886 if (verbose)
887 show_verbose(d);
888 else
889 show_terse(d);
890 if (opt_kernel || verbose)
891 show_kernel(d);
892 }
a387042e 893 if (opt_hex)
1812a795 894 show_hex_dump(d);
a387042e 895 if (verbose || opt_hex)
1812a795
MM
896 putchar('\n');
897}
898
98e39e09
MM
899static void
900show(void)
901{
902 struct device *d;
903
de7ef8bc 904 for (d=first_dev; d; d=d->next)
1812a795 905 show_device(d);
98e39e09
MM
906}
907
908/* Main */
909
910int
911main(int argc, char **argv)
912{
913 int i;
e4842ff3 914 char *msg;
98e39e09 915
496d4021
MM
916 if (argc == 2 && !strcmp(argv[1], "--version"))
917 {
918 puts("lspci version " PCIUTILS_VERSION);
919 return 0;
920 }
727ce158
MM
921
922 pacc = pci_alloc();
923 pacc->error = die;
924 pci_filter_init(pacc, &filter);
925
98e39e09
MM
926 while ((i = getopt(argc, argv, options)) != -1)
927 switch (i)
928 {
929 case 'n':
bc2eed2d 930 pacc->numeric_ids++;
98e39e09
MM
931 break;
932 case 'v':
933 verbose++;
934 break;
935 case 'b':
727ce158 936 pacc->buscentric = 1;
98e39e09 937 break;
e4842ff3 938 case 's':
727ce158 939 if (msg = pci_filter_parse_slot(&filter, optarg))
b7fd8e19 940 die("-s: %s", msg);
98e39e09 941 break;
e4842ff3 942 case 'd':
727ce158
MM
943 if (msg = pci_filter_parse_id(&filter, optarg))
944 die("-d: %s", msg);
98e39e09
MM
945 break;
946 case 'x':
a387042e 947 opt_hex++;
98e39e09 948 break;
6d0dc0fd 949 case 't':
a387042e 950 opt_tree++;
6d0dc0fd 951 break;
18928b91 952 case 'i':
cc062b4a 953 pci_set_name_list_path(pacc, optarg, 0);
18928b91 954 break;
0a33d0ec 955 case 'm':
a387042e 956 opt_machine++;
0a33d0ec 957 break;
c1c952d2
MM
958 case 'p':
959 opt_pcimap = optarg;
960 break;
1b99a704 961#ifdef PCI_OS_LINUX
11339c0d
MM
962 case 'k':
963 opt_kernel++;
964 break;
1b99a704 965#endif
1812a795 966 case 'M':
a387042e 967 opt_map_mode++;
1812a795 968 break;
af61eb25 969 case 'D':
a387042e 970 opt_domains = 2;
af61eb25 971 break;
e022789d 972#ifdef PCI_USE_DNS
cca2f7c6
MM
973 case 'q':
974 opt_query_dns++;
975 break;
976 case 'Q':
977 opt_query_all = 1;
978 break;
e022789d
MM
979#else
980 case 'q':
981 case 'Q':
982 die("DNS queries are not available in this version");
983#endif
98e39e09 984 default:
727ce158
MM
985 if (parse_generic_option(i, pacc, optarg))
986 break;
98e39e09 987 bad:
727ce158 988 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
989 return 1;
990 }
991 if (optind < argc)
992 goto bad;
993
cca2f7c6
MM
994 if (opt_query_dns)
995 {
996 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
997 if (opt_query_dns > 1)
998 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
999 }
1000 if (opt_query_all)
1001 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1002
727ce158 1003 pci_init(pacc);
a387042e 1004 if (opt_map_mode)
1812a795 1005 map_the_bus();
6d0dc0fd 1006 else
1812a795
MM
1007 {
1008 scan_devices();
1009 sort_them();
a387042e 1010 if (opt_tree)
1812a795
MM
1011 show_forest();
1012 else
1013 show();
1014 }
727ce158 1015 pci_cleanup(pacc);
98e39e09 1016
934e7e36 1017 return (seen_errors ? 2 : 0);
98e39e09 1018}