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ls-ecaps: Correct the link state reporting
[thirdparty/pciutils.git] / setpci.c
CommitLineData
e4842ff3 1/*
4284af58 2 * The PCI Utilities -- Manipulate PCI Configuration Registers
e4842ff3 3 *
203854cc 4 * Copyright (c) 1998--2020 Martin Mares <mj@ucw.cz>
e4842ff3 5 *
61829219
MM
6 * Can be freely distributed and used under the terms of the GNU GPL v2+.
7 *
8 * SPDX-License-Identifier: GPL-2.0-or-later
e4842ff3
MM
9 */
10
11#include <stdio.h>
12#include <string.h>
13#include <stdlib.h>
727ce158 14#include <stdarg.h>
ace49a96 15#include <errno.h>
7aad822b 16
1b99a704 17#define PCIUTILS_SETPCI
e4842ff3
MM
18#include "pciutils.h"
19
20static int force; /* Don't complain if no devices match */
21static int verbose; /* Verbosity level */
b2c9b373 22static int demo_mode; /* Only show */
203854cc 23static int allow_raw_access;
e4842ff3 24
81afa98c
MM
25const char program_name[] = "setpci";
26
727ce158 27static struct pci_access *pacc;
e4842ff3 28
b7351143
MM
29struct value {
30 unsigned int value;
31 unsigned int mask;
32};
33
e4842ff3
MM
34struct op {
35 struct op *next;
27d4e0fb
MM
36 u16 cap_type; /* PCI_CAP_xxx or 0 */
37 u16 cap_id;
94a53fc6
PR
38 const char *name;
39 unsigned int hdr_type_mask;
e4842ff3
MM
40 unsigned int addr;
41 unsigned int width; /* Byte width of the access */
ace49a96 42 unsigned int num_values; /* Number of values to write; 0=read */
6639fd17 43 unsigned int number; /* The n-th capability of that id */
b7351143 44 struct value values[0];
e4842ff3
MM
45};
46
203854cc
MM
47struct group {
48 struct group *next;
49 struct pci_filter filter;
50 struct op *first_op;
51 struct op **last_op;
52};
53
54static struct group *first_group, **last_group = &first_group;
55static int need_bus_scan;
b7351143 56static unsigned int max_values[] = { 0, 0xff, 0xffff, 0, 0xffffffff };
e4842ff3 57
203854cc
MM
58static int
59matches_single_device(struct group *group)
60{
61 struct pci_filter *f = &group->filter;
62 return (f->domain >= 0 && f->bus >= 0 && f->slot >= 0 && f->func >= 0);
63}
64
727ce158 65static struct pci_dev **
203854cc 66select_devices(struct group *group)
e4842ff3 67{
203854cc
MM
68 struct pci_filter *f = &group->filter;
69
70 if (!need_bus_scan && matches_single_device(group))
71 {
72 struct pci_dev **devs = xmalloc(sizeof(struct device *) * 2);
73 struct pci_dev *dev = pci_get_dev(pacc, f->domain, f->bus, f->slot, f->func);
74 int i = 0;
75 if (pci_filter_match(f, dev))
76 devs[i++] = dev;
77 devs[i] = NULL;
78 return devs;
79 }
80 else
81 {
82 struct pci_dev **devs, *dev;
83 int i = 0;
84 int cnt = 1;
85
86 for (dev = pacc->devices; dev; dev = dev->next)
87 if (pci_filter_match(f, dev))
88 cnt++;
89
90 devs = xmalloc(sizeof(struct device *) * cnt);
91
92 for (dev = pacc->devices; dev; dev = dev->next)
93 if (pci_filter_match(f, dev))
94 devs[i++] = dev;
95
96 devs[i] = NULL;
97 return devs;
98 }
e4842ff3
MM
99}
100
256fabef 101static void PCI_PRINTF(1,2)
f34b0c7a
MM
102trace(const char *fmt, ...)
103{
104 va_list args;
105 va_start(args, fmt);
106 if (verbose)
107 vprintf(fmt, args);
108 va_end(args);
109}
110
e4842ff3 111static void
727ce158 112exec_op(struct op *op, struct pci_dev *dev)
e4842ff3 113{
f34b0c7a
MM
114 const char * const formats[] = { NULL, " %02x", " %04x", NULL, " %08x" };
115 const char * const mask_formats[] = { NULL, " %02x->(%02x:%02x)->%02x", " %04x->(%04x:%04x)->%04x", NULL, " %08x->(%08x:%08x)->%08x" };
ace49a96
MM
116 unsigned int i, x, y;
117 int addr = 0;
b7351143 118 int width = op->width;
f34b0c7a 119 char slot[16];
e4842ff3 120
f34b0c7a 121 sprintf(slot, "%04x:%02x:%02x.%x", dev->domain, dev->bus, dev->dev, dev->func);
df59fab4 122 trace("%s ", slot);
27d4e0fb 123 if (op->cap_type)
ace49a96
MM
124 {
125 struct pci_cap *cap;
6639fd17
DS
126 unsigned int cap_nr = op->number;
127 cap = pci_find_cap_nr(dev, op->cap_id, op->cap_type, &cap_nr);
ace49a96 128 if (cap)
6639fd17
DS
129 addr = cap->addr;
130 else if (cap_nr == 0)
131 die("%s: Instance #%d of %s %04x not found - there are no capabilities with that id.", slot,
132 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"),
133 op->cap_id);
ace49a96 134 else
785b2e0e 135 die("%s: Instance #%d of %s %04x not found - there %s only %d %s with that id.", slot,
6639fd17 136 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"),
785b2e0e
DS
137 op->cap_id, ((cap_nr == 1) ? "is" : "are"), cap_nr,
138 ((cap_nr == 1) ? "capability" : "capabilities"));
6639fd17 139
df59fab4 140 trace(((op->cap_type == PCI_CAP_NORMAL) ? "(cap %02x @%02x) " : "(ecap %04x @%03x) "), op->cap_id, addr);
ace49a96
MM
141 }
142 addr += op->addr;
df59fab4 143 trace("@%02x", addr);
f34b0c7a
MM
144
145 /* We have already checked it when parsing, but addressing relative to capabilities can change the address. */
146 if (addr & (width-1))
147 die("%s: Unaligned access of width %d to register %04x", slot, width, addr);
148 if (addr + width > 0x1000)
149 die("%s: Access of width %d to register %04x out of range", slot, width, addr);
150
94a53fc6
PR
151 if (op->hdr_type_mask)
152 {
153 unsigned int hdr_type = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f;
154 if (hdr_type > 2 || !((1 << hdr_type) & op->hdr_type_mask))
155 die("%s: Does not have register %s.", slot, op->name);
156 }
157
ace49a96 158 if (op->num_values)
b7351143 159 {
de7ef8bc 160 for (i=0; i<op->num_values; i++)
b7351143
MM
161 {
162 if ((op->values[i].mask & max_values[width]) == max_values[width])
163 {
164 x = op->values[i].value;
f34b0c7a 165 trace(formats[width], op->values[i].value);
b7351143
MM
166 }
167 else
168 {
169 switch (width)
170 {
171 case 1:
172 y = pci_read_byte(dev, addr);
173 break;
174 case 2:
175 y = pci_read_word(dev, addr);
176 break;
177 default:
178 y = pci_read_long(dev, addr);
179 break;
180 }
181 x = (y & ~op->values[i].mask) | op->values[i].value;
f34b0c7a 182 trace(mask_formats[width], y, op->values[i].value, op->values[i].mask, x);
b7351143
MM
183 }
184 if (!demo_mode)
185 {
186 switch (width)
187 {
188 case 1:
189 pci_write_byte(dev, addr, x);
190 break;
191 case 2:
192 pci_write_word(dev, addr, x);
193 break;
194 default:
195 pci_write_long(dev, addr, x);
196 break;
197 }
198 }
199 addr += width;
200 }
f34b0c7a 201 trace("\n");
b7351143 202 }
e4842ff3
MM
203 else
204 {
f34b0c7a 205 trace(" = ");
b251f40b 206 switch (width)
b2c9b373 207 {
b251f40b
MM
208 case 1:
209 x = pci_read_byte(dev, addr);
210 break;
211 case 2:
212 x = pci_read_word(dev, addr);
213 break;
214 default:
215 x = pci_read_long(dev, addr);
216 break;
b2c9b373 217 }
f34b0c7a 218 printf(formats[width]+1, x);
b7351143 219 putchar('\n');
e4842ff3
MM
220 }
221}
222
223static void
203854cc 224execute(void)
e4842ff3 225{
203854cc
MM
226 struct group *group;
227 int group_cnt = 0;
e4842ff3 228
203854cc 229 for (group = first_group; group; group = group->next)
e4842ff3 230 {
203854cc
MM
231 struct pci_dev **vec = select_devices(group);
232 struct pci_dev *dev;
233 unsigned int i;
234
235 group_cnt++;
236 if (!vec[0] && !force)
237 fprintf(stderr, "setpci: Warning: No devices selected for operation group %d.\n", group_cnt);
238
239 for (i = 0; dev = vec[i]; i++)
240 {
241 struct op *op;
242 for (op = group->first_op; op; op = op->next)
243 exec_op(op, dev);
244 }
245
246 free(vec);
e4842ff3
MM
247 }
248}
249
b2c9b373 250static void
203854cc 251scan_ops(void)
b2c9b373 252{
203854cc
MM
253 struct group *group;
254 struct op *op;
255
256 for (group = first_group; group; group = group->next)
257 for (op = group->first_op; op; op = op->next)
258 {
259 if (op->num_values && !demo_mode)
260 pacc->writeable = 1;
261 if (!matches_single_device(group) || !allow_raw_access)
262 need_bus_scan = 1;
263 }
b2c9b373
MM
264}
265
266struct reg_name {
ace49a96 267 unsigned int cap;
3fe8a38d
MM
268 unsigned int offset;
269 unsigned int width;
94a53fc6 270 unsigned int hdr_type_mask;
b7351143 271 const char *name;
b2c9b373
MM
272};
273
b7351143 274static const struct reg_name pci_reg_names[] = {
94a53fc6
PR
275 { 0, 0x00, 2, 0x0, "VENDOR_ID" },
276 { 0, 0x02, 2, 0x0, "DEVICE_ID" },
277 { 0, 0x04, 2, 0x0, "COMMAND" },
278 { 0, 0x06, 2, 0x0, "STATUS" },
279 { 0, 0x08, 1, 0x0, "REVISION" },
280 { 0, 0x09, 1, 0x0, "CLASS_PROG" },
281 { 0, 0x0a, 2, 0x0, "CLASS_DEVICE" },
282 { 0, 0x0c, 1, 0x0, "CACHE_LINE_SIZE" },
283 { 0, 0x0d, 1, 0x0, "LATENCY_TIMER" },
284 { 0, 0x0e, 1, 0x0, "HEADER_TYPE" },
285 { 0, 0x0f, 1, 0x0, "BIST" },
286 { 0, 0x10, 4, 0x3, "BASE_ADDRESS_0" },
287 { 0, 0x14, 4, 0x3, "BASE_ADDRESS_1" },
288 { 0, 0x18, 4, 0x1, "BASE_ADDRESS_2" },
289 { 0, 0x1c, 4, 0x1, "BASE_ADDRESS_3" },
290 { 0, 0x20, 4, 0x1, "BASE_ADDRESS_4" },
291 { 0, 0x24, 4, 0x1, "BASE_ADDRESS_5" },
292 { 0, 0x28, 4, 0x1, "CARDBUS_CIS" },
293 { 0, 0x2c, 2, 0x1, "SUBSYSTEM_VENDOR_ID" },
294 { 0, 0x2e, 2, 0x1, "SUBSYSTEM_ID" },
295 { 0, 0x30, 4, 0x1, "ROM_ADDRESS" },
296 { 0, 0x34, 1, 0x3, "CAPABILITIES" },
297 { 0, 0x3c, 1, 0x3, "INTERRUPT_LINE" },
298 { 0, 0x3d, 1, 0x3, "INTERRUPT_PIN" },
299 { 0, 0x3e, 1, 0x1, "MIN_GNT" },
300 { 0, 0x3f, 1, 0x1, "MAX_LAT" },
301 { 0, 0x18, 1, 0x2, "PRIMARY_BUS" },
302 { 0, 0x19, 1, 0x2, "SECONDARY_BUS" },
303 { 0, 0x1a, 1, 0x2, "SUBORDINATE_BUS" },
304 { 0, 0x1b, 1, 0x2, "SEC_LATENCY_TIMER" },
305 { 0, 0x1c, 1, 0x2, "IO_BASE" },
306 { 0, 0x1d, 1, 0x2, "IO_LIMIT" },
307 { 0, 0x1e, 2, 0x2, "SEC_STATUS" },
308 { 0, 0x20, 2, 0x2, "MEMORY_BASE" },
309 { 0, 0x22, 2, 0x2, "MEMORY_LIMIT" },
310 { 0, 0x24, 2, 0x2, "PREF_MEMORY_BASE" },
311 { 0, 0x26, 2, 0x2, "PREF_MEMORY_LIMIT" },
312 { 0, 0x28, 4, 0x2, "PREF_BASE_UPPER32" },
313 { 0, 0x2c, 4, 0x2, "PREF_LIMIT_UPPER32" },
314 { 0, 0x30, 2, 0x2, "IO_BASE_UPPER16" },
315 { 0, 0x32, 2, 0x2, "IO_LIMIT_UPPER16" },
316 { 0, 0x38, 4, 0x2, "BRIDGE_ROM_ADDRESS" },
317 { 0, 0x3e, 2, 0x2, "BRIDGE_CONTROL" },
318 { 0, 0x10, 4, 0x4, "CB_CARDBUS_BASE" },
319 { 0, 0x14, 2, 0x4, "CB_CAPABILITIES" },
320 { 0, 0x16, 2, 0x4, "CB_SEC_STATUS" },
321 { 0, 0x18, 1, 0x4, "CB_BUS_NUMBER" },
322 { 0, 0x19, 1, 0x4, "CB_CARDBUS_NUMBER" },
323 { 0, 0x1a, 1, 0x4, "CB_SUBORDINATE_BUS" },
324 { 0, 0x1b, 1, 0x4, "CB_CARDBUS_LATENCY" },
325 { 0, 0x1c, 4, 0x4, "CB_MEMORY_BASE_0" },
326 { 0, 0x20, 4, 0x4, "CB_MEMORY_LIMIT_0" },
327 { 0, 0x24, 4, 0x4, "CB_MEMORY_BASE_1" },
328 { 0, 0x28, 4, 0x4, "CB_MEMORY_LIMIT_1" },
329 { 0, 0x2c, 2, 0x4, "CB_IO_BASE_0" },
330 { 0, 0x2e, 2, 0x4, "CB_IO_BASE_0_HI" },
331 { 0, 0x30, 2, 0x4, "CB_IO_LIMIT_0" },
332 { 0, 0x32, 2, 0x4, "CB_IO_LIMIT_0_HI" },
333 { 0, 0x34, 2, 0x4, "CB_IO_BASE_1" },
334 { 0, 0x36, 2, 0x4, "CB_IO_BASE_1_HI" },
335 { 0, 0x38, 2, 0x4, "CB_IO_LIMIT_1" },
336 { 0, 0x3a, 2, 0x4, "CB_IO_LIMIT_1_HI" },
337 { 0, 0x40, 2, 0x4, "CB_SUBSYSTEM_VENDOR_ID" },
338 { 0, 0x42, 2, 0x4, "CB_SUBSYSTEM_ID" },
339 { 0, 0x44, 4, 0x4, "CB_LEGACY_MODE_BASE" },
340 { 0x10001, 0, 0, 0x0, "CAP_PM" },
341 { 0x10002, 0, 0, 0x0, "CAP_AGP" },
342 { 0x10003, 0, 0, 0x0, "CAP_VPD" },
343 { 0x10004, 0, 0, 0x0, "CAP_SLOTID" },
344 { 0x10005, 0, 0, 0x0, "CAP_MSI" },
345 { 0x10006, 0, 0, 0x0, "CAP_CHSWP" },
346 { 0x10007, 0, 0, 0x0, "CAP_PCIX" },
347 { 0x10008, 0, 0, 0x0, "CAP_HT" },
348 { 0x10009, 0, 0, 0x0, "CAP_VNDR" },
349 { 0x1000a, 0, 0, 0x0, "CAP_DBG" },
350 { 0x1000b, 0, 0, 0x0, "CAP_CCRC" },
351 { 0x1000c, 0, 0, 0x0, "CAP_HOTPLUG" },
352 { 0x1000d, 0, 0, 0x0, "CAP_SSVID" },
353 { 0x1000e, 0, 0, 0x0, "CAP_AGP3" },
354 { 0x1000f, 0, 0, 0x0, "CAP_SECURE" },
355 { 0x10010, 0, 0, 0x0, "CAP_EXP" },
356 { 0x10011, 0, 0, 0x0, "CAP_MSIX" },
357 { 0x10012, 0, 0, 0x0, "CAP_SATA" },
358 { 0x10013, 0, 0, 0x0, "CAP_AF" },
359 { 0x10014, 0, 0, 0x0, "CAP_EA" },
360 { 0x20001, 0, 0, 0x0, "ECAP_AER" },
361 { 0x20002, 0, 0, 0x0, "ECAP_VC" },
362 { 0x20003, 0, 0, 0x0, "ECAP_DSN" },
363 { 0x20004, 0, 0, 0x0, "ECAP_PB" },
364 { 0x20005, 0, 0, 0x0, "ECAP_RCLINK" },
365 { 0x20006, 0, 0, 0x0, "ECAP_RCILINK" },
366 { 0x20007, 0, 0, 0x0, "ECAP_RCEC" },
367 { 0x20008, 0, 0, 0x0, "ECAP_MFVC" },
368 { 0x20009, 0, 0, 0x0, "ECAP_VC2" },
369 { 0x2000a, 0, 0, 0x0, "ECAP_RBCB" },
370 { 0x2000b, 0, 0, 0x0, "ECAP_VNDR" },
371 { 0x2000d, 0, 0, 0x0, "ECAP_ACS" },
372 { 0x2000e, 0, 0, 0x0, "ECAP_ARI" },
373 { 0x2000f, 0, 0, 0x0, "ECAP_ATS" },
374 { 0x20010, 0, 0, 0x0, "ECAP_SRIOV" },
375 { 0x20011, 0, 0, 0x0, "ECAP_MRIOV" },
376 { 0x20012, 0, 0, 0x0, "ECAP_MCAST" },
377 { 0x20013, 0, 0, 0x0, "ECAP_PRI" },
378 { 0x20015, 0, 0, 0x0, "ECAP_REBAR" },
379 { 0x20016, 0, 0, 0x0, "ECAP_DPA" },
380 { 0x20017, 0, 0, 0x0, "ECAP_TPH" },
381 { 0x20018, 0, 0, 0x0, "ECAP_LTR" },
382 { 0x20019, 0, 0, 0x0, "ECAP_SECPCI" },
383 { 0x2001a, 0, 0, 0x0, "ECAP_PMUX" },
384 { 0x2001b, 0, 0, 0x0, "ECAP_PASID" },
385 { 0x2001c, 0, 0, 0x0, "ECAP_LNR" },
386 { 0x2001d, 0, 0, 0x0, "ECAP_DPC" },
387 { 0x2001e, 0, 0, 0x0, "ECAP_L1PM" },
388 { 0x2001f, 0, 0, 0x0, "ECAP_PTM" },
389 { 0x20020, 0, 0, 0x0, "ECAP_M_PCIE" },
390 { 0x20021, 0, 0, 0x0, "ECAP_FRS" },
391 { 0x20022, 0, 0, 0x0, "ECAP_RTR" },
392 { 0x20023, 0, 0, 0x0, "ECAP_DVSEC" },
393 { 0x20024, 0, 0, 0x0, "ECAP_VF_REBAR" },
394 { 0x20025, 0, 0, 0x0, "ECAP_DLNK" },
395 { 0x20026, 0, 0, 0x0, "ECAP_16GT" },
396 { 0x20027, 0, 0, 0x0, "ECAP_LMR" },
397 { 0x20028, 0, 0, 0x0, "ECAP_HIER_ID" },
398 { 0x20029, 0, 0, 0x0, "ECAP_NPEM" },
42fc4263 399 { 0x20030, 0, 0, 0x0, "ECAP_IDE" },
94a53fc6 400 { 0, 0, 0, 0x0, NULL }
b2c9b373
MM
401};
402
a82ca638
MM
403static void
404dump_registers(void)
405{
406 const struct reg_name *r;
407
408 printf("cap pos w name\n");
409 for (r = pci_reg_names; r->name; r++)
410 {
411 if (r->cap >= 0x20000)
412 printf("%04x", r->cap - 0x20000);
413 else if (r->cap)
414 printf(" %02x", r->cap - 0x10000);
415 else
416 printf(" ");
417 printf(" %02x %c %s\n", r->offset, "-BW?L"[r->width], r->name);
418 }
419}
420
fa8deaa6
MM
421static void NONRET
422usage(void)
e4842ff3
MM
423{
424 fprintf(stderr,
6add52f5 425"Usage: setpci [<options>] (<device>+ <reg>[=<values>]*)*\n"
1b99a704
MM
426"\n"
427"General options:\n"
6add52f5
MM
428"-f\t\tDon't complain if there's nothing to do\n"
429"-v\t\tBe verbose\n"
430"-D\t\tList changes, don't commit them\n"
203854cc 431"-r\t\tUse raw access without bus scan if possible\n"
a82ca638 432"--dumpregs\tDump all known register names and exit\n"
1b99a704
MM
433"\n"
434"PCI access options:\n"
727ce158 435GENERIC_HELP
1b99a704
MM
436"\n"
437"Setting commands:\n"
84c8d1bb 438"<device>:\t-s [[[<domain>]:][<bus>]:][<slot>][.[<func>]]\n"
ace49a96 439"\t\t-d [<vendor>]:[<device>]\n"
6639fd17 440"<reg>:\t\t<base>[+<offset>][.(B|W|L)][@<number>]\n"
ace49a96
MM
441"<base>:\t\t<address>\n"
442"\t\t<named-register>\n"
443"\t\t[E]CAP_<capability-name>\n"
444"\t\t[E]CAP<capability-number>\n"
b7351143
MM
445"<values>:\t<value>[,<value>...]\n"
446"<value>:\t<hex>\n"
ace49a96 447"\t\t<hex>:<mask>\n");
fa8deaa6
MM
448 exit(0);
449}
450
451static void NONRET PCI_PRINTF(1,2)
452parse_err(const char *msg, ...)
453{
454 va_list args;
455 va_start(args, msg);
456 fprintf(stderr, "setpci: ");
457 vfprintf(stderr, msg, args);
458 fprintf(stderr, ".\nTry `setpci --help' for more information.\n");
e4842ff3
MM
459 exit(1);
460}
461
7b08ebab
MM
462static int
463parse_options(int argc, char **argv)
e4842ff3 464{
fa8deaa6 465 const char opts[] = GENERIC_OPTIONS;
7b08ebab 466 int i=1;
e4842ff3 467
fa8deaa6 468 if (argc == 2)
a82ca638 469 {
fa8deaa6
MM
470 if (!strcmp(argv[1], "--help"))
471 usage();
472 if (!strcmp(argv[1], "--version"))
1c7f2b08
MM
473 {
474 puts("setpci version " PCIUTILS_VERSION);
475 exit(0);
476 }
fa8deaa6 477 if (!strcmp(argv[1], "--dumpregs"))
1c7f2b08
MM
478 {
479 dump_registers();
480 exit(0);
481 }
a82ca638 482 }
727ce158 483
7b08ebab 484 while (i < argc && argv[i][0] == '-')
e4842ff3 485 {
b69fad0d 486 char *c = argv[i++] + 1;
e4842ff3 487 char *d = c;
727ce158 488 char *e;
e4842ff3
MM
489 while (*c)
490 switch (*c)
491 {
7b08ebab
MM
492 case 0:
493 break;
e4842ff3
MM
494 case 'v':
495 verbose++;
496 c++;
497 break;
498 case 'f':
499 force++;
500 c++;
501 break;
b2c9b373
MM
502 case 'D':
503 demo_mode++;
504 c++;
505 break;
203854cc
MM
506 case 'r':
507 allow_raw_access++;
508 c++;
509 break;
e4842ff3 510 default:
727ce158
MM
511 if (e = strchr(opts, *c))
512 {
513 char *arg;
514 c++;
515 if (e[1] == ':')
516 {
517 if (*c)
518 arg = c;
b69fad0d
MM
519 else if (i < argc)
520 arg = argv[i++];
727ce158 521 else
fa8deaa6 522 parse_err("Option -%c requires an argument", *e);
727ce158
MM
523 c = "";
524 }
525 else
526 arg = NULL;
527 if (!parse_generic_option(*e, pacc, arg))
fa8deaa6 528 parse_err("Unable to parse option -%c", *e);
727ce158
MM
529 }
530 else
531 {
532 if (c != d)
fa8deaa6 533 parse_err("Invalid or misplaced option -%c", *c);
b69fad0d 534 return i-1;
727ce158 535 }
e4842ff3 536 }
e4842ff3 537 }
e4842ff3 538
7b08ebab
MM
539 return i;
540}
e4842ff3 541
203854cc 542static int parse_filter(int argc, char **argv, int i, struct group *group)
b69fad0d
MM
543{
544 char *c = argv[i++];
545 char *d;
546
547 if (!c[1] || !strchr("sd", c[1]))
fa8deaa6 548 parse_err("Invalid option -%c", c[1]);
b69fad0d
MM
549 if (c[2])
550 d = (c[2] == '=') ? c+3 : c+2;
551 else if (i < argc)
552 d = argv[i++];
553 else
fa8deaa6 554 parse_err("Option -%c requires an argument", c[1]);
b69fad0d
MM
555 switch (c[1])
556 {
557 case 's':
203854cc 558 if (d = pci_filter_parse_slot(&group->filter, d))
fa8deaa6 559 parse_err("Unable to parse filter -s %s", d);
b69fad0d
MM
560 break;
561 case 'd':
203854cc 562 if (d = pci_filter_parse_id(&group->filter, d))
fa8deaa6 563 parse_err("Unable to parse filter -d %s", d);
b69fad0d
MM
564 break;
565 default:
fa8deaa6 566 parse_err("Unknown filter option -%c", c[1]);
b69fad0d
MM
567 }
568
569 return i;
570}
571
ace49a96
MM
572static const struct reg_name *parse_reg_name(char *name)
573{
574 const struct reg_name *r;
575
576 for (r = pci_reg_names; r->name; r++)
577 if (!strcasecmp(r->name, name))
578 return r;
579 return NULL;
580}
581
582static int parse_x32(char *c, char **stopp, unsigned int *resp)
583{
584 char *stop;
e2864327 585 unsigned long int l;
ace49a96
MM
586
587 if (!*c)
588 return -1;
589 errno = 0;
e2864327 590 l = strtoul(c, &stop, 16);
ace49a96
MM
591 if (errno)
592 return -1;
593 if ((l & ~0U) != l)
594 return -1;
595 *resp = l;
596 if (*stop)
597 {
598 if (stopp)
599 *stopp = stop;
600 return 0;
601 }
602 else
607fd241
MM
603 {
604 if (stopp)
605 *stopp = NULL;
606 return 1;
607 }
ace49a96
MM
608}
609
610static void parse_register(struct op *op, char *base)
611{
612 const struct reg_name *r;
27d4e0fb 613 unsigned int cap;
ace49a96 614
27d4e0fb 615 op->cap_type = op->cap_id = 0;
ace49a96 616 if (parse_x32(base, NULL, &op->addr) > 0)
27d4e0fb 617 return;
ace49a96
MM
618 else if (r = parse_reg_name(base))
619 {
27d4e0fb
MM
620 switch (r->cap & 0xff0000)
621 {
622 case 0x10000:
623 op->cap_type = PCI_CAP_NORMAL;
624 break;
625 case 0x20000:
626 op->cap_type = PCI_CAP_EXTENDED;
627 break;
628 }
629 op->cap_id = r->cap & 0xffff;
ace49a96 630 op->addr = r->offset;
94a53fc6
PR
631 op->hdr_type_mask = r->hdr_type_mask;
632 op->name = r->name;
ace49a96
MM
633 if (r->width && !op->width)
634 op->width = r->width;
635 return;
636 }
637 else if (!strncasecmp(base, "CAP", 3))
638 {
27d4e0fb 639 if (parse_x32(base+3, NULL, &cap) > 0 && cap < 0x100)
ace49a96 640 {
27d4e0fb
MM
641 op->cap_type = PCI_CAP_NORMAL;
642 op->cap_id = cap;
ace49a96
MM
643 op->addr = 0;
644 return;
645 }
646 }
647 else if (!strncasecmp(base, "ECAP", 4))
648 {
27d4e0fb 649 if (parse_x32(base+4, NULL, &cap) > 0 && cap < 0x1000)
ace49a96 650 {
27d4e0fb
MM
651 op->cap_type = PCI_CAP_EXTENDED;
652 op->cap_id = cap;
ace49a96
MM
653 op->addr = 0;
654 return;
655 }
656 }
fa8deaa6 657 parse_err("Unknown register \"%s\"", base);
ace49a96
MM
658}
659
203854cc 660static void parse_op(char *c, struct group *group)
b69fad0d 661{
6639fd17 662 char *base, *offset, *width, *value, *number;
ace49a96 663 char *e, *f;
b69fad0d
MM
664 int n, j;
665 struct op *op;
ace49a96
MM
666
667 /* Split the argument */
668 base = xstrdup(c);
669 if (value = strchr(base, '='))
670 *value++ = 0;
6639fd17
DS
671 if (number = strchr(base, '@'))
672 *number++ = 0;
ace49a96
MM
673 if (width = strchr(base, '.'))
674 *width++ = 0;
675 if (offset = strchr(base, '+'))
676 *offset++ = 0;
b69fad0d
MM
677
678 /* Look for setting of values and count how many */
b69fad0d 679 n = 0;
ace49a96 680 if (value)
b69fad0d 681 {
ace49a96 682 if (!*value)
fa8deaa6 683 parse_err("Missing value");
b69fad0d 684 n++;
ace49a96 685 for (e=value; *e; e++)
b69fad0d
MM
686 if (*e == ',')
687 n++;
688 }
689
690 /* Allocate the operation */
691 op = xmalloc(sizeof(struct op) + n*sizeof(struct value));
203854cc
MM
692 memset(op, 0, sizeof(struct op));
693 *group->last_op = op;
694 group->last_op = &op->next;
b69fad0d
MM
695 op->num_values = n;
696
ace49a96
MM
697 /* What is the width suffix? */
698 if (width)
b69fad0d 699 {
ace49a96 700 if (width[1])
fa8deaa6 701 parse_err("Invalid width \"%s\"", width);
ace49a96 702 switch (*width & 0xdf)
b69fad0d
MM
703 {
704 case 'B':
705 op->width = 1; break;
706 case 'W':
707 op->width = 2; break;
708 case 'L':
709 op->width = 4; break;
710 default:
fa8deaa6 711 parse_err("Invalid width \"%c\"", *width);
b69fad0d
MM
712 }
713 }
714 else
ace49a96
MM
715 op->width = 0;
716
6639fd17
DS
717 /* Check which n-th capability of the same id we want */
718 if (number)
719 {
720 unsigned int num;
721 if (parse_x32(number, NULL, &num) <= 0 || (int) num < 0)
722 parse_err("Invalid number \"%s\"", number);
723 op->number = num;
724
725 }
726 else
727 op->number = 0;
728
ace49a96
MM
729 /* Find the register */
730 parse_register(op, base);
731 if (!op->width)
fa8deaa6 732 parse_err("Missing width");
ace49a96
MM
733
734 /* Add offset */
735 if (offset)
b69fad0d 736 {
ace49a96
MM
737 unsigned int off;
738 if (parse_x32(offset, NULL, &off) <= 0 || off >= 0x1000)
fa8deaa6 739 parse_err("Invalid offset \"%s\"", offset);
ace49a96 740 op->addr += off;
b69fad0d 741 }
ace49a96
MM
742
743 /* Check range */
744 if (op->addr >= 0x1000 || op->addr + op->width*(n ? n : 1) > 0x1000)
fa8deaa6 745 parse_err("Register number %02x out of range", op->addr);
ace49a96 746 if (op->addr & (op->width - 1))
fa8deaa6 747 parse_err("Unaligned register address %02x", op->addr);
ace49a96
MM
748
749 /* Parse the values */
b69fad0d
MM
750 for (j=0; j<n; j++)
751 {
ace49a96
MM
752 unsigned int ll, lim;
753 e = strchr(value, ',');
b69fad0d
MM
754 if (e)
755 *e++ = 0;
f6476d65 756 if (parse_x32(value, &f, &ll) < 0 || f && *f != ':')
fa8deaa6 757 parse_err("Invalid value \"%s\"", value);
b69fad0d 758 lim = max_values[op->width];
fcca0ba5 759 if (ll > lim && ll < ~0U - lim)
fa8deaa6 760 parse_err("Value \"%s\" is out of range", value);
b69fad0d 761 op->values[j].value = ll;
f6476d65 762 if (f && *f == ':')
b69fad0d 763 {
ace49a96 764 if (parse_x32(f+1, NULL, &ll) <= 0)
fa8deaa6 765 parse_err("Invalid mask \"%s\"", f+1);
fcca0ba5 766 if (ll > lim && ll < ~0U - lim)
fa8deaa6 767 parse_err("Mask \"%s\" is out of range", f+1);
b69fad0d
MM
768 op->values[j].mask = ll;
769 op->values[j].value &= ll;
770 }
771 else
772 op->values[j].mask = ~0U;
ace49a96 773 value = e;
b69fad0d 774 }
203854cc
MM
775}
776
777static struct group *new_group(void)
778{
779 struct group *g = xmalloc(sizeof(*g));
ace49a96 780
203854cc
MM
781 memset(g, 0, sizeof(*g));
782 pci_filter_init(pacc, &g->filter);
783 g->last_op = &g->first_op;
784
785 *last_group = g;
786 last_group = &g->next;
787 return g;
b69fad0d
MM
788}
789
7b08ebab
MM
790static void parse_ops(int argc, char **argv, int i)
791{
203854cc 792 struct group *group = NULL;
7b08ebab
MM
793
794 while (i < argc)
e4842ff3 795 {
b69fad0d 796 char *c = argv[i++];
e4842ff3
MM
797
798 if (*c == '-')
799 {
203854cc
MM
800 if (!group || group->first_op)
801 group = new_group();
802 i = parse_filter(argc, argv, i-1, group);
e4842ff3 803 }
e4842ff3
MM
804 else
805 {
203854cc 806 if (!group)
fa8deaa6 807 parse_err("Filter specification expected");
203854cc 808 parse_op(c, group);
e4842ff3 809 }
e4842ff3 810 }
203854cc 811 if (!group)
fa8deaa6 812 parse_err("No operation specified");
7b08ebab
MM
813}
814
815int
816main(int argc, char **argv)
817{
818 int i;
819
820 pacc = pci_alloc();
821 pacc->error = die;
822 i = parse_options(argc, argv);
823
824 pci_init(pacc);
e4842ff3 825
7b08ebab 826 parse_ops(argc, argv, i);
203854cc
MM
827 scan_ops();
828
829 if (need_bus_scan)
830 pci_scan_bus(pacc);
831
832 execute();
e4842ff3
MM
833
834 return 0;
835}