sys-utils/lscpu-arm.c

   1 /*
   2  * lscpu-arm.c - ARM CPU identification tables
   3  *
   4  * Copyright (C) 2018 Riku Voipio <riku.voipio@iki.fi>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it would be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * The information here is gathered from
  21  *  - ARM manuals
  22  *  - Linux kernel: arch/armX/include/asm/cputype.h
  23  *  - GCC sources: config/arch/arch-cores.def
  24  *  - Ancient wisdom
  25  */
  26 #include "lscpu.h"
  27
  28 struct id_part {
  29     const int id;
  30     const char* name;
  31 };
  32
  33 static const struct id_part arm_part[] = {
  34     { 0x810, "ARM810" },
  35     { 0x920, "ARM920" },
  36     { 0x922, "ARM922" },
  37     { 0x926, "ARM926" },
  38     { 0x940, "ARM940" },
  39     { 0x946, "ARM946" },
  40     { 0x966, "ARM966" },
  41     { 0xa20, "ARM1020" },
  42     { 0xa22, "ARM1022" },
  43     { 0xa26, "ARM1026" },
  44     { 0xb02, "ARM11 MPCore" },
  45     { 0xb36, "ARM1136" },
  46     { 0xb56, "ARM1156" },
  47     { 0xb76, "ARM1176" },
  48     { 0xc05, "Cortex-A5" },
  49     { 0xc07, "Cortex-A7" },
  50     { 0xc08, "Cortex-A8" },
  51     { 0xc09, "Cortex-A9" },
  52     { 0xc0d, "Cortex-A17" },    /* Originally A12 */
  53     { 0xc0f, "Cortex-A15" },
  54     { 0xc0e, "Cortex-A17" },
  55     { 0xc14, "Cortex-R4" },
  56     { 0xc15, "Cortex-R5" },
  57     { 0xc17, "Cortex-R7" },
  58     { 0xc18, "Cortex-R8" },
  59     { 0xc20, "Cortex-M0" },
  60     { 0xc21, "Cortex-M1" },
  61     { 0xc23, "Cortex-M3" },
  62     { 0xc24, "Cortex-M4" },
  63     { 0xc27, "Cortex-M7" },
  64     { 0xc60, "Cortex-M0+" },
  65     { 0xd01, "Cortex-A32" },
  66     { 0xd03, "Cortex-A53" },
  67     { 0xd04, "Cortex-A35" },
  68     { 0xd05, "Cortex-A55" },
  69     { 0xd07, "Cortex-A57" },
  70     { 0xd08, "Cortex-A72" },
  71     { 0xd09, "Cortex-A73" },
  72     { 0xd0a, "Cortex-A75" },
  73     { 0xd0b, "Cortex-A76" },
  74     { 0xd0c, "Neoverse-N1" },
  75     { 0xd13, "Cortex-R52" },
  76     { 0xd20, "Cortex-M23" },
  77     { 0xd21, "Cortex-M33" },
  78     { 0xd4a, "Neoverse-E1" },
  79     { -1, "unknown" },
  80 };
  81
  82 static const struct id_part brcm_part[] = {
  83     { 0x0f, "Brahma B15" },
  84     { 0x100, "Brahma B53" },
  85     { 0x516, "ThunderX2" },
  86     { -1, "unknown" },
  87 };
  88
  89 static const struct id_part dec_part[] = {
  90     { 0xa10, "SA110" },
  91     { 0xa11, "SA1100" },
  92     { -1, "unknown" },
  93 };
  94
  95 static const struct id_part cavium_part[] = {
  96     { 0x0a0, "ThunderX" },
  97     { 0x0a1, "ThunderX 88XX" },
  98     { 0x0a2, "ThunderX 81XX" },
  99     { 0x0a3, "ThunderX 83XX" },
 100     { 0x0af, "ThunderX2 99xx" },
 101     { -1, "unknown" },
 102 };
 103
 104 static const struct id_part apm_part[] = {
 105     { 0x000, "X-Gene" },
 106     { -1, "unknown" },
 107 };
 108
 109 static const struct id_part qcom_part[] = {
 110     { 0x00f, "Scorpion" },
 111     { 0x02d, "Scorpion" },
 112     { 0x04d, "Krait" },
 113     { 0x06f, "Krait" },
 114     { 0x201, "Kryo" },
 115     { 0x205, "Kryo" },
 116     { 0x211, "Kryo" },
 117     { 0x800, "Falkor V1/Kryo" },
 118     { 0x801, "Kryo V2" },
 119     { 0xc00, "Falkor" },
 120     { 0xc01, "Saphira" },
 121     { -1, "unknown" },
 122 };
 123
 124 static const struct id_part samsung_part[] = {
 125     { 0x001, "exynos-m1" },
 126     { -1, "unknown" },
 127 };
 128
 129 static const struct id_part nvidia_part[] = {
 130     { 0x000, "Denver" },
 131     { 0x003, "Denver 2" },
 132     { -1, "unknown" },
 133 };
 134
 135 static const struct id_part marvell_part[] = {
 136     { 0x131, "Feroceon 88FR131" },
 137     { 0x581, "PJ4/PJ4b" },
 138     { 0x584, "PJ4B-MP" },
 139     { -1, "unknown" },
 140 };
 141
 142 static const struct id_part faraday_part[] = {
 143     { 0x526, "FA526" },
 144     { 0x626, "FA626" },
 145     { -1, "unknown" },
 146 };
 147
 148 static const struct id_part intel_part[] = {
 149     { 0x200, "i80200" },
 150     { 0x210, "PXA250A" },
 151     { 0x212, "PXA210A" },
 152     { 0x242, "i80321-400" },
 153     { 0x243, "i80321-600" },
 154     { 0x290, "PXA250B/PXA26x" },
 155     { 0x292, "PXA210B" },
 156     { 0x2c2, "i80321-400-B0" },
 157     { 0x2c3, "i80321-600-B0" },
 158     { 0x2d0, "PXA250C/PXA255/PXA26x" },
 159     { 0x2d2, "PXA210C" },
 160     { 0x411, "PXA27x" },
 161     { 0x41c, "IPX425-533" },
 162     { 0x41d, "IPX425-400" },
 163     { 0x41f, "IPX425-266" },
 164     { 0x682, "PXA32x" },
 165     { 0x683, "PXA930/PXA935" },
 166     { 0x688, "PXA30x" },
 167     { 0x689, "PXA31x" },
 168     { 0xb11, "SA1110" },
 169     { 0xc12, "IPX1200" },
 170     { -1, "unknown" },
 171 };
 172
 173 static const struct id_part unknown_part[] = {
 174     { -1, "unknown" },
 175 };
 176
 177 struct hw_impl {
 178    const int    id;
 179    const struct id_part     *parts;
 180    const char   *name;
 181 };
 182
 183 static const struct hw_impl hw_implementer[] = {
 184     { 0x41, arm_part,     "ARM" },
 185     { 0x42, brcm_part,    "Broadcom" },
 186     { 0x43, cavium_part,  "Cavium" },
 187     { 0x44, dec_part,     "DEC" },
 188     { 0x4e, nvidia_part,  "Nvidia" },
 189     { 0x50, apm_part,     "APM" },
 190     { 0x51, qcom_part,    "Qualcomm" },
 191     { 0x53, samsung_part, "Samsung" },
 192     { 0x56, marvell_part, "Marvell" },
 193     { 0x66, faraday_part, "Faraday" },
 194     { 0x69, intel_part,   "Intel" },
 195     { -1,   unknown_part, "unknown" },
 196 };
 197
 198 void arm_cpu_decode(struct lscpu_desc *desc)
 199 {
 200         int j, impl, part;
 201         const struct id_part *parts = NULL;
 202         char *end;
 203
 204         if (desc->vendor == NULL || desc->model == NULL)
 205                 return;
 206         if ((strncmp(desc->vendor,"0x",2) || strncmp(desc->model,"0x",2) ))
 207                 return;
 208
 209         errno = 0;
 210         impl = (int) strtol(desc->vendor, &end, 0);
 211         if (errno || desc->vendor == end)
 212                 return;
 213
 214         errno = 0;
 215         part = (int) strtol(desc->model, &end, 0);
 216         if (errno || desc->model == end)
 217                 return;
 218
 219         for (j = 0; hw_implementer[j].id != -1; j++) {
 220                 if (hw_implementer[j].id == impl) {
 221                         parts = hw_implementer[j].parts;
 222                         desc->vendor = (char *) hw_implementer[j].name;
 223                         break;
 224                 }
 225         }
 226
 227         if (parts == NULL)
 228                 return;
 229
 230         for (j = 0; parts[j].id != -1; j++) {
 231                 if (parts[j].id == part) {
 232                         desc->modelname = (char *) parts[j].name;
 233                         break;
 234                 }
 235         }
 236
 237         /* Print out the rXpY string for ARM cores */
 238         if (impl == 0x41 && desc->revision && desc->stepping) {
 239                 int revision, variant;
 240                 char buf[8];
 241
 242                 errno = 0;
 243                 revision = (int) strtol(desc->revision, &end, 10);
 244                 if (errno || desc->revision == end)
 245                         return;
 246
 247                 errno = 0;
 248                 variant = (int) strtol(desc->stepping, &end, 0);
 249                 if (errno || desc->stepping == end)
 250                         return;
 251
 252                 snprintf(buf, sizeof(buf), "r%dp%d", variant, revision);
 253                 desc->stepping = xstrdup(buf);
 254         }
 255 }