]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
x86: don't accept FI{LD,STP,STTP}LL in Intel syntax mode
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
4ed21b58
JB
12020-03-06 Jan Beulich <jbeulich@suse.com>
2
3 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
4 alongside !norex64 ones.
5 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
6 with both 32- and 64-bit GPR operands.
7 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
8 32- and 64-bit GPR operands.
9 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
10 testsuite/gas/i386/x86-64-avx512bw.d,
11 testsuite/gas/i386/x86-64-avx512f-intel.d,
12 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
13
643bb870
JB
142020-03-06 Jan Beulich <jbeulich@suse.com>
15
16 * config/tc-i386.c (md_assemble): Drop use of rex64.
17 (process_suffix): For REX.W for 64-bit CRC32.
18
a23b33b3
JB
192020-03-06 Jan Beulich <jbeulich@suse.com>
20
21 * config/tc-i386.c (i386_addressing_mode): For 32-bit
22 addressing for MPX insns without base/index.
23 * testsuite/gas/i386/mpx-16bit.s,
24 * testsuite/gas/i386/mpx-16bit.d: New.
25 * testsuite/gas/i386/i386.exp: Run new test.
26
a0497384
JB
272020-03-06 Jan Beulich <jbeulich@suse.com>
28
29 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
30 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
31 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
32 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
33 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
34 as well as a BSWAP one.
35 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
36 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
37 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
38 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
39 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
40 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
41 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
42 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
43 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
44 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
45 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
46 testsuite/gas/i386/vmx.d: Adjust expectations.
47
b630c145
JB
482020-03-06 Jan Beulich <jbeulich@suse.com>
49
50 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
51 from having their operands swapped.
52 * testsuite/gas/i386/waitpkg.s,
53 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
54 3-operand cases as well as testing of 16-bit code generation.
55 * testsuite/gas/i386/waitpkg.d,
56 testsuite/gas/i386/waitpkg-intel.d,
57 testsuite/gas/i386/x86-64-waitpkg.d,
58 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
59
de48783e
NC
602020-03-04 Nelson Chu <nelson.chu@sifive.com>
61
dee35d02
NC
62 * config/tc-riscv.c (percent_op_utype): Support the modifier
63 %got_pcrel_hi.
64 * doc/c-riscv.texi: Add documentation.
65 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
66 modifier %got_pcrel_hi.
67 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
68 * testsuite/gas/riscv/relax-reloc.d: Likewise.
69 * testsuite/gas/riscv/relax-reloc.s: Likewise.
70
de48783e
NC
71 * doc/c-riscv.texi (relocation modifiers): Add documentation.
72 (RISC-V-Formats): Update the section name from "Instruction Formats"
73 to "RISC-V Instruction Formats".
74
749479c8
AO
752020-03-04 Alexandre Oliva <oliva@adacore.com>
76
77 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
78 detected in a section which does not have at least 4 byte
79 alignment.
80 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
81 * testsuite/gas/arm/ldr-t.s: Likewise.
82 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
83 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
84 disassembly, ignoring any NOPs that may have been inserted because
85 of section alignment.
86 * testsuite/gas/arm/ldr-t.d: Likewise.
87
a847e322
JB
882020-03-04 Jan Beulich <jbeulich@suse.com>
89
90 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
91 * doc/c-i386.texi: Mention sev_es.
92 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
93 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
94 expectations.
95 * testsuite/gas/i386/arch-13-znver1.d,
96 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
97
3cd7f3e3
L
982020-03-03 H.J. Lu <hongjiu.lu@intel.com>
99
100 * config/tc-i386.c (match_template): Replace ignoresize and
101 defaultsize with mnemonicsize.
102 (process_suffix): Likewise.
103
b8ba1385
SB
1042020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
105
106 PR 25627
107 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
108 instruction LD IY,(HL).
109 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
110 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
111 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
112 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
113
10d97a0f
L
1142020-03-03 H.J. Lu <hongjiu.lu@intel.com>
115
116 PR gas/25622
117 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
118 x86-64-default-suffix-avx.
119 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
120 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
121 * testsuite/gas/i386/noreg64.d: Updated.
122 * testsuite/gas/i386/noreg64.l: Likewise.
123 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
124 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
125 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
126
8326546e
SB
1272020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
128
129 PR 25604
130 * config/tc-z80.c (contains_register): Prevent an illegal memory
131 access when checking an expression for a register name.
132
e3e896e6
AM
1332020-03-03 Alan Modra <amodra@gmail.com>
134
135 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
136 support.
137
a4dd6c97
AM
1382020-03-02 Alan Modra <amodra@gmail.com>
139
140 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
141 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
142 and .sbss sections.
143 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
144 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
145 (s3_s_score_lcomm): Likewise.
146 * config/tc-score7.c: Similarly.
147 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
148
dec7b24b
YS
1492020-02-28 YunQiang Su <syq@debian.org>
150
151 PR gas/25539
152 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
153 to handle multi-labels.
154 (has_label_name): New.
155
cceb53b8
MM
1562020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
157
158 * config/tc-arm.c (enum pred_instruction_type): Remove
159 NEUTRAL_IT_NO_VPT_INSN predication type.
160 (cxn_handle_predication): Modify to require condition suffixes.
161 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
162 * testsuite/gas/arm/cde-scalar.s: Update test.
163 * testsuite/gas/arm/cde-warnings.l: Update test.
164 * testsuite/gas/arm/cde-warnings.s: Update test.
165
da3ec71f
AM
1662020-02-26 Alan Modra <amodra@gmail.com>
167
168 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
169 N_() on empty string.
170
42135cad
AM
1712020-02-26 Alan Modra <amodra@gmail.com>
172
173 * read.c (read_a_source_file): Call strncpy with length one
174 less than size of original_case_string.
175
dc1e8a47
AM
1762020-02-26 Alan Modra <amodra@gmail.com>
177
178 * config/obj-elf.c: Indent labels correctly.
179 * config/obj-macho.c: Likewise.
180 * config/tc-aarch64.c: Likewise.
181 * config/tc-alpha.c: Likewise.
182 * config/tc-arm.c: Likewise.
183 * config/tc-cr16.c: Likewise.
184 * config/tc-crx.c: Likewise.
185 * config/tc-frv.c: Likewise.
186 * config/tc-i386-intel.c: Likewise.
187 * config/tc-i386.c: Likewise.
188 * config/tc-ia64.c: Likewise.
189 * config/tc-mn10200.c: Likewise.
190 * config/tc-mn10300.c: Likewise.
191 * config/tc-nds32.c: Likewise.
192 * config/tc-riscv.c: Likewise.
193 * config/tc-s12z.c: Likewise.
194 * config/tc-xtensa.c: Likewise.
195 * config/tc-z80.c: Likewise.
196 * read.c: Likewise.
197 * symbols.c: Likewise.
198 * write.c: Likewise.
199
bd0cf5a6
NC
2002020-02-20 Nelson Chu <nelson.chu@sifive.com>
201
54b2aec1
NC
202 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
203 we are assembling instruction with CSR. Call riscv_csr_read_only_check
204 after parsing all arguments.
205 (enum csr_insn_type): New enum is used to classify the CSR instruction.
206 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
207 are used to check if we write a read-only CSR by the CSR instruction.
208 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
209 all CSR for the read-only CSR checking.
210 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
211 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
212 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
213 all CSR instructions for the read-only CSR checking.
214 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
215 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
216
2ca89224
NC
217 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
218 (riscv_opts): Initialize it.
219 (reg_lookup_internal): Check the `riscv_opts.csr_check`
220 before doing the CSR checking.
221 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
222 (md_longopts): Add mcsr-check and mno-csr-check.
223 (md_parse_option): Handle new enum option values.
224 (s_riscv_option): Handle new long options.
225 * doc/c-riscv.texi: Add description for the new .option and assembler
226 options.
227 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
228 the CSR checking.
229 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
230
bd0cf5a6
NC
231 * config/tc-riscv.c (csr_extra_hash): New.
232 (enum riscv_csr_class): New enum. Used to decide
233 whether or not this CSR is legal in the current ISA string.
234 (struct riscv_csr_extra): New structure to hold all extra information
235 of CSR.
236 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
237 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
238 Call hash_reg_name to insert CSR address into reg_names_hash.
239 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
240 Decide whether the CSR is valid according to the csr_extra_hash.
241 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
242 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
243 not a boolean. This is same as riscv_init_csr_hash, so keep the
244 consistent usage.
245 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
246 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
247 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
248 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
249 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
250 f-ext CSR are not allowed.
251 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
252 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
253 source file is `priv-reg.s`, and the ISA is rv64if, so the
254 rv32-only CSR are not allowed.
255 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
256
10a95fcc
AM
2572020-02-21 Alan Modra <amodra@gmail.com>
258
259 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
260 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
261
dda2980f
AM
2622020-02-21 Alan Modra <amodra@gmail.com>
263
264 PR 25569
265 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
266 on section size adjustment, instead perform another write if
267 exec header size is larger than section size.
268
bd3380bc
NC
2692020-02-19 Nelson Chu <nelson.chu@sifive.com>
270
271 * doc/c-riscv.texi: Add the doc entries for -march-attr/
272 -mno-arch-attr command line options.
273
fa164239
JW
2742020-02-19 Nelson Chu <nelson.chu@sifive.com>
275
276 * testsuite/gas/riscv/c-add-addi.d: New testcase.
277 * testsuite/gas/riscv/c-add-addi.s: Likewise.
278
fcaaac0a
SB
2792020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
280
281 PR 25576
282 * config/tc-z80.c (md_parse_option): Do not use an underscore
283 prefix for local labels in SDCC compatability mode.
284 (z80_start_line_hook): Remove SDCC dollar label support.
285 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
286 * testsuite/gas/z80/sdcc.s: Likewise.
287
2882020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
289
290 PR 25517
291 * config/tc-z80.c: Add -march option.
292 * doc/as.texi: Update Z80 documentation.
293 * doc/c-z80.texi: Likewise.
294 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
295 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
296 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
297 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
298 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
299 * testsuite/gas/z80/gbz80_all.d: Likewise.
300 * testsuite/gas/z80/r800_extra.d: Likewise.
301 * testsuite/gas/z80/r800_ii8.d: Likewise.
302 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
303 * testsuite/gas/z80/sdcc.d: Likewise.
304 * testsuite/gas/z80/z180.d: Likewise.
305 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
306 * testsuite/gas/z80/z80_doc.d: Likewise.
307 * testsuite/gas/z80/z80_ii8.d: Likewise.
308 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
309 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
310 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
311 * testsuite/gas/z80/z80_sli.d: Likewise.
312 * testsuite/gas/z80/z80n_all.d: Likewise.
313 * testsuite/gas/z80/z80n_reloc.d: Likewise.
314
a7e12755
L
3152020-02-19 H.J. Lu <hongjiu.lu@intel.com>
316
317 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
318 with GNU_PROPERTY_X86_FEATURE_2_MMX.
319 * testsuite/gas/i386/i386.exp: Run property-3 and
320 x86-64-property-3.
321 * testsuite/gas/i386/property-3.d: New file.
322 * testsuite/gas/i386/property-3.s: Likewise.
323 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
324
272a84b1
L
3252020-02-17 H.J. Lu <hongjiu.lu@intel.com>
326
327 * config/tc-i386.c (cpu_arch): Add .popcnt.
328 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
329 Add a tab before @samp{.sse4a}.
330
c8f8eebc
JB
3312020-02-17 Jan Beulich <jbeulich@suse.com>
332
333 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
334 for AddrPrefixOpReg templates. Combine the two pieces of
335 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
336 mode.
337
eedb0f2c
JB
3382020-02-17 Jan Beulich <jbeulich@suse.com>
339
340 PR gas/14439
341 * config/tc-i386.c (md_assemble): Also suppress operand
342 swapping for MONITOR{,X} and MWAIT{,X}.
343 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
344 Add Intel syntax monitor/mwait tests.
345 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
346 Adjust expectations.
347 *testsuite/gas/i386/sse3-intel.d,
348 testsuite/gas/i386/x86-64-sse3-intel.d: New.
349 * testsuite/gas/i386/i386.exp: Run new tests.
350
b9915cbc
JB
3512020-02-17 Jan Beulich <jbeulich@suse.com>
352
353 PR gas/6518
354 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
355 [XYZ]MMWord memory operand ambiguity recognition logic (largely
356 re-indentation).
357 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
358 cases.
359 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
360 * testsuite/gas/i386/avx512dq-inval.l,
361 testsuite/gas/i386/inval-avx.l,
362 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
363 * testsuite/gas/i386/avx512vl-ambig.s,
364 testsuite/gas/i386/avx512vl-ambig.l: New.
365 * testsuite/gas/i386/i386.exp: Run new test.
366
af5c13b0
L
3672020-02-16 H.J. Lu <hongjiu.lu@intel.com>
368
369 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
370 nosse4.
371 * doc/c-i386.texi: Document sse4a and nosse4a.
372
07d98387
L
3732020-02-14 H.J. Lu <hongjiu.lu@intel.com>
374
375 * doc/c-i386.texi: Remove the old movsx and movzx documentation
376 for AT&T syntax.
377
65fca059
JB
3782020-02-14 Jan Beulich <jbeulich@suse.com>
379
380 PR gas/25438
381 * config/tc-i386.c (md_assemble): Move movsx/movzx special
382 casing ...
383 (process_suffix): ... here. Consider just the first operand
384 initially.
385 (check_long_reg): Drop opcode 0x63 special case again.
386 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
387 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
388 Move ambiguous operand size tests ...
389 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
390 testsuite/gas/i386/noreg64.s: ... here.
391 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
392 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
393 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
394 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
395 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
396 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
397 testsuite/gas/i386/x86-64-movsxd.d,
398 testsuite/gas/i386/x86-64-movsxd-intel.d,
399 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
400 Adjust expectations.
401 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
402 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
403 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
404 * testsuite/gas/i386/i386.exp: Run new tests.
405
b6773884
JB
4062020-02-14 Jan Beulich <jbeulich@suse.com>
407
408 * config/tc-i386.c (process_operands): Also skip segment
409 override prefix emission if it matches an already present one.
410 * testsuite/gas/i386/prefix32.s: Add double segment override
411 cases.
412 * testsuite/gas/i386/prefix32.l: Adjust expectations.
413
92334ad2
JB
4142020-02-14 Jan Beulich <jbeulich@suse.com>
415
416 * config/tc-i386.c (process_operands): Drop ineffectual segment
417 overrides when optimizing.
418 * testsuite/gas/i386/lea-optimize.d: New.
419 * testsuite/gas/i386/i386.exp: Run new test.
420
4212020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
422
423 * config/tc-i386.c (process_operands): Also check insn prefix
424 for ineffectual segment override warning. Don't cover possible
425 VEX/EVEX encoded insns there.
426 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
427 testsuite/gas/i386/lea.e: New.
428 * testsuite/gas/i386/i386.exp: Run new test.
429
0e6724de
L
4302020-02-14 H.J. Lu <hongjiu.lu@intel.com>
431
432 PR gas/25438
433 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
434 syntax.
435
292676c1
L
4362020-02-13 Fangrui Song <maskray@google.com>
437 H.J. Lu <hongjiu.lu@intel.com>
438
439 PR gas/25551
440 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
441 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
442 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
443 * testsuite/gas/i386/relax-5.d: New file.
444 * testsuite/gas/i386/relax-5.s: Likewise.
445 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
446 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
447
7deea9aa
JB
4482020-02-13 Jan Beulich <jbeulich@suse.com>
449
450 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
451 "nosse4" entry.
452
6c0946d0
JB
4532020-02-12 Jan Beulich <jbeulich@suse.com>
454
455 * config/tc-i386.c (avx512): New (at file scope), moved from
456 (check_VecOperands): ... here.
457 (process_suffix): Add [XYZ]MMword operand size handling.
458 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
459 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
460 tests.
461 * testsuite/gas/i386/avx512dq-inval.l,
462 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
463
5990e377
JB
4642020-02-12 Jan Beulich <jbeulich@suse.com>
465
466 PR gas/24546
467 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
468 code only.
469 * config/tc-i386-intel.c (i386_intel_operand): Also handle
470 CALL/JMP in O_tbyte_ptr case.
471 * doc/c-i386.texi: Mention far call and full pointer load ISA
472 differences.
473 * testsuite/gas/i386/x86-64-branch-3.s,
474 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
475 * testsuite/gas/i386/x86-64-branch-3.d,
476 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
477 * testsuite/gas/i386/x86-64-branch-5.l,
478 testsuite/gas/i386/x86-64-branch-5.s: New.
479 * testsuite/gas/i386/i386.exp: Run new test.
480
9706160a
JB
4812020-02-12 Jan Beulich <jbeulich@suse.com>
482
483 PR gas/25438
484 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
485 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
486 64-bit-only warning.
487 (check_word_reg): Consistently error on mismatching register
488 size and suffix.
489 * testsuite/gas/i386/general.s: Replace dword GPR with word one
490 for movw. Replace suffix / GPR for orb.
491 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
492 byte GPRs as well as ones for inb/outb with a word accumulator.
493 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
494 testsuite/gas/i386/inval.l: Adjust expectations.
495
5de4d9ef
JB
4962020-02-12 Jan Beulich <jbeulich@suse.com>
497
498 * config/tc-i386.c (operand_type_register_match): Also fall
499 through initial two if()-s when the template allows for a GPR
500 operand. Adjust comment.
501
50128d0c
JB
5022020-02-11 Jan Beulich <jbeulich@suse.com>
503
504 (struct _i386_insn): New field "short_form".
505 (optimize_encoding): Drop setting of shortform field.
506 (process_suffix): Set i.short_form. Replace shortform use.
507 (process_operands): Replace shortform use.
508
1ed818b4
MM
5092020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
510
511 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
512 loop initial declaration.
513
5aae9ae9
MM
5142020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
515
516 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
517 instructions that can have 5 arguments.
518 (enum operand_parse_code): Add new operands.
519 (parse_operands): Account for new operands.
520 (S5): New macro.
521 (enum neon_shape_el): Introduce P suffixes for coprocessor.
522 (neon_select_shape): Account for P suffix.
523 (LOW1): Move macro to global position.
524 (HI4): Move macro to global position.
525 (vcx_assign_vec_d): New.
526 (vcx_assign_vec_m): New.
527 (vcx_assign_vec_n): New.
528 (enum vcx_reg_type): New.
529 (vcx_get_reg_type): New.
530 (vcx_size_pos): New.
531 (vcx_vec_pos): New.
532 (vcx_handle_shape): New.
533 (vcx_ensure_register_in_range): New.
534 (vcx_handle_register_arguments): New.
535 (vcx_handle_insn_block): New.
536 (vcx_handle_common_checks): New.
537 (do_vcx1): New.
538 (do_vcx2): New.
539 (do_vcx3): New.
540 * testsuite/gas/arm/cde-missing-fp.d: New test.
541 * testsuite/gas/arm/cde-missing-fp.l: New test.
542 * testsuite/gas/arm/cde-missing-mve.d: New test.
543 * testsuite/gas/arm/cde-missing-mve.l: New test.
544 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
545 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
546 * testsuite/gas/arm/cde-mve.s: New test.
547 * testsuite/gas/arm/cde-warnings.l:
548 * testsuite/gas/arm/cde-warnings.s:
549 * testsuite/gas/arm/cde.d:
550 * testsuite/gas/arm/cde.s:
551
4934a27c
MM
5522020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
553 Matthew Malcomson <matthew.malcomson@arm.com>
554
555 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
556 CDE coprocessor that can be enabled.
557 (enum pred_instruction_type): New pred type.
558 (BAD_NO_VPT): New error message.
559 (BAD_CDE): New error message.
560 (BAD_CDE_COPROC): New error message.
561 (enum operand_parse_code): Add new immediate operands.
562 (parse_operands): Account for new immediate operands.
563 (check_cde_operand): New.
564 (cde_coproc_enabled): New.
565 (cde_coproc_pos): New.
566 (cde_handle_coproc): New.
567 (cxn_handle_predication): New.
568 (do_custom_instruction_1): New.
569 (do_custom_instruction_2): New.
570 (do_custom_instruction_3): New.
571 (do_cx1): New.
572 (do_cx1a): New.
573 (do_cx1d): New.
574 (do_cx1da): New.
575 (do_cx2): New.
576 (do_cx2a): New.
577 (do_cx2d): New.
578 (do_cx2da): New.
579 (do_cx3): New.
580 (do_cx3a): New.
581 (do_cx3d): New.
582 (do_cx3da): New.
583 (handle_pred_state): Define new IT block behaviour.
584 (insns): Add newn CX*{,d}{,a} instructions.
585 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
586 Define new cdecp extension strings.
587 * doc/c-arm.texi: Document new cdecp extension arguments.
588 * testsuite/gas/arm/cde-scalar.d: New test.
589 * testsuite/gas/arm/cde-scalar.s: New test.
590 * testsuite/gas/arm/cde-warnings.d: New test.
591 * testsuite/gas/arm/cde-warnings.l: New test.
592 * testsuite/gas/arm/cde-warnings.s: New test.
593 * testsuite/gas/arm/cde.d: New test.
594 * testsuite/gas/arm/cde.s: New test.
595
4b5aaf5f
L
5962020-02-10 H.J. Lu <hongjiu.lu@intel.com>
597
598 PR gas/25516
599 * config/tc-i386.c (intel64): Renamed to ...
600 (isa64): This.
601 (match_template): Accept Intel64 only instruction by default.
602 (i386_displacement): Updated.
603 (md_parse_option): Updated.
604 * c-i386.texi: Update -mamd64/-mintel64 documentation.
605 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
606 -mamd64 to x86-64-sysenter-amd.
607 * testsuite/gas/i386/x86-64-sysenter.d: New file.
608
33176d91
AM
6092020-02-10 Alan Modra <amodra@gmail.com>
610
611 * config/obj-elf.c (obj_elf_change_section): Error for section
612 type, attr or entsize changes in assembly.
613 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
614 * testsuite/gas/elf/section5.l: Update.
615
82194874
AM
6162020-02-10 Alan Modra <amodra@gmail.com>
617
618 * output-file.c (output_file_close): Do a normal close when
619 flag_always_generate_output.
620 * write.c (write_object_file): Don't stop output when
621 flag_always_generate_output.
622
9fc0b501
SB
6232020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
624
625 PR 25469
626 * config/tc-z80.c: Add -gbz80 command line option to generate code
627 for the GameBoy Z80. Add support for generating DWARF.
628 * config/tc-z80.h: Add support for DWARF debug information
629 generation.
630 * doc/c-z80.texi: Document new command line option.
631 * testsuite/gas/z80/gbz80_all.d: New file.
632 * testsuite/gas/z80/gbz80_all.s: New file.
633 * testsuite/gas/z80/z80.exp: Run the new tests.
634 * testsuite/gas/z80/z80n_all.d: New file.
635 * testsuite/gas/z80/z80n_all.s: New file.
636 * testsuite/gas/z80/z80n_reloc.d: New file.
637
b7d07216
L
6382020-02-06 H.J. Lu <hongjiu.lu@intel.com>
639
640 PR gas/25381
641 * config/obj-elf.c (get_section): Also check
642 linked_to_symbol_name.
643 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
644 (obj_elf_parse_section_letters): Handle the 'o' flag.
645 (build_group_lists): Renamed to ...
646 (build_additional_section_info): This. Set elf_linked_to_section
647 from map_head.linked_to_symbol_name.
648 (elf_adjust_symtab): Updated.
649 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
650 * doc/as.texi: Document the 'o' flag.
651 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
652 * testsuite/gas/elf/section18.d: New file.
653 * testsuite/gas/elf/section18.s: Likewise.
654 * testsuite/gas/elf/section19.d: Likewise.
655 * testsuite/gas/elf/section19.s: Likewise.
656 * testsuite/gas/elf/section20.d: Likewise.
657 * testsuite/gas/elf/section20.s: Likewise.
658 * testsuite/gas/elf/section21.d: Likewise.
659 * testsuite/gas/elf/section21.l: Likewise.
660 * testsuite/gas/elf/section21.s: Likewise.
661
5eb617a7
L
6622020-02-06 H.J. Lu <hongjiu.lu@intel.com>
663
664 * NEWS: Mention x86 assembler options to align branches for
665 binutils 2.34.
666
986ac314
L
6672020-02-06 H.J. Lu <hongjiu.lu@intel.com>
668
669 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
670 only for ELF targets.
671 * testsuite/gas/i386/unique.d: Don't xfail.
672 * testsuite/gas/i386/x86-64-unique.d: Likewise.
673
19234a6d
AM
6742020-02-06 Alan Modra <amodra@gmail.com>
675
676 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
677 * testsuite/gas/i386/x86-64-unique.d: Likewise.
678
02e0be69
AM
6792020-02-06 Alan Modra <amodra@gmail.com>
680
681 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
682 xfail, and rename test.
683 * testsuite/gas/elf/section12b.d: Likewise.
684 * testsuite/gas/elf/section16a.d: Likewise.
685 * testsuite/gas/elf/section16b.d: Likewise.
686
a8c4d40b
L
6872020-02-02 H.J. Lu <hongjiu.lu@intel.com>
688
689 PR gas/25380
690 * config/obj-elf.c (section_match): Removed.
691 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
692 section_id.
693 (obj_elf_change_section): Replace info and group_name arguments
694 with match_p. Also update the section ID and flags from match_p.
695 (obj_elf_section): Handle "unique,N". Update call to
696 obj_elf_change_section.
697 * config/obj-elf.h (elf_section_match): New.
698 (obj_elf_change_section): Updated.
699 * config/tc-arm.c (start_unwind_section): Update call to
700 obj_elf_change_section.
701 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
702 * config/tc-microblaze.c (microblaze_s_data): Likewise.
703 (microblaze_s_sdata): Likewise.
704 (microblaze_s_rdata): Likewise.
705 (microblaze_s_bss): Likewise.
706 * config/tc-mips.c (s_change_section): Likewise.
707 * config/tc-msp430.c (msp430_profiler): Likewise.
708 * config/tc-rx.c (parse_rx_section): Likewise.
709 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
710 * doc/as.texi: Document "unique,N" in .section directive.
711 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
712 * testsuite/gas/elf/section15.d: New file.
713 * testsuite/gas/elf/section15.s: Likewise.
714 * testsuite/gas/elf/section16.s: Likewise.
715 * testsuite/gas/elf/section16a.d: Likewise.
716 * testsuite/gas/elf/section16b.d: Likewise.
717 * testsuite/gas/elf/section17.d: Likewise.
718 * testsuite/gas/elf/section17.l: Likewise.
719 * testsuite/gas/elf/section17.s: Likewise.
720 * testsuite/gas/i386/unique.d: Likewise.
721 * testsuite/gas/i386/unique.s: Likewise.
722 * testsuite/gas/i386/x86-64-unique.d: Likewise.
723 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
724
575d37ae
L
7252020-02-02 H.J. Lu <hongjiu.lu@intel.com>
726
727 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
728
2384096c
G
7292020-02-01 Anthony Green <green@moxielogic.com>
730
731 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
732
95441c43
SL
7332020-01-31 Sandra Loosemore <sandra@codesourcery.com>
734
735 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
736 %tls_ldo.
737
d465d695
AV
7382020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
739
740 PR gas/25472
741 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
742 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
743 +mve.
744 * testsuite/gas/arm/mve_dsp.d: New test.
745
d26cc8a9
NC
7462020-01-31 Nick Clifton <nickc@redhat.com>
747
748 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
749 rather than BFD_RELOC_NONE.
750
90e9955a
SP
7512020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
752
753 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
754 to support VLDMIA instruction for MVE.
755 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
756 instruction for MVE.
757 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
758 instruction for MVE.
759 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
760 instruction for MVE.
761 * testsuite/gas/arm/mve-ldst.d: New test.
762 * testsuite/gas/arm/mve-ldst.s: Likewise.
763
53943f32
NC
7642020-01-31 Nick Clifton <nickc@redhat.com>
765
766 * po/fr.po: Updated French translation.
767 * po/ru.po: Updated Russian translation.
768
c3036ed0
RS
7692020-01-31 Richard Sandiford <richard.sandiford@arm.com>
770
771 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
772 .s for the movprfx.
773 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
774 * testsuite/gas/aarch64/sve-movprfx_28.d,
775 * testsuite/gas/aarch64/sve-movprfx_28.l,
776 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
777
2ae4c703
JB
7782020-01-30 Jan Beulich <jbeulich@suse.com>
779
780 * config/tc-i386.c (output_disp): Tighten base_opcode check.
781 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
782 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
783 Adjust expectations.
784
bd434cc4
JM
7852020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
786
787 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
788 * testsuite/gas/bpf/alu-be.d: Likewise.
789 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
790 * testsuite/gas/bpf/alu32-be.d: Likewise.
791
aeab2b26
JB
7922020-01-30 Jan Beulich <jbeulich@suse.com>
793
794 * testsuite/gas/i386/x86-64-branch-2.s,
795 testsuite/gas/i386/x86-64-branch-4.s,
796 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
797 * testsuite/gas/i386/ilp32/x86-64-branch.d,
798 testsuite/gas/i386/x86-64-branch-2.d,
799 testsuite/gas/i386/x86-64-branch-4.l,
800 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
801
873494c8
JB
8022020-01-30 Jan Beulich <jbeulich@suse.com>
803
804 * config/tc-i386.c (process_suffix): .
805 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
806 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
807 Add LRETQ case.
808 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
809 suffix.
810 testsuite/gas/i386/x86_64.s: Add RETF cases.
811 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
812 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
813 testsuite/gas/i386/x86-64-opcode.d,
814 testsuite/gas/i386/x86-64-suffix-intel.d,
815 testsuite/gas/i386/x86-64-suffix.d,
816 testsuite/gas/i386/x86_64-intel.d
817 testsuite/gas/i386/x86_64.d: Adjust expectations.
818 * testsuite/gas/i386/x86-64-suffix.e,
819 testsuite/gas/i386/x86_64.e: New.
820
62b3f548
JB
8212020-01-30 Jan Beulich <jbeulich@suse.com>
822
823 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
824 special case.
825
bc31405e
L
8262020-01-27 H.J. Lu <hongjiu.lu@intel.com>
827
828 PR binutils/25445
829 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
830 movsxd.
831 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
832 differences. Document movslq and movsxd.
833 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
834 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
835 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
836 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
837 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
838 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
839 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
840 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
841 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
842 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
843 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
844
e3696f67
AM
8452020-01-27 Alan Modra <amodra@gmail.com>
846
847 * testsuite/gas/all/gas.exp: Replace case statements with switch
848 statements.
849 * testsuite/gas/elf/elf.exp: Likewise.
850 * testsuite/gas/macros/macros.exp: Likewise.
851 * testsuite/lib/gas-defs.exp: Likewise.
852
7568c93b
TC
8532020-01-27 Tamar Christina <tamar.christina@arm.com>
854
855 PR 25403
856 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
857 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
858
403d1bd9
JW
8592020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
860
861 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
862 s exts must be known, so rename *ok* to *fail*.
863 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
864 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
865 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
866 above change.
867 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
868 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
869
be4c5e58
L
8702020-01-22 H.J. Lu <hongjiu.lu@intel.com>
871
872 PR gas/25438
873 * config/tc-i386.c (check_long_reg): Always disallow double word
874 suffix in mnemonic with word general register.
875 * testsuite/gas/i386/general.s: Replace word general register
876 with double word general register for movl.
877 * testsuite/gas/i386/inval.s: Add tests for movl with word general
878 register.
879 * testsuite/gas/i386/general.l: Updated.
880 * testsuite/gas/i386/inval.l: Likewise.
881
9e7028aa
AM
8822020-01-22 Alan Modra <amodra@gmail.com>
883
884 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
885 __tls_get_addr_desc and __tls_get_addr_opt.
886
e3ed17f3
JB
8872020-01-21 Jan Beulich <jbeulich@suse.com>
888
889 * testsuite/gas/i386/inval-crc32.s,
890 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
891 * testsuite/gas/i386/inval-crc32.l,
892 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
893
1a035124
JB
8942020-01-21 Jan Beulich <jbeulich@suse.com>
895
896 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
897 generic code path. Deal with No_lSuf being set in a template.
898 * testsuite/gas/i386/inval-crc32.l,
899 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
900 instead of error(s) when operand size is ambiguous.
901 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
902 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
903 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
904 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
905 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
906 Adjust expectations.
907
c006a730
JB
9082020-01-21 Jan Beulich <jbeulich@suse.com>
909
910 * config/tc-i386.c (process_suffix): Drop SYSRET special case
911 and an intel_syntax check. Re-write lack-of-suffix processing
912 logic.
913 * doc/c-i386.texi: Document operand size defaults for suffix-
914 less AT&T syntax insns.
915 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
916 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
917 testsuite/gas/i386/x86-64-avx-scalar.s,
918 testsuite/gas/i386/x86-64-avx.s,
919 testsuite/gas/i386/x86-64-bundle.s,
920 testsuite/gas/i386/x86-64-intel64.s,
921 testsuite/gas/i386/x86-64-lock-1.s,
922 testsuite/gas/i386/x86-64-opcode.s,
923 testsuite/gas/i386/x86-64-sse2avx.s,
924 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
925 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
926 testsuite/gas/i386/x86-64-nops.s,
927 testsuite/gas/i386/x86-64-ptwrite.s,
928 testsuite/gas/i386/x86-64-simd.s,
929 testsuite/gas/i386/x86-64-sse-noavx.s,
930 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
931 insns.
932 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
933 testsuite/gas/i386/noreg64.s: Add further tests.
934 * testsuite/gas/i386/ilp32/x86-64-nops.d,
935 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
936 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
937 testsuite/gas/i386/sse-noavx.d,
938 testsuite/gas/i386/x86-64-intel64.d,
939 testsuite/gas/i386/x86-64-nops.d,
940 testsuite/gas/i386/x86-64-opcode.d,
941 testsuite/gas/i386/x86-64-ptwrite-intel.d,
942 testsuite/gas/i386/x86-64-ptwrite.d,
943 testsuite/gas/i386/x86-64-simd-intel.d,
944 testsuite/gas/i386/x86-64-simd-suffix.d,
945 testsuite/gas/i386/x86-64-simd.d,
946 testsuite/gas/i386/x86-64-sse-noavx.d
947 testsuite/gas/i386/x86-64-suffix.d,
948 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
949 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
950 testsuite/gas/i386/noreg64.l: New.
951 * testsuite/gas/i386/i386.exp: Run new tests.
952
c906a69a
JB
9532020-01-21 Jan Beulich <jbeulich@suse.com>
954
955 * testsuite/gas/i386/avx512_bf16_vl.s,
956 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
957 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
958 broadcast forms of VCVTNEPS2BF16.
959 * testsuite/gas/i386/avx512_bf16_vl.d,
960 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
961
26916852
NC
9622020-01-20 Nick Clifton <nickc@redhat.com>
963
964 * po/uk.po: Updated Ukranian translation.
965
14470f07
L
9662020-01-20 H.J. Lu <hongjiu.lu@intel.com>
967
968 PR ld/25416
969 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
970 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
971 x32 object.
972 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
973 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
974 R_X86_64_GOTPC32_TLSDESC relocation.
975
1b1bb2c6
NC
9762020-01-18 Nick Clifton <nickc@redhat.com>
977
978 * configure: Regenerate.
979 * po/gas.pot: Regenerate.
980
ae774686
NC
9812020-01-18 Nick Clifton <nickc@redhat.com>
982
983 Binutils 2.34 branch created.
984
42e04b36
L
9852020-01-17 H.J. Lu <hongjiu.lu@intel.com>
986
987 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
988 with vex_encoding_vex.
989 (parse_insn): Likewise.
990 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
991 and {vex3} documentation.
992 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
993 {vex}.
994 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
995
2da2eaf4
AV
9962020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
997
998 PR 25376
999 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1000 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1001 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1002 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1003 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1004 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1005
45a4bb20
JB
10062020-01-16 Jan Beulich <jbeulich@suse.com>
1007
1008 * config/tc-i386.c (match_template): Drop found_cpu_match local
1009 variable.
1010
4814632e
JB
10112020-01-16 Jan Beulich <jbeulich@suse.com>
1012
1013 * testsuite/gas/i386/avx512dq-inval.l,
1014 testsuite/gas/i386/avx512dq-inval.s: New.
1015 * testsuite/gas/i386/i386.exp: Run new test.
1016
131cb553
JL
10172020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1018
1019 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1020 relocations when the target is 430X, except when extracting part of an
1021 expression.
1022 (msp430_srcoperand): Adjust comment.
1023 Initialize the expp member of the msp430_operand_s struct as
1024 appropriate.
1025 (msp430_dstoperand): Likewise.
1026 * testsuite/gas/msp430/msp430.exp: Run new test.
1027 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1028 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1029
c24d0e8d
AM
10302020-01-15 Alan Modra <amodra@gmail.com>
1031
1032 * configure.tgt: Add sparc-*-freebsd case.
1033
e44925ae
LC
10342020-01-14 Lili Cui <lili.cui@intel.com>
1035
1036 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1037 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1038 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1039 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1040 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1041 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1042 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1043 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1044 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1045 * testsuite/gas/i386/align-branch-5.d: Likewise.
1046 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1047 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1048 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1049 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1050 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1051 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1052 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1053 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1054 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1055 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1056 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1057 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1058
7a6bf3be
SB
10592020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1060
1061 PR 25377
1062 * config/tc-z80.c: Add support for half precision, single
1063 precision and double precision floating point values.
1064 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1065 * doc/as.texi: Add new z80 command line options.
1066 * doc/c-z80.texi: Document new z80 command line options.
1067 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1068 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1069 * testsuite/gas/z80/z80.exp: Run the new test.
1070 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1071 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1072 * testsuite/gas/z80/strings.d: Update expected output.
1073
82e9597c
MM
10742020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1075
1076 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1077 dependency.
1078
5e4f7e05
CZ
10792020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1080
1081 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1082 the CPU.
1083 * config/tc-arc.h: Add header if/defs.
1084 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1085
febda64f
AM
10862020-01-13 Alan Modra <amodra@gmail.com>
1087
1088 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1089
5496abe1
AM
10902020-01-13 Alan Modra <amodra@gmail.com>
1091
1092 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1093 insertion.
1094
ec4181f2
AM
10952020-01-10 Alan Modra <amodra@gmail.com>
1096
1097 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1098 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1099
40c75bc8
SB
11002020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1101
1102 PR 25224
1103 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1104 opcode byte values.
1105 (emit_ld_r_r): Likewise.
1106 (emit_ld_rr_m): Likewise.
1107 (emit_ld_rr_nn): Likewise.
1108
72aea328
JB
11092020-01-09 Jan Beulich <jbeulich@suse.com>
1110
1111 * config/tc-i386.c (optimize_encoding): Add
1112 is_any_vex_encoding() invocations. Drop respective
1113 i.tm.extension_opcode == None checks.
1114
3f93af61
JB
11152020-01-09 Jan Beulich <jbeulich@suse.com>
1116
1117 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1118 REX transformations. Correct comment indentation.
1119
7697afb6
JB
11202020-01-09 Jan Beulich <jbeulich@suse.com>
1121
1122 * config/tc-i386.c (optimize_encoding): Generalize register
1123 transformation for TEST optimization.
1124
d835a58b
JB
11252020-01-09 Jan Beulich <jbeulich@suse.com>
1126
1127 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1128 testsuite/gas/i386/x86-64-sysenter-amd.d,
1129 testsuite/gas/i386/x86-64-sysenter-amd.l,
1130 testsuite/gas/i386/x86-64-sysenter-intel.d,
1131 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1132 * testsuite/gas/i386/i386.exp: Run new tests.
1133
915808f6
NC
11342020-01-08 Nick Clifton <nickc@redhat.com>
1135
1136 PR 25284
1137 * doc/as.texi (Align): Document the fact that all arguments can be
1138 omitted.
1139 (Balign): Likewise.
1140 (P2align): Likewise.
1141
f1f28025
NC
11422020-01-08 Nick Clifton <nickc@redhat.com>
1143
1144 PR 14891
1145 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1146 already defined as a different symbol type.
1147 * testsuite/gas/elf/pr14891.s: New test source file.
1148 * testsuite/gas/elf/pr14891.d: New test driver.
1149 * testsuite/gas/elf/pr14891.s: New test expected error output.
1150 * testsuite/gas/elf/elf.exp: Run the new test.
1151
030a2e78
AM
11522020-01-08 Alan Modra <amodra@gmail.com>
1153
1154 * config/tc-z8k.c (md_begin): Make idx unsigned.
1155 (get_specific): Likewise for this_index.
1156
2a1ebfb2
CZ
11572020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1158
1159 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1160 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1161 (md_operand): Set X_md to absent.
1162 (arc_parse_name): Check for X_md.
1163
16d87673
SB
11642020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1165
1166 PR 25311
1167 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1168 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1169 NO_STRING_ESCAPES.
1170 * read.c (next_char_of_string): Likewise.
1171 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1172 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1173
a2322019
NC
11742020-01-03 Nick Clifton <nickc@redhat.com>
1175
1176 * po/sv.po: Updated Swedish translation.
1177
5437a02a
JB
11782020-01-03 Jan Beulich <jbeulich@suse.com>
1179
1180 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1181 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1182
567dfba2
JB
11832020-01-03 Jan Beulich <jbeulich@suse.com>
1184
1185 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1186 by-element usdot. Add 64-bit form tests for by-element sudot.
1187 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1188
8c45011a
JB
11892020-01-03 Jan Beulich <jbeulich@suse.com>
1190
1191 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1192 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1193
f4950f76
JB
11942020-01-03 Jan Beulich <jbeulich@suse.com>
1195
1196 * testsuite/gas/aarch64/f64mm.d,
1197 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1198
6655dba2
SB
11992020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1200
1201 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1202 support for assembler code generated by SDCC. Add new relocation
1203 types. Add z80-elf target support.
1204 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1205 labels. Local labels starts from ".L".
1206 * NEWS: Mention the new support.
1207 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1208 * testsuite/gas/all/fwdexp.s: Likewise.
1209 * testsuite/gas/all/cond.l: Likewise.
1210 * testsuite/gas/all/cond.s: Likewise.
1211 * testsuite/gas/all/fwdexp.d: Likewise.
1212 * testsuite/gas/all/fwdexp.s: Likewise.
1213 * testsuite/gas/elf/section2.e-mips: Likewise.
1214 * testsuite/gas/elf/section2.l: Likewise.
1215 * testsuite/gas/elf/section2.s: Likewise.
1216 * testsuite/gas/macros/app1.d: Likewise.
1217 * testsuite/gas/macros/app1.s: Likewise.
1218 * testsuite/gas/macros/app2.d: Likewise.
1219 * testsuite/gas/macros/app2.s: Likewise.
1220 * testsuite/gas/macros/app3.d: Likewise.
1221 * testsuite/gas/macros/app3.s: Likewise.
1222 * testsuite/gas/macros/app4.d: Likewise.
1223 * testsuite/gas/macros/app4.s: Likewise.
1224 * testsuite/gas/macros/app4b.s: Likewise.
1225 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1226 * testsuite/gas/z80/z80.exp: Add new tests
1227 * testsuite/gas/z80/dollar.d: New file.
1228 * testsuite/gas/z80/dollar.s: New file.
1229 * testsuite/gas/z80/ez80_adl_all.d: New file.
1230 * testsuite/gas/z80/ez80_adl_all.s: New file.
1231 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1232 * testsuite/gas/z80/ez80_isuf.s: New file.
1233 * testsuite/gas/z80/ez80_z80_all.d: New file.
1234 * testsuite/gas/z80/ez80_z80_all.s: New file.
1235 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1236 * testsuite/gas/z80/r800_extra.d: New file.
1237 * testsuite/gas/z80/r800_extra.s: New file.
1238 * testsuite/gas/z80/r800_ii8.d: New file.
1239 * testsuite/gas/z80/r800_z80_doc.d: New file.
1240 * testsuite/gas/z80/z180.d: New file.
1241 * testsuite/gas/z80/z180.s: New file.
1242 * testsuite/gas/z80/z180_z80_doc.d: New file.
1243 * testsuite/gas/z80/z80_doc.d: New file.
1244 * testsuite/gas/z80/z80_doc.s: New file.
1245 * testsuite/gas/z80/z80_ii8.d: New file.
1246 * testsuite/gas/z80/z80_ii8.s: New file.
1247 * testsuite/gas/z80/z80_in_f_c.d: New file.
1248 * testsuite/gas/z80/z80_in_f_c.s: New file.
1249 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1250 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1251 * testsuite/gas/z80/z80_out_c_0.d: New file.
1252 * testsuite/gas/z80/z80_out_c_0.s: New file.
1253 * testsuite/gas/z80/z80_reloc.d: New file.
1254 * testsuite/gas/z80/z80_reloc.s: New file.
1255 * testsuite/gas/z80/z80_sli.d: New file.
1256 * testsuite/gas/z80/z80_sli.s: New file.
1257
a65b5de6
SN
12582020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1259
1260 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1261 REGLIST_RN.
1262
b14ce8bf
AM
12632020-01-01 Alan Modra <amodra@gmail.com>
1264
1265 Update year range in copyright notice of all files.
1266
0b114740 1267For older changes see ChangeLog-2019
3499769a 1268\f
0b114740 1269Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1270
1271Copying and distribution of this file, with or without modification,
1272are permitted in any medium without royalty provided the copyright
1273notice and this notice are preserved.
1274
1275Local Variables:
1276mode: change-log
1277left-margin: 8
1278fill-column: 74
1279version-control: never
1280End: