[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

2020-01-30  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_dp): Make unsigned.

2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
	    Jan Beulich  <jbeulich@suse.com>

	PR binutils/25445
	* i386-dis.c (MOVSXD_Fixup): New function.
	(movsxd_mode): New enum.
	(x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
	(intel_operand_size): Handle movsxd_mode.
	(OP_E_register): Likewise.
	(OP_G): Likewise.
	* i386-opc.tbl: Remove Rex64 and allow 32-bit destination
	register on movsxd.  Add movsxd with 16-bit destination register
	for AMD64 and Intel64 ISAs.
	* i386-tbl.h: Regenerated.

2020-01-27  Tamar Christina  <tamar.christina@arm.com>

	PR 25403
	* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
	* aarch64-asm-2.c: Regenerate
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (sysret): Drop DefaultSize.
	* i386-tbl.h: Re-generate.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	Dword.
	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	* i386-tbl.h: Re-generate.

2020-01-20  Nick Clifton  <nickc@redhat.com>

	* po/de.po: Updated German translation.
	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	* po/uk.po: Updated Ukranian translation.

2020-01-20  Alan Modra  <amodra@gmail.com>

	* hppa-dis.c (fput_const): Remove useless cast.

2020-01-20  Alan Modra  <amodra@gmail.com>

	* arm-dis.c (print_insn_arm): Wrap 'T' value.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	Binutils 2.34 branch created.

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add {vex} pseudo prefix.
	* i386-tbl.h: Regenerated.

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <tstroege@gmx.de>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <nickc@redhat.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <shahab@synopsys.com>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <amodra@gmail.com>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <amodra@gmail.com>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
1bd8ae10 AM	1	2020-01-30 Alan Modra <amodra@gmail.com>
	2
	3	* tic4x-dis.c (tic4x_dp): Make unsigned.
	4
bc31405e L	5	2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
	6	Jan Beulich <jbeulich@suse.com>
	7
	8	PR binutils/25445
	9	* i386-dis.c (MOVSXD_Fixup): New function.
	10	(movsxd_mode): New enum.
	11	(x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
	12	(intel_operand_size): Handle movsxd_mode.
	13	(OP_E_register): Likewise.
	14	(OP_G): Likewise.
	15	* i386-opc.tbl: Remove Rex64 and allow 32-bit destination
	16	register on movsxd. Add movsxd with 16-bit destination register
	17	for AMD64 and Intel64 ISAs.
	18	* i386-tbl.h: Regenerated.
	19
7568c93b TC	20	2020-01-27 Tamar Christina <tamar.christina@arm.com>
	21
	22	PR 25403
	23	* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
	24	* aarch64-asm-2.c: Regenerate
	25	* aarch64-dis-2.c: Likewise.
	26	* aarch64-opc-2.c: Likewise.
	27
c006a730 JB	28	2020-01-21 Jan Beulich <jbeulich@suse.com>
	29
	30	* i386-opc.tbl (sysret): Drop DefaultSize.
	31	* i386-tbl.h: Re-generate.
	32
c906a69a JB	33	2020-01-21 Jan Beulich <jbeulich@suse.com>
	34
	35	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	36	Dword.
	37	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	38	* i386-tbl.h: Re-generate.
	39
26916852 NC	40	2020-01-20 Nick Clifton <nickc@redhat.com>
	41
	42	* po/de.po: Updated German translation.
	43	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	44	* po/uk.po: Updated Ukranian translation.
	45
4d6cbb64 AM	46	2020-01-20 Alan Modra <amodra@gmail.com>
	47
	48	* hppa-dis.c (fput_const): Remove useless cast.
	49
2bddb71a AM	50	2020-01-20 Alan Modra <amodra@gmail.com>
	51
	52	* arm-dis.c (print_insn_arm): Wrap 'T' value.
	53
1b1bb2c6 NC	54	2020-01-18 Nick Clifton <nickc@redhat.com>
	55
	56	* configure: Regenerate.
	57	* po/opcodes.pot: Regenerate.
	58
ae774686 NC	59	2020-01-18 Nick Clifton <nickc@redhat.com>
	60
	61	Binutils 2.34 branch created.
	62
07f1f3aa CB	63	2020-01-17 Christian Biesinger <cbiesinger@google.com>
	64
	65	* opintl.h: Fix spelling error (seperate).
	66
42e04b36 L	67	2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
	68
	69	* i386-opc.tbl: Add {vex} pseudo prefix.
	70	* i386-tbl.h: Regenerated.
	71
2da2eaf4 AV	72	2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
	73
	74	PR 25376
	75	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	76	(neon_opcodes): Likewise.
	77	(select_arm_features): Make sure we enable MVE bits when selecting
	78	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	79	any architecture.
	80
d0849eed JB	81	2020-01-16 Jan Beulich <jbeulich@suse.com>
	82
	83	* i386-opc.tbl: Drop stale comment from XOP section.
	84
9cf70a44 JB	85	2020-01-16 Jan Beulich <jbeulich@suse.com>
	86
	87	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	88	(extractps): Add VexWIG to SSE2AVX forms.
	89	* i386-tbl.h: Re-generate.
	90
4814632e JB	91	2020-01-16 Jan Beulich <jbeulich@suse.com>
	92
	93	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	94	Size64 from and use VexW1 on SSE2AVX forms.
	95	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	96	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	97	* i386-tbl.h: Re-generate.
	98
aad09917 AM	99	2020-01-15 Alan Modra <amodra@gmail.com>
	100
	101	* tic4x-dis.c (tic4x_version): Make unsigned long.
	102	(optab, optab_special, registernames): New file scope vars.
	103	(tic4x_print_register): Set up registernames rather than
	104	malloc'd registertable.
	105	(tic4x_disassemble): Delete optable and optable_special. Use
	106	optab and optab_special instead. Throw away old optab,
	107	optab_special and registernames when info->mach changes.
	108
7a6bf3be SB	109	2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
	110
	111	PR 25377
	112	* z80-dis.c (suffix): Use .db instruction to generate double
	113	prefix.
	114
ca1eaac0 AM	115	2020-01-14 Alan Modra <amodra@gmail.com>
	116
	117	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	118	values to unsigned before shifting.
	119
1d67fe3b TT	120	2020-01-13 Thomas Troeger <tstroege@gmx.de>
	121
	122	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	123	flow instructions.
	124	(print_insn_thumb16, print_insn_thumb32): Likewise.
	125	(print_insn): Initialize the insn info.
	126	* i386-dis.c (print_insn): Initialize the insn info fields, and
	127	detect jumps.
	128
5e4f7e05 CZ	129	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	130
	131	* arc-opc.c (C_NE): Make it required.
	132
b9fe6b8a CZ	133	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	134
	135	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	136	reserved register name.
	137
90dee485 AM	138	2020-01-13 Alan Modra <amodra@gmail.com>
	139
	140	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	141	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	142
febda64f AM	143	2020-01-13 Alan Modra <amodra@gmail.com>
	144
	145	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	146	result of wasm_read_leb128 in a uint64_t and check that bits
	147	are not lost when copying to other locals. Use uint32_t for
	148	most locals. Use PRId64 when printing int64_t.
	149
df08b588 AM	150	2020-01-13 Alan Modra <amodra@gmail.com>
	151
	152	* score-dis.c: Formatting.
	153	* score7-dis.c: Formatting.
	154
b2c759ce AM	155	2020-01-13 Alan Modra <amodra@gmail.com>
	156
	157	* score-dis.c (print_insn_score48): Use unsigned variables for
	158	unsigned values. Don't left shift negative values.
	159	(print_insn_score32): Likewise.
	160	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	161
5496abe1 AM	162	2020-01-13 Alan Modra <amodra@gmail.com>
	163
	164	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	165
202e762b AM	166	2020-01-13 Alan Modra <amodra@gmail.com>
	167
	168	* fr30-ibld.c: Regenerate.
	169
7ef412cf AM	170	2020-01-13 Alan Modra <amodra@gmail.com>
	171
	172	* xgate-dis.c (print_insn): Don't left shift signed value.
	173	(ripBits): Formatting, use 1u.
	174
7f578b95 AM	175	2020-01-10 Alan Modra <amodra@gmail.com>
	176
	177	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	178	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	179
441af85b AM	180	2020-01-10 Alan Modra <amodra@gmail.com>
	181
	182	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	183	and XRREG value earlier to avoid a shift with negative exponent.
	184	* m10200-dis.c (disassemble): Similarly.
	185
bce58db4 NC	186	2020-01-09 Nick Clifton <nickc@redhat.com>
	187
	188	PR 25224
	189	* z80-dis.c (ld_ii_ii): Use correct cast.
	190
40c75bc8 SB	191	2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
	192
	193	PR 25224
	194	* z80-dis.c (ld_ii_ii): Use character constant when checking
	195	opcode byte value.
	196
d835a58b JB	197	2020-01-09 Jan Beulich <jbeulich@suse.com>
	198
	199	* i386-dis.c (SEP_Fixup): New.
	200	(SEP): Define.
	201	(dis386_twobyte): Use it for sysenter/sysexit.
	202	(enum x86_64_isa): Change amd64 enumerator to value 1.
	203	(OP_J): Compare isa64 against intel64 instead of amd64.
	204	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	205	forms.
	206	* i386-tbl.h: Re-generate.
	207
030a2e78 AM	208	2020-01-08 Alan Modra <amodra@gmail.com>
	209
	210	* z8k-dis.c: Include libiberty.h
	211	(instr_data_s): Make max_fetched unsigned.
	212	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	213	Don't exceed byte_info bounds.
	214	(output_instr): Make num_bytes unsigned.
	215	(unpack_instr): Likewise for nibl_count and loop.
	216	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	217	idx unsigned.
	218	* z8k-opc.h: Regenerate.
	219
bb82aefe SV	220	2020-01-07 Shahab Vahedi <shahab@synopsys.com>
	221
	222	* arc-tbl.h (llock): Use 'LLOCK' as class.
	223	(llockd): Likewise.
	224	(scond): Use 'SCOND' as class.
	225	(scondd): Likewise.
	226	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	227	(scondd): Likewise.
	228
cc6aa1a6 AM	229	2020-01-06 Alan Modra <amodra@gmail.com>
	230
	231	* m32c-ibld.c: Regenerate.
	232
660e62b1 AM	233	2020-01-06 Alan Modra <amodra@gmail.com>
	234
	235	PR 25344
	236	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	237	Peek at next byte to prevent recursion on repeated prefix bytes.
	238	Ensure uninitialised "mybuf" is not accessed.
	239	(print_insn_z80): Don't zero n_fetch and n_used here,..
	240	(print_insn_z80_buf): ..do it here instead.
	241
c9ae58fe AM	242	2020-01-04 Alan Modra <amodra@gmail.com>
	243
	244	* m32r-ibld.c: Regenerate.
	245
5f57d4ec AM	246	2020-01-04 Alan Modra <amodra@gmail.com>
	247
	248	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	249
2c5c1196 AM	250	2020-01-04 Alan Modra <amodra@gmail.com>
	251
	252	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	253
2e98c6c5 AM	254	2020-01-04 Alan Modra <amodra@gmail.com>
	255
	256	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	257
567dfba2 JB	258	2020-01-03 Jan Beulich <jbeulich@suse.com>
567dfba2 JB	259
5437a02a JB	260	* aarch64-tbl.h (aarch64_opcode_table): Use
	261	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	262
	263	2020-01-03 Jan Beulich <jbeulich@suse.com>
	264
	265	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	266	forms of SUDOT and USDOT.
567dfba2 JB	267
8c45011a JB	268	2020-01-03 Jan Beulich <jbeulich@suse.com>
8c45011a JB	269
5437a02a	270	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	271	uzip{1,2}.
	272	* opcodes/aarch64-dis-2.c: Re-generate.
	273
f4950f76 JB	274	2020-01-03 Jan Beulich <jbeulich@suse.com>
f4950f76 JB	275
5437a02a	276	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	277	FMMLA encoding.
	278	* opcodes/aarch64-dis-2.c: Re-generate.
	279
6655dba2 SB	280	2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
	281
	282	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	283
b14ce8bf AM	284	2020-01-01 Alan Modra <amodra@gmail.com>
	285
	286	Update year range in copyright notice of all files.
	287
0b114740	288	For older changes see ChangeLog-2019
3499769a	289	\f
0b114740	290	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	291
	292	Copying and distribution of this file, with or without modification,
	293	are permitted in any medium without royalty provided the copyright
	294	notice and this notice are preserved.
	295
	296	Local Variables:
	297	mode: change-log
	298	left-margin: 8
	299	fill-column: 74
	300	version-control: never
	301	End: