[people/ms/u-boot.git] / drivers / serial / ns16550.c

/*
 * COM1 NS16550 support
 * originally from linux source (arch/powerpc/boot/ns16550.c)
 * modified to use CONFIG_SYS_ISA_MEM and new defines
 */

#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
#include <ns16550.h>
#include <serial.h>
#include <watchdog.h>
#include <linux/types.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

#define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | \
		     UART_MCR_RTS)		/* RTS/DTR */

#ifndef CONFIG_DM_SERIAL
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
#define serial_out(x, y)	outb(x, (ulong)y)
#define serial_in(y)		inb((ulong)y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
#define serial_out(x, y)	out_be32(y, x)
#define serial_in(y)		in_be32(y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
#define serial_out(x, y)	out_le32(y, x)
#define serial_in(y)		in_le32(y)
#else
#define serial_out(x, y)	writeb(x, y)
#define serial_in(y)		readb(y)
#endif
#endif /* !CONFIG_DM_SERIAL */

#if defined(CONFIG_SOC_KEYSTONE)
#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
#undef UART_MCRVAL
#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
#define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
#else
#define UART_MCRVAL             (UART_MCR_RTS)
#endif
#endif

#ifndef CONFIG_SYS_NS16550_IER
#define CONFIG_SYS_NS16550_IER  0x00
#endif /* CONFIG_SYS_NS16550_IER */

static inline void serial_out_shift(void *addr, int shift, int value)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	outb(value, (ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	out_le32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	out_be32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	writel(value, addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	writeb(value, addr + (1 << shift) - 1);
#else
	writeb(value, addr);
#endif
}

static inline int serial_in_shift(void *addr, int shift)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	return inb((ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	return in_le32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	return in_be32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	return readl(addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	return readb(addr + (1 << shift) - 1);
#else
	return readb(addr);
#endif
}

#ifdef CONFIG_DM_SERIAL

#ifndef CONFIG_SYS_NS16550_CLK
#define CONFIG_SYS_NS16550_CLK  0
#endif

static void ns16550_writeb(NS16550_t port, int offset, int value)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = (unsigned char *)plat->base + offset;

	/*
	 * As far as we know it doesn't make sense to support selection of
	 * these options at run-time, so use the existing CONFIG options.
	 */
	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
}

static int ns16550_readb(NS16550_t port, int offset)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = (unsigned char *)plat->base + offset;

	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
}

static u32 ns16550_getfcr(NS16550_t port)
{
	struct ns16550_platdata *plat = port->plat;

	return plat->fcr;
}

/* We can clean these up once everything is moved to driver model */
#define serial_out(value, addr)	\
	ns16550_writeb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port, value)
#define serial_in(addr) \
	ns16550_readb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port)
#else
static u32 ns16550_getfcr(NS16550_t port)
{
	return UART_FCR_DEFVAL;
}
#endif

int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
{
	const unsigned int mode_x_div = 16;

	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
}

static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
{
	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
	serial_out(baud_divisor & 0xff, &com_port->dll);
	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	serial_out(UART_LCRVAL, &com_port->lcr);
}

void NS16550_init(NS16550_t com_port, int baud_divisor)
{
#if (defined(CONFIG_SPL_BUILD) && \
		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
	/*
	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	 * before SPL starts only THRE bit is set. We have to empty the
	 * transmitter before initialization starts.
	 */
	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
	     == UART_LSR_THRE) {
		if (baud_divisor != -1)
			NS16550_setbrg(com_port, baud_divisor);
		serial_out(0, &com_port->mdr1);
	}
#endif

	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
		;

	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
#if defined(CONFIG_ARCH_OMAP2PLUS)
	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
#endif
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
	if (baud_divisor != -1)
		NS16550_setbrg(com_port, baud_divisor);
#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX)
	/* /16 is proper to hit 115200 with 48MHz */
	serial_out(0, &com_port->mdr1);
#endif
#if defined(CONFIG_SOC_KEYSTONE)
	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
#endif
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
void NS16550_reinit(NS16550_t com_port, int baud_divisor)
{
	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
	NS16550_setbrg(com_port, 0);
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
	NS16550_setbrg(com_port, baud_divisor);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

void NS16550_putc(NS16550_t com_port, char c)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
		;
	serial_out(c, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (c == '\n')
		WATCHDOG_RESET();
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
char NS16550_getc(NS16550_t com_port)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
		extern void usbtty_poll(void);
		usbtty_poll();
#endif
		WATCHDOG_RESET();
	}
	return serial_in(&com_port->rbr);
}

int NS16550_tstc(NS16550_t com_port)
{
	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
}

#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

#ifdef CONFIG_DEBUG_UART_NS16550

#include <debug_uart.h>

static inline void _debug_uart_init(void)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
	int baud_divisor;

	/*
	 * We copy the code from above because it is already horribly messy.
	 * Trying to refactor to nicely remove the duplication doesn't seem
	 * feasible. The better fix is to move all users of this driver to
	 * driver model.
	 */
	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
					    CONFIG_BAUDRATE);
	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	serial_dout(&com_port->mcr, UART_MCRVAL);
	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);

	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
	serial_dout(&com_port->dll, baud_divisor & 0xff);
	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	serial_dout(&com_port->lcr, UART_LCRVAL);
}

static inline void _debug_uart_putc(int ch)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;

	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
		;
	serial_dout(&com_port->thr, ch);
}

DEBUG_UART_FUNCS

#endif

#ifdef CONFIG_DEBUG_UART_OMAP

#include <debug_uart.h>

static inline void _debug_uart_init(void)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
	int baud_divisor;

	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
					    CONFIG_BAUDRATE);
	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	serial_dout(&com_port->mdr1, 0x7);
	serial_dout(&com_port->mcr, UART_MCRVAL);
	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);

	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
	serial_dout(&com_port->dll, baud_divisor & 0xff);
	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	serial_dout(&com_port->lcr, UART_LCRVAL);
	serial_dout(&com_port->mdr1, 0x0);
}

static inline void _debug_uart_putc(int ch)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;

	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
		;
	serial_dout(&com_port->thr, ch);
}

DEBUG_UART_FUNCS

#endif

#ifdef CONFIG_DM_SERIAL
static int ns16550_serial_putc(struct udevice *dev, const char ch)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
		return -EAGAIN;
	serial_out(ch, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (ch == '\n')
		WATCHDOG_RESET();

	return 0;
}

static int ns16550_serial_pending(struct udevice *dev, bool input)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (input)
		return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	else
		return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
}

static int ns16550_serial_getc(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
		return -EAGAIN;

	return serial_in(&com_port->rbr);
}

static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct NS16550 *const com_port = dev_get_priv(dev);
	struct ns16550_platdata *plat = com_port->plat;
	int clock_divisor;

	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);

	NS16550_setbrg(com_port, clock_divisor);

	return 0;
}

int ns16550_serial_probe(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	com_port->plat = dev_get_platdata(dev);
	NS16550_init(com_port, -1);

	return 0;
}

#if CONFIG_IS_ENABLED(OF_CONTROL)
enum {
	PORT_NS16550 = 0,
	PORT_JZ4780,
};
#endif

#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
	struct ns16550_platdata *plat = dev->platdata;
	const u32 port_type = dev_get_driver_data(dev);
	fdt_addr_t addr;
	struct clk clk;
	int err;

	/* try Processor Local Bus device first */
	addr = dev_get_addr(dev);
#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
	if (addr == FDT_ADDR_T_NONE) {
		/* then try pci device */
		struct fdt_pci_addr pci_addr;
		u32 bar;
		int ret;

		/* we prefer to use a memory-mapped register */
		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
					  FDT_PCI_SPACE_MEM32, "reg",
					  &pci_addr);
		if (ret) {
			/* try if there is any i/o-mapped register */
			ret = fdtdec_get_pci_addr(gd->fdt_blob,
						  dev_of_offset(dev),
						  FDT_PCI_SPACE_IO,
						  "reg", &pci_addr);
			if (ret)
				return ret;
		}

		ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
		if (ret)
			return ret;

		addr = bar;
	}
#endif

	if (addr == FDT_ADDR_T_NONE)
		return -EINVAL;

#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	plat->base = addr;
#else
	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
#endif

	plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
				     "reg-offset", 0);
	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
					 "reg-shift", 0);

	err = clk_get_by_index(dev, 0, &clk);
	if (!err) {
		err = clk_get_rate(&clk);
		if (!IS_ERR_VALUE(err))
			plat->clock = err;
	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
		debug("ns16550 failed to get clock\n");
		return err;
	}

	if (!plat->clock)
		plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
					     "clock-frequency",
					     CONFIG_SYS_NS16550_CLK);
	if (!plat->clock) {
		debug("ns16550 clock not defined\n");
		return -EINVAL;
	}

	plat->fcr = UART_FCR_DEFVAL;
	if (port_type == PORT_JZ4780)
		plat->fcr |= UART_FCR_UME;

	return 0;
}
#endif

const struct dm_serial_ops ns16550_serial_ops = {
	.putc = ns16550_serial_putc,
	.pending = ns16550_serial_pending,
	.getc = ns16550_serial_getc,
	.setbrg = ns16550_serial_setbrg,
};

#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
/*
 * Please consider existing compatible strings before adding a new
 * one to keep this table compact. Or you may add a generic "ns16550"
 * compatible string to your dts.
 */
static const struct udevice_id ns16550_serial_ids[] = {
	{ .compatible = "ns16550",		.data = PORT_NS16550 },
	{ .compatible = "ns16550a",		.data = PORT_NS16550 },
	{ .compatible = "ingenic,jz4780-uart",	.data = PORT_JZ4780  },
	{ .compatible = "nvidia,tegra20-uart",	.data = PORT_NS16550 },
	{ .compatible = "snps,dw-apb-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,omap2-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,omap3-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,omap4-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,am3352-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,am4372-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,dra742-uart",	.data = PORT_NS16550 },
	{}
};
#endif /* OF_CONTROL && !OF_PLATDATA */

#if CONFIG_IS_ENABLED(SERIAL_PRESENT)

/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
U_BOOT_DRIVER(ns16550_serial) = {
	.name	= "ns16550_serial",
	.id	= UCLASS_SERIAL,
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
	.of_match = ns16550_serial_ids,
	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
#endif
	.priv_auto_alloc_size = sizeof(struct NS16550),
	.probe = ns16550_serial_probe,
	.ops	= &ns16550_serial_ops,
	.flags	= DM_FLAG_PRE_RELOC,
};
#endif
#endif /* SERIAL_PRESENT */

#endif /* CONFIG_DM_SERIAL */
Commit	Line	Data
e85390dc WD	1	/*
e85390dc WD	2	* COM1 NS16550 support
a47a12be	3	* originally from linux source (arch/powerpc/boot/ns16550.c)
6d0f6bcf	4	* modified to use CONFIG_SYS_ISA_MEM and new defines
e85390dc WD	5	*/
e85390dc WD	6
fa54eb12	7	#include <common.h>
50fce1d5	8	#include <clk.h>
12e431b2 SG	9	#include <dm.h>
	10	#include <errno.h>
	11	#include <fdtdec.h>
e85390dc	12	#include <ns16550.h>
12e431b2	13	#include <serial.h>
a1b322a9	14	#include <watchdog.h>
167cdad1 GR	15	#include <linux/types.h>
167cdad1 GR	16	#include <asm/io.h>
e85390dc	17
12e431b2 SG	18	DECLARE_GLOBAL_DATA_PTR;
12e431b2 SG	19
200779e3 DZ	20	#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
	21	#define UART_MCRVAL (UART_MCR_DTR \| \
	22	UART_MCR_RTS) /* RTS/DTR */
12e431b2 SG	23
12e431b2 SG	24	#ifndef CONFIG_DM_SERIAL
167cdad1	25	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
f8df9d0d SG	26	#define serial_out(x, y) outb(x, (ulong)y)
f8df9d0d SG	27	#define serial_in(y) inb((ulong)y)
79df1208	28	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
f8df9d0d SG	29	#define serial_out(x, y) out_be32(y, x)
f8df9d0d SG	30	#define serial_in(y) in_be32(y)
79df1208	31	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
f8df9d0d SG	32	#define serial_out(x, y) out_le32(y, x)
f8df9d0d SG	33	#define serial_in(y) in_le32(y)
167cdad1	34	#else
f8df9d0d SG	35	#define serial_out(x, y) writeb(x, y)
f8df9d0d SG	36	#define serial_in(y) readb(y)
167cdad1	37	#endif
12e431b2	38	#endif /* !CONFIG_DM_SERIAL */
e85390dc	39
7c387646	40	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	41	#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
ef509b90 VA	42	#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) \| (1 << 13) \| (1 << 0))
d57dee57 KM	43	#undef UART_MCRVAL
	44	#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
	45	#define UART_MCRVAL (UART_MCR_RTS \| UART_MCR_AFE)
	46	#else
	47	#define UART_MCRVAL (UART_MCR_RTS)
	48	#endif
ef509b90 VA	49	#endif
ef509b90 VA	50
a160ea0b PW	51	#ifndef CONFIG_SYS_NS16550_IER
	52	#define CONFIG_SYS_NS16550_IER 0x00
	53	#endif /* CONFIG_SYS_NS16550_IER */
	54
363e6da1	55	static inline void serial_out_shift(void *addr, int shift, int value)
76571674	56	{
12e431b2	57	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	58	outb(value, (ulong)addr);
12e431b2 SG	59	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	60	out_le32(addr, value);
	61	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	62	out_be32(addr, value);
90914008 SG	63	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	64	writel(value, addr);
12e431b2	65	#elif defined(CONFIG_SYS_BIG_ENDIAN)
76571674	66	writeb(value, addr + (1 << shift) - 1);
12e431b2 SG	67	#else
	68	writeb(value, addr);
	69	#endif
	70	}
	71
363e6da1	72	static inline int serial_in_shift(void *addr, int shift)
12e431b2	73	{
12e431b2	74	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	75	return inb((ulong)addr);
12e431b2 SG	76	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	77	return in_le32(addr);
	78	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	79	return in_be32(addr);
90914008 SG	80	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	81	return readl(addr);
12e431b2	82	#elif defined(CONFIG_SYS_BIG_ENDIAN)
20379c11	83	return readb(addr + (1 << shift) - 1);
12e431b2 SG	84	#else
	85	return readb(addr);
	86	#endif
	87	}
	88
fa4ce723 MV	89	#ifdef CONFIG_DM_SERIAL
	90
	91	#ifndef CONFIG_SYS_NS16550_CLK
	92	#define CONFIG_SYS_NS16550_CLK 0
	93	#endif
	94
76571674 SG	95	static void ns16550_writeb(NS16550_t port, int offset, int value)
	96	{
	97	struct ns16550_platdata *plat = port->plat;
	98	unsigned char *addr;
	99
	100	offset *= 1 << plat->reg_shift;
df8ec55d PB	101	addr = (unsigned char *)plat->base + offset;
df8ec55d PB	102
76571674 SG	103	/*
	104	* As far as we know it doesn't make sense to support selection of
	105	* these options at run-time, so use the existing CONFIG options.
	106	*/
59b35ddd	107	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
76571674 SG	108	}
	109
	110	static int ns16550_readb(NS16550_t port, int offset)
	111	{
	112	struct ns16550_platdata *plat = port->plat;
	113	unsigned char *addr;
	114
	115	offset *= 1 << plat->reg_shift;
df8ec55d	116	addr = (unsigned char *)plat->base + offset;
76571674	117
59b35ddd	118	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
76571674 SG	119	}
76571674 SG	120
65f83802 MV	121	static u32 ns16550_getfcr(NS16550_t port)
	122	{
	123	struct ns16550_platdata *plat = port->plat;
	124
	125	return plat->fcr;
	126	}
	127
12e431b2 SG	128	/* We can clean these up once everything is moved to driver model */
12e431b2 SG	129	#define serial_out(value, addr) \
363e6da1 SG	130	ns16550_writeb(com_port, \
363e6da1 SG	131	(unsigned char )addr - (unsigned char )com_port, value)
12e431b2	132	#define serial_in(addr) \
363e6da1 SG	133	ns16550_readb(com_port, \
363e6da1 SG	134	(unsigned char )addr - (unsigned char )com_port)
65f83802 MV	135	#else
	136	static u32 ns16550_getfcr(NS16550_t port)
	137	{
17fa0326	138	return UART_FCR_DEFVAL;
65f83802	139	}
12e431b2 SG	140	#endif
12e431b2 SG	141
03c6f176	142	int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
fa54eb12 SG	143	{
	144	const unsigned int mode_x_div = 16;
	145
21d00436 SG	146	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
	147	}
	148
8bbe33c8 SG	149	static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
	150	{
	151	serial_out(UART_LCR_BKSE \| UART_LCRVAL, &com_port->lcr);
	152	serial_out(baud_divisor & 0xff, &com_port->dll);
	153	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	154	serial_out(UART_LCRVAL, &com_port->lcr);
	155	}
	156
f8df9d0d	157	void NS16550_init(NS16550_t com_port, int baud_divisor)
e85390dc	158	{
956a8bae GG	159	#if (defined(CONFIG_SPL_BUILD) && \
956a8bae GG	160	(defined(CONFIG_OMAP34XX) \|\| defined(CONFIG_OMAP44XX)))
fd2aeac5	161	/*
956a8bae GG	162	* On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	163	* before SPL starts only THRE bit is set. We have to empty the
	164	* transmitter before initialization starts.
fd2aeac5 MH	165	*/
	166	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT \| UART_LSR_THRE))
	167	== UART_LSR_THRE) {
12e431b2 SG	168	if (baud_divisor != -1)
12e431b2 SG	169	NS16550_setbrg(com_port, baud_divisor);
fd2aeac5 MH	170	serial_out(0, &com_port->mdr1);
	171	}
	172	#endif
	173
cb55b332 SW	174	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
	175	;
	176
a160ea0b	177	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
89024ddc	178	#if defined(CONFIG_ARCH_OMAP2PLUS)
167cdad1	179	serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
945af8d7	180	#endif
167cdad1	181	serial_out(UART_MCRVAL, &com_port->mcr);
65f83802	182	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
12e431b2 SG	183	if (baud_divisor != -1)
12e431b2 SG	184	NS16550_setbrg(com_port, baud_divisor);
89024ddc	185	#if defined(CONFIG_ARCH_OMAP2PLUS) \|\| defined(CONFIG_SOC_DA8XX)
f8df9d0d SG	186	/* /16 is proper to hit 115200 with 48MHz */
f8df9d0d SG	187	serial_out(0, &com_port->mdr1);
89024ddc	188	#endif
7c387646	189	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	190	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
ef509b90 VA	191	#endif
e85390dc WD	192	}
e85390dc WD	193
f5675aa5	194	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	195	void NS16550_reinit(NS16550_t com_port, int baud_divisor)
e85390dc	196	{
a160ea0b	197	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
8bbe33c8	198	NS16550_setbrg(com_port, 0);
167cdad1	199	serial_out(UART_MCRVAL, &com_port->mcr);
65f83802	200	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
8bbe33c8	201	NS16550_setbrg(com_port, baud_divisor);
e85390dc	202	}
f5675aa5	203	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
e85390dc	204
f8df9d0d	205	void NS16550_putc(NS16550_t com_port, char c)
e85390dc	206	{
f8df9d0d SG	207	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
f8df9d0d SG	208	;
167cdad1	209	serial_out(c, &com_port->thr);
1a2d9b30 SR	210
	211	/*
	212	* Call watchdog_reset() upon newline. This is done here in putc
	213	* since the environment code uses a single puts() to print the complete
	214	* environment upon "printenv". So we can't put this watchdog call
	215	* in puts().
	216	*/
	217	if (c == '\n')
	218	WATCHDOG_RESET();
e85390dc WD	219	}
e85390dc WD	220
f5675aa5	221	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	222	char NS16550_getc(NS16550_t com_port)
e85390dc	223	{
167cdad1	224	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
f2041388	225	#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
232c150a WD	226	extern void usbtty_poll(void);
	227	usbtty_poll();
	228	#endif
a1b322a9	229	WATCHDOG_RESET();
232c150a	230	}
167cdad1	231	return serial_in(&com_port->rbr);
e85390dc WD	232	}
e85390dc WD	233
f8df9d0d	234	int NS16550_tstc(NS16550_t com_port)
e85390dc	235	{
f8df9d0d	236	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
e85390dc WD	237	}
e85390dc WD	238
f5675aa5	239	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
12e431b2	240
21d00436 SG	241	#ifdef CONFIG_DEBUG_UART_NS16550
	242
	243	#include <debug_uart.h>
	244
97b05973	245	static inline void _debug_uart_init(void)
21d00436 SG	246	{
	247	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	248	int baud_divisor;
	249
	250	/*
	251	* We copy the code from above because it is already horribly messy.
	252	* Trying to refactor to nicely remove the duplication doesn't seem
	253	* feasible. The better fix is to move all users of this driver to
	254	* driver model.
	255	*/
03c6f176 MV	256	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
03c6f176 MV	257	CONFIG_BAUDRATE);
6e780c7a SG	258	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
6e780c7a SG	259	serial_dout(&com_port->mcr, UART_MCRVAL);
17fa0326	260	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
6e780c7a SG	261
	262	serial_dout(&com_port->lcr, UART_LCR_BKSE \| UART_LCRVAL);
	263	serial_dout(&com_port->dll, baud_divisor & 0xff);
	264	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	265	serial_dout(&com_port->lcr, UART_LCRVAL);
21d00436 SG	266	}
	267
	268	static inline void _debug_uart_putc(int ch)
	269	{
	270	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	271
6e780c7a	272	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
21d00436	273	;
6e780c7a	274	serial_dout(&com_port->thr, ch);
21d00436 SG	275	}
	276
	277	DEBUG_UART_FUNCS
	278
	279	#endif
	280
a52cf086 LV	281	#ifdef CONFIG_DEBUG_UART_OMAP
	282
	283	#include <debug_uart.h>
	284
	285	static inline void _debug_uart_init(void)
	286	{
	287	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	288	int baud_divisor;
	289
	290	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
	291	CONFIG_BAUDRATE);
	292	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	293	serial_dout(&com_port->mdr1, 0x7);
	294	serial_dout(&com_port->mcr, UART_MCRVAL);
	295	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
	296
	297	serial_dout(&com_port->lcr, UART_LCR_BKSE \| UART_LCRVAL);
	298	serial_dout(&com_port->dll, baud_divisor & 0xff);
	299	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	300	serial_dout(&com_port->lcr, UART_LCRVAL);
	301	serial_dout(&com_port->mdr1, 0x0);
	302	}
	303
	304	static inline void _debug_uart_putc(int ch)
	305	{
	306	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	307
	308	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
	309	;
	310	serial_dout(&com_port->thr, ch);
	311	}
	312
	313	DEBUG_UART_FUNCS
	314
	315	#endif
	316
12e431b2 SG	317	#ifdef CONFIG_DM_SERIAL
	318	static int ns16550_serial_putc(struct udevice *dev, const char ch)
	319	{
	320	struct NS16550 *const com_port = dev_get_priv(dev);
	321
	322	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
	323	return -EAGAIN;
	324	serial_out(ch, &com_port->thr);
	325
	326	/*
	327	* Call watchdog_reset() upon newline. This is done here in putc
	328	* since the environment code uses a single puts() to print the complete
	329	* environment upon "printenv". So we can't put this watchdog call
	330	* in puts().
	331	*/
	332	if (ch == '\n')
	333	WATCHDOG_RESET();
	334
	335	return 0;
	336	}
	337
	338	static int ns16550_serial_pending(struct udevice *dev, bool input)
	339	{
	340	struct NS16550 *const com_port = dev_get_priv(dev);
	341
	342	if (input)
	343	return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	344	else
	345	return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
	346	}
	347
	348	static int ns16550_serial_getc(struct udevice *dev)
	349	{
	350	struct NS16550 *const com_port = dev_get_priv(dev);
	351
aea2be20	352	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
12e431b2 SG	353	return -EAGAIN;
	354
	355	return serial_in(&com_port->rbr);
	356	}
	357
	358	static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
	359	{
	360	struct NS16550 *const com_port = dev_get_priv(dev);
	361	struct ns16550_platdata *plat = com_port->plat;
	362	int clock_divisor;
	363
	364	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
	365
	366	NS16550_setbrg(com_port, clock_divisor);
	367
	368	return 0;
	369	}
	370
	371	int ns16550_serial_probe(struct udevice *dev)
	372	{
	373	struct NS16550 *const com_port = dev_get_priv(dev);
	374
11c1a878	375	com_port->plat = dev_get_platdata(dev);
12e431b2 SG	376	NS16550_init(com_port, -1);
	377
	378	return 0;
	379	}
	380
79fd9281 MV	381	#if CONFIG_IS_ENABLED(OF_CONTROL)
	382	enum {
	383	PORT_NS16550 = 0,
0b060eef	384	PORT_JZ4780,
79fd9281 MV	385	};
	386	#endif
	387
b2927fba	388	#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
12e431b2 SG	389	int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
12e431b2 SG	390	{
12e431b2	391	struct ns16550_platdata *plat = dev->platdata;
0b060eef	392	const u32 port_type = dev_get_driver_data(dev);
12e431b2	393	fdt_addr_t addr;
021abf69 MY	394	struct clk clk;
021abf69 MY	395	int err;
12e431b2	396
3db886a5	397	/* try Processor Local Bus device first */
4e9838c1	398	addr = dev_get_addr(dev);
fcc0a877	399	#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
3db886a5 BM	400	if (addr == FDT_ADDR_T_NONE) {
	401	/* then try pci device */
	402	struct fdt_pci_addr pci_addr;
	403	u32 bar;
	404	int ret;
	405
	406	/* we prefer to use a memory-mapped register */
e160f7d4	407	ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
3db886a5 BM	408	FDT_PCI_SPACE_MEM32, "reg",
	409	&pci_addr);
	410	if (ret) {
	411	/* try if there is any i/o-mapped register */
	412	ret = fdtdec_get_pci_addr(gd->fdt_blob,
e160f7d4	413	dev_of_offset(dev),
3db886a5 BM	414	FDT_PCI_SPACE_IO,
	415	"reg", &pci_addr);
	416	if (ret)
	417	return ret;
	418	}
	419
fcc0a877	420	ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
3db886a5 BM	421	if (ret)
	422	return ret;
	423
	424	addr = bar;
	425	}
	426	#endif
	427
12e431b2 SG	428	if (addr == FDT_ADDR_T_NONE)
	429	return -EINVAL;
	430
df8ec55d	431	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
167efe01	432	plat->base = addr;
df8ec55d PB	433	#else
	434	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
	435	#endif
	436
e160f7d4	437	plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
59b35ddd	438	"reg-offset", 0);
e160f7d4	439	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
80e06146	440	"reg-shift", 0);
50fce1d5 PB	441
	442	err = clk_get_by_index(dev, 0, &clk);
	443	if (!err) {
	444	err = clk_get_rate(&clk);
	445	if (!IS_ERR_VALUE(err))
	446	plat->clock = err;
ab895d6a	447	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
50fce1d5 PB	448	debug("ns16550 failed to get clock\n");
	449	return err;
	450	}
	451
	452	if (!plat->clock)
e160f7d4	453	plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
50fce1d5 PB	454	"clock-frequency",
50fce1d5 PB	455	CONFIG_SYS_NS16550_CLK);
8e62d32e TC	456	if (!plat->clock) {
	457	debug("ns16550 clock not defined\n");
	458	return -EINVAL;
	459	}
12e431b2	460
17fa0326	461	plat->fcr = UART_FCR_DEFVAL;
0b060eef MV	462	if (port_type == PORT_JZ4780)
0b060eef MV	463	plat->fcr \|= UART_FCR_UME;
65f83802	464
12e431b2 SG	465	return 0;
12e431b2 SG	466	}
11c1a878	467	#endif
12e431b2 SG	468
	469	const struct dm_serial_ops ns16550_serial_ops = {
	470	.putc = ns16550_serial_putc,
	471	.pending = ns16550_serial_pending,
	472	.getc = ns16550_serial_getc,
	473	.setbrg = ns16550_serial_setbrg,
	474	};
8e62d32e	475
6f8c351e	476	#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
cc4228f9 TC	477	/*
	478	* Please consider existing compatible strings before adding a new
	479	* one to keep this table compact. Or you may add a generic "ns16550"
	480	* compatible string to your dts.
	481	*/
8e62d32e	482	static const struct udevice_id ns16550_serial_ids[] = {
79fd9281 MV	483	{ .compatible = "ns16550", .data = PORT_NS16550 },
79fd9281 MV	484	{ .compatible = "ns16550a", .data = PORT_NS16550 },
0b060eef	485	{ .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
79fd9281 MV	486	{ .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
	487	{ .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
	488	{ .compatible = "ti,omap2-uart", .data = PORT_NS16550 },
	489	{ .compatible = "ti,omap3-uart", .data = PORT_NS16550 },
	490	{ .compatible = "ti,omap4-uart", .data = PORT_NS16550 },
	491	{ .compatible = "ti,am3352-uart", .data = PORT_NS16550 },
	492	{ .compatible = "ti,am4372-uart", .data = PORT_NS16550 },
	493	{ .compatible = "ti,dra742-uart", .data = PORT_NS16550 },
8e62d32e TC	494	{}
8e62d32e TC	495	};
6f8c351e	496	#endif /* OF_CONTROL && !OF_PLATDATA */
8e62d32e	497
b7e29834	498	#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
6f8c351e AG	499
	500	/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
	501	#if !defined(CONFIG_TPL_BUILD) \|\| defined(CONFIG_TPL_DM_SERIAL)
8e62d32e TC	502	U_BOOT_DRIVER(ns16550_serial) = {
	503	.name = "ns16550_serial",
	504	.id = UCLASS_SERIAL,
6f8c351e	505	#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
8e62d32e TC	506	.of_match = ns16550_serial_ids,
	507	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
	508	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
	509	#endif
	510	.priv_auto_alloc_size = sizeof(struct NS16550),
	511	.probe = ns16550_serial_probe,
	512	.ops = &ns16550_serial_ops,
b7e5a643	513	.flags = DM_FLAG_PRE_RELOC,
8e62d32e	514	};
b7e29834	515	#endif
6f8c351e AG	516	#endif /* SERIAL_PRESENT */
6f8c351e AG	517
12e431b2	518	#endif /* CONFIG_DM_SERIAL */