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Commit | Line | Data |
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98e39e09 | 1 | /* |
4284af58 | 2 | * The PCI Utilities -- List All PCI Devices |
98e39e09 | 3 | * |
bf72d3e9 | 4 | * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz> |
98e39e09 | 5 | * |
61829219 MM |
6 | * Can be freely distributed and used under the terms of the GNU GPL v2+. |
7 | * | |
8 | * SPDX-License-Identifier: GPL-2.0-or-later | |
98e39e09 MM |
9 | */ |
10 | ||
11 | #include <stdio.h> | |
12 | #include <string.h> | |
13 | #include <stdlib.h> | |
727ce158 | 14 | #include <stdarg.h> |
98e39e09 | 15 | |
c7a34993 | 16 | #include "lspci.h" |
98e39e09 MM |
17 | |
18 | /* Options */ | |
19 | ||
c7a34993 | 20 | int verbose; /* Show detailed information */ |
a387042e | 21 | static int opt_hex; /* Show contents of config space as hexadecimal numbers */ |
c7a34993 | 22 | struct pci_filter filter; /* Device filter */ |
ce22dfec | 23 | static int opt_filter; /* Any filter was given */ |
a387042e | 24 | static int opt_tree; /* Show bus tree */ |
62e78fa6 | 25 | static int opt_path; /* Show bridge path */ |
a387042e MM |
26 | static int opt_machine; /* Generate machine-readable output */ |
27 | static int opt_map_mode; /* Bus mapping mode enabled */ | |
28 | static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */ | |
11339c0d | 29 | static int opt_kernel; /* Show kernel drivers */ |
cca2f7c6 MM |
30 | static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */ |
31 | static int opt_query_all; /* Query the DNS for all entries */ | |
c7a34993 | 32 | char *opt_pcimap; /* Override path to Linux modules.pcimap */ |
98e39e09 | 33 | |
81afa98c MM |
34 | const char program_name[] = "lspci"; |
35 | ||
62e78fa6 | 36 | static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ; |
cca2f7c6 MM |
37 | |
38 | static char help_msg[] = | |
39 | "Usage: lspci [<switches>]\n" | |
40 | "\n" | |
1b99a704 MM |
41 | "Basic display modes:\n" |
42 | "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n" | |
43 | "-t\t\tShow bus tree\n" | |
44 | "\n" | |
45 | "Display options:\n" | |
c5751fb0 | 46 | "-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n" |
1b99a704 MM |
47 | #ifdef PCI_OS_LINUX |
48 | "-k\t\tShow kernel drivers handling each device\n" | |
49 | #endif | |
50 | "-x\t\tShow hex-dump of the standard part of the config space\n" | |
51 | "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n" | |
52 | "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n" | |
53 | "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n" | |
54 | "-D\t\tAlways show domain numbers\n" | |
62e78fa6 MM |
55 | "-P\t\tDisplay bridge path in addition to bus and device number\n" |
56 | "-PP\t\tDisplay bus path in addition to bus and device number\n" | |
1b99a704 MM |
57 | "\n" |
58 | "Resolving of device ID's to names:\n" | |
cca2f7c6 MM |
59 | "-n\t\tShow numeric ID's\n" |
60 | "-nn\t\tShow both textual and numeric ID's (names & numbers)\n" | |
61 | #ifdef PCI_USE_DNS | |
62 | "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n" | |
63 | "-qq\t\tAs above, but re-query locally cached entries\n" | |
64 | "-Q\t\tQuery the PCI ID database for all ID's via DNS\n" | |
65 | #endif | |
1b99a704 MM |
66 | "\n" |
67 | "Selection of devices:\n" | |
cca2f7c6 | 68 | "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n" |
4d1c9525 | 69 | "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n" |
1b99a704 MM |
70 | "\n" |
71 | "Other options:\n" | |
cca2f7c6 | 72 | "-i <file>\tUse specified ID database instead of %s\n" |
c1c952d2 | 73 | #ifdef PCI_OS_LINUX |
cca2f7c6 | 74 | "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n" |
c1c952d2 | 75 | #endif |
cca2f7c6 | 76 | "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n" |
1b99a704 MM |
77 | "\n" |
78 | "PCI access options:\n" | |
727ce158 MM |
79 | GENERIC_HELP |
80 | ; | |
98e39e09 | 81 | |
a387042e | 82 | /*** Our view of the PCI bus ***/ |
98e39e09 | 83 | |
c7a34993 MM |
84 | struct pci_access *pacc; |
85 | struct device *first_dev; | |
934e7e36 | 86 | static int seen_errors; |
ce22dfec | 87 | static int need_topology; |
98e39e09 | 88 | |
c7a34993 | 89 | int |
ec25b52d MM |
90 | config_fetch(struct device *d, unsigned int pos, unsigned int len) |
91 | { | |
92 | unsigned int end = pos+len; | |
93 | int result; | |
84d437d6 MM |
94 | |
95 | while (pos < d->config_bufsize && len && d->present[pos]) | |
96 | pos++, len--; | |
97 | while (pos+len <= d->config_bufsize && len && d->present[pos+len-1]) | |
98 | len--; | |
99 | if (!len) | |
ec25b52d | 100 | return 1; |
84d437d6 | 101 | |
ec25b52d MM |
102 | if (end > d->config_bufsize) |
103 | { | |
84d437d6 | 104 | int orig_size = d->config_bufsize; |
ec25b52d MM |
105 | while (end > d->config_bufsize) |
106 | d->config_bufsize *= 2; | |
107 | d->config = xrealloc(d->config, d->config_bufsize); | |
84d437d6 | 108 | d->present = xrealloc(d->present, d->config_bufsize); |
1ac3a99d | 109 | memset(d->present + orig_size, 0, d->config_bufsize - orig_size); |
0ce6ff4a | 110 | pci_setup_cache(d->dev, d->config, d->dev->cache_len); |
ec25b52d MM |
111 | } |
112 | result = pci_read_block(d->dev, pos, d->config + pos, len); | |
84d437d6 MM |
113 | if (result) |
114 | memset(d->present + pos, 1, len); | |
ec25b52d MM |
115 | return result; |
116 | } | |
117 | ||
c7a34993 | 118 | struct device * |
1812a795 MM |
119 | scan_device(struct pci_dev *p) |
120 | { | |
1812a795 MM |
121 | struct device *d; |
122 | ||
a387042e MM |
123 | if (p->domain && !opt_domains) |
124 | opt_domains = 1; | |
ce22dfec | 125 | if (!pci_filter_match(&filter, p) && !need_topology) |
1812a795 MM |
126 | return NULL; |
127 | d = xmalloc(sizeof(struct device)); | |
1ac3a99d | 128 | memset(d, 0, sizeof(*d)); |
1812a795 | 129 | d->dev = p; |
832b07a8 | 130 | d->no_config_access = p->no_config_access; |
84d437d6 | 131 | d->config_cached = d->config_bufsize = 64; |
ec25b52d | 132 | d->config = xmalloc(64); |
84d437d6 MM |
133 | d->present = xmalloc(64); |
134 | memset(d->present, 1, 64); | |
832b07a8 | 135 | if (!d->no_config_access && !pci_read_block(p, 0, d->config, 64)) |
934e7e36 | 136 | { |
832b07a8 PR |
137 | d->no_config_access = 1; |
138 | d->config_cached = d->config_bufsize = 0; | |
139 | memset(d->present, 0, 64); | |
934e7e36 | 140 | } |
832b07a8 | 141 | if (!d->no_config_access && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS) |
1812a795 | 142 | { |
ec25b52d MM |
143 | /* For cardbus bridges, we need to fetch 64 bytes more to get the |
144 | * full standard header... */ | |
84d437d6 MM |
145 | if (config_fetch(d, 64, 64)) |
146 | d->config_cached += 64; | |
1812a795 | 147 | } |
84d437d6 | 148 | pci_setup_cache(p, d->config, d->config_cached); |
67954c8b | 149 | pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS | (need_topology ? PCI_FILL_PARENT : 0)); |
1812a795 MM |
150 | return d; |
151 | } | |
152 | ||
98e39e09 | 153 | static void |
727ce158 | 154 | scan_devices(void) |
98e39e09 MM |
155 | { |
156 | struct device *d; | |
727ce158 | 157 | struct pci_dev *p; |
98e39e09 | 158 | |
727ce158 | 159 | pci_scan_bus(pacc); |
de7ef8bc | 160 | for (p=pacc->devices; p; p=p->next) |
1812a795 MM |
161 | if (d = scan_device(p)) |
162 | { | |
163 | d->next = first_dev; | |
164 | first_dev = d; | |
165 | } | |
98e39e09 MM |
166 | } |
167 | ||
a387042e | 168 | /*** Config space accesses ***/ |
98e39e09 | 169 | |
84d437d6 MM |
170 | static void |
171 | check_conf_range(struct device *d, unsigned int pos, unsigned int len) | |
172 | { | |
173 | while (len) | |
174 | if (!d->present[pos]) | |
175 | die("Internal bug: Accessing non-read configuration byte at position %x", pos); | |
176 | else | |
177 | pos++, len--; | |
178 | } | |
179 | ||
c7a34993 | 180 | byte |
98e39e09 MM |
181 | get_conf_byte(struct device *d, unsigned int pos) |
182 | { | |
84d437d6 | 183 | check_conf_range(d, pos, 1); |
98e39e09 MM |
184 | return d->config[pos]; |
185 | } | |
186 | ||
c7a34993 | 187 | word |
98e39e09 MM |
188 | get_conf_word(struct device *d, unsigned int pos) |
189 | { | |
84d437d6 | 190 | check_conf_range(d, pos, 2); |
98e39e09 MM |
191 | return d->config[pos] | (d->config[pos+1] << 8); |
192 | } | |
193 | ||
c7a34993 | 194 | u32 |
98e39e09 MM |
195 | get_conf_long(struct device *d, unsigned int pos) |
196 | { | |
84d437d6 | 197 | check_conf_range(d, pos, 4); |
98e39e09 MM |
198 | return d->config[pos] | |
199 | (d->config[pos+1] << 8) | | |
200 | (d->config[pos+2] << 16) | | |
201 | (d->config[pos+3] << 24); | |
202 | } | |
203 | ||
a387042e | 204 | /*** Sorting ***/ |
98e39e09 MM |
205 | |
206 | static int | |
207 | compare_them(const void *A, const void *B) | |
208 | { | |
727ce158 MM |
209 | const struct pci_dev *a = (*(const struct device **)A)->dev; |
210 | const struct pci_dev *b = (*(const struct device **)B)->dev; | |
98e39e09 | 211 | |
84c8d1bb MM |
212 | if (a->domain < b->domain) |
213 | return -1; | |
214 | if (a->domain > b->domain) | |
215 | return 1; | |
98e39e09 MM |
216 | if (a->bus < b->bus) |
217 | return -1; | |
218 | if (a->bus > b->bus) | |
219 | return 1; | |
727ce158 MM |
220 | if (a->dev < b->dev) |
221 | return -1; | |
222 | if (a->dev > b->dev) | |
223 | return 1; | |
224 | if (a->func < b->func) | |
98e39e09 | 225 | return -1; |
727ce158 | 226 | if (a->func > b->func) |
98e39e09 MM |
227 | return 1; |
228 | return 0; | |
229 | } | |
230 | ||
231 | static void | |
232 | sort_them(void) | |
233 | { | |
727ce158 | 234 | struct device **index, **h, **last_dev; |
98e39e09 MM |
235 | int cnt; |
236 | struct device *d; | |
237 | ||
c7a34993 MM |
238 | cnt = 0; |
239 | for (d=first_dev; d; d=d->next) | |
240 | cnt++; | |
241 | h = index = alloca(sizeof(struct device *) * cnt); | |
242 | for (d=first_dev; d; d=d->next) | |
243 | *h++ = d; | |
244 | qsort(index, cnt, sizeof(struct device *), compare_them); | |
245 | last_dev = &first_dev; | |
246 | h = index; | |
247 | while (cnt--) | |
248 | { | |
249 | *last_dev = *h; | |
250 | last_dev = &(*h)->next; | |
251 | h++; | |
c1c952d2 | 252 | } |
c7a34993 | 253 | *last_dev = NULL; |
c1c952d2 MM |
254 | } |
255 | ||
c7a34993 | 256 | /*** Normal output ***/ |
11339c0d | 257 | |
62e78fa6 MM |
258 | static void |
259 | show_slot_path(struct device *d) | |
260 | { | |
261 | struct pci_dev *p = d->dev; | |
262 | ||
263 | if (opt_path) | |
264 | { | |
265 | struct bus *bus = d->parent_bus; | |
266 | struct bridge *br = bus->parent_bridge; | |
267 | ||
268 | if (br && br->br_dev) | |
269 | { | |
270 | show_slot_path(br->br_dev); | |
271 | if (opt_path > 1) | |
272 | printf("/%02x:%02x.%d", p->bus, p->dev, p->func); | |
273 | else | |
274 | printf("/%02x.%d", p->dev, p->func); | |
275 | return; | |
276 | } | |
277 | } | |
278 | printf("%02x:%02x.%d", p->bus, p->dev, p->func); | |
279 | } | |
280 | ||
c7a34993 MM |
281 | static void |
282 | show_slot_name(struct device *d) | |
c1c952d2 | 283 | { |
c7a34993 | 284 | struct pci_dev *p = d->dev; |
c1c952d2 | 285 | |
c7a34993 MM |
286 | if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2)) |
287 | printf("%04x:", p->domain); | |
62e78fa6 | 288 | show_slot_path(d); |
c1c952d2 MM |
289 | } |
290 | ||
11339c0d | 291 | static void |
c7a34993 | 292 | show_terse(struct device *d) |
11339c0d | 293 | { |
c7a34993 MM |
294 | int c; |
295 | struct pci_dev *p = d->dev; | |
6e766463 | 296 | char classbuf[256], devbuf[256]; |
11339c0d | 297 | |
c7a34993 MM |
298 | show_slot_name(d); |
299 | printf(" %s: %s", | |
300 | pci_lookup_name(pacc, classbuf, sizeof(classbuf), | |
301 | PCI_LOOKUP_CLASS, | |
302 | p->device_class), | |
303 | pci_lookup_name(pacc, devbuf, sizeof(devbuf), | |
304 | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, | |
305 | p->vendor_id, p->device_id)); | |
fb570ee3 PR |
306 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
307 | printf(" (rev %02x)", p->rev_id); | |
c7a34993 MM |
308 | if (verbose) |
309 | { | |
310 | char *x; | |
fb570ee3 | 311 | c = (p->known_fields & PCI_FILL_CLASS_EXT) ? p->prog_if : 0; |
c7a34993 MM |
312 | x = pci_lookup_name(pacc, devbuf, sizeof(devbuf), |
313 | PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS, | |
314 | p->device_class, c); | |
315 | if (c || x) | |
316 | { | |
317 | printf(" (prog-if %02x", c); | |
318 | if (x) | |
319 | printf(" [%s]", x); | |
320 | putchar(')'); | |
321 | } | |
322 | } | |
323 | putchar('\n'); | |
c1c952d2 | 324 | |
c7a34993 MM |
325 | if (verbose || opt_kernel) |
326 | { | |
c7a34993 | 327 | char ssnamebuf[256]; |
c1c952d2 | 328 | |
2a39bc9e VP |
329 | pci_fill_info(p, PCI_FILL_LABEL); |
330 | ||
aecf5b35 TR |
331 | if (p->label) |
332 | printf("\tDeviceName: %s", p->label); | |
fb570ee3 PR |
333 | if ((p->known_fields & PCI_FILL_SUBSYS) && |
334 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
c7a34993 MM |
335 | printf("\tSubsystem: %s\n", |
336 | pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf), | |
337 | PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, | |
fb570ee3 | 338 | p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); |
c7a34993 | 339 | } |
c1c952d2 MM |
340 | } |
341 | ||
a387042e MM |
342 | /*** Verbose output ***/ |
343 | ||
344 | static void | |
41d883cb | 345 | show_size(u64 x) |
a387042e | 346 | { |
0188807c | 347 | static const char suffix[][2] = { "", "K", "M", "G", "T" }; |
f2f8adaa | 348 | unsigned i; |
a387042e MM |
349 | if (!x) |
350 | return; | |
f2f8adaa | 351 | for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) { |
558f736b | 352 | if (x % 1024) |
f2f8adaa MW |
353 | break; |
354 | x /= 1024; | |
355 | } | |
356 | printf(" [size=%u%s]", (unsigned)x, suffix[i]); | |
a387042e MM |
357 | } |
358 | ||
41d883cb | 359 | static void |
72cabfbb | 360 | show_range(const char *prefix, u64 base, u64 limit, int bits, int disabled) |
41d883cb | 361 | { |
e6b0b6e1 KS |
362 | printf("%s:", prefix); |
363 | if (base <= limit || verbose > 2) | |
3b26eaa8 | 364 | printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit); |
ccf68033 | 365 | if (!disabled && base <= limit) |
41d883cb MM |
366 | show_size(limit - base + 1); |
367 | else | |
e6b0b6e1 | 368 | printf(" [disabled]"); |
72cabfbb PR |
369 | if (bits) |
370 | printf(" [%d-bit]", bits); | |
41d883cb MM |
371 | putchar('\n'); |
372 | } | |
373 | ||
72cabfbb PR |
374 | static u32 |
375 | ioflg_to_pciflg(pciaddr_t ioflg) | |
376 | { | |
377 | u32 flg; | |
378 | ||
379 | if (ioflg & PCI_IORESOURCE_IO) | |
380 | flg = PCI_BASE_ADDRESS_SPACE_IO; | |
381 | else if (!(ioflg & PCI_IORESOURCE_MEM)) | |
382 | flg = 0; | |
383 | else | |
384 | { | |
385 | flg = PCI_BASE_ADDRESS_SPACE_MEMORY; | |
386 | if (ioflg & PCI_IORESOURCE_MEM_64) | |
387 | flg |= PCI_BASE_ADDRESS_MEM_TYPE_64; | |
388 | else | |
389 | flg |= PCI_BASE_ADDRESS_MEM_TYPE_32; | |
390 | if (ioflg & PCI_IORESOURCE_PREFETCH) | |
391 | flg |= PCI_BASE_ADDRESS_MEM_PREFETCH; | |
392 | } | |
393 | ||
394 | return flg; | |
395 | } | |
396 | ||
a387042e | 397 | static void |
72cabfbb | 398 | show_bases(struct device *d, int cnt, int without_config_data) |
a387042e MM |
399 | { |
400 | struct pci_dev *p = d->dev; | |
72cabfbb | 401 | word cmd = without_config_data ? (PCI_COMMAND_IO | PCI_COMMAND_MEMORY) : get_conf_word(d, PCI_COMMAND); |
a387042e MM |
402 | int i; |
403 | ||
de7ef8bc | 404 | for (i=0; i<cnt; i++) |
a387042e MM |
405 | { |
406 | pciaddr_t pos = p->base_addr[i]; | |
407 | pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0; | |
558f736b | 408 | pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0; |
7f96c3fe PR |
409 | u32 flg = (p->known_fields & PCI_FILL_IO_FLAGS) ? ioflg_to_pciflg(ioflg) : without_config_data ? 0 : get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); |
410 | u32 hw_lower = 0; | |
bf72d3e9 MM |
411 | u32 hw_upper = 0; |
412 | int broken = 0; | |
7f96c3fe | 413 | int virtual = 0; |
bf72d3e9 | 414 | |
a387042e MM |
415 | if (flg == 0xffffffff) |
416 | flg = 0; | |
417 | if (!pos && !flg && !len) | |
418 | continue; | |
bf72d3e9 | 419 | |
a387042e MM |
420 | if (verbose > 1) |
421 | printf("\tRegion %d: ", i); | |
422 | else | |
423 | putchar('\t'); | |
bf72d3e9 | 424 | |
7f96c3fe PR |
425 | /* Detect virtual regions, which are reported by the OS, but unassigned in the device */ |
426 | if ((p->known_fields & PCI_FILL_IO_FLAGS) && !without_config_data) | |
bf72d3e9 | 427 | { |
7f96c3fe PR |
428 | /* Read address as seen by the hardware */ |
429 | hw_lower = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); | |
430 | if ((hw_lower & PCI_BASE_ADDRESS_SPACE) == (ioflg_to_pciflg(ioflg) & PCI_BASE_ADDRESS_SPACE)) | |
bf72d3e9 | 431 | { |
7f96c3fe PR |
432 | if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM && |
433 | (hw_lower & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) | |
434 | { | |
435 | if (i >= cnt - 1) | |
436 | broken = 1; | |
437 | else | |
438 | hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i + 1); | |
bf72d3e9 | 439 | } |
7f96c3fe PR |
440 | if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) |
441 | virtual = 1; | |
bf72d3e9 MM |
442 | } |
443 | } | |
444 | ||
bf72d3e9 | 445 | /* Print base address */ |
a387042e MM |
446 | if (flg & PCI_BASE_ADDRESS_SPACE_IO) |
447 | { | |
448 | pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK; | |
449 | printf("I/O ports at "); | |
00bf6625 | 450 | if (a || (cmd & PCI_COMMAND_IO)) |
a387042e | 451 | printf(PCIADDR_PORT_FMT, a); |
bf72d3e9 | 452 | else if (hw_lower) |
a387042e MM |
453 | printf("<ignored>"); |
454 | else | |
455 | printf("<unassigned>"); | |
bf72d3e9 MM |
456 | if (virtual) |
457 | printf(" [virtual]"); | |
458 | else if (!(cmd & PCI_COMMAND_IO)) | |
a387042e MM |
459 | printf(" [disabled]"); |
460 | } | |
461 | else | |
462 | { | |
463 | int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK; | |
464 | pciaddr_t a = pos & PCI_ADDR_MEM_MASK; | |
a387042e MM |
465 | |
466 | printf("Memory at "); | |
bf72d3e9 MM |
467 | if (broken) |
468 | printf("<broken-64-bit-slot>"); | |
469 | else if (a) | |
470 | printf(PCIADDR_T_FMT, a); | |
471 | else if (hw_lower || hw_upper) | |
472 | printf("<ignored>"); | |
473 | else | |
474 | printf("<unassigned>"); | |
a387042e MM |
475 | printf(" (%s, %sprefetchable)", |
476 | (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" : | |
477 | (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" : | |
478 | (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3", | |
479 | (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-"); | |
bf72d3e9 MM |
480 | if (virtual) |
481 | printf(" [virtual]"); | |
482 | else if (!(cmd & PCI_COMMAND_MEMORY)) | |
a387042e MM |
483 | printf(" [disabled]"); |
484 | } | |
bf72d3e9 MM |
485 | |
486 | if (ioflg & PCI_IORESOURCE_PCI_EA_BEI) | |
487 | printf(" [enhanced]"); | |
488 | ||
a387042e MM |
489 | show_size(len); |
490 | putchar('\n'); | |
491 | } | |
492 | } | |
493 | ||
494 | static void | |
495 | show_rom(struct device *d, int reg) | |
496 | { | |
497 | struct pci_dev *p = d->dev; | |
498 | pciaddr_t rom = p->rom_base_addr; | |
499 | pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0; | |
558f736b | 500 | pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0; |
72cabfbb PR |
501 | u32 flg = reg >= 0 ? get_conf_long(d, reg) : ioflg_to_pciflg(ioflg); |
502 | word cmd = reg >= 0 ? get_conf_word(d, PCI_COMMAND) : PCI_COMMAND_MEMORY; | |
659d438b | 503 | int virtual = 0; |
a387042e MM |
504 | |
505 | if (!rom && !flg && !len) | |
506 | return; | |
cb94f26e | 507 | |
72cabfbb | 508 | if (reg >= 0 && (rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) |
a387042e | 509 | { |
a387042e | 510 | flg = rom; |
659d438b | 511 | virtual = 1; |
a387042e | 512 | } |
cb94f26e MM |
513 | |
514 | printf("\tExpansion ROM at "); | |
a387042e MM |
515 | if (rom & PCI_ROM_ADDRESS_MASK) |
516 | printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK); | |
517 | else if (flg & PCI_ROM_ADDRESS_MASK) | |
518 | printf("<ignored>"); | |
519 | else | |
520 | printf("<unassigned>"); | |
cb94f26e MM |
521 | |
522 | if (virtual) | |
523 | printf(" [virtual]"); | |
524 | ||
a387042e MM |
525 | if (!(flg & PCI_ROM_ADDRESS_ENABLE)) |
526 | printf(" [disabled]"); | |
659d438b | 527 | else if (!virtual && !(cmd & PCI_COMMAND_MEMORY)) |
a387042e | 528 | printf(" [disabled by cmd]"); |
cb94f26e MM |
529 | |
530 | if (ioflg & PCI_IORESOURCE_PCI_EA_BEI) | |
531 | printf(" [enhanced]"); | |
532 | ||
a387042e MM |
533 | show_size(len); |
534 | putchar('\n'); | |
535 | } | |
536 | ||
e95c8373 MM |
537 | static void |
538 | show_htype0(struct device *d) | |
539 | { | |
72cabfbb | 540 | show_bases(d, 6, 0); |
6aa54f1b | 541 | show_rom(d, PCI_ROM_ADDRESS); |
21510591 | 542 | show_caps(d, PCI_CAPABILITY_LIST); |
e95c8373 MM |
543 | } |
544 | ||
98e39e09 MM |
545 | static void |
546 | show_htype1(struct device *d) | |
547 | { | |
ccf68033 | 548 | struct pci_dev *p = d->dev; |
98e39e09 MM |
549 | u32 io_base = get_conf_byte(d, PCI_IO_BASE); |
550 | u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT); | |
551 | u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK; | |
552 | u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE); | |
553 | u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT); | |
554 | u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK; | |
555 | u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE); | |
556 | u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT); | |
557 | u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK; | |
138c0385 | 558 | word sec_stat = get_conf_word(d, PCI_SEC_STATUS); |
98e39e09 | 559 | word brc = get_conf_word(d, PCI_BRIDGE_CONTROL); |
ccf68033 PR |
560 | int io_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[0]; |
561 | int mem_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[1]; | |
562 | int pref_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[2]; | |
563 | int io_bits, pref_bits; | |
98e39e09 | 564 | |
72cabfbb | 565 | show_bases(d, 2, 0); |
98e39e09 MM |
566 | printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", |
567 | get_conf_byte(d, PCI_PRIMARY_BUS), | |
568 | get_conf_byte(d, PCI_SECONDARY_BUS), | |
569 | get_conf_byte(d, PCI_SUBORDINATE_BUS), | |
570 | get_conf_byte(d, PCI_SEC_LATENCY_TIMER)); | |
571 | ||
ccf68033 PR |
572 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !io_disabled) |
573 | { | |
574 | io_base = p->bridge_base_addr[0] & PCI_IO_RANGE_MASK; | |
575 | io_limit = io_base + p->bridge_size[0] - 1; | |
576 | io_type = p->bridge_base_addr[0] & PCI_IO_RANGE_TYPE_MASK; | |
577 | io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; | |
578 | show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); | |
579 | } | |
580 | else if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) || | |
98e39e09 MM |
581 | (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32)) |
582 | printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit); | |
583 | else | |
584 | { | |
585 | io_base = (io_base & PCI_IO_RANGE_MASK) << 8; | |
586 | io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8; | |
587 | if (io_type == PCI_IO_RANGE_TYPE_32) | |
588 | { | |
589 | io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16); | |
590 | io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16); | |
591 | } | |
ccf68033 PR |
592 | /* I/O is unsupported if both base and limit are zeros and resource is disabled */ |
593 | if (!(io_base == 0x0 && io_limit == 0x0 && io_disabled)) | |
594 | { | |
595 | io_limit += 0xfff; | |
596 | io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; | |
597 | show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); | |
598 | } | |
98e39e09 MM |
599 | } |
600 | ||
ccf68033 PR |
601 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !mem_disabled) |
602 | { | |
603 | mem_base = p->bridge_base_addr[1] & PCI_MEMORY_RANGE_MASK; | |
604 | mem_limit = mem_base + p->bridge_size[1] - 1; | |
605 | show_range("\tMemory behind bridge", mem_base, mem_limit, 32, mem_disabled); | |
606 | } | |
607 | else if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) || | |
98e39e09 MM |
608 | mem_type) |
609 | printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit); | |
e306e911 | 610 | else |
98e39e09 MM |
611 | { |
612 | mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16; | |
613 | mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16; | |
ccf68033 | 614 | show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 32, mem_disabled); |
98e39e09 MM |
615 | } |
616 | ||
ccf68033 PR |
617 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !pref_disabled) |
618 | { | |
619 | u64 pref_base_64 = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_MASK; | |
620 | u64 pref_limit_64 = pref_base_64 + p->bridge_size[2] - 1; | |
621 | pref_type = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_TYPE_MASK; | |
622 | pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; | |
623 | show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); | |
624 | } | |
625 | else if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) || | |
98e39e09 MM |
626 | (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64)) |
627 | printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit); | |
e306e911 | 628 | else |
98e39e09 | 629 | { |
41d883cb MM |
630 | u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16; |
631 | u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16; | |
632 | if (pref_type == PCI_PREF_RANGE_TYPE_64) | |
e306e911 | 633 | { |
41d883cb MM |
634 | pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32; |
635 | pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32; | |
e306e911 | 636 | } |
ccf68033 PR |
637 | /* Prefetchable memory is unsupported if both base and limit are zeros and resource is disabled */ |
638 | if (!(pref_base_64 == 0x0 && pref_limit_64 == 0x0 && pref_disabled)) | |
639 | { | |
640 | pref_limit_64 += 0xfffff; | |
641 | pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; | |
642 | show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); | |
643 | } | |
98e39e09 MM |
644 | } |
645 | ||
138c0385 | 646 | if (verbose > 1) |
c1c2c30e | 647 | printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n", |
138c0385 MM |
648 | FLAG(sec_stat, PCI_STATUS_66MHZ), |
649 | FLAG(sec_stat, PCI_STATUS_FAST_BACK), | |
650 | FLAG(sec_stat, PCI_STATUS_PARITY), | |
651 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : | |
652 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
653 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??", | |
654 | FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT), | |
655 | FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT), | |
656 | FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT), | |
657 | FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR), | |
658 | FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY)); | |
98e39e09 | 659 | |
6aa54f1b | 660 | show_rom(d, PCI_ROM_ADDRESS1); |
98e39e09 MM |
661 | |
662 | if (verbose > 1) | |
da322bfb | 663 | { |
b2a45526 | 664 | printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n", |
da322bfb MM |
665 | FLAG(brc, PCI_BRIDGE_CTL_PARITY), |
666 | FLAG(brc, PCI_BRIDGE_CTL_SERR), | |
667 | FLAG(brc, PCI_BRIDGE_CTL_NO_ISA), | |
668 | FLAG(brc, PCI_BRIDGE_CTL_VGA), | |
b2a45526 | 669 | FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT), |
da322bfb MM |
670 | FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT), |
671 | FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET), | |
672 | FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK)); | |
673 | printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n", | |
674 | FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER), | |
675 | FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER), | |
676 | FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS), | |
677 | FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN)); | |
678 | } | |
e95c8373 | 679 | |
21510591 | 680 | show_caps(d, PCI_CAPABILITY_LIST); |
98e39e09 MM |
681 | } |
682 | ||
2f48f637 MM |
683 | static void |
684 | show_htype2(struct device *d) | |
685 | { | |
96e4f295 MM |
686 | int i; |
687 | word cmd = get_conf_word(d, PCI_COMMAND); | |
688 | word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL); | |
84d437d6 | 689 | word exca; |
e306e911 | 690 | int verb = verbose > 2; |
96e4f295 | 691 | |
72cabfbb | 692 | show_bases(d, 1, 0); |
96e4f295 MM |
693 | printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", |
694 | get_conf_byte(d, PCI_CB_PRIMARY_BUS), | |
695 | get_conf_byte(d, PCI_CB_CARD_BUS), | |
696 | get_conf_byte(d, PCI_CB_SUBORDINATE_BUS), | |
697 | get_conf_byte(d, PCI_CB_LATENCY_TIMER)); | |
de7ef8bc | 698 | for (i=0; i<2; i++) |
96e4f295 MM |
699 | { |
700 | int p = 8*i; | |
701 | u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p); | |
702 | u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p); | |
f288d32f BH |
703 | limit = limit + 0xfff; |
704 | if (base <= limit || verb) | |
81077814 | 705 | printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit, |
96e4f295 MM |
706 | (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]", |
707 | (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : ""); | |
708 | } | |
de7ef8bc | 709 | for (i=0; i<2; i++) |
96e4f295 MM |
710 | { |
711 | int p = 8*i; | |
712 | u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p); | |
713 | u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p); | |
714 | if (!(base & PCI_IO_RANGE_TYPE_32)) | |
715 | { | |
716 | base &= 0xffff; | |
717 | limit &= 0xffff; | |
718 | } | |
719 | base &= PCI_CB_IO_RANGE_MASK; | |
96e4f295 | 720 | limit = (limit & PCI_CB_IO_RANGE_MASK) + 3; |
e306e911 MM |
721 | if (base <= limit || verb) |
722 | printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit, | |
723 | (cmd & PCI_COMMAND_IO) ? "" : " [disabled]"); | |
96e4f295 MM |
724 | } |
725 | ||
726 | if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR) | |
727 | printf("\tSecondary status: SERR\n"); | |
728 | if (verbose > 1) | |
729 | printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n", | |
1c31d620 MM |
730 | FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY), |
731 | FLAG(brc, PCI_CB_BRIDGE_CTL_SERR), | |
732 | FLAG(brc, PCI_CB_BRIDGE_CTL_ISA), | |
733 | FLAG(brc, PCI_CB_BRIDGE_CTL_VGA), | |
734 | FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT), | |
735 | FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET), | |
736 | FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT), | |
737 | FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES)); | |
84d437d6 MM |
738 | |
739 | if (d->config_cached < 128) | |
740 | { | |
741 | printf("\t<access denied to the rest>\n"); | |
742 | return; | |
743 | } | |
744 | ||
745 | exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE); | |
96e4f295 MM |
746 | if (exca) |
747 | printf("\t16-bit legacy interface ports at %04x\n", exca); | |
21510591 | 748 | show_caps(d, PCI_CB_CAPABILITY_LIST); |
2f48f637 MM |
749 | } |
750 | ||
72cabfbb PR |
751 | static void |
752 | show_htype_unknown(struct device *d) | |
753 | { | |
754 | struct pci_dev *p = d->dev; | |
755 | u64 base, limit, flags; | |
756 | const char *str; | |
757 | int i, bits; | |
758 | ||
759 | if (pacc->buscentric) | |
760 | return; | |
761 | ||
762 | show_bases(d, 6, 1); | |
763 | for (i = 0; i < 4; i++) | |
764 | { | |
765 | if (!p->bridge_base_addr[i]) | |
766 | continue; | |
767 | base = p->bridge_base_addr[i]; | |
768 | limit = base + p->bridge_size[i] - 1; | |
769 | flags = p->bridge_flags[i]; | |
770 | if (flags & PCI_IORESOURCE_IO) | |
771 | { | |
772 | bits = (flags & PCI_IORESOURCE_IO_16BIT_ADDR) ? 16 : 32; | |
773 | str = "\tI/O behind bridge"; | |
774 | } | |
775 | else if (flags & PCI_IORESOURCE_MEM) | |
776 | { | |
777 | bits = (flags & PCI_IORESOURCE_MEM_64) ? 64 : 32; | |
778 | if (flags & PCI_IORESOURCE_PREFETCH) | |
779 | str = "\tPrefetchable memory behind bridge"; | |
780 | else | |
781 | str = "\tMemory behind bridge"; | |
782 | } | |
783 | else | |
784 | { | |
785 | bits = 0; | |
786 | str = "\tUnknown resource behind bridge"; | |
787 | } | |
788 | show_range(str, base, limit, bits, 0); | |
789 | } | |
790 | show_rom(d, -1); | |
791 | } | |
792 | ||
98e39e09 MM |
793 | static void |
794 | show_verbose(struct device *d) | |
795 | { | |
727ce158 | 796 | struct pci_dev *p = d->dev; |
72cabfbb | 797 | int unknown_config_data = 0; |
c2b144ef | 798 | word class = p->device_class; |
832b07a8 | 799 | byte htype = d->no_config_access ? -1 : (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f); |
72cabfbb | 800 | byte bist; |
98e39e09 | 801 | byte max_lat, min_gnt; |
a5065438 | 802 | char *dt_node, *iommu_group; |
98e39e09 MM |
803 | |
804 | show_terse(d); | |
805 | ||
ef6c9ec3 | 806 | pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | |
ccf68033 | 807 | PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP | |
fb570ee3 | 808 | PCI_FILL_BRIDGE_BASES | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS); |
ef6c9ec3 | 809 | |
98e39e09 MM |
810 | switch (htype) |
811 | { | |
2f48f637 MM |
812 | case PCI_HEADER_TYPE_NORMAL: |
813 | if (class == PCI_CLASS_BRIDGE_PCI) | |
56164f4f | 814 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 815 | bist = get_conf_byte(d, PCI_BIST); |
98e39e09 MM |
816 | max_lat = get_conf_byte(d, PCI_MAX_LAT); |
817 | min_gnt = get_conf_byte(d, PCI_MIN_GNT); | |
98e39e09 | 818 | break; |
2f48f637 | 819 | case PCI_HEADER_TYPE_BRIDGE: |
cce2caac | 820 | if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) |
56164f4f | 821 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 822 | bist = get_conf_byte(d, PCI_BIST); |
001b9ac6 | 823 | min_gnt = max_lat = 0; |
2f48f637 MM |
824 | break; |
825 | case PCI_HEADER_TYPE_CARDBUS: | |
826 | if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) | |
56164f4f | 827 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 828 | bist = get_conf_byte(d, PCI_BIST); |
96e4f295 | 829 | min_gnt = max_lat = 0; |
98e39e09 MM |
830 | break; |
831 | default: | |
832b07a8 | 832 | if (!d->no_config_access) |
98e39e09 | 833 | printf("\t!!! Unknown header type %02x\n", htype); |
72cabfbb PR |
834 | bist = 0; |
835 | min_gnt = max_lat = 0; | |
836 | unknown_config_data = 1; | |
98e39e09 MM |
837 | } |
838 | ||
2849a165 AC |
839 | if (p->phy_slot) |
840 | printf("\tPhysical Slot: %s\n", p->phy_slot); | |
841 | ||
c02d903c MM |
842 | if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE)) |
843 | printf("\tDevice tree node: %s\n", dt_node); | |
844 | ||
72cabfbb | 845 | if (!unknown_config_data && verbose > 1) |
98e39e09 | 846 | { |
72cabfbb PR |
847 | word cmd = get_conf_word(d, PCI_COMMAND); |
848 | word status = get_conf_word(d, PCI_STATUS); | |
da322bfb | 849 | printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n", |
1c31d620 MM |
850 | FLAG(cmd, PCI_COMMAND_IO), |
851 | FLAG(cmd, PCI_COMMAND_MEMORY), | |
852 | FLAG(cmd, PCI_COMMAND_MASTER), | |
853 | FLAG(cmd, PCI_COMMAND_SPECIAL), | |
854 | FLAG(cmd, PCI_COMMAND_INVALIDATE), | |
855 | FLAG(cmd, PCI_COMMAND_VGA_PALETTE), | |
856 | FLAG(cmd, PCI_COMMAND_PARITY), | |
857 | FLAG(cmd, PCI_COMMAND_WAIT), | |
858 | FLAG(cmd, PCI_COMMAND_SERR), | |
da322bfb MM |
859 | FLAG(cmd, PCI_COMMAND_FAST_BACK), |
860 | FLAG(cmd, PCI_COMMAND_DISABLE_INTx)); | |
861 | printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n", | |
1c31d620 MM |
862 | FLAG(status, PCI_STATUS_CAP_LIST), |
863 | FLAG(status, PCI_STATUS_66MHZ), | |
864 | FLAG(status, PCI_STATUS_UDF), | |
865 | FLAG(status, PCI_STATUS_FAST_BACK), | |
866 | FLAG(status, PCI_STATUS_PARITY), | |
98e39e09 MM |
867 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : |
868 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
869 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??", | |
1c31d620 MM |
870 | FLAG(status, PCI_STATUS_SIG_TARGET_ABORT), |
871 | FLAG(status, PCI_STATUS_REC_TARGET_ABORT), | |
872 | FLAG(status, PCI_STATUS_REC_MASTER_ABORT), | |
873 | FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR), | |
da322bfb MM |
874 | FLAG(status, PCI_STATUS_DETECTED_PARITY), |
875 | FLAG(status, PCI_STATUS_INTx)); | |
98e39e09 MM |
876 | if (cmd & PCI_COMMAND_MASTER) |
877 | { | |
72cabfbb PR |
878 | byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); |
879 | byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE); | |
56164f4f MM |
880 | printf("\tLatency: %d", latency); |
881 | if (min_gnt || max_lat) | |
882 | { | |
883 | printf(" ("); | |
884 | if (min_gnt) | |
885 | printf("%dns min", min_gnt*250); | |
886 | if (min_gnt && max_lat) | |
887 | printf(", "); | |
888 | if (max_lat) | |
889 | printf("%dns max", max_lat*250); | |
890 | putchar(')'); | |
891 | } | |
98e39e09 | 892 | if (cache_line) |
7a61b93c | 893 | printf(", Cache Line Size: %d bytes", cache_line * 4); |
98e39e09 MM |
894 | putchar('\n'); |
895 | } | |
72cabfbb PR |
896 | } |
897 | ||
898 | if (verbose > 1) | |
899 | { | |
900 | byte int_pin = unknown_config_data ? 0 : get_conf_byte(d, PCI_INTERRUPT_PIN); | |
901 | if (int_pin || p->irq) | |
9739916e | 902 | printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n", |
72cabfbb | 903 | (int_pin ? 'A' + int_pin - 1 : '?'), p->irq); |
1d9d1a01 MM |
904 | if (p->numa_node != -1) |
905 | printf("\tNUMA node: %d\n", p->numa_node); | |
a5065438 AXH |
906 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
907 | printf("\tIOMMU group: %s\n", iommu_group); | |
98e39e09 | 908 | } |
72cabfbb PR |
909 | |
910 | if (!unknown_config_data && verbose <= 1) | |
98e39e09 | 911 | { |
72cabfbb PR |
912 | word cmd = get_conf_word(d, PCI_COMMAND); |
913 | word status = get_conf_word(d, PCI_STATUS); | |
914 | byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); | |
98e39e09 MM |
915 | printf("\tFlags: "); |
916 | if (cmd & PCI_COMMAND_MASTER) | |
917 | printf("bus master, "); | |
918 | if (cmd & PCI_COMMAND_VGA_PALETTE) | |
919 | printf("VGA palette snoop, "); | |
920 | if (cmd & PCI_COMMAND_WAIT) | |
921 | printf("stepping, "); | |
922 | if (cmd & PCI_COMMAND_FAST_BACK) | |
923 | printf("fast Back2Back, "); | |
924 | if (status & PCI_STATUS_66MHZ) | |
c1c2c30e | 925 | printf("66MHz, "); |
98e39e09 MM |
926 | if (status & PCI_STATUS_UDF) |
927 | printf("user-definable features, "); | |
928 | printf("%s devsel", | |
929 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : | |
930 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
931 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??"); | |
932 | if (cmd & PCI_COMMAND_MASTER) | |
933 | printf(", latency %d", latency); | |
72cabfbb PR |
934 | if (p->irq) |
935 | printf(", IRQ " PCIIRQ_FMT, p->irq); | |
90ec4a6d MW |
936 | if (p->numa_node != -1) |
937 | printf(", NUMA node %d", p->numa_node); | |
a5065438 AXH |
938 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
939 | printf(", IOMMU group %s", iommu_group); | |
98e39e09 MM |
940 | putchar('\n'); |
941 | } | |
942 | ||
943 | if (bist & PCI_BIST_CAPABLE) | |
944 | { | |
945 | if (bist & PCI_BIST_START) | |
946 | printf("\tBIST is running\n"); | |
947 | else | |
948 | printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK); | |
949 | } | |
950 | ||
951 | switch (htype) | |
952 | { | |
2f48f637 | 953 | case PCI_HEADER_TYPE_NORMAL: |
98e39e09 MM |
954 | show_htype0(d); |
955 | break; | |
2f48f637 | 956 | case PCI_HEADER_TYPE_BRIDGE: |
98e39e09 MM |
957 | show_htype1(d); |
958 | break; | |
2f48f637 MM |
959 | case PCI_HEADER_TYPE_CARDBUS: |
960 | show_htype2(d); | |
961 | break; | |
72cabfbb PR |
962 | default: |
963 | show_htype_unknown(d); | |
98e39e09 MM |
964 | } |
965 | } | |
966 | ||
a387042e MM |
967 | /*** Machine-readable dumps ***/ |
968 | ||
98e39e09 MM |
969 | static void |
970 | show_hex_dump(struct device *d) | |
971 | { | |
09817437 | 972 | unsigned int i, cnt; |
98e39e09 | 973 | |
832b07a8 PR |
974 | if (d->no_config_access) |
975 | { | |
976 | printf("WARNING: Cannot show hex-dump of the config space\n"); | |
977 | return; | |
978 | } | |
979 | ||
84d437d6 | 980 | cnt = d->config_cached; |
a387042e | 981 | if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt)) |
09817437 MM |
982 | { |
983 | cnt = 256; | |
a387042e | 984 | if (opt_hex >= 4 && config_fetch(d, 256, 4096-256)) |
09817437 MM |
985 | cnt = 4096; |
986 | } | |
987 | ||
de7ef8bc | 988 | for (i=0; i<cnt; i++) |
98e39e09 MM |
989 | { |
990 | if (! (i & 15)) | |
991 | printf("%02x:", i); | |
992 | printf(" %02x", get_conf_byte(d, i)); | |
993 | if ((i & 15) == 15) | |
994 | putchar('\n'); | |
995 | } | |
996 | } | |
997 | ||
13081e57 MM |
998 | static void |
999 | print_shell_escaped(char *c) | |
1000 | { | |
1001 | printf(" \""); | |
1002 | while (*c) | |
1003 | { | |
1004 | if (*c == '"' || *c == '\\') | |
1005 | putchar('\\'); | |
1006 | putchar(*c++); | |
1007 | } | |
1008 | putchar('"'); | |
1009 | } | |
1010 | ||
0a33d0ec MM |
1011 | static void |
1012 | show_machine(struct device *d) | |
1013 | { | |
727ce158 | 1014 | struct pci_dev *p = d->dev; |
6e766463 | 1015 | char classbuf[256], vendbuf[256], devbuf[256], svbuf[256], sdbuf[256]; |
a5065438 | 1016 | char *dt_node, *iommu_group; |
ce503b7f | 1017 | |
0a33d0ec MM |
1018 | if (verbose) |
1019 | { | |
a5065438 | 1020 | pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP); |
a387042e | 1021 | printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t"); |
84c8d1bb MM |
1022 | show_slot_name(d); |
1023 | putchar('\n'); | |
727ce158 | 1024 | printf("Class:\t%s\n", |
c2b144ef | 1025 | pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class)); |
727ce158 | 1026 | printf("Vendor:\t%s\n", |
224707ba | 1027 | pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); |
727ce158 | 1028 | printf("Device:\t%s\n", |
224707ba | 1029 | pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); |
fb570ee3 PR |
1030 | if ((p->known_fields & PCI_FILL_SUBSYS) && |
1031 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
ce503b7f | 1032 | { |
727ce158 | 1033 | printf("SVendor:\t%s\n", |
fb570ee3 | 1034 | pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); |
727ce158 | 1035 | printf("SDevice:\t%s\n", |
fb570ee3 | 1036 | pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); |
ce503b7f | 1037 | } |
2849a165 AC |
1038 | if (p->phy_slot) |
1039 | printf("PhySlot:\t%s\n", p->phy_slot); | |
fb570ee3 PR |
1040 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
1041 | printf("Rev:\t%02x\n", p->rev_id); | |
1042 | if (p->known_fields & PCI_FILL_CLASS_EXT) | |
1043 | printf("ProgIf:\t%02x\n", p->prog_if); | |
11339c0d MM |
1044 | if (opt_kernel) |
1045 | show_kernel_machine(d); | |
1d9d1a01 MM |
1046 | if (p->numa_node != -1) |
1047 | printf("NUMANode:\t%d\n", p->numa_node); | |
c02d903c MM |
1048 | if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE)) |
1049 | printf("DTNode:\t%s\n", dt_node); | |
a5065438 AXH |
1050 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
1051 | printf("IOMMUGroup:\t%s\n", iommu_group); | |
0a33d0ec MM |
1052 | } |
1053 | else | |
1054 | { | |
84c8d1bb | 1055 | show_slot_name(d); |
13081e57 MM |
1056 | print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class)); |
1057 | print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); | |
1058 | print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); | |
fb570ee3 PR |
1059 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
1060 | printf(" -r%02x", p->rev_id); | |
1061 | if (p->known_fields & PCI_FILL_CLASS_EXT) | |
1062 | printf(" -p%02x", p->prog_if); | |
1063 | if ((p->known_fields & PCI_FILL_SUBSYS) && | |
1064 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
13081e57 | 1065 | { |
fb570ee3 PR |
1066 | print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); |
1067 | print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); | |
13081e57 | 1068 | } |
ce503b7f MM |
1069 | else |
1070 | printf(" \"\" \"\""); | |
0a33d0ec MM |
1071 | putchar('\n'); |
1072 | } | |
1073 | } | |
1074 | ||
a387042e MM |
1075 | /*** Main show function ***/ |
1076 | ||
c7a34993 | 1077 | void |
1812a795 MM |
1078 | show_device(struct device *d) |
1079 | { | |
a387042e | 1080 | if (opt_machine) |
1812a795 | 1081 | show_machine(d); |
1812a795 | 1082 | else |
11339c0d MM |
1083 | { |
1084 | if (verbose) | |
1085 | show_verbose(d); | |
1086 | else | |
1087 | show_terse(d); | |
1088 | if (opt_kernel || verbose) | |
1089 | show_kernel(d); | |
1090 | } | |
a387042e | 1091 | if (opt_hex) |
1812a795 | 1092 | show_hex_dump(d); |
a387042e | 1093 | if (verbose || opt_hex) |
1812a795 MM |
1094 | putchar('\n'); |
1095 | } | |
1096 | ||
98e39e09 MM |
1097 | static void |
1098 | show(void) | |
1099 | { | |
1100 | struct device *d; | |
1101 | ||
de7ef8bc | 1102 | for (d=first_dev; d; d=d->next) |
ce22dfec MM |
1103 | if (pci_filter_match(&filter, d->dev)) |
1104 | show_device(d); | |
98e39e09 MM |
1105 | } |
1106 | ||
1107 | /* Main */ | |
1108 | ||
1109 | int | |
1110 | main(int argc, char **argv) | |
1111 | { | |
1112 | int i; | |
e4842ff3 | 1113 | char *msg; |
98e39e09 | 1114 | |
496d4021 MM |
1115 | if (argc == 2 && !strcmp(argv[1], "--version")) |
1116 | { | |
1117 | puts("lspci version " PCIUTILS_VERSION); | |
1118 | return 0; | |
1119 | } | |
727ce158 MM |
1120 | |
1121 | pacc = pci_alloc(); | |
1122 | pacc->error = die; | |
1123 | pci_filter_init(pacc, &filter); | |
1124 | ||
98e39e09 MM |
1125 | while ((i = getopt(argc, argv, options)) != -1) |
1126 | switch (i) | |
1127 | { | |
1128 | case 'n': | |
bc2eed2d | 1129 | pacc->numeric_ids++; |
98e39e09 MM |
1130 | break; |
1131 | case 'v': | |
1132 | verbose++; | |
1133 | break; | |
1134 | case 'b': | |
727ce158 | 1135 | pacc->buscentric = 1; |
98e39e09 | 1136 | break; |
e4842ff3 | 1137 | case 's': |
727ce158 | 1138 | if (msg = pci_filter_parse_slot(&filter, optarg)) |
b7fd8e19 | 1139 | die("-s: %s", msg); |
ce22dfec | 1140 | opt_filter = 1; |
98e39e09 | 1141 | break; |
e4842ff3 | 1142 | case 'd': |
727ce158 MM |
1143 | if (msg = pci_filter_parse_id(&filter, optarg)) |
1144 | die("-d: %s", msg); | |
ce22dfec | 1145 | opt_filter = 1; |
98e39e09 MM |
1146 | break; |
1147 | case 'x': | |
a387042e | 1148 | opt_hex++; |
98e39e09 | 1149 | break; |
62e78fa6 MM |
1150 | case 'P': |
1151 | opt_path++; | |
ce22dfec | 1152 | need_topology = 1; |
62e78fa6 | 1153 | break; |
6d0dc0fd | 1154 | case 't': |
a387042e | 1155 | opt_tree++; |
ce22dfec | 1156 | need_topology = 1; |
6d0dc0fd | 1157 | break; |
18928b91 | 1158 | case 'i': |
cc062b4a | 1159 | pci_set_name_list_path(pacc, optarg, 0); |
18928b91 | 1160 | break; |
0a33d0ec | 1161 | case 'm': |
a387042e | 1162 | opt_machine++; |
0a33d0ec | 1163 | break; |
c1c952d2 MM |
1164 | case 'p': |
1165 | opt_pcimap = optarg; | |
1166 | break; | |
1b99a704 | 1167 | #ifdef PCI_OS_LINUX |
11339c0d MM |
1168 | case 'k': |
1169 | opt_kernel++; | |
1170 | break; | |
1b99a704 | 1171 | #endif |
1812a795 | 1172 | case 'M': |
a387042e | 1173 | opt_map_mode++; |
1812a795 | 1174 | break; |
af61eb25 | 1175 | case 'D': |
a387042e | 1176 | opt_domains = 2; |
af61eb25 | 1177 | break; |
e022789d | 1178 | #ifdef PCI_USE_DNS |
cca2f7c6 MM |
1179 | case 'q': |
1180 | opt_query_dns++; | |
1181 | break; | |
1182 | case 'Q': | |
1183 | opt_query_all = 1; | |
1184 | break; | |
e022789d MM |
1185 | #else |
1186 | case 'q': | |
1187 | case 'Q': | |
1188 | die("DNS queries are not available in this version"); | |
1189 | #endif | |
98e39e09 | 1190 | default: |
727ce158 MM |
1191 | if (parse_generic_option(i, pacc, optarg)) |
1192 | break; | |
98e39e09 | 1193 | bad: |
727ce158 | 1194 | fprintf(stderr, help_msg, pacc->id_file_name); |
98e39e09 MM |
1195 | return 1; |
1196 | } | |
1197 | if (optind < argc) | |
1198 | goto bad; | |
1199 | ||
cca2f7c6 MM |
1200 | if (opt_query_dns) |
1201 | { | |
1202 | pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK; | |
1203 | if (opt_query_dns > 1) | |
1204 | pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE; | |
1205 | } | |
1206 | if (opt_query_all) | |
1207 | pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL; | |
1208 | ||
727ce158 | 1209 | pci_init(pacc); |
a387042e | 1210 | if (opt_map_mode) |
62e78fa6 | 1211 | { |
ce22dfec MM |
1212 | if (need_topology) |
1213 | die("Bus mapping mode does not recognize bus topology"); | |
62e78fa6 MM |
1214 | map_the_bus(); |
1215 | } | |
6d0dc0fd | 1216 | else |
1812a795 MM |
1217 | { |
1218 | scan_devices(); | |
1219 | sort_them(); | |
ce22dfec MM |
1220 | if (need_topology) |
1221 | grow_tree(); | |
a387042e | 1222 | if (opt_tree) |
888ddf0e | 1223 | show_forest(opt_filter ? &filter : NULL); |
1812a795 MM |
1224 | else |
1225 | show(); | |
1226 | } | |
17ec7e70 | 1227 | show_kernel_cleanup(); |
727ce158 | 1228 | pci_cleanup(pacc); |
98e39e09 | 1229 | |
934e7e36 | 1230 | return (seen_errors ? 2 : 0); |
98e39e09 | 1231 | } |