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Commit | Line | Data |
---|---|---|
98e39e09 | 1 | /* |
4284af58 | 2 | * The PCI Utilities -- List All PCI Devices |
98e39e09 | 3 | * |
bf72d3e9 | 4 | * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz> |
98e39e09 MM |
5 | * |
6 | * Can be freely distributed and used under the terms of the GNU GPL. | |
7 | */ | |
8 | ||
9 | #include <stdio.h> | |
10 | #include <string.h> | |
11 | #include <stdlib.h> | |
727ce158 | 12 | #include <stdarg.h> |
98e39e09 | 13 | |
c7a34993 | 14 | #include "lspci.h" |
98e39e09 MM |
15 | |
16 | /* Options */ | |
17 | ||
c7a34993 | 18 | int verbose; /* Show detailed information */ |
a387042e | 19 | static int opt_hex; /* Show contents of config space as hexadecimal numbers */ |
c7a34993 | 20 | struct pci_filter filter; /* Device filter */ |
ce22dfec | 21 | static int opt_filter; /* Any filter was given */ |
a387042e | 22 | static int opt_tree; /* Show bus tree */ |
62e78fa6 | 23 | static int opt_path; /* Show bridge path */ |
a387042e MM |
24 | static int opt_machine; /* Generate machine-readable output */ |
25 | static int opt_map_mode; /* Bus mapping mode enabled */ | |
26 | static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */ | |
11339c0d | 27 | static int opt_kernel; /* Show kernel drivers */ |
cca2f7c6 MM |
28 | static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */ |
29 | static int opt_query_all; /* Query the DNS for all entries */ | |
c7a34993 | 30 | char *opt_pcimap; /* Override path to Linux modules.pcimap */ |
98e39e09 | 31 | |
81afa98c MM |
32 | const char program_name[] = "lspci"; |
33 | ||
62e78fa6 | 34 | static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ; |
cca2f7c6 MM |
35 | |
36 | static char help_msg[] = | |
37 | "Usage: lspci [<switches>]\n" | |
38 | "\n" | |
1b99a704 MM |
39 | "Basic display modes:\n" |
40 | "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n" | |
41 | "-t\t\tShow bus tree\n" | |
42 | "\n" | |
43 | "Display options:\n" | |
c5751fb0 | 44 | "-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n" |
1b99a704 MM |
45 | #ifdef PCI_OS_LINUX |
46 | "-k\t\tShow kernel drivers handling each device\n" | |
47 | #endif | |
48 | "-x\t\tShow hex-dump of the standard part of the config space\n" | |
49 | "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n" | |
50 | "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n" | |
51 | "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n" | |
52 | "-D\t\tAlways show domain numbers\n" | |
62e78fa6 MM |
53 | "-P\t\tDisplay bridge path in addition to bus and device number\n" |
54 | "-PP\t\tDisplay bus path in addition to bus and device number\n" | |
1b99a704 MM |
55 | "\n" |
56 | "Resolving of device ID's to names:\n" | |
cca2f7c6 MM |
57 | "-n\t\tShow numeric ID's\n" |
58 | "-nn\t\tShow both textual and numeric ID's (names & numbers)\n" | |
59 | #ifdef PCI_USE_DNS | |
60 | "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n" | |
61 | "-qq\t\tAs above, but re-query locally cached entries\n" | |
62 | "-Q\t\tQuery the PCI ID database for all ID's via DNS\n" | |
63 | #endif | |
1b99a704 MM |
64 | "\n" |
65 | "Selection of devices:\n" | |
cca2f7c6 | 66 | "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n" |
4d1c9525 | 67 | "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n" |
1b99a704 MM |
68 | "\n" |
69 | "Other options:\n" | |
cca2f7c6 | 70 | "-i <file>\tUse specified ID database instead of %s\n" |
c1c952d2 | 71 | #ifdef PCI_OS_LINUX |
cca2f7c6 | 72 | "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n" |
c1c952d2 | 73 | #endif |
cca2f7c6 | 74 | "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n" |
1b99a704 MM |
75 | "\n" |
76 | "PCI access options:\n" | |
727ce158 MM |
77 | GENERIC_HELP |
78 | ; | |
98e39e09 | 79 | |
a387042e | 80 | /*** Our view of the PCI bus ***/ |
98e39e09 | 81 | |
c7a34993 MM |
82 | struct pci_access *pacc; |
83 | struct device *first_dev; | |
934e7e36 | 84 | static int seen_errors; |
ce22dfec | 85 | static int need_topology; |
98e39e09 | 86 | |
c7a34993 | 87 | int |
ec25b52d MM |
88 | config_fetch(struct device *d, unsigned int pos, unsigned int len) |
89 | { | |
90 | unsigned int end = pos+len; | |
91 | int result; | |
84d437d6 MM |
92 | |
93 | while (pos < d->config_bufsize && len && d->present[pos]) | |
94 | pos++, len--; | |
95 | while (pos+len <= d->config_bufsize && len && d->present[pos+len-1]) | |
96 | len--; | |
97 | if (!len) | |
ec25b52d | 98 | return 1; |
84d437d6 | 99 | |
ec25b52d MM |
100 | if (end > d->config_bufsize) |
101 | { | |
84d437d6 | 102 | int orig_size = d->config_bufsize; |
ec25b52d MM |
103 | while (end > d->config_bufsize) |
104 | d->config_bufsize *= 2; | |
105 | d->config = xrealloc(d->config, d->config_bufsize); | |
84d437d6 | 106 | d->present = xrealloc(d->present, d->config_bufsize); |
1ac3a99d | 107 | memset(d->present + orig_size, 0, d->config_bufsize - orig_size); |
ec25b52d MM |
108 | } |
109 | result = pci_read_block(d->dev, pos, d->config + pos, len); | |
84d437d6 MM |
110 | if (result) |
111 | memset(d->present + pos, 1, len); | |
ec25b52d MM |
112 | return result; |
113 | } | |
114 | ||
c7a34993 | 115 | struct device * |
1812a795 MM |
116 | scan_device(struct pci_dev *p) |
117 | { | |
1812a795 MM |
118 | struct device *d; |
119 | ||
a387042e MM |
120 | if (p->domain && !opt_domains) |
121 | opt_domains = 1; | |
ce22dfec | 122 | if (!pci_filter_match(&filter, p) && !need_topology) |
1812a795 MM |
123 | return NULL; |
124 | d = xmalloc(sizeof(struct device)); | |
1ac3a99d | 125 | memset(d, 0, sizeof(*d)); |
1812a795 | 126 | d->dev = p; |
84d437d6 | 127 | d->config_cached = d->config_bufsize = 64; |
ec25b52d | 128 | d->config = xmalloc(64); |
84d437d6 MM |
129 | d->present = xmalloc(64); |
130 | memset(d->present, 1, 64); | |
09817437 | 131 | if (!pci_read_block(p, 0, d->config, 64)) |
934e7e36 MM |
132 | { |
133 | fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n", | |
134 | p->domain, p->bus, p->dev, p->func); | |
135 | seen_errors++; | |
136 | return NULL; | |
137 | } | |
09817437 | 138 | if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS) |
1812a795 | 139 | { |
ec25b52d MM |
140 | /* For cardbus bridges, we need to fetch 64 bytes more to get the |
141 | * full standard header... */ | |
84d437d6 MM |
142 | if (config_fetch(d, 64, 64)) |
143 | d->config_cached += 64; | |
1812a795 | 144 | } |
84d437d6 | 145 | pci_setup_cache(p, d->config, d->config_cached); |
67954c8b | 146 | pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS | (need_topology ? PCI_FILL_PARENT : 0)); |
1812a795 MM |
147 | return d; |
148 | } | |
149 | ||
98e39e09 | 150 | static void |
727ce158 | 151 | scan_devices(void) |
98e39e09 MM |
152 | { |
153 | struct device *d; | |
727ce158 | 154 | struct pci_dev *p; |
98e39e09 | 155 | |
727ce158 | 156 | pci_scan_bus(pacc); |
de7ef8bc | 157 | for (p=pacc->devices; p; p=p->next) |
1812a795 MM |
158 | if (d = scan_device(p)) |
159 | { | |
160 | d->next = first_dev; | |
161 | first_dev = d; | |
162 | } | |
98e39e09 MM |
163 | } |
164 | ||
a387042e | 165 | /*** Config space accesses ***/ |
98e39e09 | 166 | |
84d437d6 MM |
167 | static void |
168 | check_conf_range(struct device *d, unsigned int pos, unsigned int len) | |
169 | { | |
170 | while (len) | |
171 | if (!d->present[pos]) | |
172 | die("Internal bug: Accessing non-read configuration byte at position %x", pos); | |
173 | else | |
174 | pos++, len--; | |
175 | } | |
176 | ||
c7a34993 | 177 | byte |
98e39e09 MM |
178 | get_conf_byte(struct device *d, unsigned int pos) |
179 | { | |
84d437d6 | 180 | check_conf_range(d, pos, 1); |
98e39e09 MM |
181 | return d->config[pos]; |
182 | } | |
183 | ||
c7a34993 | 184 | word |
98e39e09 MM |
185 | get_conf_word(struct device *d, unsigned int pos) |
186 | { | |
84d437d6 | 187 | check_conf_range(d, pos, 2); |
98e39e09 MM |
188 | return d->config[pos] | (d->config[pos+1] << 8); |
189 | } | |
190 | ||
c7a34993 | 191 | u32 |
98e39e09 MM |
192 | get_conf_long(struct device *d, unsigned int pos) |
193 | { | |
84d437d6 | 194 | check_conf_range(d, pos, 4); |
98e39e09 MM |
195 | return d->config[pos] | |
196 | (d->config[pos+1] << 8) | | |
197 | (d->config[pos+2] << 16) | | |
198 | (d->config[pos+3] << 24); | |
199 | } | |
200 | ||
a387042e | 201 | /*** Sorting ***/ |
98e39e09 MM |
202 | |
203 | static int | |
204 | compare_them(const void *A, const void *B) | |
205 | { | |
727ce158 MM |
206 | const struct pci_dev *a = (*(const struct device **)A)->dev; |
207 | const struct pci_dev *b = (*(const struct device **)B)->dev; | |
98e39e09 | 208 | |
84c8d1bb MM |
209 | if (a->domain < b->domain) |
210 | return -1; | |
211 | if (a->domain > b->domain) | |
212 | return 1; | |
98e39e09 MM |
213 | if (a->bus < b->bus) |
214 | return -1; | |
215 | if (a->bus > b->bus) | |
216 | return 1; | |
727ce158 MM |
217 | if (a->dev < b->dev) |
218 | return -1; | |
219 | if (a->dev > b->dev) | |
220 | return 1; | |
221 | if (a->func < b->func) | |
98e39e09 | 222 | return -1; |
727ce158 | 223 | if (a->func > b->func) |
98e39e09 MM |
224 | return 1; |
225 | return 0; | |
226 | } | |
227 | ||
228 | static void | |
229 | sort_them(void) | |
230 | { | |
727ce158 | 231 | struct device **index, **h, **last_dev; |
98e39e09 MM |
232 | int cnt; |
233 | struct device *d; | |
234 | ||
c7a34993 MM |
235 | cnt = 0; |
236 | for (d=first_dev; d; d=d->next) | |
237 | cnt++; | |
238 | h = index = alloca(sizeof(struct device *) * cnt); | |
239 | for (d=first_dev; d; d=d->next) | |
240 | *h++ = d; | |
241 | qsort(index, cnt, sizeof(struct device *), compare_them); | |
242 | last_dev = &first_dev; | |
243 | h = index; | |
244 | while (cnt--) | |
245 | { | |
246 | *last_dev = *h; | |
247 | last_dev = &(*h)->next; | |
248 | h++; | |
c1c952d2 | 249 | } |
c7a34993 | 250 | *last_dev = NULL; |
c1c952d2 MM |
251 | } |
252 | ||
c7a34993 | 253 | /*** Normal output ***/ |
11339c0d | 254 | |
62e78fa6 MM |
255 | static void |
256 | show_slot_path(struct device *d) | |
257 | { | |
258 | struct pci_dev *p = d->dev; | |
259 | ||
260 | if (opt_path) | |
261 | { | |
262 | struct bus *bus = d->parent_bus; | |
263 | struct bridge *br = bus->parent_bridge; | |
264 | ||
265 | if (br && br->br_dev) | |
266 | { | |
267 | show_slot_path(br->br_dev); | |
268 | if (opt_path > 1) | |
269 | printf("/%02x:%02x.%d", p->bus, p->dev, p->func); | |
270 | else | |
271 | printf("/%02x.%d", p->dev, p->func); | |
272 | return; | |
273 | } | |
274 | } | |
275 | printf("%02x:%02x.%d", p->bus, p->dev, p->func); | |
276 | } | |
277 | ||
c7a34993 MM |
278 | static void |
279 | show_slot_name(struct device *d) | |
c1c952d2 | 280 | { |
c7a34993 | 281 | struct pci_dev *p = d->dev; |
c1c952d2 | 282 | |
c7a34993 MM |
283 | if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2)) |
284 | printf("%04x:", p->domain); | |
62e78fa6 | 285 | show_slot_path(d); |
c1c952d2 MM |
286 | } |
287 | ||
11339c0d | 288 | static void |
c7a34993 | 289 | show_terse(struct device *d) |
11339c0d | 290 | { |
c7a34993 MM |
291 | int c; |
292 | struct pci_dev *p = d->dev; | |
293 | char classbuf[128], devbuf[128]; | |
11339c0d | 294 | |
c7a34993 MM |
295 | show_slot_name(d); |
296 | printf(" %s: %s", | |
297 | pci_lookup_name(pacc, classbuf, sizeof(classbuf), | |
298 | PCI_LOOKUP_CLASS, | |
299 | p->device_class), | |
300 | pci_lookup_name(pacc, devbuf, sizeof(devbuf), | |
301 | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, | |
302 | p->vendor_id, p->device_id)); | |
fb570ee3 PR |
303 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
304 | printf(" (rev %02x)", p->rev_id); | |
c7a34993 MM |
305 | if (verbose) |
306 | { | |
307 | char *x; | |
fb570ee3 | 308 | c = (p->known_fields & PCI_FILL_CLASS_EXT) ? p->prog_if : 0; |
c7a34993 MM |
309 | x = pci_lookup_name(pacc, devbuf, sizeof(devbuf), |
310 | PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS, | |
311 | p->device_class, c); | |
312 | if (c || x) | |
313 | { | |
314 | printf(" (prog-if %02x", c); | |
315 | if (x) | |
316 | printf(" [%s]", x); | |
317 | putchar(')'); | |
318 | } | |
319 | } | |
320 | putchar('\n'); | |
c1c952d2 | 321 | |
c7a34993 MM |
322 | if (verbose || opt_kernel) |
323 | { | |
c7a34993 | 324 | char ssnamebuf[256]; |
c1c952d2 | 325 | |
2a39bc9e VP |
326 | pci_fill_info(p, PCI_FILL_LABEL); |
327 | ||
aecf5b35 TR |
328 | if (p->label) |
329 | printf("\tDeviceName: %s", p->label); | |
fb570ee3 PR |
330 | if ((p->known_fields & PCI_FILL_SUBSYS) && |
331 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
c7a34993 MM |
332 | printf("\tSubsystem: %s\n", |
333 | pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf), | |
334 | PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, | |
fb570ee3 | 335 | p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); |
c7a34993 | 336 | } |
c1c952d2 MM |
337 | } |
338 | ||
a387042e MM |
339 | /*** Verbose output ***/ |
340 | ||
341 | static void | |
41d883cb | 342 | show_size(u64 x) |
a387042e | 343 | { |
0188807c | 344 | static const char suffix[][2] = { "", "K", "M", "G", "T" }; |
f2f8adaa | 345 | unsigned i; |
a387042e MM |
346 | if (!x) |
347 | return; | |
f2f8adaa | 348 | for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) { |
558f736b | 349 | if (x % 1024) |
f2f8adaa MW |
350 | break; |
351 | x /= 1024; | |
352 | } | |
353 | printf(" [size=%u%s]", (unsigned)x, suffix[i]); | |
a387042e MM |
354 | } |
355 | ||
41d883cb | 356 | static void |
72cabfbb | 357 | show_range(const char *prefix, u64 base, u64 limit, int bits, int disabled) |
41d883cb | 358 | { |
e6b0b6e1 KS |
359 | printf("%s:", prefix); |
360 | if (base <= limit || verbose > 2) | |
3b26eaa8 | 361 | printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit); |
ccf68033 | 362 | if (!disabled && base <= limit) |
41d883cb MM |
363 | show_size(limit - base + 1); |
364 | else | |
e6b0b6e1 | 365 | printf(" [disabled]"); |
72cabfbb PR |
366 | if (bits) |
367 | printf(" [%d-bit]", bits); | |
41d883cb MM |
368 | putchar('\n'); |
369 | } | |
370 | ||
72cabfbb PR |
371 | static u32 |
372 | ioflg_to_pciflg(pciaddr_t ioflg) | |
373 | { | |
374 | u32 flg; | |
375 | ||
376 | if (ioflg & PCI_IORESOURCE_IO) | |
377 | flg = PCI_BASE_ADDRESS_SPACE_IO; | |
378 | else if (!(ioflg & PCI_IORESOURCE_MEM)) | |
379 | flg = 0; | |
380 | else | |
381 | { | |
382 | flg = PCI_BASE_ADDRESS_SPACE_MEMORY; | |
383 | if (ioflg & PCI_IORESOURCE_MEM_64) | |
384 | flg |= PCI_BASE_ADDRESS_MEM_TYPE_64; | |
385 | else | |
386 | flg |= PCI_BASE_ADDRESS_MEM_TYPE_32; | |
387 | if (ioflg & PCI_IORESOURCE_PREFETCH) | |
388 | flg |= PCI_BASE_ADDRESS_MEM_PREFETCH; | |
389 | } | |
390 | ||
391 | return flg; | |
392 | } | |
393 | ||
a387042e | 394 | static void |
72cabfbb | 395 | show_bases(struct device *d, int cnt, int without_config_data) |
a387042e MM |
396 | { |
397 | struct pci_dev *p = d->dev; | |
72cabfbb | 398 | word cmd = without_config_data ? (PCI_COMMAND_IO | PCI_COMMAND_MEMORY) : get_conf_word(d, PCI_COMMAND); |
a387042e | 399 | int i; |
659d438b | 400 | int virtual = 0; |
a387042e | 401 | |
de7ef8bc | 402 | for (i=0; i<cnt; i++) |
a387042e MM |
403 | { |
404 | pciaddr_t pos = p->base_addr[i]; | |
405 | pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0; | |
558f736b | 406 | pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0; |
72cabfbb | 407 | u32 flg = without_config_data ? ioflg_to_pciflg(ioflg) : get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); |
bf72d3e9 MM |
408 | u32 hw_lower; |
409 | u32 hw_upper = 0; | |
410 | int broken = 0; | |
411 | ||
a387042e MM |
412 | if (flg == 0xffffffff) |
413 | flg = 0; | |
414 | if (!pos && !flg && !len) | |
415 | continue; | |
bf72d3e9 | 416 | |
a387042e MM |
417 | if (verbose > 1) |
418 | printf("\tRegion %d: ", i); | |
419 | else | |
420 | putchar('\t'); | |
bf72d3e9 MM |
421 | |
422 | /* Read address as seen by the hardware */ | |
423 | if (flg & PCI_BASE_ADDRESS_SPACE_IO) | |
424 | hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK; | |
425 | else | |
426 | { | |
427 | hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK; | |
428 | if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) | |
429 | { | |
430 | if (i >= cnt - 1) | |
431 | broken = 1; | |
432 | else | |
433 | { | |
434 | i++; | |
72cabfbb | 435 | if (!without_config_data) |
bf72d3e9 MM |
436 | hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); |
437 | } | |
438 | } | |
439 | } | |
440 | ||
441 | /* Detect virtual regions, which are reported by the OS, but unassigned in the device */ | |
72cabfbb | 442 | if (!without_config_data && pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) |
a387042e | 443 | { |
a387042e | 444 | flg = pos; |
659d438b | 445 | virtual = 1; |
a387042e | 446 | } |
bf72d3e9 MM |
447 | |
448 | /* Print base address */ | |
a387042e MM |
449 | if (flg & PCI_BASE_ADDRESS_SPACE_IO) |
450 | { | |
451 | pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK; | |
452 | printf("I/O ports at "); | |
00bf6625 | 453 | if (a || (cmd & PCI_COMMAND_IO)) |
a387042e | 454 | printf(PCIADDR_PORT_FMT, a); |
bf72d3e9 | 455 | else if (hw_lower) |
a387042e MM |
456 | printf("<ignored>"); |
457 | else | |
458 | printf("<unassigned>"); | |
bf72d3e9 MM |
459 | if (virtual) |
460 | printf(" [virtual]"); | |
461 | else if (!(cmd & PCI_COMMAND_IO)) | |
a387042e MM |
462 | printf(" [disabled]"); |
463 | } | |
464 | else | |
465 | { | |
466 | int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK; | |
467 | pciaddr_t a = pos & PCI_ADDR_MEM_MASK; | |
a387042e MM |
468 | |
469 | printf("Memory at "); | |
bf72d3e9 MM |
470 | if (broken) |
471 | printf("<broken-64-bit-slot>"); | |
472 | else if (a) | |
473 | printf(PCIADDR_T_FMT, a); | |
474 | else if (hw_lower || hw_upper) | |
475 | printf("<ignored>"); | |
476 | else | |
477 | printf("<unassigned>"); | |
a387042e MM |
478 | printf(" (%s, %sprefetchable)", |
479 | (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" : | |
480 | (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" : | |
481 | (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3", | |
482 | (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-"); | |
bf72d3e9 MM |
483 | if (virtual) |
484 | printf(" [virtual]"); | |
485 | else if (!(cmd & PCI_COMMAND_MEMORY)) | |
a387042e MM |
486 | printf(" [disabled]"); |
487 | } | |
bf72d3e9 MM |
488 | |
489 | if (ioflg & PCI_IORESOURCE_PCI_EA_BEI) | |
490 | printf(" [enhanced]"); | |
491 | ||
a387042e MM |
492 | show_size(len); |
493 | putchar('\n'); | |
494 | } | |
495 | } | |
496 | ||
497 | static void | |
498 | show_rom(struct device *d, int reg) | |
499 | { | |
500 | struct pci_dev *p = d->dev; | |
501 | pciaddr_t rom = p->rom_base_addr; | |
502 | pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0; | |
558f736b | 503 | pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0; |
72cabfbb PR |
504 | u32 flg = reg >= 0 ? get_conf_long(d, reg) : ioflg_to_pciflg(ioflg); |
505 | word cmd = reg >= 0 ? get_conf_word(d, PCI_COMMAND) : PCI_COMMAND_MEMORY; | |
659d438b | 506 | int virtual = 0; |
a387042e MM |
507 | |
508 | if (!rom && !flg && !len) | |
509 | return; | |
cb94f26e | 510 | |
72cabfbb | 511 | if (reg >= 0 && (rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) |
a387042e | 512 | { |
a387042e | 513 | flg = rom; |
659d438b | 514 | virtual = 1; |
a387042e | 515 | } |
cb94f26e MM |
516 | |
517 | printf("\tExpansion ROM at "); | |
a387042e MM |
518 | if (rom & PCI_ROM_ADDRESS_MASK) |
519 | printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK); | |
520 | else if (flg & PCI_ROM_ADDRESS_MASK) | |
521 | printf("<ignored>"); | |
522 | else | |
523 | printf("<unassigned>"); | |
cb94f26e MM |
524 | |
525 | if (virtual) | |
526 | printf(" [virtual]"); | |
527 | ||
a387042e MM |
528 | if (!(flg & PCI_ROM_ADDRESS_ENABLE)) |
529 | printf(" [disabled]"); | |
659d438b | 530 | else if (!virtual && !(cmd & PCI_COMMAND_MEMORY)) |
a387042e | 531 | printf(" [disabled by cmd]"); |
cb94f26e MM |
532 | |
533 | if (ioflg & PCI_IORESOURCE_PCI_EA_BEI) | |
534 | printf(" [enhanced]"); | |
535 | ||
a387042e MM |
536 | show_size(len); |
537 | putchar('\n'); | |
538 | } | |
539 | ||
e95c8373 MM |
540 | static void |
541 | show_htype0(struct device *d) | |
542 | { | |
72cabfbb | 543 | show_bases(d, 6, 0); |
6aa54f1b | 544 | show_rom(d, PCI_ROM_ADDRESS); |
21510591 | 545 | show_caps(d, PCI_CAPABILITY_LIST); |
e95c8373 MM |
546 | } |
547 | ||
98e39e09 MM |
548 | static void |
549 | show_htype1(struct device *d) | |
550 | { | |
ccf68033 | 551 | struct pci_dev *p = d->dev; |
98e39e09 MM |
552 | u32 io_base = get_conf_byte(d, PCI_IO_BASE); |
553 | u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT); | |
554 | u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK; | |
555 | u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE); | |
556 | u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT); | |
557 | u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK; | |
558 | u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE); | |
559 | u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT); | |
560 | u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK; | |
138c0385 | 561 | word sec_stat = get_conf_word(d, PCI_SEC_STATUS); |
98e39e09 | 562 | word brc = get_conf_word(d, PCI_BRIDGE_CONTROL); |
ccf68033 PR |
563 | int io_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[0]; |
564 | int mem_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[1]; | |
565 | int pref_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[2]; | |
566 | int io_bits, pref_bits; | |
98e39e09 | 567 | |
72cabfbb | 568 | show_bases(d, 2, 0); |
98e39e09 MM |
569 | printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", |
570 | get_conf_byte(d, PCI_PRIMARY_BUS), | |
571 | get_conf_byte(d, PCI_SECONDARY_BUS), | |
572 | get_conf_byte(d, PCI_SUBORDINATE_BUS), | |
573 | get_conf_byte(d, PCI_SEC_LATENCY_TIMER)); | |
574 | ||
ccf68033 PR |
575 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !io_disabled) |
576 | { | |
577 | io_base = p->bridge_base_addr[0] & PCI_IO_RANGE_MASK; | |
578 | io_limit = io_base + p->bridge_size[0] - 1; | |
579 | io_type = p->bridge_base_addr[0] & PCI_IO_RANGE_TYPE_MASK; | |
580 | io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; | |
581 | show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); | |
582 | } | |
583 | else if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) || | |
98e39e09 MM |
584 | (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32)) |
585 | printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit); | |
586 | else | |
587 | { | |
588 | io_base = (io_base & PCI_IO_RANGE_MASK) << 8; | |
589 | io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8; | |
590 | if (io_type == PCI_IO_RANGE_TYPE_32) | |
591 | { | |
592 | io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16); | |
593 | io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16); | |
594 | } | |
ccf68033 PR |
595 | /* I/O is unsupported if both base and limit are zeros and resource is disabled */ |
596 | if (!(io_base == 0x0 && io_limit == 0x0 && io_disabled)) | |
597 | { | |
598 | io_limit += 0xfff; | |
599 | io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; | |
600 | show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); | |
601 | } | |
98e39e09 MM |
602 | } |
603 | ||
ccf68033 PR |
604 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !mem_disabled) |
605 | { | |
606 | mem_base = p->bridge_base_addr[1] & PCI_MEMORY_RANGE_MASK; | |
607 | mem_limit = mem_base + p->bridge_size[1] - 1; | |
608 | show_range("\tMemory behind bridge", mem_base, mem_limit, 32, mem_disabled); | |
609 | } | |
610 | else if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) || | |
98e39e09 MM |
611 | mem_type) |
612 | printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit); | |
e306e911 | 613 | else |
98e39e09 MM |
614 | { |
615 | mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16; | |
616 | mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16; | |
ccf68033 | 617 | show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 32, mem_disabled); |
98e39e09 MM |
618 | } |
619 | ||
ccf68033 PR |
620 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !pref_disabled) |
621 | { | |
622 | u64 pref_base_64 = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_MASK; | |
623 | u64 pref_limit_64 = pref_base_64 + p->bridge_size[2] - 1; | |
624 | pref_type = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_TYPE_MASK; | |
625 | pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; | |
626 | show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); | |
627 | } | |
628 | else if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) || | |
98e39e09 MM |
629 | (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64)) |
630 | printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit); | |
e306e911 | 631 | else |
98e39e09 | 632 | { |
41d883cb MM |
633 | u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16; |
634 | u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16; | |
635 | if (pref_type == PCI_PREF_RANGE_TYPE_64) | |
e306e911 | 636 | { |
41d883cb MM |
637 | pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32; |
638 | pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32; | |
e306e911 | 639 | } |
ccf68033 PR |
640 | /* Prefetchable memory is unsupported if both base and limit are zeros and resource is disabled */ |
641 | if (!(pref_base_64 == 0x0 && pref_limit_64 == 0x0 && pref_disabled)) | |
642 | { | |
643 | pref_limit_64 += 0xfffff; | |
644 | pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; | |
645 | show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); | |
646 | } | |
98e39e09 MM |
647 | } |
648 | ||
138c0385 | 649 | if (verbose > 1) |
c1c2c30e | 650 | printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n", |
138c0385 MM |
651 | FLAG(sec_stat, PCI_STATUS_66MHZ), |
652 | FLAG(sec_stat, PCI_STATUS_FAST_BACK), | |
653 | FLAG(sec_stat, PCI_STATUS_PARITY), | |
654 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : | |
655 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
656 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??", | |
657 | FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT), | |
658 | FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT), | |
659 | FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT), | |
660 | FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR), | |
661 | FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY)); | |
98e39e09 | 662 | |
6aa54f1b | 663 | show_rom(d, PCI_ROM_ADDRESS1); |
98e39e09 MM |
664 | |
665 | if (verbose > 1) | |
da322bfb | 666 | { |
b2a45526 | 667 | printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n", |
da322bfb MM |
668 | FLAG(brc, PCI_BRIDGE_CTL_PARITY), |
669 | FLAG(brc, PCI_BRIDGE_CTL_SERR), | |
670 | FLAG(brc, PCI_BRIDGE_CTL_NO_ISA), | |
671 | FLAG(brc, PCI_BRIDGE_CTL_VGA), | |
b2a45526 | 672 | FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT), |
da322bfb MM |
673 | FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT), |
674 | FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET), | |
675 | FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK)); | |
676 | printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n", | |
677 | FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER), | |
678 | FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER), | |
679 | FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS), | |
680 | FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN)); | |
681 | } | |
e95c8373 | 682 | |
21510591 | 683 | show_caps(d, PCI_CAPABILITY_LIST); |
98e39e09 MM |
684 | } |
685 | ||
2f48f637 MM |
686 | static void |
687 | show_htype2(struct device *d) | |
688 | { | |
96e4f295 MM |
689 | int i; |
690 | word cmd = get_conf_word(d, PCI_COMMAND); | |
691 | word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL); | |
84d437d6 | 692 | word exca; |
e306e911 | 693 | int verb = verbose > 2; |
96e4f295 | 694 | |
72cabfbb | 695 | show_bases(d, 1, 0); |
96e4f295 MM |
696 | printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", |
697 | get_conf_byte(d, PCI_CB_PRIMARY_BUS), | |
698 | get_conf_byte(d, PCI_CB_CARD_BUS), | |
699 | get_conf_byte(d, PCI_CB_SUBORDINATE_BUS), | |
700 | get_conf_byte(d, PCI_CB_LATENCY_TIMER)); | |
de7ef8bc | 701 | for (i=0; i<2; i++) |
96e4f295 MM |
702 | { |
703 | int p = 8*i; | |
704 | u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p); | |
705 | u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p); | |
f288d32f BH |
706 | limit = limit + 0xfff; |
707 | if (base <= limit || verb) | |
81077814 | 708 | printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit, |
96e4f295 MM |
709 | (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]", |
710 | (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : ""); | |
711 | } | |
de7ef8bc | 712 | for (i=0; i<2; i++) |
96e4f295 MM |
713 | { |
714 | int p = 8*i; | |
715 | u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p); | |
716 | u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p); | |
717 | if (!(base & PCI_IO_RANGE_TYPE_32)) | |
718 | { | |
719 | base &= 0xffff; | |
720 | limit &= 0xffff; | |
721 | } | |
722 | base &= PCI_CB_IO_RANGE_MASK; | |
96e4f295 | 723 | limit = (limit & PCI_CB_IO_RANGE_MASK) + 3; |
e306e911 MM |
724 | if (base <= limit || verb) |
725 | printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit, | |
726 | (cmd & PCI_COMMAND_IO) ? "" : " [disabled]"); | |
96e4f295 MM |
727 | } |
728 | ||
729 | if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR) | |
730 | printf("\tSecondary status: SERR\n"); | |
731 | if (verbose > 1) | |
732 | printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n", | |
1c31d620 MM |
733 | FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY), |
734 | FLAG(brc, PCI_CB_BRIDGE_CTL_SERR), | |
735 | FLAG(brc, PCI_CB_BRIDGE_CTL_ISA), | |
736 | FLAG(brc, PCI_CB_BRIDGE_CTL_VGA), | |
737 | FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT), | |
738 | FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET), | |
739 | FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT), | |
740 | FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES)); | |
84d437d6 MM |
741 | |
742 | if (d->config_cached < 128) | |
743 | { | |
744 | printf("\t<access denied to the rest>\n"); | |
745 | return; | |
746 | } | |
747 | ||
748 | exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE); | |
96e4f295 MM |
749 | if (exca) |
750 | printf("\t16-bit legacy interface ports at %04x\n", exca); | |
21510591 | 751 | show_caps(d, PCI_CB_CAPABILITY_LIST); |
2f48f637 MM |
752 | } |
753 | ||
72cabfbb PR |
754 | static void |
755 | show_htype_unknown(struct device *d) | |
756 | { | |
757 | struct pci_dev *p = d->dev; | |
758 | u64 base, limit, flags; | |
759 | const char *str; | |
760 | int i, bits; | |
761 | ||
762 | if (pacc->buscentric) | |
763 | return; | |
764 | ||
765 | show_bases(d, 6, 1); | |
766 | for (i = 0; i < 4; i++) | |
767 | { | |
768 | if (!p->bridge_base_addr[i]) | |
769 | continue; | |
770 | base = p->bridge_base_addr[i]; | |
771 | limit = base + p->bridge_size[i] - 1; | |
772 | flags = p->bridge_flags[i]; | |
773 | if (flags & PCI_IORESOURCE_IO) | |
774 | { | |
775 | bits = (flags & PCI_IORESOURCE_IO_16BIT_ADDR) ? 16 : 32; | |
776 | str = "\tI/O behind bridge"; | |
777 | } | |
778 | else if (flags & PCI_IORESOURCE_MEM) | |
779 | { | |
780 | bits = (flags & PCI_IORESOURCE_MEM_64) ? 64 : 32; | |
781 | if (flags & PCI_IORESOURCE_PREFETCH) | |
782 | str = "\tPrefetchable memory behind bridge"; | |
783 | else | |
784 | str = "\tMemory behind bridge"; | |
785 | } | |
786 | else | |
787 | { | |
788 | bits = 0; | |
789 | str = "\tUnknown resource behind bridge"; | |
790 | } | |
791 | show_range(str, base, limit, bits, 0); | |
792 | } | |
793 | show_rom(d, -1); | |
794 | } | |
795 | ||
98e39e09 MM |
796 | static void |
797 | show_verbose(struct device *d) | |
798 | { | |
727ce158 | 799 | struct pci_dev *p = d->dev; |
72cabfbb | 800 | int unknown_config_data = 0; |
c2b144ef | 801 | word class = p->device_class; |
98e39e09 | 802 | byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f; |
72cabfbb | 803 | byte bist; |
98e39e09 | 804 | byte max_lat, min_gnt; |
a5065438 | 805 | char *dt_node, *iommu_group; |
98e39e09 MM |
806 | |
807 | show_terse(d); | |
808 | ||
ef6c9ec3 | 809 | pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | |
ccf68033 | 810 | PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP | |
fb570ee3 | 811 | PCI_FILL_BRIDGE_BASES | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS); |
ef6c9ec3 | 812 | |
98e39e09 MM |
813 | switch (htype) |
814 | { | |
2f48f637 MM |
815 | case PCI_HEADER_TYPE_NORMAL: |
816 | if (class == PCI_CLASS_BRIDGE_PCI) | |
56164f4f | 817 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 818 | bist = get_conf_byte(d, PCI_BIST); |
98e39e09 MM |
819 | max_lat = get_conf_byte(d, PCI_MAX_LAT); |
820 | min_gnt = get_conf_byte(d, PCI_MIN_GNT); | |
98e39e09 | 821 | break; |
2f48f637 | 822 | case PCI_HEADER_TYPE_BRIDGE: |
cce2caac | 823 | if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) |
56164f4f | 824 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 825 | bist = get_conf_byte(d, PCI_BIST); |
001b9ac6 | 826 | min_gnt = max_lat = 0; |
2f48f637 MM |
827 | break; |
828 | case PCI_HEADER_TYPE_CARDBUS: | |
829 | if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) | |
56164f4f | 830 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 831 | bist = get_conf_byte(d, PCI_BIST); |
96e4f295 | 832 | min_gnt = max_lat = 0; |
98e39e09 MM |
833 | break; |
834 | default: | |
835 | printf("\t!!! Unknown header type %02x\n", htype); | |
72cabfbb PR |
836 | bist = 0; |
837 | min_gnt = max_lat = 0; | |
838 | unknown_config_data = 1; | |
98e39e09 MM |
839 | } |
840 | ||
2849a165 AC |
841 | if (p->phy_slot) |
842 | printf("\tPhysical Slot: %s\n", p->phy_slot); | |
843 | ||
c02d903c MM |
844 | if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE)) |
845 | printf("\tDevice tree node: %s\n", dt_node); | |
846 | ||
72cabfbb | 847 | if (!unknown_config_data && verbose > 1) |
98e39e09 | 848 | { |
72cabfbb PR |
849 | word cmd = get_conf_word(d, PCI_COMMAND); |
850 | word status = get_conf_word(d, PCI_STATUS); | |
da322bfb | 851 | printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n", |
1c31d620 MM |
852 | FLAG(cmd, PCI_COMMAND_IO), |
853 | FLAG(cmd, PCI_COMMAND_MEMORY), | |
854 | FLAG(cmd, PCI_COMMAND_MASTER), | |
855 | FLAG(cmd, PCI_COMMAND_SPECIAL), | |
856 | FLAG(cmd, PCI_COMMAND_INVALIDATE), | |
857 | FLAG(cmd, PCI_COMMAND_VGA_PALETTE), | |
858 | FLAG(cmd, PCI_COMMAND_PARITY), | |
859 | FLAG(cmd, PCI_COMMAND_WAIT), | |
860 | FLAG(cmd, PCI_COMMAND_SERR), | |
da322bfb MM |
861 | FLAG(cmd, PCI_COMMAND_FAST_BACK), |
862 | FLAG(cmd, PCI_COMMAND_DISABLE_INTx)); | |
863 | printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n", | |
1c31d620 MM |
864 | FLAG(status, PCI_STATUS_CAP_LIST), |
865 | FLAG(status, PCI_STATUS_66MHZ), | |
866 | FLAG(status, PCI_STATUS_UDF), | |
867 | FLAG(status, PCI_STATUS_FAST_BACK), | |
868 | FLAG(status, PCI_STATUS_PARITY), | |
98e39e09 MM |
869 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : |
870 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
871 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??", | |
1c31d620 MM |
872 | FLAG(status, PCI_STATUS_SIG_TARGET_ABORT), |
873 | FLAG(status, PCI_STATUS_REC_TARGET_ABORT), | |
874 | FLAG(status, PCI_STATUS_REC_MASTER_ABORT), | |
875 | FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR), | |
da322bfb MM |
876 | FLAG(status, PCI_STATUS_DETECTED_PARITY), |
877 | FLAG(status, PCI_STATUS_INTx)); | |
98e39e09 MM |
878 | if (cmd & PCI_COMMAND_MASTER) |
879 | { | |
72cabfbb PR |
880 | byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); |
881 | byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE); | |
56164f4f MM |
882 | printf("\tLatency: %d", latency); |
883 | if (min_gnt || max_lat) | |
884 | { | |
885 | printf(" ("); | |
886 | if (min_gnt) | |
887 | printf("%dns min", min_gnt*250); | |
888 | if (min_gnt && max_lat) | |
889 | printf(", "); | |
890 | if (max_lat) | |
891 | printf("%dns max", max_lat*250); | |
892 | putchar(')'); | |
893 | } | |
98e39e09 | 894 | if (cache_line) |
7a61b93c | 895 | printf(", Cache Line Size: %d bytes", cache_line * 4); |
98e39e09 MM |
896 | putchar('\n'); |
897 | } | |
72cabfbb PR |
898 | } |
899 | ||
900 | if (verbose > 1) | |
901 | { | |
902 | byte int_pin = unknown_config_data ? 0 : get_conf_byte(d, PCI_INTERRUPT_PIN); | |
903 | if (int_pin || p->irq) | |
9739916e | 904 | printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n", |
72cabfbb | 905 | (int_pin ? 'A' + int_pin - 1 : '?'), p->irq); |
1d9d1a01 MM |
906 | if (p->numa_node != -1) |
907 | printf("\tNUMA node: %d\n", p->numa_node); | |
a5065438 AXH |
908 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
909 | printf("\tIOMMU group: %s\n", iommu_group); | |
98e39e09 | 910 | } |
72cabfbb PR |
911 | |
912 | if (!unknown_config_data && verbose <= 1) | |
98e39e09 | 913 | { |
72cabfbb PR |
914 | word cmd = get_conf_word(d, PCI_COMMAND); |
915 | word status = get_conf_word(d, PCI_STATUS); | |
916 | byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); | |
98e39e09 MM |
917 | printf("\tFlags: "); |
918 | if (cmd & PCI_COMMAND_MASTER) | |
919 | printf("bus master, "); | |
920 | if (cmd & PCI_COMMAND_VGA_PALETTE) | |
921 | printf("VGA palette snoop, "); | |
922 | if (cmd & PCI_COMMAND_WAIT) | |
923 | printf("stepping, "); | |
924 | if (cmd & PCI_COMMAND_FAST_BACK) | |
925 | printf("fast Back2Back, "); | |
926 | if (status & PCI_STATUS_66MHZ) | |
c1c2c30e | 927 | printf("66MHz, "); |
98e39e09 MM |
928 | if (status & PCI_STATUS_UDF) |
929 | printf("user-definable features, "); | |
930 | printf("%s devsel", | |
931 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : | |
932 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
933 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??"); | |
934 | if (cmd & PCI_COMMAND_MASTER) | |
935 | printf(", latency %d", latency); | |
72cabfbb PR |
936 | if (p->irq) |
937 | printf(", IRQ " PCIIRQ_FMT, p->irq); | |
90ec4a6d MW |
938 | if (p->numa_node != -1) |
939 | printf(", NUMA node %d", p->numa_node); | |
a5065438 AXH |
940 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
941 | printf(", IOMMU group %s", iommu_group); | |
98e39e09 MM |
942 | putchar('\n'); |
943 | } | |
944 | ||
945 | if (bist & PCI_BIST_CAPABLE) | |
946 | { | |
947 | if (bist & PCI_BIST_START) | |
948 | printf("\tBIST is running\n"); | |
949 | else | |
950 | printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK); | |
951 | } | |
952 | ||
953 | switch (htype) | |
954 | { | |
2f48f637 | 955 | case PCI_HEADER_TYPE_NORMAL: |
98e39e09 MM |
956 | show_htype0(d); |
957 | break; | |
2f48f637 | 958 | case PCI_HEADER_TYPE_BRIDGE: |
98e39e09 MM |
959 | show_htype1(d); |
960 | break; | |
2f48f637 MM |
961 | case PCI_HEADER_TYPE_CARDBUS: |
962 | show_htype2(d); | |
963 | break; | |
72cabfbb PR |
964 | default: |
965 | show_htype_unknown(d); | |
98e39e09 MM |
966 | } |
967 | } | |
968 | ||
a387042e MM |
969 | /*** Machine-readable dumps ***/ |
970 | ||
98e39e09 MM |
971 | static void |
972 | show_hex_dump(struct device *d) | |
973 | { | |
09817437 | 974 | unsigned int i, cnt; |
98e39e09 | 975 | |
84d437d6 | 976 | cnt = d->config_cached; |
a387042e | 977 | if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt)) |
09817437 MM |
978 | { |
979 | cnt = 256; | |
a387042e | 980 | if (opt_hex >= 4 && config_fetch(d, 256, 4096-256)) |
09817437 MM |
981 | cnt = 4096; |
982 | } | |
983 | ||
de7ef8bc | 984 | for (i=0; i<cnt; i++) |
98e39e09 MM |
985 | { |
986 | if (! (i & 15)) | |
987 | printf("%02x:", i); | |
988 | printf(" %02x", get_conf_byte(d, i)); | |
989 | if ((i & 15) == 15) | |
990 | putchar('\n'); | |
991 | } | |
992 | } | |
993 | ||
13081e57 MM |
994 | static void |
995 | print_shell_escaped(char *c) | |
996 | { | |
997 | printf(" \""); | |
998 | while (*c) | |
999 | { | |
1000 | if (*c == '"' || *c == '\\') | |
1001 | putchar('\\'); | |
1002 | putchar(*c++); | |
1003 | } | |
1004 | putchar('"'); | |
1005 | } | |
1006 | ||
0a33d0ec MM |
1007 | static void |
1008 | show_machine(struct device *d) | |
1009 | { | |
727ce158 | 1010 | struct pci_dev *p = d->dev; |
727ce158 | 1011 | char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128]; |
a5065438 | 1012 | char *dt_node, *iommu_group; |
ce503b7f | 1013 | |
0a33d0ec MM |
1014 | if (verbose) |
1015 | { | |
a5065438 | 1016 | pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP); |
a387042e | 1017 | printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t"); |
84c8d1bb MM |
1018 | show_slot_name(d); |
1019 | putchar('\n'); | |
727ce158 | 1020 | printf("Class:\t%s\n", |
c2b144ef | 1021 | pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class)); |
727ce158 | 1022 | printf("Vendor:\t%s\n", |
224707ba | 1023 | pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); |
727ce158 | 1024 | printf("Device:\t%s\n", |
224707ba | 1025 | pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); |
fb570ee3 PR |
1026 | if ((p->known_fields & PCI_FILL_SUBSYS) && |
1027 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
ce503b7f | 1028 | { |
727ce158 | 1029 | printf("SVendor:\t%s\n", |
fb570ee3 | 1030 | pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); |
727ce158 | 1031 | printf("SDevice:\t%s\n", |
fb570ee3 | 1032 | pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); |
ce503b7f | 1033 | } |
2849a165 AC |
1034 | if (p->phy_slot) |
1035 | printf("PhySlot:\t%s\n", p->phy_slot); | |
fb570ee3 PR |
1036 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
1037 | printf("Rev:\t%02x\n", p->rev_id); | |
1038 | if (p->known_fields & PCI_FILL_CLASS_EXT) | |
1039 | printf("ProgIf:\t%02x\n", p->prog_if); | |
11339c0d MM |
1040 | if (opt_kernel) |
1041 | show_kernel_machine(d); | |
1d9d1a01 MM |
1042 | if (p->numa_node != -1) |
1043 | printf("NUMANode:\t%d\n", p->numa_node); | |
c02d903c MM |
1044 | if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE)) |
1045 | printf("DTNode:\t%s\n", dt_node); | |
a5065438 AXH |
1046 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
1047 | printf("IOMMUGroup:\t%s\n", iommu_group); | |
0a33d0ec MM |
1048 | } |
1049 | else | |
1050 | { | |
84c8d1bb | 1051 | show_slot_name(d); |
13081e57 MM |
1052 | print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class)); |
1053 | print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); | |
1054 | print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); | |
fb570ee3 PR |
1055 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
1056 | printf(" -r%02x", p->rev_id); | |
1057 | if (p->known_fields & PCI_FILL_CLASS_EXT) | |
1058 | printf(" -p%02x", p->prog_if); | |
1059 | if ((p->known_fields & PCI_FILL_SUBSYS) && | |
1060 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
13081e57 | 1061 | { |
fb570ee3 PR |
1062 | print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); |
1063 | print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); | |
13081e57 | 1064 | } |
ce503b7f MM |
1065 | else |
1066 | printf(" \"\" \"\""); | |
0a33d0ec MM |
1067 | putchar('\n'); |
1068 | } | |
1069 | } | |
1070 | ||
a387042e MM |
1071 | /*** Main show function ***/ |
1072 | ||
c7a34993 | 1073 | void |
1812a795 MM |
1074 | show_device(struct device *d) |
1075 | { | |
a387042e | 1076 | if (opt_machine) |
1812a795 | 1077 | show_machine(d); |
1812a795 | 1078 | else |
11339c0d MM |
1079 | { |
1080 | if (verbose) | |
1081 | show_verbose(d); | |
1082 | else | |
1083 | show_terse(d); | |
1084 | if (opt_kernel || verbose) | |
1085 | show_kernel(d); | |
1086 | } | |
a387042e | 1087 | if (opt_hex) |
1812a795 | 1088 | show_hex_dump(d); |
a387042e | 1089 | if (verbose || opt_hex) |
1812a795 MM |
1090 | putchar('\n'); |
1091 | } | |
1092 | ||
98e39e09 MM |
1093 | static void |
1094 | show(void) | |
1095 | { | |
1096 | struct device *d; | |
1097 | ||
de7ef8bc | 1098 | for (d=first_dev; d; d=d->next) |
ce22dfec MM |
1099 | if (pci_filter_match(&filter, d->dev)) |
1100 | show_device(d); | |
98e39e09 MM |
1101 | } |
1102 | ||
1103 | /* Main */ | |
1104 | ||
1105 | int | |
1106 | main(int argc, char **argv) | |
1107 | { | |
1108 | int i; | |
e4842ff3 | 1109 | char *msg; |
98e39e09 | 1110 | |
496d4021 MM |
1111 | if (argc == 2 && !strcmp(argv[1], "--version")) |
1112 | { | |
1113 | puts("lspci version " PCIUTILS_VERSION); | |
1114 | return 0; | |
1115 | } | |
727ce158 MM |
1116 | |
1117 | pacc = pci_alloc(); | |
1118 | pacc->error = die; | |
1119 | pci_filter_init(pacc, &filter); | |
1120 | ||
98e39e09 MM |
1121 | while ((i = getopt(argc, argv, options)) != -1) |
1122 | switch (i) | |
1123 | { | |
1124 | case 'n': | |
bc2eed2d | 1125 | pacc->numeric_ids++; |
98e39e09 MM |
1126 | break; |
1127 | case 'v': | |
1128 | verbose++; | |
1129 | break; | |
1130 | case 'b': | |
727ce158 | 1131 | pacc->buscentric = 1; |
98e39e09 | 1132 | break; |
e4842ff3 | 1133 | case 's': |
727ce158 | 1134 | if (msg = pci_filter_parse_slot(&filter, optarg)) |
b7fd8e19 | 1135 | die("-s: %s", msg); |
ce22dfec | 1136 | opt_filter = 1; |
98e39e09 | 1137 | break; |
e4842ff3 | 1138 | case 'd': |
727ce158 MM |
1139 | if (msg = pci_filter_parse_id(&filter, optarg)) |
1140 | die("-d: %s", msg); | |
ce22dfec | 1141 | opt_filter = 1; |
98e39e09 MM |
1142 | break; |
1143 | case 'x': | |
a387042e | 1144 | opt_hex++; |
98e39e09 | 1145 | break; |
62e78fa6 MM |
1146 | case 'P': |
1147 | opt_path++; | |
ce22dfec | 1148 | need_topology = 1; |
62e78fa6 | 1149 | break; |
6d0dc0fd | 1150 | case 't': |
a387042e | 1151 | opt_tree++; |
ce22dfec | 1152 | need_topology = 1; |
6d0dc0fd | 1153 | break; |
18928b91 | 1154 | case 'i': |
cc062b4a | 1155 | pci_set_name_list_path(pacc, optarg, 0); |
18928b91 | 1156 | break; |
0a33d0ec | 1157 | case 'm': |
a387042e | 1158 | opt_machine++; |
0a33d0ec | 1159 | break; |
c1c952d2 MM |
1160 | case 'p': |
1161 | opt_pcimap = optarg; | |
1162 | break; | |
1b99a704 | 1163 | #ifdef PCI_OS_LINUX |
11339c0d MM |
1164 | case 'k': |
1165 | opt_kernel++; | |
1166 | break; | |
1b99a704 | 1167 | #endif |
1812a795 | 1168 | case 'M': |
a387042e | 1169 | opt_map_mode++; |
1812a795 | 1170 | break; |
af61eb25 | 1171 | case 'D': |
a387042e | 1172 | opt_domains = 2; |
af61eb25 | 1173 | break; |
e022789d | 1174 | #ifdef PCI_USE_DNS |
cca2f7c6 MM |
1175 | case 'q': |
1176 | opt_query_dns++; | |
1177 | break; | |
1178 | case 'Q': | |
1179 | opt_query_all = 1; | |
1180 | break; | |
e022789d MM |
1181 | #else |
1182 | case 'q': | |
1183 | case 'Q': | |
1184 | die("DNS queries are not available in this version"); | |
1185 | #endif | |
98e39e09 | 1186 | default: |
727ce158 MM |
1187 | if (parse_generic_option(i, pacc, optarg)) |
1188 | break; | |
98e39e09 | 1189 | bad: |
727ce158 | 1190 | fprintf(stderr, help_msg, pacc->id_file_name); |
98e39e09 MM |
1191 | return 1; |
1192 | } | |
1193 | if (optind < argc) | |
1194 | goto bad; | |
1195 | ||
cca2f7c6 MM |
1196 | if (opt_query_dns) |
1197 | { | |
1198 | pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK; | |
1199 | if (opt_query_dns > 1) | |
1200 | pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE; | |
1201 | } | |
1202 | if (opt_query_all) | |
1203 | pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL; | |
1204 | ||
727ce158 | 1205 | pci_init(pacc); |
a387042e | 1206 | if (opt_map_mode) |
62e78fa6 | 1207 | { |
ce22dfec MM |
1208 | if (need_topology) |
1209 | die("Bus mapping mode does not recognize bus topology"); | |
62e78fa6 MM |
1210 | map_the_bus(); |
1211 | } | |
6d0dc0fd | 1212 | else |
1812a795 MM |
1213 | { |
1214 | scan_devices(); | |
1215 | sort_them(); | |
ce22dfec MM |
1216 | if (need_topology) |
1217 | grow_tree(); | |
a387042e | 1218 | if (opt_tree) |
888ddf0e | 1219 | show_forest(opt_filter ? &filter : NULL); |
1812a795 MM |
1220 | else |
1221 | show(); | |
1222 | } | |
17ec7e70 | 1223 | show_kernel_cleanup(); |
727ce158 | 1224 | pci_cleanup(pacc); |
98e39e09 | 1225 | |
934e7e36 | 1226 | return (seen_errors ? 2 : 0); |
98e39e09 | 1227 | } |