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Commit | Line | Data |
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98e39e09 | 1 | /* |
4284af58 | 2 | * The PCI Utilities -- List All PCI Devices |
98e39e09 | 3 | * |
bf72d3e9 | 4 | * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz> |
98e39e09 MM |
5 | * |
6 | * Can be freely distributed and used under the terms of the GNU GPL. | |
7 | */ | |
8 | ||
9 | #include <stdio.h> | |
10 | #include <string.h> | |
11 | #include <stdlib.h> | |
727ce158 | 12 | #include <stdarg.h> |
98e39e09 | 13 | |
c7a34993 | 14 | #include "lspci.h" |
98e39e09 MM |
15 | |
16 | /* Options */ | |
17 | ||
c7a34993 | 18 | int verbose; /* Show detailed information */ |
a387042e | 19 | static int opt_hex; /* Show contents of config space as hexadecimal numbers */ |
c7a34993 | 20 | struct pci_filter filter; /* Device filter */ |
ce22dfec | 21 | static int opt_filter; /* Any filter was given */ |
a387042e | 22 | static int opt_tree; /* Show bus tree */ |
62e78fa6 | 23 | static int opt_path; /* Show bridge path */ |
a387042e MM |
24 | static int opt_machine; /* Generate machine-readable output */ |
25 | static int opt_map_mode; /* Bus mapping mode enabled */ | |
26 | static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */ | |
11339c0d | 27 | static int opt_kernel; /* Show kernel drivers */ |
cca2f7c6 MM |
28 | static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */ |
29 | static int opt_query_all; /* Query the DNS for all entries */ | |
c7a34993 | 30 | char *opt_pcimap; /* Override path to Linux modules.pcimap */ |
98e39e09 | 31 | |
81afa98c MM |
32 | const char program_name[] = "lspci"; |
33 | ||
62e78fa6 | 34 | static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ; |
cca2f7c6 MM |
35 | |
36 | static char help_msg[] = | |
37 | "Usage: lspci [<switches>]\n" | |
38 | "\n" | |
1b99a704 MM |
39 | "Basic display modes:\n" |
40 | "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n" | |
41 | "-t\t\tShow bus tree\n" | |
42 | "\n" | |
43 | "Display options:\n" | |
c5751fb0 | 44 | "-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n" |
1b99a704 MM |
45 | #ifdef PCI_OS_LINUX |
46 | "-k\t\tShow kernel drivers handling each device\n" | |
47 | #endif | |
48 | "-x\t\tShow hex-dump of the standard part of the config space\n" | |
49 | "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n" | |
50 | "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n" | |
51 | "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n" | |
52 | "-D\t\tAlways show domain numbers\n" | |
62e78fa6 MM |
53 | "-P\t\tDisplay bridge path in addition to bus and device number\n" |
54 | "-PP\t\tDisplay bus path in addition to bus and device number\n" | |
1b99a704 MM |
55 | "\n" |
56 | "Resolving of device ID's to names:\n" | |
cca2f7c6 MM |
57 | "-n\t\tShow numeric ID's\n" |
58 | "-nn\t\tShow both textual and numeric ID's (names & numbers)\n" | |
59 | #ifdef PCI_USE_DNS | |
60 | "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n" | |
61 | "-qq\t\tAs above, but re-query locally cached entries\n" | |
62 | "-Q\t\tQuery the PCI ID database for all ID's via DNS\n" | |
63 | #endif | |
1b99a704 MM |
64 | "\n" |
65 | "Selection of devices:\n" | |
cca2f7c6 | 66 | "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n" |
4d1c9525 | 67 | "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n" |
1b99a704 MM |
68 | "\n" |
69 | "Other options:\n" | |
cca2f7c6 | 70 | "-i <file>\tUse specified ID database instead of %s\n" |
c1c952d2 | 71 | #ifdef PCI_OS_LINUX |
cca2f7c6 | 72 | "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n" |
c1c952d2 | 73 | #endif |
cca2f7c6 | 74 | "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n" |
1b99a704 MM |
75 | "\n" |
76 | "PCI access options:\n" | |
727ce158 MM |
77 | GENERIC_HELP |
78 | ; | |
98e39e09 | 79 | |
a387042e | 80 | /*** Our view of the PCI bus ***/ |
98e39e09 | 81 | |
c7a34993 MM |
82 | struct pci_access *pacc; |
83 | struct device *first_dev; | |
934e7e36 | 84 | static int seen_errors; |
ce22dfec | 85 | static int need_topology; |
98e39e09 | 86 | |
c7a34993 | 87 | int |
ec25b52d MM |
88 | config_fetch(struct device *d, unsigned int pos, unsigned int len) |
89 | { | |
90 | unsigned int end = pos+len; | |
91 | int result; | |
84d437d6 MM |
92 | |
93 | while (pos < d->config_bufsize && len && d->present[pos]) | |
94 | pos++, len--; | |
95 | while (pos+len <= d->config_bufsize && len && d->present[pos+len-1]) | |
96 | len--; | |
97 | if (!len) | |
ec25b52d | 98 | return 1; |
84d437d6 | 99 | |
ec25b52d MM |
100 | if (end > d->config_bufsize) |
101 | { | |
84d437d6 | 102 | int orig_size = d->config_bufsize; |
ec25b52d MM |
103 | while (end > d->config_bufsize) |
104 | d->config_bufsize *= 2; | |
105 | d->config = xrealloc(d->config, d->config_bufsize); | |
84d437d6 | 106 | d->present = xrealloc(d->present, d->config_bufsize); |
1ac3a99d | 107 | memset(d->present + orig_size, 0, d->config_bufsize - orig_size); |
ec25b52d MM |
108 | } |
109 | result = pci_read_block(d->dev, pos, d->config + pos, len); | |
84d437d6 MM |
110 | if (result) |
111 | memset(d->present + pos, 1, len); | |
ec25b52d MM |
112 | return result; |
113 | } | |
114 | ||
c7a34993 | 115 | struct device * |
1812a795 MM |
116 | scan_device(struct pci_dev *p) |
117 | { | |
1812a795 MM |
118 | struct device *d; |
119 | ||
a387042e MM |
120 | if (p->domain && !opt_domains) |
121 | opt_domains = 1; | |
ce22dfec | 122 | if (!pci_filter_match(&filter, p) && !need_topology) |
1812a795 MM |
123 | return NULL; |
124 | d = xmalloc(sizeof(struct device)); | |
1ac3a99d | 125 | memset(d, 0, sizeof(*d)); |
1812a795 | 126 | d->dev = p; |
832b07a8 | 127 | d->no_config_access = p->no_config_access; |
84d437d6 | 128 | d->config_cached = d->config_bufsize = 64; |
ec25b52d | 129 | d->config = xmalloc(64); |
84d437d6 MM |
130 | d->present = xmalloc(64); |
131 | memset(d->present, 1, 64); | |
832b07a8 | 132 | if (!d->no_config_access && !pci_read_block(p, 0, d->config, 64)) |
934e7e36 | 133 | { |
832b07a8 PR |
134 | d->no_config_access = 1; |
135 | d->config_cached = d->config_bufsize = 0; | |
136 | memset(d->present, 0, 64); | |
934e7e36 | 137 | } |
832b07a8 | 138 | if (!d->no_config_access && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS) |
1812a795 | 139 | { |
ec25b52d MM |
140 | /* For cardbus bridges, we need to fetch 64 bytes more to get the |
141 | * full standard header... */ | |
84d437d6 MM |
142 | if (config_fetch(d, 64, 64)) |
143 | d->config_cached += 64; | |
1812a795 | 144 | } |
84d437d6 | 145 | pci_setup_cache(p, d->config, d->config_cached); |
67954c8b | 146 | pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS | (need_topology ? PCI_FILL_PARENT : 0)); |
1812a795 MM |
147 | return d; |
148 | } | |
149 | ||
98e39e09 | 150 | static void |
727ce158 | 151 | scan_devices(void) |
98e39e09 MM |
152 | { |
153 | struct device *d; | |
727ce158 | 154 | struct pci_dev *p; |
98e39e09 | 155 | |
727ce158 | 156 | pci_scan_bus(pacc); |
de7ef8bc | 157 | for (p=pacc->devices; p; p=p->next) |
1812a795 MM |
158 | if (d = scan_device(p)) |
159 | { | |
160 | d->next = first_dev; | |
161 | first_dev = d; | |
162 | } | |
98e39e09 MM |
163 | } |
164 | ||
a387042e | 165 | /*** Config space accesses ***/ |
98e39e09 | 166 | |
84d437d6 MM |
167 | static void |
168 | check_conf_range(struct device *d, unsigned int pos, unsigned int len) | |
169 | { | |
170 | while (len) | |
171 | if (!d->present[pos]) | |
172 | die("Internal bug: Accessing non-read configuration byte at position %x", pos); | |
173 | else | |
174 | pos++, len--; | |
175 | } | |
176 | ||
c7a34993 | 177 | byte |
98e39e09 MM |
178 | get_conf_byte(struct device *d, unsigned int pos) |
179 | { | |
84d437d6 | 180 | check_conf_range(d, pos, 1); |
98e39e09 MM |
181 | return d->config[pos]; |
182 | } | |
183 | ||
c7a34993 | 184 | word |
98e39e09 MM |
185 | get_conf_word(struct device *d, unsigned int pos) |
186 | { | |
84d437d6 | 187 | check_conf_range(d, pos, 2); |
98e39e09 MM |
188 | return d->config[pos] | (d->config[pos+1] << 8); |
189 | } | |
190 | ||
c7a34993 | 191 | u32 |
98e39e09 MM |
192 | get_conf_long(struct device *d, unsigned int pos) |
193 | { | |
84d437d6 | 194 | check_conf_range(d, pos, 4); |
98e39e09 MM |
195 | return d->config[pos] | |
196 | (d->config[pos+1] << 8) | | |
197 | (d->config[pos+2] << 16) | | |
198 | (d->config[pos+3] << 24); | |
199 | } | |
200 | ||
a387042e | 201 | /*** Sorting ***/ |
98e39e09 MM |
202 | |
203 | static int | |
204 | compare_them(const void *A, const void *B) | |
205 | { | |
727ce158 MM |
206 | const struct pci_dev *a = (*(const struct device **)A)->dev; |
207 | const struct pci_dev *b = (*(const struct device **)B)->dev; | |
98e39e09 | 208 | |
84c8d1bb MM |
209 | if (a->domain < b->domain) |
210 | return -1; | |
211 | if (a->domain > b->domain) | |
212 | return 1; | |
98e39e09 MM |
213 | if (a->bus < b->bus) |
214 | return -1; | |
215 | if (a->bus > b->bus) | |
216 | return 1; | |
727ce158 MM |
217 | if (a->dev < b->dev) |
218 | return -1; | |
219 | if (a->dev > b->dev) | |
220 | return 1; | |
221 | if (a->func < b->func) | |
98e39e09 | 222 | return -1; |
727ce158 | 223 | if (a->func > b->func) |
98e39e09 MM |
224 | return 1; |
225 | return 0; | |
226 | } | |
227 | ||
228 | static void | |
229 | sort_them(void) | |
230 | { | |
727ce158 | 231 | struct device **index, **h, **last_dev; |
98e39e09 MM |
232 | int cnt; |
233 | struct device *d; | |
234 | ||
c7a34993 MM |
235 | cnt = 0; |
236 | for (d=first_dev; d; d=d->next) | |
237 | cnt++; | |
238 | h = index = alloca(sizeof(struct device *) * cnt); | |
239 | for (d=first_dev; d; d=d->next) | |
240 | *h++ = d; | |
241 | qsort(index, cnt, sizeof(struct device *), compare_them); | |
242 | last_dev = &first_dev; | |
243 | h = index; | |
244 | while (cnt--) | |
245 | { | |
246 | *last_dev = *h; | |
247 | last_dev = &(*h)->next; | |
248 | h++; | |
c1c952d2 | 249 | } |
c7a34993 | 250 | *last_dev = NULL; |
c1c952d2 MM |
251 | } |
252 | ||
c7a34993 | 253 | /*** Normal output ***/ |
11339c0d | 254 | |
62e78fa6 MM |
255 | static void |
256 | show_slot_path(struct device *d) | |
257 | { | |
258 | struct pci_dev *p = d->dev; | |
259 | ||
260 | if (opt_path) | |
261 | { | |
262 | struct bus *bus = d->parent_bus; | |
263 | struct bridge *br = bus->parent_bridge; | |
264 | ||
265 | if (br && br->br_dev) | |
266 | { | |
267 | show_slot_path(br->br_dev); | |
268 | if (opt_path > 1) | |
269 | printf("/%02x:%02x.%d", p->bus, p->dev, p->func); | |
270 | else | |
271 | printf("/%02x.%d", p->dev, p->func); | |
272 | return; | |
273 | } | |
274 | } | |
275 | printf("%02x:%02x.%d", p->bus, p->dev, p->func); | |
276 | } | |
277 | ||
c7a34993 MM |
278 | static void |
279 | show_slot_name(struct device *d) | |
c1c952d2 | 280 | { |
c7a34993 | 281 | struct pci_dev *p = d->dev; |
c1c952d2 | 282 | |
c7a34993 MM |
283 | if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2)) |
284 | printf("%04x:", p->domain); | |
62e78fa6 | 285 | show_slot_path(d); |
c1c952d2 MM |
286 | } |
287 | ||
11339c0d | 288 | static void |
c7a34993 | 289 | show_terse(struct device *d) |
11339c0d | 290 | { |
c7a34993 MM |
291 | int c; |
292 | struct pci_dev *p = d->dev; | |
293 | char classbuf[128], devbuf[128]; | |
11339c0d | 294 | |
c7a34993 MM |
295 | show_slot_name(d); |
296 | printf(" %s: %s", | |
297 | pci_lookup_name(pacc, classbuf, sizeof(classbuf), | |
298 | PCI_LOOKUP_CLASS, | |
299 | p->device_class), | |
300 | pci_lookup_name(pacc, devbuf, sizeof(devbuf), | |
301 | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, | |
302 | p->vendor_id, p->device_id)); | |
fb570ee3 PR |
303 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
304 | printf(" (rev %02x)", p->rev_id); | |
c7a34993 MM |
305 | if (verbose) |
306 | { | |
307 | char *x; | |
fb570ee3 | 308 | c = (p->known_fields & PCI_FILL_CLASS_EXT) ? p->prog_if : 0; |
c7a34993 MM |
309 | x = pci_lookup_name(pacc, devbuf, sizeof(devbuf), |
310 | PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS, | |
311 | p->device_class, c); | |
312 | if (c || x) | |
313 | { | |
314 | printf(" (prog-if %02x", c); | |
315 | if (x) | |
316 | printf(" [%s]", x); | |
317 | putchar(')'); | |
318 | } | |
319 | } | |
320 | putchar('\n'); | |
c1c952d2 | 321 | |
c7a34993 MM |
322 | if (verbose || opt_kernel) |
323 | { | |
c7a34993 | 324 | char ssnamebuf[256]; |
c1c952d2 | 325 | |
2a39bc9e VP |
326 | pci_fill_info(p, PCI_FILL_LABEL); |
327 | ||
aecf5b35 TR |
328 | if (p->label) |
329 | printf("\tDeviceName: %s", p->label); | |
fb570ee3 PR |
330 | if ((p->known_fields & PCI_FILL_SUBSYS) && |
331 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
c7a34993 MM |
332 | printf("\tSubsystem: %s\n", |
333 | pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf), | |
334 | PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, | |
fb570ee3 | 335 | p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); |
c7a34993 | 336 | } |
c1c952d2 MM |
337 | } |
338 | ||
a387042e MM |
339 | /*** Verbose output ***/ |
340 | ||
341 | static void | |
41d883cb | 342 | show_size(u64 x) |
a387042e | 343 | { |
0188807c | 344 | static const char suffix[][2] = { "", "K", "M", "G", "T" }; |
f2f8adaa | 345 | unsigned i; |
a387042e MM |
346 | if (!x) |
347 | return; | |
f2f8adaa | 348 | for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) { |
558f736b | 349 | if (x % 1024) |
f2f8adaa MW |
350 | break; |
351 | x /= 1024; | |
352 | } | |
353 | printf(" [size=%u%s]", (unsigned)x, suffix[i]); | |
a387042e MM |
354 | } |
355 | ||
41d883cb | 356 | static void |
72cabfbb | 357 | show_range(const char *prefix, u64 base, u64 limit, int bits, int disabled) |
41d883cb | 358 | { |
e6b0b6e1 KS |
359 | printf("%s:", prefix); |
360 | if (base <= limit || verbose > 2) | |
3b26eaa8 | 361 | printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit); |
ccf68033 | 362 | if (!disabled && base <= limit) |
41d883cb MM |
363 | show_size(limit - base + 1); |
364 | else | |
e6b0b6e1 | 365 | printf(" [disabled]"); |
72cabfbb PR |
366 | if (bits) |
367 | printf(" [%d-bit]", bits); | |
41d883cb MM |
368 | putchar('\n'); |
369 | } | |
370 | ||
72cabfbb PR |
371 | static u32 |
372 | ioflg_to_pciflg(pciaddr_t ioflg) | |
373 | { | |
374 | u32 flg; | |
375 | ||
376 | if (ioflg & PCI_IORESOURCE_IO) | |
377 | flg = PCI_BASE_ADDRESS_SPACE_IO; | |
378 | else if (!(ioflg & PCI_IORESOURCE_MEM)) | |
379 | flg = 0; | |
380 | else | |
381 | { | |
382 | flg = PCI_BASE_ADDRESS_SPACE_MEMORY; | |
383 | if (ioflg & PCI_IORESOURCE_MEM_64) | |
384 | flg |= PCI_BASE_ADDRESS_MEM_TYPE_64; | |
385 | else | |
386 | flg |= PCI_BASE_ADDRESS_MEM_TYPE_32; | |
387 | if (ioflg & PCI_IORESOURCE_PREFETCH) | |
388 | flg |= PCI_BASE_ADDRESS_MEM_PREFETCH; | |
389 | } | |
390 | ||
391 | return flg; | |
392 | } | |
393 | ||
a387042e | 394 | static void |
72cabfbb | 395 | show_bases(struct device *d, int cnt, int without_config_data) |
a387042e MM |
396 | { |
397 | struct pci_dev *p = d->dev; | |
72cabfbb | 398 | word cmd = without_config_data ? (PCI_COMMAND_IO | PCI_COMMAND_MEMORY) : get_conf_word(d, PCI_COMMAND); |
a387042e MM |
399 | int i; |
400 | ||
de7ef8bc | 401 | for (i=0; i<cnt; i++) |
a387042e MM |
402 | { |
403 | pciaddr_t pos = p->base_addr[i]; | |
404 | pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0; | |
558f736b | 405 | pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0; |
7f96c3fe PR |
406 | u32 flg = (p->known_fields & PCI_FILL_IO_FLAGS) ? ioflg_to_pciflg(ioflg) : without_config_data ? 0 : get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); |
407 | u32 hw_lower = 0; | |
bf72d3e9 MM |
408 | u32 hw_upper = 0; |
409 | int broken = 0; | |
7f96c3fe | 410 | int virtual = 0; |
bf72d3e9 | 411 | |
a387042e MM |
412 | if (flg == 0xffffffff) |
413 | flg = 0; | |
414 | if (!pos && !flg && !len) | |
415 | continue; | |
bf72d3e9 | 416 | |
a387042e MM |
417 | if (verbose > 1) |
418 | printf("\tRegion %d: ", i); | |
419 | else | |
420 | putchar('\t'); | |
bf72d3e9 | 421 | |
7f96c3fe PR |
422 | /* Detect virtual regions, which are reported by the OS, but unassigned in the device */ |
423 | if ((p->known_fields & PCI_FILL_IO_FLAGS) && !without_config_data) | |
bf72d3e9 | 424 | { |
7f96c3fe PR |
425 | /* Read address as seen by the hardware */ |
426 | hw_lower = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); | |
427 | if ((hw_lower & PCI_BASE_ADDRESS_SPACE) == (ioflg_to_pciflg(ioflg) & PCI_BASE_ADDRESS_SPACE)) | |
bf72d3e9 | 428 | { |
7f96c3fe PR |
429 | if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM && |
430 | (hw_lower & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) | |
431 | { | |
432 | if (i >= cnt - 1) | |
433 | broken = 1; | |
434 | else | |
435 | hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i + 1); | |
bf72d3e9 | 436 | } |
7f96c3fe PR |
437 | if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) |
438 | virtual = 1; | |
bf72d3e9 MM |
439 | } |
440 | } | |
441 | ||
bf72d3e9 | 442 | /* Print base address */ |
a387042e MM |
443 | if (flg & PCI_BASE_ADDRESS_SPACE_IO) |
444 | { | |
445 | pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK; | |
446 | printf("I/O ports at "); | |
00bf6625 | 447 | if (a || (cmd & PCI_COMMAND_IO)) |
a387042e | 448 | printf(PCIADDR_PORT_FMT, a); |
bf72d3e9 | 449 | else if (hw_lower) |
a387042e MM |
450 | printf("<ignored>"); |
451 | else | |
452 | printf("<unassigned>"); | |
bf72d3e9 MM |
453 | if (virtual) |
454 | printf(" [virtual]"); | |
455 | else if (!(cmd & PCI_COMMAND_IO)) | |
a387042e MM |
456 | printf(" [disabled]"); |
457 | } | |
458 | else | |
459 | { | |
460 | int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK; | |
461 | pciaddr_t a = pos & PCI_ADDR_MEM_MASK; | |
a387042e MM |
462 | |
463 | printf("Memory at "); | |
bf72d3e9 MM |
464 | if (broken) |
465 | printf("<broken-64-bit-slot>"); | |
466 | else if (a) | |
467 | printf(PCIADDR_T_FMT, a); | |
468 | else if (hw_lower || hw_upper) | |
469 | printf("<ignored>"); | |
470 | else | |
471 | printf("<unassigned>"); | |
a387042e MM |
472 | printf(" (%s, %sprefetchable)", |
473 | (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" : | |
474 | (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" : | |
475 | (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3", | |
476 | (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-"); | |
bf72d3e9 MM |
477 | if (virtual) |
478 | printf(" [virtual]"); | |
479 | else if (!(cmd & PCI_COMMAND_MEMORY)) | |
a387042e MM |
480 | printf(" [disabled]"); |
481 | } | |
bf72d3e9 MM |
482 | |
483 | if (ioflg & PCI_IORESOURCE_PCI_EA_BEI) | |
484 | printf(" [enhanced]"); | |
485 | ||
a387042e MM |
486 | show_size(len); |
487 | putchar('\n'); | |
488 | } | |
489 | } | |
490 | ||
491 | static void | |
492 | show_rom(struct device *d, int reg) | |
493 | { | |
494 | struct pci_dev *p = d->dev; | |
495 | pciaddr_t rom = p->rom_base_addr; | |
496 | pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0; | |
558f736b | 497 | pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0; |
72cabfbb PR |
498 | u32 flg = reg >= 0 ? get_conf_long(d, reg) : ioflg_to_pciflg(ioflg); |
499 | word cmd = reg >= 0 ? get_conf_word(d, PCI_COMMAND) : PCI_COMMAND_MEMORY; | |
659d438b | 500 | int virtual = 0; |
a387042e MM |
501 | |
502 | if (!rom && !flg && !len) | |
503 | return; | |
cb94f26e | 504 | |
72cabfbb | 505 | if (reg >= 0 && (rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI)) |
a387042e | 506 | { |
a387042e | 507 | flg = rom; |
659d438b | 508 | virtual = 1; |
a387042e | 509 | } |
cb94f26e MM |
510 | |
511 | printf("\tExpansion ROM at "); | |
a387042e MM |
512 | if (rom & PCI_ROM_ADDRESS_MASK) |
513 | printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK); | |
514 | else if (flg & PCI_ROM_ADDRESS_MASK) | |
515 | printf("<ignored>"); | |
516 | else | |
517 | printf("<unassigned>"); | |
cb94f26e MM |
518 | |
519 | if (virtual) | |
520 | printf(" [virtual]"); | |
521 | ||
a387042e MM |
522 | if (!(flg & PCI_ROM_ADDRESS_ENABLE)) |
523 | printf(" [disabled]"); | |
659d438b | 524 | else if (!virtual && !(cmd & PCI_COMMAND_MEMORY)) |
a387042e | 525 | printf(" [disabled by cmd]"); |
cb94f26e MM |
526 | |
527 | if (ioflg & PCI_IORESOURCE_PCI_EA_BEI) | |
528 | printf(" [enhanced]"); | |
529 | ||
a387042e MM |
530 | show_size(len); |
531 | putchar('\n'); | |
532 | } | |
533 | ||
e95c8373 MM |
534 | static void |
535 | show_htype0(struct device *d) | |
536 | { | |
72cabfbb | 537 | show_bases(d, 6, 0); |
6aa54f1b | 538 | show_rom(d, PCI_ROM_ADDRESS); |
21510591 | 539 | show_caps(d, PCI_CAPABILITY_LIST); |
e95c8373 MM |
540 | } |
541 | ||
98e39e09 MM |
542 | static void |
543 | show_htype1(struct device *d) | |
544 | { | |
ccf68033 | 545 | struct pci_dev *p = d->dev; |
98e39e09 MM |
546 | u32 io_base = get_conf_byte(d, PCI_IO_BASE); |
547 | u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT); | |
548 | u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK; | |
549 | u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE); | |
550 | u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT); | |
551 | u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK; | |
552 | u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE); | |
553 | u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT); | |
554 | u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK; | |
138c0385 | 555 | word sec_stat = get_conf_word(d, PCI_SEC_STATUS); |
98e39e09 | 556 | word brc = get_conf_word(d, PCI_BRIDGE_CONTROL); |
ccf68033 PR |
557 | int io_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[0]; |
558 | int mem_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[1]; | |
559 | int pref_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[2]; | |
560 | int io_bits, pref_bits; | |
98e39e09 | 561 | |
72cabfbb | 562 | show_bases(d, 2, 0); |
98e39e09 MM |
563 | printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", |
564 | get_conf_byte(d, PCI_PRIMARY_BUS), | |
565 | get_conf_byte(d, PCI_SECONDARY_BUS), | |
566 | get_conf_byte(d, PCI_SUBORDINATE_BUS), | |
567 | get_conf_byte(d, PCI_SEC_LATENCY_TIMER)); | |
568 | ||
ccf68033 PR |
569 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !io_disabled) |
570 | { | |
571 | io_base = p->bridge_base_addr[0] & PCI_IO_RANGE_MASK; | |
572 | io_limit = io_base + p->bridge_size[0] - 1; | |
573 | io_type = p->bridge_base_addr[0] & PCI_IO_RANGE_TYPE_MASK; | |
574 | io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; | |
575 | show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); | |
576 | } | |
577 | else if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) || | |
98e39e09 MM |
578 | (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32)) |
579 | printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit); | |
580 | else | |
581 | { | |
582 | io_base = (io_base & PCI_IO_RANGE_MASK) << 8; | |
583 | io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8; | |
584 | if (io_type == PCI_IO_RANGE_TYPE_32) | |
585 | { | |
586 | io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16); | |
587 | io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16); | |
588 | } | |
ccf68033 PR |
589 | /* I/O is unsupported if both base and limit are zeros and resource is disabled */ |
590 | if (!(io_base == 0x0 && io_limit == 0x0 && io_disabled)) | |
591 | { | |
592 | io_limit += 0xfff; | |
593 | io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16; | |
594 | show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled); | |
595 | } | |
98e39e09 MM |
596 | } |
597 | ||
ccf68033 PR |
598 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !mem_disabled) |
599 | { | |
600 | mem_base = p->bridge_base_addr[1] & PCI_MEMORY_RANGE_MASK; | |
601 | mem_limit = mem_base + p->bridge_size[1] - 1; | |
602 | show_range("\tMemory behind bridge", mem_base, mem_limit, 32, mem_disabled); | |
603 | } | |
604 | else if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) || | |
98e39e09 MM |
605 | mem_type) |
606 | printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit); | |
e306e911 | 607 | else |
98e39e09 MM |
608 | { |
609 | mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16; | |
610 | mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16; | |
ccf68033 | 611 | show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 32, mem_disabled); |
98e39e09 MM |
612 | } |
613 | ||
ccf68033 PR |
614 | if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !pref_disabled) |
615 | { | |
616 | u64 pref_base_64 = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_MASK; | |
617 | u64 pref_limit_64 = pref_base_64 + p->bridge_size[2] - 1; | |
618 | pref_type = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_TYPE_MASK; | |
619 | pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; | |
620 | show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); | |
621 | } | |
622 | else if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) || | |
98e39e09 MM |
623 | (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64)) |
624 | printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit); | |
e306e911 | 625 | else |
98e39e09 | 626 | { |
41d883cb MM |
627 | u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16; |
628 | u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16; | |
629 | if (pref_type == PCI_PREF_RANGE_TYPE_64) | |
e306e911 | 630 | { |
41d883cb MM |
631 | pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32; |
632 | pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32; | |
e306e911 | 633 | } |
ccf68033 PR |
634 | /* Prefetchable memory is unsupported if both base and limit are zeros and resource is disabled */ |
635 | if (!(pref_base_64 == 0x0 && pref_limit_64 == 0x0 && pref_disabled)) | |
636 | { | |
637 | pref_limit_64 += 0xfffff; | |
638 | pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32; | |
639 | show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled); | |
640 | } | |
98e39e09 MM |
641 | } |
642 | ||
138c0385 | 643 | if (verbose > 1) |
c1c2c30e | 644 | printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n", |
138c0385 MM |
645 | FLAG(sec_stat, PCI_STATUS_66MHZ), |
646 | FLAG(sec_stat, PCI_STATUS_FAST_BACK), | |
647 | FLAG(sec_stat, PCI_STATUS_PARITY), | |
648 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : | |
649 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
650 | ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??", | |
651 | FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT), | |
652 | FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT), | |
653 | FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT), | |
654 | FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR), | |
655 | FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY)); | |
98e39e09 | 656 | |
6aa54f1b | 657 | show_rom(d, PCI_ROM_ADDRESS1); |
98e39e09 MM |
658 | |
659 | if (verbose > 1) | |
da322bfb | 660 | { |
b2a45526 | 661 | printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n", |
da322bfb MM |
662 | FLAG(brc, PCI_BRIDGE_CTL_PARITY), |
663 | FLAG(brc, PCI_BRIDGE_CTL_SERR), | |
664 | FLAG(brc, PCI_BRIDGE_CTL_NO_ISA), | |
665 | FLAG(brc, PCI_BRIDGE_CTL_VGA), | |
b2a45526 | 666 | FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT), |
da322bfb MM |
667 | FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT), |
668 | FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET), | |
669 | FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK)); | |
670 | printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n", | |
671 | FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER), | |
672 | FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER), | |
673 | FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS), | |
674 | FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN)); | |
675 | } | |
e95c8373 | 676 | |
21510591 | 677 | show_caps(d, PCI_CAPABILITY_LIST); |
98e39e09 MM |
678 | } |
679 | ||
2f48f637 MM |
680 | static void |
681 | show_htype2(struct device *d) | |
682 | { | |
96e4f295 MM |
683 | int i; |
684 | word cmd = get_conf_word(d, PCI_COMMAND); | |
685 | word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL); | |
84d437d6 | 686 | word exca; |
e306e911 | 687 | int verb = verbose > 2; |
96e4f295 | 688 | |
72cabfbb | 689 | show_bases(d, 1, 0); |
96e4f295 MM |
690 | printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n", |
691 | get_conf_byte(d, PCI_CB_PRIMARY_BUS), | |
692 | get_conf_byte(d, PCI_CB_CARD_BUS), | |
693 | get_conf_byte(d, PCI_CB_SUBORDINATE_BUS), | |
694 | get_conf_byte(d, PCI_CB_LATENCY_TIMER)); | |
de7ef8bc | 695 | for (i=0; i<2; i++) |
96e4f295 MM |
696 | { |
697 | int p = 8*i; | |
698 | u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p); | |
699 | u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p); | |
f288d32f BH |
700 | limit = limit + 0xfff; |
701 | if (base <= limit || verb) | |
81077814 | 702 | printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit, |
96e4f295 MM |
703 | (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]", |
704 | (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : ""); | |
705 | } | |
de7ef8bc | 706 | for (i=0; i<2; i++) |
96e4f295 MM |
707 | { |
708 | int p = 8*i; | |
709 | u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p); | |
710 | u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p); | |
711 | if (!(base & PCI_IO_RANGE_TYPE_32)) | |
712 | { | |
713 | base &= 0xffff; | |
714 | limit &= 0xffff; | |
715 | } | |
716 | base &= PCI_CB_IO_RANGE_MASK; | |
96e4f295 | 717 | limit = (limit & PCI_CB_IO_RANGE_MASK) + 3; |
e306e911 MM |
718 | if (base <= limit || verb) |
719 | printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit, | |
720 | (cmd & PCI_COMMAND_IO) ? "" : " [disabled]"); | |
96e4f295 MM |
721 | } |
722 | ||
723 | if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR) | |
724 | printf("\tSecondary status: SERR\n"); | |
725 | if (verbose > 1) | |
726 | printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n", | |
1c31d620 MM |
727 | FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY), |
728 | FLAG(brc, PCI_CB_BRIDGE_CTL_SERR), | |
729 | FLAG(brc, PCI_CB_BRIDGE_CTL_ISA), | |
730 | FLAG(brc, PCI_CB_BRIDGE_CTL_VGA), | |
731 | FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT), | |
732 | FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET), | |
733 | FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT), | |
734 | FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES)); | |
84d437d6 MM |
735 | |
736 | if (d->config_cached < 128) | |
737 | { | |
738 | printf("\t<access denied to the rest>\n"); | |
739 | return; | |
740 | } | |
741 | ||
742 | exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE); | |
96e4f295 MM |
743 | if (exca) |
744 | printf("\t16-bit legacy interface ports at %04x\n", exca); | |
21510591 | 745 | show_caps(d, PCI_CB_CAPABILITY_LIST); |
2f48f637 MM |
746 | } |
747 | ||
72cabfbb PR |
748 | static void |
749 | show_htype_unknown(struct device *d) | |
750 | { | |
751 | struct pci_dev *p = d->dev; | |
752 | u64 base, limit, flags; | |
753 | const char *str; | |
754 | int i, bits; | |
755 | ||
756 | if (pacc->buscentric) | |
757 | return; | |
758 | ||
759 | show_bases(d, 6, 1); | |
760 | for (i = 0; i < 4; i++) | |
761 | { | |
762 | if (!p->bridge_base_addr[i]) | |
763 | continue; | |
764 | base = p->bridge_base_addr[i]; | |
765 | limit = base + p->bridge_size[i] - 1; | |
766 | flags = p->bridge_flags[i]; | |
767 | if (flags & PCI_IORESOURCE_IO) | |
768 | { | |
769 | bits = (flags & PCI_IORESOURCE_IO_16BIT_ADDR) ? 16 : 32; | |
770 | str = "\tI/O behind bridge"; | |
771 | } | |
772 | else if (flags & PCI_IORESOURCE_MEM) | |
773 | { | |
774 | bits = (flags & PCI_IORESOURCE_MEM_64) ? 64 : 32; | |
775 | if (flags & PCI_IORESOURCE_PREFETCH) | |
776 | str = "\tPrefetchable memory behind bridge"; | |
777 | else | |
778 | str = "\tMemory behind bridge"; | |
779 | } | |
780 | else | |
781 | { | |
782 | bits = 0; | |
783 | str = "\tUnknown resource behind bridge"; | |
784 | } | |
785 | show_range(str, base, limit, bits, 0); | |
786 | } | |
787 | show_rom(d, -1); | |
788 | } | |
789 | ||
98e39e09 MM |
790 | static void |
791 | show_verbose(struct device *d) | |
792 | { | |
727ce158 | 793 | struct pci_dev *p = d->dev; |
72cabfbb | 794 | int unknown_config_data = 0; |
c2b144ef | 795 | word class = p->device_class; |
832b07a8 | 796 | byte htype = d->no_config_access ? -1 : (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f); |
72cabfbb | 797 | byte bist; |
98e39e09 | 798 | byte max_lat, min_gnt; |
a5065438 | 799 | char *dt_node, *iommu_group; |
98e39e09 MM |
800 | |
801 | show_terse(d); | |
802 | ||
ef6c9ec3 | 803 | pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | |
ccf68033 | 804 | PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP | |
fb570ee3 | 805 | PCI_FILL_BRIDGE_BASES | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS); |
ef6c9ec3 | 806 | |
98e39e09 MM |
807 | switch (htype) |
808 | { | |
2f48f637 MM |
809 | case PCI_HEADER_TYPE_NORMAL: |
810 | if (class == PCI_CLASS_BRIDGE_PCI) | |
56164f4f | 811 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 812 | bist = get_conf_byte(d, PCI_BIST); |
98e39e09 MM |
813 | max_lat = get_conf_byte(d, PCI_MAX_LAT); |
814 | min_gnt = get_conf_byte(d, PCI_MIN_GNT); | |
98e39e09 | 815 | break; |
2f48f637 | 816 | case PCI_HEADER_TYPE_BRIDGE: |
cce2caac | 817 | if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) |
56164f4f | 818 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 819 | bist = get_conf_byte(d, PCI_BIST); |
001b9ac6 | 820 | min_gnt = max_lat = 0; |
2f48f637 MM |
821 | break; |
822 | case PCI_HEADER_TYPE_CARDBUS: | |
823 | if ((class >> 8) != PCI_BASE_CLASS_BRIDGE) | |
56164f4f | 824 | printf("\t!!! Invalid class %04x for header type %02x\n", class, htype); |
72cabfbb | 825 | bist = get_conf_byte(d, PCI_BIST); |
96e4f295 | 826 | min_gnt = max_lat = 0; |
98e39e09 MM |
827 | break; |
828 | default: | |
832b07a8 | 829 | if (!d->no_config_access) |
98e39e09 | 830 | printf("\t!!! Unknown header type %02x\n", htype); |
72cabfbb PR |
831 | bist = 0; |
832 | min_gnt = max_lat = 0; | |
833 | unknown_config_data = 1; | |
98e39e09 MM |
834 | } |
835 | ||
2849a165 AC |
836 | if (p->phy_slot) |
837 | printf("\tPhysical Slot: %s\n", p->phy_slot); | |
838 | ||
c02d903c MM |
839 | if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE)) |
840 | printf("\tDevice tree node: %s\n", dt_node); | |
841 | ||
72cabfbb | 842 | if (!unknown_config_data && verbose > 1) |
98e39e09 | 843 | { |
72cabfbb PR |
844 | word cmd = get_conf_word(d, PCI_COMMAND); |
845 | word status = get_conf_word(d, PCI_STATUS); | |
da322bfb | 846 | printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n", |
1c31d620 MM |
847 | FLAG(cmd, PCI_COMMAND_IO), |
848 | FLAG(cmd, PCI_COMMAND_MEMORY), | |
849 | FLAG(cmd, PCI_COMMAND_MASTER), | |
850 | FLAG(cmd, PCI_COMMAND_SPECIAL), | |
851 | FLAG(cmd, PCI_COMMAND_INVALIDATE), | |
852 | FLAG(cmd, PCI_COMMAND_VGA_PALETTE), | |
853 | FLAG(cmd, PCI_COMMAND_PARITY), | |
854 | FLAG(cmd, PCI_COMMAND_WAIT), | |
855 | FLAG(cmd, PCI_COMMAND_SERR), | |
da322bfb MM |
856 | FLAG(cmd, PCI_COMMAND_FAST_BACK), |
857 | FLAG(cmd, PCI_COMMAND_DISABLE_INTx)); | |
858 | printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n", | |
1c31d620 MM |
859 | FLAG(status, PCI_STATUS_CAP_LIST), |
860 | FLAG(status, PCI_STATUS_66MHZ), | |
861 | FLAG(status, PCI_STATUS_UDF), | |
862 | FLAG(status, PCI_STATUS_FAST_BACK), | |
863 | FLAG(status, PCI_STATUS_PARITY), | |
98e39e09 MM |
864 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : |
865 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
866 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??", | |
1c31d620 MM |
867 | FLAG(status, PCI_STATUS_SIG_TARGET_ABORT), |
868 | FLAG(status, PCI_STATUS_REC_TARGET_ABORT), | |
869 | FLAG(status, PCI_STATUS_REC_MASTER_ABORT), | |
870 | FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR), | |
da322bfb MM |
871 | FLAG(status, PCI_STATUS_DETECTED_PARITY), |
872 | FLAG(status, PCI_STATUS_INTx)); | |
98e39e09 MM |
873 | if (cmd & PCI_COMMAND_MASTER) |
874 | { | |
72cabfbb PR |
875 | byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); |
876 | byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE); | |
56164f4f MM |
877 | printf("\tLatency: %d", latency); |
878 | if (min_gnt || max_lat) | |
879 | { | |
880 | printf(" ("); | |
881 | if (min_gnt) | |
882 | printf("%dns min", min_gnt*250); | |
883 | if (min_gnt && max_lat) | |
884 | printf(", "); | |
885 | if (max_lat) | |
886 | printf("%dns max", max_lat*250); | |
887 | putchar(')'); | |
888 | } | |
98e39e09 | 889 | if (cache_line) |
7a61b93c | 890 | printf(", Cache Line Size: %d bytes", cache_line * 4); |
98e39e09 MM |
891 | putchar('\n'); |
892 | } | |
72cabfbb PR |
893 | } |
894 | ||
895 | if (verbose > 1) | |
896 | { | |
897 | byte int_pin = unknown_config_data ? 0 : get_conf_byte(d, PCI_INTERRUPT_PIN); | |
898 | if (int_pin || p->irq) | |
9739916e | 899 | printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n", |
72cabfbb | 900 | (int_pin ? 'A' + int_pin - 1 : '?'), p->irq); |
1d9d1a01 MM |
901 | if (p->numa_node != -1) |
902 | printf("\tNUMA node: %d\n", p->numa_node); | |
a5065438 AXH |
903 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
904 | printf("\tIOMMU group: %s\n", iommu_group); | |
98e39e09 | 905 | } |
72cabfbb PR |
906 | |
907 | if (!unknown_config_data && verbose <= 1) | |
98e39e09 | 908 | { |
72cabfbb PR |
909 | word cmd = get_conf_word(d, PCI_COMMAND); |
910 | word status = get_conf_word(d, PCI_STATUS); | |
911 | byte latency = get_conf_byte(d, PCI_LATENCY_TIMER); | |
98e39e09 MM |
912 | printf("\tFlags: "); |
913 | if (cmd & PCI_COMMAND_MASTER) | |
914 | printf("bus master, "); | |
915 | if (cmd & PCI_COMMAND_VGA_PALETTE) | |
916 | printf("VGA palette snoop, "); | |
917 | if (cmd & PCI_COMMAND_WAIT) | |
918 | printf("stepping, "); | |
919 | if (cmd & PCI_COMMAND_FAST_BACK) | |
920 | printf("fast Back2Back, "); | |
921 | if (status & PCI_STATUS_66MHZ) | |
c1c2c30e | 922 | printf("66MHz, "); |
98e39e09 MM |
923 | if (status & PCI_STATUS_UDF) |
924 | printf("user-definable features, "); | |
925 | printf("%s devsel", | |
926 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" : | |
927 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" : | |
928 | ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??"); | |
929 | if (cmd & PCI_COMMAND_MASTER) | |
930 | printf(", latency %d", latency); | |
72cabfbb PR |
931 | if (p->irq) |
932 | printf(", IRQ " PCIIRQ_FMT, p->irq); | |
90ec4a6d MW |
933 | if (p->numa_node != -1) |
934 | printf(", NUMA node %d", p->numa_node); | |
a5065438 AXH |
935 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
936 | printf(", IOMMU group %s", iommu_group); | |
98e39e09 MM |
937 | putchar('\n'); |
938 | } | |
939 | ||
940 | if (bist & PCI_BIST_CAPABLE) | |
941 | { | |
942 | if (bist & PCI_BIST_START) | |
943 | printf("\tBIST is running\n"); | |
944 | else | |
945 | printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK); | |
946 | } | |
947 | ||
948 | switch (htype) | |
949 | { | |
2f48f637 | 950 | case PCI_HEADER_TYPE_NORMAL: |
98e39e09 MM |
951 | show_htype0(d); |
952 | break; | |
2f48f637 | 953 | case PCI_HEADER_TYPE_BRIDGE: |
98e39e09 MM |
954 | show_htype1(d); |
955 | break; | |
2f48f637 MM |
956 | case PCI_HEADER_TYPE_CARDBUS: |
957 | show_htype2(d); | |
958 | break; | |
72cabfbb PR |
959 | default: |
960 | show_htype_unknown(d); | |
98e39e09 MM |
961 | } |
962 | } | |
963 | ||
a387042e MM |
964 | /*** Machine-readable dumps ***/ |
965 | ||
98e39e09 MM |
966 | static void |
967 | show_hex_dump(struct device *d) | |
968 | { | |
09817437 | 969 | unsigned int i, cnt; |
98e39e09 | 970 | |
832b07a8 PR |
971 | if (d->no_config_access) |
972 | { | |
973 | printf("WARNING: Cannot show hex-dump of the config space\n"); | |
974 | return; | |
975 | } | |
976 | ||
84d437d6 | 977 | cnt = d->config_cached; |
a387042e | 978 | if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt)) |
09817437 MM |
979 | { |
980 | cnt = 256; | |
a387042e | 981 | if (opt_hex >= 4 && config_fetch(d, 256, 4096-256)) |
09817437 MM |
982 | cnt = 4096; |
983 | } | |
984 | ||
de7ef8bc | 985 | for (i=0; i<cnt; i++) |
98e39e09 MM |
986 | { |
987 | if (! (i & 15)) | |
988 | printf("%02x:", i); | |
989 | printf(" %02x", get_conf_byte(d, i)); | |
990 | if ((i & 15) == 15) | |
991 | putchar('\n'); | |
992 | } | |
993 | } | |
994 | ||
13081e57 MM |
995 | static void |
996 | print_shell_escaped(char *c) | |
997 | { | |
998 | printf(" \""); | |
999 | while (*c) | |
1000 | { | |
1001 | if (*c == '"' || *c == '\\') | |
1002 | putchar('\\'); | |
1003 | putchar(*c++); | |
1004 | } | |
1005 | putchar('"'); | |
1006 | } | |
1007 | ||
0a33d0ec MM |
1008 | static void |
1009 | show_machine(struct device *d) | |
1010 | { | |
727ce158 | 1011 | struct pci_dev *p = d->dev; |
727ce158 | 1012 | char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128]; |
a5065438 | 1013 | char *dt_node, *iommu_group; |
ce503b7f | 1014 | |
0a33d0ec MM |
1015 | if (verbose) |
1016 | { | |
a5065438 | 1017 | pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP); |
a387042e | 1018 | printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t"); |
84c8d1bb MM |
1019 | show_slot_name(d); |
1020 | putchar('\n'); | |
727ce158 | 1021 | printf("Class:\t%s\n", |
c2b144ef | 1022 | pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class)); |
727ce158 | 1023 | printf("Vendor:\t%s\n", |
224707ba | 1024 | pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); |
727ce158 | 1025 | printf("Device:\t%s\n", |
224707ba | 1026 | pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); |
fb570ee3 PR |
1027 | if ((p->known_fields & PCI_FILL_SUBSYS) && |
1028 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
ce503b7f | 1029 | { |
727ce158 | 1030 | printf("SVendor:\t%s\n", |
fb570ee3 | 1031 | pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); |
727ce158 | 1032 | printf("SDevice:\t%s\n", |
fb570ee3 | 1033 | pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); |
ce503b7f | 1034 | } |
2849a165 AC |
1035 | if (p->phy_slot) |
1036 | printf("PhySlot:\t%s\n", p->phy_slot); | |
fb570ee3 PR |
1037 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
1038 | printf("Rev:\t%02x\n", p->rev_id); | |
1039 | if (p->known_fields & PCI_FILL_CLASS_EXT) | |
1040 | printf("ProgIf:\t%02x\n", p->prog_if); | |
11339c0d MM |
1041 | if (opt_kernel) |
1042 | show_kernel_machine(d); | |
1d9d1a01 MM |
1043 | if (p->numa_node != -1) |
1044 | printf("NUMANode:\t%d\n", p->numa_node); | |
c02d903c MM |
1045 | if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE)) |
1046 | printf("DTNode:\t%s\n", dt_node); | |
a5065438 AXH |
1047 | if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP)) |
1048 | printf("IOMMUGroup:\t%s\n", iommu_group); | |
0a33d0ec MM |
1049 | } |
1050 | else | |
1051 | { | |
84c8d1bb | 1052 | show_slot_name(d); |
13081e57 MM |
1053 | print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class)); |
1054 | print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id)); | |
1055 | print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); | |
fb570ee3 PR |
1056 | if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) |
1057 | printf(" -r%02x", p->rev_id); | |
1058 | if (p->known_fields & PCI_FILL_CLASS_EXT) | |
1059 | printf(" -p%02x", p->prog_if); | |
1060 | if ((p->known_fields & PCI_FILL_SUBSYS) && | |
1061 | p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) | |
13081e57 | 1062 | { |
fb570ee3 PR |
1063 | print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->subsys_vendor_id)); |
1064 | print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); | |
13081e57 | 1065 | } |
ce503b7f MM |
1066 | else |
1067 | printf(" \"\" \"\""); | |
0a33d0ec MM |
1068 | putchar('\n'); |
1069 | } | |
1070 | } | |
1071 | ||
a387042e MM |
1072 | /*** Main show function ***/ |
1073 | ||
c7a34993 | 1074 | void |
1812a795 MM |
1075 | show_device(struct device *d) |
1076 | { | |
a387042e | 1077 | if (opt_machine) |
1812a795 | 1078 | show_machine(d); |
1812a795 | 1079 | else |
11339c0d MM |
1080 | { |
1081 | if (verbose) | |
1082 | show_verbose(d); | |
1083 | else | |
1084 | show_terse(d); | |
1085 | if (opt_kernel || verbose) | |
1086 | show_kernel(d); | |
1087 | } | |
a387042e | 1088 | if (opt_hex) |
1812a795 | 1089 | show_hex_dump(d); |
a387042e | 1090 | if (verbose || opt_hex) |
1812a795 MM |
1091 | putchar('\n'); |
1092 | } | |
1093 | ||
98e39e09 MM |
1094 | static void |
1095 | show(void) | |
1096 | { | |
1097 | struct device *d; | |
1098 | ||
de7ef8bc | 1099 | for (d=first_dev; d; d=d->next) |
ce22dfec MM |
1100 | if (pci_filter_match(&filter, d->dev)) |
1101 | show_device(d); | |
98e39e09 MM |
1102 | } |
1103 | ||
1104 | /* Main */ | |
1105 | ||
1106 | int | |
1107 | main(int argc, char **argv) | |
1108 | { | |
1109 | int i; | |
e4842ff3 | 1110 | char *msg; |
98e39e09 | 1111 | |
496d4021 MM |
1112 | if (argc == 2 && !strcmp(argv[1], "--version")) |
1113 | { | |
1114 | puts("lspci version " PCIUTILS_VERSION); | |
1115 | return 0; | |
1116 | } | |
727ce158 MM |
1117 | |
1118 | pacc = pci_alloc(); | |
1119 | pacc->error = die; | |
1120 | pci_filter_init(pacc, &filter); | |
1121 | ||
98e39e09 MM |
1122 | while ((i = getopt(argc, argv, options)) != -1) |
1123 | switch (i) | |
1124 | { | |
1125 | case 'n': | |
bc2eed2d | 1126 | pacc->numeric_ids++; |
98e39e09 MM |
1127 | break; |
1128 | case 'v': | |
1129 | verbose++; | |
1130 | break; | |
1131 | case 'b': | |
727ce158 | 1132 | pacc->buscentric = 1; |
98e39e09 | 1133 | break; |
e4842ff3 | 1134 | case 's': |
727ce158 | 1135 | if (msg = pci_filter_parse_slot(&filter, optarg)) |
b7fd8e19 | 1136 | die("-s: %s", msg); |
ce22dfec | 1137 | opt_filter = 1; |
98e39e09 | 1138 | break; |
e4842ff3 | 1139 | case 'd': |
727ce158 MM |
1140 | if (msg = pci_filter_parse_id(&filter, optarg)) |
1141 | die("-d: %s", msg); | |
ce22dfec | 1142 | opt_filter = 1; |
98e39e09 MM |
1143 | break; |
1144 | case 'x': | |
a387042e | 1145 | opt_hex++; |
98e39e09 | 1146 | break; |
62e78fa6 MM |
1147 | case 'P': |
1148 | opt_path++; | |
ce22dfec | 1149 | need_topology = 1; |
62e78fa6 | 1150 | break; |
6d0dc0fd | 1151 | case 't': |
a387042e | 1152 | opt_tree++; |
ce22dfec | 1153 | need_topology = 1; |
6d0dc0fd | 1154 | break; |
18928b91 | 1155 | case 'i': |
cc062b4a | 1156 | pci_set_name_list_path(pacc, optarg, 0); |
18928b91 | 1157 | break; |
0a33d0ec | 1158 | case 'm': |
a387042e | 1159 | opt_machine++; |
0a33d0ec | 1160 | break; |
c1c952d2 MM |
1161 | case 'p': |
1162 | opt_pcimap = optarg; | |
1163 | break; | |
1b99a704 | 1164 | #ifdef PCI_OS_LINUX |
11339c0d MM |
1165 | case 'k': |
1166 | opt_kernel++; | |
1167 | break; | |
1b99a704 | 1168 | #endif |
1812a795 | 1169 | case 'M': |
a387042e | 1170 | opt_map_mode++; |
1812a795 | 1171 | break; |
af61eb25 | 1172 | case 'D': |
a387042e | 1173 | opt_domains = 2; |
af61eb25 | 1174 | break; |
e022789d | 1175 | #ifdef PCI_USE_DNS |
cca2f7c6 MM |
1176 | case 'q': |
1177 | opt_query_dns++; | |
1178 | break; | |
1179 | case 'Q': | |
1180 | opt_query_all = 1; | |
1181 | break; | |
e022789d MM |
1182 | #else |
1183 | case 'q': | |
1184 | case 'Q': | |
1185 | die("DNS queries are not available in this version"); | |
1186 | #endif | |
98e39e09 | 1187 | default: |
727ce158 MM |
1188 | if (parse_generic_option(i, pacc, optarg)) |
1189 | break; | |
98e39e09 | 1190 | bad: |
727ce158 | 1191 | fprintf(stderr, help_msg, pacc->id_file_name); |
98e39e09 MM |
1192 | return 1; |
1193 | } | |
1194 | if (optind < argc) | |
1195 | goto bad; | |
1196 | ||
cca2f7c6 MM |
1197 | if (opt_query_dns) |
1198 | { | |
1199 | pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK; | |
1200 | if (opt_query_dns > 1) | |
1201 | pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE; | |
1202 | } | |
1203 | if (opt_query_all) | |
1204 | pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL; | |
1205 | ||
727ce158 | 1206 | pci_init(pacc); |
a387042e | 1207 | if (opt_map_mode) |
62e78fa6 | 1208 | { |
ce22dfec MM |
1209 | if (need_topology) |
1210 | die("Bus mapping mode does not recognize bus topology"); | |
62e78fa6 MM |
1211 | map_the_bus(); |
1212 | } | |
6d0dc0fd | 1213 | else |
1812a795 MM |
1214 | { |
1215 | scan_devices(); | |
1216 | sort_them(); | |
ce22dfec MM |
1217 | if (need_topology) |
1218 | grow_tree(); | |
a387042e | 1219 | if (opt_tree) |
888ddf0e | 1220 | show_forest(opt_filter ? &filter : NULL); |
1812a795 MM |
1221 | else |
1222 | show(); | |
1223 | } | |
17ec7e70 | 1224 | show_kernel_cleanup(); |
727ce158 | 1225 | pci_cleanup(pacc); |
98e39e09 | 1226 | |
934e7e36 | 1227 | return (seen_errors ? 2 : 0); |
98e39e09 | 1228 | } |