]>
Commit | Line | Data |
---|---|---|
dd84058d MY |
1 | menu "mpc85xx CPU" |
2 | depends on MPC85xx | |
3 | ||
4 | config SYS_CPU | |
dd84058d MY |
5 | default "mpc85xx" |
6 | ||
230ecd71 SG |
7 | config CMD_ERRATA |
8 | bool "Enable the 'errata' command" | |
9 | depends on MPC85xx | |
10 | default y | |
11 | help | |
12 | This enables the 'errata' command which displays a list of errata | |
13 | work-arounds which are enabled for the current board. | |
14 | ||
dd84058d MY |
15 | choice |
16 | prompt "Target select" | |
a26cd049 | 17 | optional |
dd84058d MY |
18 | |
19 | config TARGET_SBC8548 | |
20 | bool "Support sbc8548" | |
281ed4c7 | 21 | select ARCH_MPC8548 |
dd84058d MY |
22 | |
23 | config TARGET_SOCRATES | |
24 | bool "Support socrates" | |
25cb74b3 | 25 | select ARCH_MPC8544 |
dd84058d | 26 | |
45a8d117 YS |
27 | config TARGET_B4420QDS |
28 | bool "Support B4420QDS" | |
b41f192b | 29 | select ARCH_B4420 |
45a8d117 YS |
30 | select SUPPORT_SPL |
31 | select PHYS_64BIT | |
32 | ||
dd84058d MY |
33 | config TARGET_B4860QDS |
34 | bool "Support B4860QDS" | |
3006ebc3 | 35 | select ARCH_B4860 |
e5ec4815 | 36 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 37 | select SUPPORT_SPL |
bb6b142f | 38 | select PHYS_64BIT |
dd84058d MY |
39 | |
40 | config TARGET_BSC9131RDB | |
41 | bool "Support BSC9131RDB" | |
115d60c0 | 42 | select ARCH_BSC9131 |
02627356 | 43 | select SUPPORT_SPL |
a5d67547 | 44 | select BOARD_EARLY_INIT_F |
dd84058d MY |
45 | |
46 | config TARGET_BSC9132QDS | |
47 | bool "Support BSC9132QDS" | |
115d60c0 | 48 | select ARCH_BSC9132 |
e5ec4815 | 49 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 50 | select SUPPORT_SPL |
a5d67547 | 51 | select BOARD_EARLY_INIT_F |
dd84058d MY |
52 | |
53 | config TARGET_C29XPCIE | |
54 | bool "Support C29XPCIE" | |
4fd64746 | 55 | select ARCH_C29X |
e5ec4815 | 56 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 57 | select SUPPORT_SPL |
cf6bbe4c | 58 | select SUPPORT_TPL |
bb6b142f | 59 | select PHYS_64BIT |
dd84058d MY |
60 | |
61 | config TARGET_P3041DS | |
62 | bool "Support P3041DS" | |
bb6b142f | 63 | select PHYS_64BIT |
5e5fdd2d | 64 | select ARCH_P3041 |
e5ec4815 | 65 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
3bf926c0 | 66 | imply CMD_SATA |
dd84058d MY |
67 | |
68 | config TARGET_P4080DS | |
69 | bool "Support P4080DS" | |
bb6b142f | 70 | select PHYS_64BIT |
e71372cb | 71 | select ARCH_P4080 |
e5ec4815 | 72 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
3bf926c0 | 73 | imply CMD_SATA |
dd84058d MY |
74 | |
75 | config TARGET_P5020DS | |
76 | bool "Support P5020DS" | |
bb6b142f | 77 | select PHYS_64BIT |
cefe11cd | 78 | select ARCH_P5020 |
e5ec4815 | 79 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
3bf926c0 | 80 | imply CMD_SATA |
dd84058d MY |
81 | |
82 | config TARGET_P5040DS | |
83 | bool "Support P5040DS" | |
bb6b142f | 84 | select PHYS_64BIT |
95390360 | 85 | select ARCH_P5040 |
e5ec4815 | 86 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
3bf926c0 | 87 | imply CMD_SATA |
dd84058d MY |
88 | |
89 | config TARGET_MPC8536DS | |
90 | bool "Support MPC8536DS" | |
24ad75ae | 91 | select ARCH_MPC8536 |
d26e34c4 YS |
92 | # Use DDR3 controller with DDR2 DIMMs on this board |
93 | select SYS_FSL_DDRC_GEN3 | |
3bf926c0 | 94 | imply CMD_SATA |
dd84058d | 95 | |
dd84058d MY |
96 | config TARGET_MPC8541CDS |
97 | bool "Support MPC8541CDS" | |
3aff3082 | 98 | select ARCH_MPC8541 |
dd84058d MY |
99 | |
100 | config TARGET_MPC8544DS | |
101 | bool "Support MPC8544DS" | |
25cb74b3 | 102 | select ARCH_MPC8544 |
dd84058d MY |
103 | |
104 | config TARGET_MPC8548CDS | |
105 | bool "Support MPC8548CDS" | |
281ed4c7 | 106 | select ARCH_MPC8548 |
dd84058d MY |
107 | |
108 | config TARGET_MPC8555CDS | |
109 | bool "Support MPC8555CDS" | |
3c3d8ab5 | 110 | select ARCH_MPC8555 |
dd84058d | 111 | |
dd84058d MY |
112 | config TARGET_MPC8568MDS |
113 | bool "Support MPC8568MDS" | |
d07c3843 | 114 | select ARCH_MPC8568 |
dd84058d MY |
115 | |
116 | config TARGET_MPC8569MDS | |
117 | bool "Support MPC8569MDS" | |
23b36a7d | 118 | select ARCH_MPC8569 |
dd84058d MY |
119 | |
120 | config TARGET_MPC8572DS | |
121 | bool "Support MPC8572DS" | |
c8f48474 | 122 | select ARCH_MPC8572 |
d26e34c4 YS |
123 | # Use DDR3 controller with DDR2 DIMMs on this board |
124 | select SYS_FSL_DDRC_GEN3 | |
fedb428c | 125 | imply SCSI |
dd84058d | 126 | |
7601686c YS |
127 | config TARGET_P1010RDB_PA |
128 | bool "Support P1010RDB_PA" | |
129 | select ARCH_P1010 | |
e5ec4815 | 130 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
7601686c YS |
131 | select SUPPORT_SPL |
132 | select SUPPORT_TPL | |
a1dc980d | 133 | imply CMD_EEPROM |
3bf926c0 | 134 | imply CMD_SATA |
7601686c YS |
135 | |
136 | config TARGET_P1010RDB_PB | |
137 | bool "Support P1010RDB_PB" | |
7d5f9f84 | 138 | select ARCH_P1010 |
e5ec4815 | 139 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 140 | select SUPPORT_SPL |
cf6bbe4c | 141 | select SUPPORT_TPL |
a1dc980d | 142 | imply CMD_EEPROM |
3bf926c0 | 143 | imply CMD_SATA |
dd84058d MY |
144 | |
145 | config TARGET_P1022DS | |
146 | bool "Support P1022DS" | |
feb9e25b | 147 | select ARCH_P1022 |
02627356 | 148 | select SUPPORT_SPL |
cf6bbe4c | 149 | select SUPPORT_TPL |
3bf926c0 | 150 | imply CMD_SATA |
dd84058d MY |
151 | |
152 | config TARGET_P1023RDB | |
153 | bool "Support P1023RDB" | |
9bb1d6bc | 154 | select ARCH_P1023 |
a1dc980d | 155 | imply CMD_EEPROM |
dd84058d | 156 | |
fedae6eb YS |
157 | config TARGET_P1020MBG |
158 | bool "Support P1020MBG-PC" | |
159 | select SUPPORT_SPL | |
160 | select SUPPORT_TPL | |
484fff64 | 161 | select ARCH_P1020 |
a1dc980d | 162 | imply CMD_EEPROM |
3bf926c0 | 163 | imply CMD_SATA |
484fff64 | 164 | |
aa14620c YS |
165 | config TARGET_P1020RDB_PC |
166 | bool "Support P1020RDB-PC" | |
167 | select SUPPORT_SPL | |
168 | select SUPPORT_TPL | |
484fff64 | 169 | select ARCH_P1020 |
a1dc980d | 170 | imply CMD_EEPROM |
3bf926c0 | 171 | imply CMD_SATA |
aa14620c | 172 | |
f404b66c YS |
173 | config TARGET_P1020RDB_PD |
174 | bool "Support P1020RDB-PD" | |
175 | select SUPPORT_SPL | |
176 | select SUPPORT_TPL | |
484fff64 | 177 | select ARCH_P1020 |
a1dc980d | 178 | imply CMD_EEPROM |
3bf926c0 | 179 | imply CMD_SATA |
f404b66c | 180 | |
e9bc8a8f YS |
181 | config TARGET_P1020UTM |
182 | bool "Support P1020UTM" | |
183 | select SUPPORT_SPL | |
184 | select SUPPORT_TPL | |
484fff64 | 185 | select ARCH_P1020 |
a1dc980d | 186 | imply CMD_EEPROM |
3bf926c0 | 187 | imply CMD_SATA |
fedae6eb | 188 | |
da439db3 YS |
189 | config TARGET_P1021RDB |
190 | bool "Support P1021RDB" | |
191 | select SUPPORT_SPL | |
192 | select SUPPORT_TPL | |
a990799d | 193 | select ARCH_P1021 |
a1dc980d | 194 | imply CMD_EEPROM |
3bf926c0 | 195 | imply CMD_SATA |
da439db3 | 196 | |
4eedabfe YS |
197 | config TARGET_P1024RDB |
198 | bool "Support P1024RDB" | |
199 | select SUPPORT_SPL | |
200 | select SUPPORT_TPL | |
52b6f13d | 201 | select ARCH_P1024 |
a1dc980d | 202 | imply CMD_EEPROM |
3bf926c0 | 203 | imply CMD_SATA |
4eedabfe | 204 | |
b0c98b4b YS |
205 | config TARGET_P1025RDB |
206 | bool "Support P1025RDB" | |
207 | select SUPPORT_SPL | |
208 | select SUPPORT_TPL | |
4167a67d | 209 | select ARCH_P1025 |
a1dc980d | 210 | imply CMD_EEPROM |
3bf926c0 | 211 | imply CMD_SATA |
b0c98b4b | 212 | |
8435aa77 YS |
213 | config TARGET_P2020RDB |
214 | bool "Support P2020RDB-PC" | |
215 | select SUPPORT_SPL | |
216 | select SUPPORT_TPL | |
4593637b | 217 | select ARCH_P2020 |
a1dc980d | 218 | imply CMD_EEPROM |
3bf926c0 | 219 | imply CMD_SATA |
8435aa77 | 220 | |
dd84058d MY |
221 | config TARGET_P1_TWR |
222 | bool "Support p1_twr" | |
4167a67d | 223 | select ARCH_P1025 |
dd84058d | 224 | |
dd84058d MY |
225 | config TARGET_P2041RDB |
226 | bool "Support P2041RDB" | |
ce040c83 | 227 | select ARCH_P2041 |
e5ec4815 | 228 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 229 | select PHYS_64BIT |
3bf926c0 | 230 | imply CMD_SATA |
dd84058d MY |
231 | |
232 | config TARGET_QEMU_PPCE500 | |
233 | bool "Support qemu-ppce500" | |
10343403 | 234 | select ARCH_QEMU_E500 |
bb6b142f | 235 | select PHYS_64BIT |
dd84058d | 236 | |
6f53bd47 YS |
237 | config TARGET_T1024QDS |
238 | bool "Support T1024QDS" | |
e5d5f5a8 | 239 | select ARCH_T1024 |
e5ec4815 | 240 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
aba80048 | 241 | select SUPPORT_SPL |
bb6b142f | 242 | select PHYS_64BIT |
a1dc980d | 243 | imply CMD_EEPROM |
3bf926c0 | 244 | imply CMD_SATA |
aba80048 | 245 | |
08c75292 YS |
246 | config TARGET_T1023RDB |
247 | bool "Support T1023RDB" | |
5ff3f41d | 248 | select ARCH_T1023 |
e5ec4815 | 249 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
08c75292 YS |
250 | select SUPPORT_SPL |
251 | select PHYS_64BIT | |
a1dc980d | 252 | imply CMD_EEPROM |
08c75292 YS |
253 | |
254 | config TARGET_T1024RDB | |
255 | bool "Support T1024RDB" | |
e5d5f5a8 | 256 | select ARCH_T1024 |
e5ec4815 | 257 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
48c6f328 | 258 | select SUPPORT_SPL |
bb6b142f | 259 | select PHYS_64BIT |
a1dc980d | 260 | imply CMD_EEPROM |
48c6f328 | 261 | |
dd84058d MY |
262 | config TARGET_T1040QDS |
263 | bool "Support T1040QDS" | |
5d737010 | 264 | select ARCH_T1040 |
e5ec4815 | 265 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 266 | select PHYS_64BIT |
a1dc980d | 267 | imply CMD_EEPROM |
3bf926c0 | 268 | imply CMD_SATA |
dd84058d | 269 | |
95a809b9 YS |
270 | config TARGET_T1040RDB |
271 | bool "Support T1040RDB" | |
5d737010 | 272 | select ARCH_T1040 |
e5ec4815 | 273 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
95a809b9 YS |
274 | select SUPPORT_SPL |
275 | select PHYS_64BIT | |
3bf926c0 | 276 | imply CMD_SATA |
95a809b9 | 277 | |
a016735c YS |
278 | config TARGET_T1040D4RDB |
279 | bool "Support T1040D4RDB" | |
280 | select ARCH_T1040 | |
e5ec4815 | 281 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
a016735c YS |
282 | select SUPPORT_SPL |
283 | select PHYS_64BIT | |
3bf926c0 | 284 | imply CMD_SATA |
a016735c | 285 | |
95a809b9 YS |
286 | config TARGET_T1042RDB |
287 | bool "Support T1042RDB" | |
5449c98a | 288 | select ARCH_T1042 |
e5ec4815 | 289 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 290 | select SUPPORT_SPL |
bb6b142f | 291 | select PHYS_64BIT |
3bf926c0 | 292 | imply CMD_SATA |
dd84058d | 293 | |
319ed24a YS |
294 | config TARGET_T1042D4RDB |
295 | bool "Support T1042D4RDB" | |
296 | select ARCH_T1042 | |
e5ec4815 | 297 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
319ed24a YS |
298 | select SUPPORT_SPL |
299 | select PHYS_64BIT | |
3bf926c0 | 300 | imply CMD_SATA |
319ed24a | 301 | |
55ed8ae3 YS |
302 | config TARGET_T1042RDB_PI |
303 | bool "Support T1042RDB_PI" | |
304 | select ARCH_T1042 | |
e5ec4815 | 305 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
55ed8ae3 YS |
306 | select SUPPORT_SPL |
307 | select PHYS_64BIT | |
3bf926c0 | 308 | imply CMD_SATA |
55ed8ae3 | 309 | |
638d5be0 YS |
310 | config TARGET_T2080QDS |
311 | bool "Support T2080QDS" | |
0f3d80e9 | 312 | select ARCH_T2080 |
e5ec4815 | 313 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 314 | select SUPPORT_SPL |
bb6b142f | 315 | select PHYS_64BIT |
3bf926c0 | 316 | imply CMD_SATA |
dd84058d | 317 | |
01671e66 YS |
318 | config TARGET_T2080RDB |
319 | bool "Support T2080RDB" | |
0f3d80e9 | 320 | select ARCH_T2080 |
e5ec4815 | 321 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 322 | select SUPPORT_SPL |
bb6b142f | 323 | select PHYS_64BIT |
3bf926c0 | 324 | imply CMD_SATA |
dd84058d | 325 | |
638d5be0 YS |
326 | config TARGET_T2081QDS |
327 | bool "Support T2081QDS" | |
0f3d80e9 | 328 | select ARCH_T2081 |
638d5be0 YS |
329 | select SUPPORT_SPL |
330 | select PHYS_64BIT | |
331 | ||
9c21d06c YS |
332 | config TARGET_T4160QDS |
333 | bool "Support T4160QDS" | |
652a7bbd | 334 | select ARCH_T4160 |
e5ec4815 | 335 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
9c21d06c YS |
336 | select SUPPORT_SPL |
337 | select PHYS_64BIT | |
3bf926c0 | 338 | imply CMD_SATA |
9c21d06c | 339 | |
12ffdb3b YS |
340 | config TARGET_T4160RDB |
341 | bool "Support T4160RDB" | |
652a7bbd | 342 | select ARCH_T4160 |
12ffdb3b YS |
343 | select SUPPORT_SPL |
344 | select PHYS_64BIT | |
345 | ||
dd84058d MY |
346 | config TARGET_T4240QDS |
347 | bool "Support T4240QDS" | |
26bc57da | 348 | select ARCH_T4240 |
e5ec4815 | 349 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 350 | select SUPPORT_SPL |
bb6b142f | 351 | select PHYS_64BIT |
3bf926c0 | 352 | imply CMD_SATA |
dd84058d MY |
353 | |
354 | config TARGET_T4240RDB | |
355 | bool "Support T4240RDB" | |
26bc57da | 356 | select ARCH_T4240 |
373762c3 | 357 | select SUPPORT_SPL |
bb6b142f | 358 | select PHYS_64BIT |
3bf926c0 | 359 | imply CMD_SATA |
dd84058d MY |
360 | |
361 | config TARGET_CONTROLCENTERD | |
362 | bool "Support controlcenterd" | |
feb9e25b | 363 | select ARCH_P1022 |
dd84058d MY |
364 | |
365 | config TARGET_KMP204X | |
366 | bool "Support kmp204x" | |
ce040c83 | 367 | select ARCH_P2041 |
bb6b142f | 368 | select PHYS_64BIT |
97072747 | 369 | imply CMD_CRAMFS |
80e44cfe | 370 | imply FS_CRAMFS |
dd84058d | 371 | |
dd84058d MY |
372 | config TARGET_XPEDITE520X |
373 | bool "Support xpedite520x" | |
281ed4c7 | 374 | select ARCH_MPC8548 |
dd84058d MY |
375 | |
376 | config TARGET_XPEDITE537X | |
377 | bool "Support xpedite537x" | |
c8f48474 | 378 | select ARCH_MPC8572 |
d26e34c4 YS |
379 | # Use DDR3 controller with DDR2 DIMMs on this board |
380 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
381 | |
382 | config TARGET_XPEDITE550X | |
383 | bool "Support xpedite550x" | |
4593637b | 384 | select ARCH_P2020 |
dd84058d | 385 | |
8b0044ff OZ |
386 | config TARGET_UCP1020 |
387 | bool "Support uCP1020" | |
484fff64 | 388 | select ARCH_P1020 |
3bf926c0 | 389 | imply CMD_SATA |
8b0044ff | 390 | |
22a1b99a YS |
391 | config TARGET_CYRUS_P5020 |
392 | bool "Support Varisys Cyrus P5020" | |
393 | select ARCH_P5020 | |
394 | select PHYS_64BIT | |
395 | ||
396 | config TARGET_CYRUS_P5040 | |
397 | bool "Support Varisys Cyrus P5040" | |
398 | select ARCH_P5040 | |
bb6b142f | 399 | select PHYS_64BIT |
87e29878 | 400 | |
dd84058d MY |
401 | endchoice |
402 | ||
b41f192b YS |
403 | config ARCH_B4420 |
404 | bool | |
f8dee360 | 405 | select E500MC |
9ec10107 | 406 | select E6500 |
05cb79a7 | 407 | select FSL_LAW |
22120f11 | 408 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
409 | select SYS_FSL_ERRATUM_A004477 |
410 | select SYS_FSL_ERRATUM_A005871 | |
411 | select SYS_FSL_ERRATUM_A006379 | |
412 | select SYS_FSL_ERRATUM_A006384 | |
413 | select SYS_FSL_ERRATUM_A006475 | |
414 | select SYS_FSL_ERRATUM_A006593 | |
415 | select SYS_FSL_ERRATUM_A007075 | |
416 | select SYS_FSL_ERRATUM_A007186 | |
417 | select SYS_FSL_ERRATUM_A007212 | |
418 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 419 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 420 | select SYS_FSL_HAS_SEC |
7371774a | 421 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 422 | select SYS_FSL_SEC_BE |
2c2e2c9e | 423 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 424 | select SYS_PPC64 |
d98b98d6 | 425 | select FSL_IFC |
a1dc980d | 426 | imply CMD_EEPROM |
b41f192b | 427 | |
3006ebc3 YS |
428 | config ARCH_B4860 |
429 | bool | |
f8dee360 | 430 | select E500MC |
9ec10107 | 431 | select E6500 |
05cb79a7 | 432 | select FSL_LAW |
22120f11 | 433 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
434 | select SYS_FSL_ERRATUM_A004477 |
435 | select SYS_FSL_ERRATUM_A005871 | |
436 | select SYS_FSL_ERRATUM_A006379 | |
437 | select SYS_FSL_ERRATUM_A006384 | |
438 | select SYS_FSL_ERRATUM_A006475 | |
439 | select SYS_FSL_ERRATUM_A006593 | |
440 | select SYS_FSL_ERRATUM_A007075 | |
441 | select SYS_FSL_ERRATUM_A007186 | |
442 | select SYS_FSL_ERRATUM_A007212 | |
06ad970b | 443 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 444 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 445 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 446 | select SYS_FSL_HAS_SEC |
7371774a | 447 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 448 | select SYS_FSL_SEC_BE |
2c2e2c9e | 449 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 450 | select SYS_PPC64 |
d98b98d6 | 451 | select FSL_IFC |
a1dc980d | 452 | imply CMD_EEPROM |
3006ebc3 | 453 | |
115d60c0 YS |
454 | config ARCH_BSC9131 |
455 | bool | |
05cb79a7 | 456 | select FSL_LAW |
22120f11 | 457 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
458 | select SYS_FSL_ERRATUM_A004477 |
459 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a | 460 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 461 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 462 | select SYS_FSL_HAS_SEC |
90b80386 | 463 | select SYS_FSL_SEC_BE |
2c2e2c9e | 464 | select SYS_FSL_SEC_COMPAT_4 |
d98b98d6 | 465 | select FSL_IFC |
a1dc980d | 466 | imply CMD_EEPROM |
115d60c0 YS |
467 | |
468 | config ARCH_BSC9132 | |
469 | bool | |
05cb79a7 | 470 | select FSL_LAW |
22120f11 | 471 | select SYS_FSL_DDR_VER_46 |
63659ff3 YS |
472 | select SYS_FSL_ERRATUM_A004477 |
473 | select SYS_FSL_ERRATUM_A005125 | |
474 | select SYS_FSL_ERRATUM_A005434 | |
c01e4a1a | 475 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
476 | select SYS_FSL_ERRATUM_I2C_A004447 |
477 | select SYS_FSL_ERRATUM_IFC_A002769 | |
d26e34c4 | 478 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 479 | select SYS_FSL_HAS_SEC |
90b80386 | 480 | select SYS_FSL_SEC_BE |
2c2e2c9e | 481 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 482 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 483 | select FSL_IFC |
a1dc980d | 484 | imply CMD_EEPROM |
115d60c0 | 485 | |
4fd64746 YS |
486 | config ARCH_C29X |
487 | bool | |
05cb79a7 | 488 | select FSL_LAW |
22120f11 | 489 | select SYS_FSL_DDR_VER_46 |
63659ff3 | 490 | select SYS_FSL_ERRATUM_A005125 |
c01e4a1a | 491 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 492 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 493 | select SYS_FSL_HAS_SEC |
90b80386 | 494 | select SYS_FSL_SEC_BE |
2c2e2c9e | 495 | select SYS_FSL_SEC_COMPAT_6 |
53c95384 | 496 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 497 | select FSL_IFC |
4fd64746 | 498 | |
24ad75ae YS |
499 | config ARCH_MPC8536 |
500 | bool | |
05cb79a7 | 501 | select FSL_LAW |
63659ff3 YS |
502 | select SYS_FSL_ERRATUM_A004508 |
503 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 YS |
504 | select SYS_FSL_HAS_DDR2 |
505 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 506 | select SYS_FSL_HAS_SEC |
90b80386 | 507 | select SYS_FSL_SEC_BE |
2c2e2c9e | 508 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 509 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 510 | select FSL_ELBC |
3bf926c0 | 511 | imply CMD_SATA |
24ad75ae | 512 | |
7f825218 YS |
513 | config ARCH_MPC8540 |
514 | bool | |
05cb79a7 | 515 | select FSL_LAW |
d26e34c4 | 516 | select SYS_FSL_HAS_DDR1 |
7f825218 | 517 | |
3aff3082 YS |
518 | config ARCH_MPC8541 |
519 | bool | |
05cb79a7 | 520 | select FSL_LAW |
d26e34c4 | 521 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 522 | select SYS_FSL_HAS_SEC |
90b80386 | 523 | select SYS_FSL_SEC_BE |
2c2e2c9e | 524 | select SYS_FSL_SEC_COMPAT_2 |
3aff3082 | 525 | |
25cb74b3 YS |
526 | config ARCH_MPC8544 |
527 | bool | |
05cb79a7 | 528 | select FSL_LAW |
63659ff3 | 529 | select SYS_FSL_ERRATUM_A005125 |
d26e34c4 | 530 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 531 | select SYS_FSL_HAS_SEC |
90b80386 | 532 | select SYS_FSL_SEC_BE |
2c2e2c9e | 533 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 534 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 535 | select FSL_ELBC |
25cb74b3 | 536 | |
281ed4c7 YS |
537 | config ARCH_MPC8548 |
538 | bool | |
05cb79a7 | 539 | select FSL_LAW |
63659ff3 YS |
540 | select SYS_FSL_ERRATUM_A005125 |
541 | select SYS_FSL_ERRATUM_NMG_DDR120 | |
542 | select SYS_FSL_ERRATUM_NMG_LBC103 | |
543 | select SYS_FSL_ERRATUM_NMG_ETSEC129 | |
544 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 YS |
545 | select SYS_FSL_HAS_DDR2 |
546 | select SYS_FSL_HAS_DDR1 | |
2c2e2c9e | 547 | select SYS_FSL_HAS_SEC |
90b80386 | 548 | select SYS_FSL_SEC_BE |
2c2e2c9e | 549 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 550 | select SYS_PPC_E500_USE_DEBUG_TLB |
281ed4c7 | 551 | |
3c3d8ab5 YS |
552 | config ARCH_MPC8555 |
553 | bool | |
05cb79a7 | 554 | select FSL_LAW |
d26e34c4 | 555 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 556 | select SYS_FSL_HAS_SEC |
90b80386 | 557 | select SYS_FSL_SEC_BE |
2c2e2c9e | 558 | select SYS_FSL_SEC_COMPAT_2 |
3c3d8ab5 | 559 | |
99d0a312 YS |
560 | config ARCH_MPC8560 |
561 | bool | |
05cb79a7 | 562 | select FSL_LAW |
d26e34c4 | 563 | select SYS_FSL_HAS_DDR1 |
99d0a312 | 564 | |
d07c3843 YS |
565 | config ARCH_MPC8568 |
566 | bool | |
05cb79a7 | 567 | select FSL_LAW |
d26e34c4 | 568 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 569 | select SYS_FSL_HAS_SEC |
90b80386 | 570 | select SYS_FSL_SEC_BE |
2c2e2c9e | 571 | select SYS_FSL_SEC_COMPAT_2 |
d07c3843 | 572 | |
23b36a7d YS |
573 | config ARCH_MPC8569 |
574 | bool | |
05cb79a7 | 575 | select FSL_LAW |
63659ff3 YS |
576 | select SYS_FSL_ERRATUM_A004508 |
577 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 | 578 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 579 | select SYS_FSL_HAS_SEC |
90b80386 | 580 | select SYS_FSL_SEC_BE |
2c2e2c9e | 581 | select SYS_FSL_SEC_COMPAT_2 |
06878977 | 582 | select FSL_ELBC |
23b36a7d | 583 | |
c8f48474 YS |
584 | config ARCH_MPC8572 |
585 | bool | |
05cb79a7 | 586 | select FSL_LAW |
63659ff3 YS |
587 | select SYS_FSL_ERRATUM_A004508 |
588 | select SYS_FSL_ERRATUM_A005125 | |
589 | select SYS_FSL_ERRATUM_DDR_115 | |
590 | select SYS_FSL_ERRATUM_DDR111_DDR134 | |
d26e34c4 YS |
591 | select SYS_FSL_HAS_DDR2 |
592 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 593 | select SYS_FSL_HAS_SEC |
90b80386 | 594 | select SYS_FSL_SEC_BE |
2c2e2c9e | 595 | select SYS_FSL_SEC_COMPAT_2 |
d26e34c4 | 596 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 597 | select FSL_ELBC |
c8f48474 | 598 | |
7d5f9f84 YS |
599 | config ARCH_P1010 |
600 | bool | |
05cb79a7 | 601 | select FSL_LAW |
63659ff3 YS |
602 | select SYS_FSL_ERRATUM_A004477 |
603 | select SYS_FSL_ERRATUM_A004508 | |
604 | select SYS_FSL_ERRATUM_A005125 | |
605 | select SYS_FSL_ERRATUM_A006261 | |
606 | select SYS_FSL_ERRATUM_A007075 | |
c01e4a1a | 607 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
608 | select SYS_FSL_ERRATUM_I2C_A004447 |
609 | select SYS_FSL_ERRATUM_IFC_A002769 | |
610 | select SYS_FSL_ERRATUM_P1010_A003549 | |
611 | select SYS_FSL_ERRATUM_SEC_A003571 | |
612 | select SYS_FSL_ERRATUM_IFC_A003399 | |
d26e34c4 | 613 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 614 | select SYS_FSL_HAS_SEC |
90b80386 | 615 | select SYS_FSL_SEC_BE |
2c2e2c9e | 616 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 617 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 618 | select FSL_IFC |
a1dc980d | 619 | imply CMD_EEPROM |
3bf926c0 | 620 | imply CMD_SATA |
7d5f9f84 | 621 | |
1cdd96f3 YS |
622 | config ARCH_P1011 |
623 | bool | |
05cb79a7 | 624 | select FSL_LAW |
63659ff3 YS |
625 | select SYS_FSL_ERRATUM_A004508 |
626 | select SYS_FSL_ERRATUM_A005125 | |
627 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 628 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 629 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 630 | select SYS_FSL_HAS_SEC |
90b80386 | 631 | select SYS_FSL_SEC_BE |
2c2e2c9e | 632 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 633 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 634 | select FSL_ELBC |
1cdd96f3 | 635 | |
484fff64 YS |
636 | config ARCH_P1020 |
637 | bool | |
05cb79a7 | 638 | select FSL_LAW |
63659ff3 YS |
639 | select SYS_FSL_ERRATUM_A004508 |
640 | select SYS_FSL_ERRATUM_A005125 | |
641 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 642 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 643 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 644 | select SYS_FSL_HAS_SEC |
90b80386 | 645 | select SYS_FSL_SEC_BE |
2c2e2c9e | 646 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 647 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 648 | select FSL_ELBC |
3bf926c0 | 649 | imply CMD_SATA |
484fff64 | 650 | |
a990799d YS |
651 | config ARCH_P1021 |
652 | bool | |
05cb79a7 | 653 | select FSL_LAW |
63659ff3 YS |
654 | select SYS_FSL_ERRATUM_A004508 |
655 | select SYS_FSL_ERRATUM_A005125 | |
656 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 657 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 658 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 659 | select SYS_FSL_HAS_SEC |
90b80386 | 660 | select SYS_FSL_SEC_BE |
2c2e2c9e | 661 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 662 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 663 | select FSL_ELBC |
3bf926c0 | 664 | imply CMD_SATA |
a990799d | 665 | |
feb9e25b YS |
666 | config ARCH_P1022 |
667 | bool | |
05cb79a7 | 668 | select FSL_LAW |
63659ff3 YS |
669 | select SYS_FSL_ERRATUM_A004477 |
670 | select SYS_FSL_ERRATUM_A004508 | |
671 | select SYS_FSL_ERRATUM_A005125 | |
672 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 673 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 674 | select SYS_FSL_ERRATUM_SATA_A001 |
d26e34c4 | 675 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 676 | select SYS_FSL_HAS_SEC |
90b80386 | 677 | select SYS_FSL_SEC_BE |
2c2e2c9e | 678 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 679 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 680 | select FSL_ELBC |
feb9e25b | 681 | |
9bb1d6bc YS |
682 | config ARCH_P1023 |
683 | bool | |
05cb79a7 | 684 | select FSL_LAW |
63659ff3 YS |
685 | select SYS_FSL_ERRATUM_A004508 |
686 | select SYS_FSL_ERRATUM_A005125 | |
687 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 | 688 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 689 | select SYS_FSL_HAS_SEC |
90b80386 | 690 | select SYS_FSL_SEC_BE |
2c2e2c9e | 691 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 692 | select FSL_ELBC |
9bb1d6bc | 693 | |
52b6f13d YS |
694 | config ARCH_P1024 |
695 | bool | |
05cb79a7 | 696 | select FSL_LAW |
63659ff3 YS |
697 | select SYS_FSL_ERRATUM_A004508 |
698 | select SYS_FSL_ERRATUM_A005125 | |
699 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 700 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 701 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 702 | select SYS_FSL_HAS_SEC |
90b80386 | 703 | select SYS_FSL_SEC_BE |
2c2e2c9e | 704 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 705 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 706 | select FSL_ELBC |
a1dc980d | 707 | imply CMD_EEPROM |
3bf926c0 | 708 | imply CMD_SATA |
52b6f13d | 709 | |
4167a67d YS |
710 | config ARCH_P1025 |
711 | bool | |
05cb79a7 | 712 | select FSL_LAW |
63659ff3 YS |
713 | select SYS_FSL_ERRATUM_A004508 |
714 | select SYS_FSL_ERRATUM_A005125 | |
715 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 716 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 717 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 718 | select SYS_FSL_HAS_SEC |
90b80386 | 719 | select SYS_FSL_SEC_BE |
2c2e2c9e | 720 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 721 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 722 | select FSL_ELBC |
3bf926c0 | 723 | imply CMD_SATA |
4167a67d | 724 | |
4593637b YS |
725 | config ARCH_P2020 |
726 | bool | |
05cb79a7 | 727 | select FSL_LAW |
63659ff3 YS |
728 | select SYS_FSL_ERRATUM_A004477 |
729 | select SYS_FSL_ERRATUM_A004508 | |
730 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a YS |
731 | select SYS_FSL_ERRATUM_ESDHC111 |
732 | select SYS_FSL_ERRATUM_ESDHC_A001 | |
d26e34c4 | 733 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 734 | select SYS_FSL_HAS_SEC |
90b80386 | 735 | select SYS_FSL_SEC_BE |
2c2e2c9e | 736 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 737 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 738 | select FSL_ELBC |
a1dc980d | 739 | imply CMD_EEPROM |
4593637b | 740 | |
ce040c83 YS |
741 | config ARCH_P2041 |
742 | bool | |
f8dee360 | 743 | select E500MC |
05cb79a7 | 744 | select FSL_LAW |
63659ff3 YS |
745 | select SYS_FSL_ERRATUM_A004510 |
746 | select SYS_FSL_ERRATUM_A004849 | |
747 | select SYS_FSL_ERRATUM_A006261 | |
748 | select SYS_FSL_ERRATUM_CPU_A003999 | |
749 | select SYS_FSL_ERRATUM_DDR_A003 | |
750 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 751 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
752 | select SYS_FSL_ERRATUM_I2C_A004447 |
753 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
754 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
755 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 756 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 757 | select SYS_FSL_HAS_SEC |
7371774a | 758 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 759 | select SYS_FSL_SEC_BE |
2c2e2c9e | 760 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 761 | select FSL_ELBC |
ce040c83 | 762 | |
5e5fdd2d YS |
763 | config ARCH_P3041 |
764 | bool | |
f8dee360 | 765 | select E500MC |
05cb79a7 | 766 | select FSL_LAW |
22120f11 | 767 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
768 | select SYS_FSL_ERRATUM_A004510 |
769 | select SYS_FSL_ERRATUM_A004849 | |
770 | select SYS_FSL_ERRATUM_A005812 | |
771 | select SYS_FSL_ERRATUM_A006261 | |
772 | select SYS_FSL_ERRATUM_CPU_A003999 | |
773 | select SYS_FSL_ERRATUM_DDR_A003 | |
774 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 775 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
776 | select SYS_FSL_ERRATUM_I2C_A004447 |
777 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
778 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
779 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 780 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 781 | select SYS_FSL_HAS_SEC |
7371774a | 782 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 783 | select SYS_FSL_SEC_BE |
2c2e2c9e | 784 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 785 | select FSL_ELBC |
3bf926c0 | 786 | imply CMD_SATA |
5e5fdd2d | 787 | |
e71372cb YS |
788 | config ARCH_P4080 |
789 | bool | |
f8dee360 | 790 | select E500MC |
05cb79a7 | 791 | select FSL_LAW |
22120f11 | 792 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
793 | select SYS_FSL_ERRATUM_A004510 |
794 | select SYS_FSL_ERRATUM_A004580 | |
795 | select SYS_FSL_ERRATUM_A004849 | |
796 | select SYS_FSL_ERRATUM_A005812 | |
797 | select SYS_FSL_ERRATUM_A007075 | |
798 | select SYS_FSL_ERRATUM_CPC_A002 | |
799 | select SYS_FSL_ERRATUM_CPC_A003 | |
800 | select SYS_FSL_ERRATUM_CPU_A003999 | |
801 | select SYS_FSL_ERRATUM_DDR_A003 | |
802 | select SYS_FSL_ERRATUM_DDR_A003474 | |
803 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a YS |
804 | select SYS_FSL_ERRATUM_ESDHC111 |
805 | select SYS_FSL_ERRATUM_ESDHC13 | |
806 | select SYS_FSL_ERRATUM_ESDHC135 | |
63659ff3 YS |
807 | select SYS_FSL_ERRATUM_I2C_A004447 |
808 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
809 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
810 | select SYS_P4080_ERRATUM_CPU22 | |
811 | select SYS_P4080_ERRATUM_PCIE_A003 | |
812 | select SYS_P4080_ERRATUM_SERDES8 | |
813 | select SYS_P4080_ERRATUM_SERDES9 | |
814 | select SYS_P4080_ERRATUM_SERDES_A001 | |
815 | select SYS_P4080_ERRATUM_SERDES_A005 | |
d26e34c4 | 816 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 817 | select SYS_FSL_HAS_SEC |
7371774a | 818 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 819 | select SYS_FSL_SEC_BE |
2c2e2c9e | 820 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 821 | select FSL_ELBC |
3bf926c0 | 822 | imply CMD_SATA |
e71372cb | 823 | |
cefe11cd YS |
824 | config ARCH_P5020 |
825 | bool | |
f8dee360 | 826 | select E500MC |
05cb79a7 | 827 | select FSL_LAW |
22120f11 | 828 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
829 | select SYS_FSL_ERRATUM_A004510 |
830 | select SYS_FSL_ERRATUM_A006261 | |
831 | select SYS_FSL_ERRATUM_DDR_A003 | |
832 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 833 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
834 | select SYS_FSL_ERRATUM_I2C_A004447 |
835 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
836 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 837 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 838 | select SYS_FSL_HAS_SEC |
7371774a | 839 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 840 | select SYS_FSL_SEC_BE |
2c2e2c9e | 841 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 842 | select SYS_PPC64 |
06878977 | 843 | select FSL_ELBC |
3bf926c0 | 844 | imply CMD_SATA |
cefe11cd | 845 | |
95390360 YS |
846 | config ARCH_P5040 |
847 | bool | |
f8dee360 | 848 | select E500MC |
05cb79a7 | 849 | select FSL_LAW |
22120f11 | 850 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
851 | select SYS_FSL_ERRATUM_A004510 |
852 | select SYS_FSL_ERRATUM_A004699 | |
853 | select SYS_FSL_ERRATUM_A005812 | |
854 | select SYS_FSL_ERRATUM_A006261 | |
855 | select SYS_FSL_ERRATUM_DDR_A003 | |
856 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 857 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 858 | select SYS_FSL_ERRATUM_USB14 |
d26e34c4 | 859 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 860 | select SYS_FSL_HAS_SEC |
7371774a | 861 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 862 | select SYS_FSL_SEC_BE |
2c2e2c9e | 863 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 864 | select SYS_PPC64 |
06878977 | 865 | select FSL_ELBC |
3bf926c0 | 866 | imply CMD_SATA |
95390360 | 867 | |
10343403 YS |
868 | config ARCH_QEMU_E500 |
869 | bool | |
870 | ||
5ff3f41d YS |
871 | config ARCH_T1023 |
872 | bool | |
f8dee360 | 873 | select E500MC |
05cb79a7 | 874 | select FSL_LAW |
22120f11 | 875 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
876 | select SYS_FSL_ERRATUM_A008378 |
877 | select SYS_FSL_ERRATUM_A009663 | |
878 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 879 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
880 | select SYS_FSL_HAS_DDR3 |
881 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 882 | select SYS_FSL_HAS_SEC |
7371774a | 883 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 884 | select SYS_FSL_SEC_BE |
2c2e2c9e | 885 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 886 | select FSL_IFC |
a1dc980d | 887 | imply CMD_EEPROM |
5ff3f41d | 888 | |
e5d5f5a8 YS |
889 | config ARCH_T1024 |
890 | bool | |
f8dee360 | 891 | select E500MC |
05cb79a7 | 892 | select FSL_LAW |
22120f11 | 893 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
894 | select SYS_FSL_ERRATUM_A008378 |
895 | select SYS_FSL_ERRATUM_A009663 | |
896 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 897 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
898 | select SYS_FSL_HAS_DDR3 |
899 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 900 | select SYS_FSL_HAS_SEC |
7371774a | 901 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 902 | select SYS_FSL_SEC_BE |
2c2e2c9e | 903 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 904 | select FSL_IFC |
a1dc980d | 905 | imply CMD_EEPROM |
e5d5f5a8 | 906 | |
5d737010 YS |
907 | config ARCH_T1040 |
908 | bool | |
f8dee360 | 909 | select E500MC |
05cb79a7 | 910 | select FSL_LAW |
22120f11 | 911 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
912 | select SYS_FSL_ERRATUM_A008044 |
913 | select SYS_FSL_ERRATUM_A008378 | |
914 | select SYS_FSL_ERRATUM_A009663 | |
915 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 916 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
917 | select SYS_FSL_HAS_DDR3 |
918 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 919 | select SYS_FSL_HAS_SEC |
7371774a | 920 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 921 | select SYS_FSL_SEC_BE |
2c2e2c9e | 922 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 923 | select FSL_IFC |
3bf926c0 | 924 | imply CMD_SATA |
5d737010 | 925 | |
5449c98a YS |
926 | config ARCH_T1042 |
927 | bool | |
f8dee360 | 928 | select E500MC |
05cb79a7 | 929 | select FSL_LAW |
22120f11 | 930 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
931 | select SYS_FSL_ERRATUM_A008044 |
932 | select SYS_FSL_ERRATUM_A008378 | |
933 | select SYS_FSL_ERRATUM_A009663 | |
934 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 935 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
936 | select SYS_FSL_HAS_DDR3 |
937 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 938 | select SYS_FSL_HAS_SEC |
7371774a | 939 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 940 | select SYS_FSL_SEC_BE |
2c2e2c9e | 941 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 942 | select FSL_IFC |
3bf926c0 | 943 | imply CMD_SATA |
5449c98a | 944 | |
0f3d80e9 YS |
945 | config ARCH_T2080 |
946 | bool | |
f8dee360 | 947 | select E500MC |
9ec10107 | 948 | select E6500 |
05cb79a7 | 949 | select FSL_LAW |
22120f11 | 950 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
951 | select SYS_FSL_ERRATUM_A006379 |
952 | select SYS_FSL_ERRATUM_A006593 | |
953 | select SYS_FSL_ERRATUM_A007186 | |
954 | select SYS_FSL_ERRATUM_A007212 | |
09bfd962 | 955 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 956 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 957 | select SYS_FSL_ERRATUM_A009942 |
c01e4a1a | 958 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 959 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 960 | select SYS_FSL_HAS_SEC |
7371774a | 961 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 962 | select SYS_FSL_SEC_BE |
2c2e2c9e | 963 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 964 | select SYS_PPC64 |
d98b98d6 | 965 | select FSL_IFC |
3bf926c0 | 966 | imply CMD_SATA |
0f3d80e9 YS |
967 | |
968 | config ARCH_T2081 | |
969 | bool | |
f8dee360 | 970 | select E500MC |
9ec10107 | 971 | select E6500 |
05cb79a7 | 972 | select FSL_LAW |
22120f11 | 973 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
974 | select SYS_FSL_ERRATUM_A006379 |
975 | select SYS_FSL_ERRATUM_A006593 | |
976 | select SYS_FSL_ERRATUM_A007186 | |
977 | select SYS_FSL_ERRATUM_A007212 | |
978 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 979 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 980 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 981 | select SYS_FSL_HAS_SEC |
7371774a | 982 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 983 | select SYS_FSL_SEC_BE |
2c2e2c9e | 984 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 985 | select SYS_PPC64 |
d98b98d6 | 986 | select FSL_IFC |
0f3d80e9 | 987 | |
652a7bbd YS |
988 | config ARCH_T4160 |
989 | bool | |
f8dee360 | 990 | select E500MC |
9ec10107 | 991 | select E6500 |
05cb79a7 | 992 | select FSL_LAW |
22120f11 | 993 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
994 | select SYS_FSL_ERRATUM_A004468 |
995 | select SYS_FSL_ERRATUM_A005871 | |
996 | select SYS_FSL_ERRATUM_A006379 | |
997 | select SYS_FSL_ERRATUM_A006593 | |
998 | select SYS_FSL_ERRATUM_A007186 | |
999 | select SYS_FSL_ERRATUM_A007798 | |
1000 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 1001 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 1002 | select SYS_FSL_HAS_SEC |
7371774a | 1003 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 1004 | select SYS_FSL_SEC_BE |
2c2e2c9e | 1005 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 1006 | select SYS_PPC64 |
d98b98d6 | 1007 | select FSL_IFC |
3bf926c0 | 1008 | imply CMD_SATA |
652a7bbd | 1009 | |
26bc57da YS |
1010 | config ARCH_T4240 |
1011 | bool | |
f8dee360 | 1012 | select E500MC |
9ec10107 | 1013 | select E6500 |
05cb79a7 | 1014 | select FSL_LAW |
22120f11 | 1015 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
1016 | select SYS_FSL_ERRATUM_A004468 |
1017 | select SYS_FSL_ERRATUM_A005871 | |
1018 | select SYS_FSL_ERRATUM_A006261 | |
1019 | select SYS_FSL_ERRATUM_A006379 | |
1020 | select SYS_FSL_ERRATUM_A006593 | |
1021 | select SYS_FSL_ERRATUM_A007186 | |
1022 | select SYS_FSL_ERRATUM_A007798 | |
09bfd962 | 1023 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 1024 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 1025 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 1026 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 1027 | select SYS_FSL_HAS_SEC |
7371774a | 1028 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 1029 | select SYS_FSL_SEC_BE |
2c2e2c9e | 1030 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 1031 | select SYS_PPC64 |
d98b98d6 | 1032 | select FSL_IFC |
3bf926c0 | 1033 | imply CMD_SATA |
05cb79a7 | 1034 | |
f8dee360 YS |
1035 | config BOOKE |
1036 | bool | |
1037 | default y | |
1038 | ||
1039 | config E500 | |
1040 | bool | |
1041 | default y | |
1042 | help | |
1043 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc | |
1044 | ||
1045 | config E500MC | |
1046 | bool | |
1047 | help | |
1048 | Enble PowerPC E500MC core | |
1049 | ||
9ec10107 YS |
1050 | config E6500 |
1051 | bool | |
1052 | help | |
1053 | Enable PowerPC E6500 core | |
1054 | ||
05cb79a7 YS |
1055 | config FSL_LAW |
1056 | bool | |
1057 | help | |
1058 | Use Freescale common code for Local Access Window | |
26bc57da | 1059 | |
c6e6bda3 YS |
1060 | config SECURE_BOOT |
1061 | bool "Secure Boot" | |
1062 | help | |
1063 | Enable Freescale Secure Boot feature. Normally selected | |
1064 | by defconfig. If unsure, do not change. | |
1065 | ||
3f82b56d YS |
1066 | config MAX_CPUS |
1067 | int "Maximum number of CPUs permitted for MPC85xx" | |
1068 | default 12 if ARCH_T4240 | |
1069 | default 8 if ARCH_P4080 || \ | |
1070 | ARCH_T4160 | |
1071 | default 4 if ARCH_B4860 || \ | |
1072 | ARCH_P2041 || \ | |
1073 | ARCH_P3041 || \ | |
1074 | ARCH_P5040 || \ | |
1075 | ARCH_T1040 || \ | |
1076 | ARCH_T1042 || \ | |
1077 | ARCH_T2080 || \ | |
1078 | ARCH_T2081 | |
1079 | default 2 if ARCH_B4420 || \ | |
1080 | ARCH_BSC9132 || \ | |
1081 | ARCH_MPC8572 || \ | |
1082 | ARCH_P1020 || \ | |
1083 | ARCH_P1021 || \ | |
1084 | ARCH_P1022 || \ | |
1085 | ARCH_P1023 || \ | |
1086 | ARCH_P1024 || \ | |
1087 | ARCH_P1025 || \ | |
1088 | ARCH_P2020 || \ | |
1089 | ARCH_P5020 || \ | |
3f82b56d YS |
1090 | ARCH_T1023 || \ |
1091 | ARCH_T1024 | |
1092 | default 1 | |
1093 | help | |
1094 | Set this number to the maximum number of possible CPUs in the SoC. | |
1095 | SoCs may have multiple clusters with each cluster may have multiple | |
1096 | ports. If some ports are reserved but higher ports are used for | |
1097 | cores, count the reserved ports. This will allocate enough memory | |
1098 | in spin table to properly handle all cores. | |
1099 | ||
830fc1bf YS |
1100 | config SYS_CCSRBAR_DEFAULT |
1101 | hex "Default CCSRBAR address" | |
1102 | default 0xff700000 if ARCH_BSC9131 || \ | |
1103 | ARCH_BSC9132 || \ | |
1104 | ARCH_C29X || \ | |
1105 | ARCH_MPC8536 || \ | |
1106 | ARCH_MPC8540 || \ | |
1107 | ARCH_MPC8541 || \ | |
1108 | ARCH_MPC8544 || \ | |
1109 | ARCH_MPC8548 || \ | |
1110 | ARCH_MPC8555 || \ | |
1111 | ARCH_MPC8560 || \ | |
1112 | ARCH_MPC8568 || \ | |
1113 | ARCH_MPC8569 || \ | |
1114 | ARCH_MPC8572 || \ | |
1115 | ARCH_P1010 || \ | |
1116 | ARCH_P1011 || \ | |
1117 | ARCH_P1020 || \ | |
1118 | ARCH_P1021 || \ | |
1119 | ARCH_P1022 || \ | |
1120 | ARCH_P1024 || \ | |
1121 | ARCH_P1025 || \ | |
1122 | ARCH_P2020 | |
1123 | default 0xff600000 if ARCH_P1023 | |
1124 | default 0xfe000000 if ARCH_B4420 || \ | |
1125 | ARCH_B4860 || \ | |
1126 | ARCH_P2041 || \ | |
1127 | ARCH_P3041 || \ | |
1128 | ARCH_P4080 || \ | |
1129 | ARCH_P5020 || \ | |
1130 | ARCH_P5040 || \ | |
830fc1bf YS |
1131 | ARCH_T1023 || \ |
1132 | ARCH_T1024 || \ | |
1133 | ARCH_T1040 || \ | |
1134 | ARCH_T1042 || \ | |
1135 | ARCH_T2080 || \ | |
1136 | ARCH_T2081 || \ | |
1137 | ARCH_T4160 || \ | |
1138 | ARCH_T4240 | |
1139 | default 0xe0000000 if ARCH_QEMU_E500 | |
1140 | help | |
1141 | Default value of CCSRBAR comes from power-on-reset. It | |
1142 | is fixed on each SoC. Some SoCs can have different value | |
1143 | if changed by pre-boot regime. The value here must match | |
1144 | the current value in SoC. If not sure, do not change. | |
1145 | ||
63659ff3 YS |
1146 | config SYS_FSL_ERRATUM_A004468 |
1147 | bool | |
1148 | ||
1149 | config SYS_FSL_ERRATUM_A004477 | |
1150 | bool | |
1151 | ||
1152 | config SYS_FSL_ERRATUM_A004508 | |
1153 | bool | |
1154 | ||
1155 | config SYS_FSL_ERRATUM_A004580 | |
1156 | bool | |
1157 | ||
1158 | config SYS_FSL_ERRATUM_A004699 | |
1159 | bool | |
1160 | ||
1161 | config SYS_FSL_ERRATUM_A004849 | |
1162 | bool | |
1163 | ||
1164 | config SYS_FSL_ERRATUM_A004510 | |
1165 | bool | |
1166 | ||
1167 | config SYS_FSL_ERRATUM_A004510_SVR_REV | |
1168 | hex | |
1169 | depends on SYS_FSL_ERRATUM_A004510 | |
1170 | default 0x20 if ARCH_P4080 | |
1171 | default 0x10 | |
1172 | ||
1173 | config SYS_FSL_ERRATUM_A004510_SVR_REV2 | |
1174 | hex | |
1175 | depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) | |
1176 | default 0x11 | |
1177 | ||
1178 | config SYS_FSL_ERRATUM_A005125 | |
1179 | bool | |
1180 | ||
1181 | config SYS_FSL_ERRATUM_A005434 | |
1182 | bool | |
1183 | ||
1184 | config SYS_FSL_ERRATUM_A005812 | |
1185 | bool | |
1186 | ||
1187 | config SYS_FSL_ERRATUM_A005871 | |
1188 | bool | |
1189 | ||
1190 | config SYS_FSL_ERRATUM_A006261 | |
1191 | bool | |
1192 | ||
1193 | config SYS_FSL_ERRATUM_A006379 | |
1194 | bool | |
1195 | ||
1196 | config SYS_FSL_ERRATUM_A006384 | |
1197 | bool | |
1198 | ||
1199 | config SYS_FSL_ERRATUM_A006475 | |
1200 | bool | |
1201 | ||
1202 | config SYS_FSL_ERRATUM_A006593 | |
1203 | bool | |
1204 | ||
1205 | config SYS_FSL_ERRATUM_A007075 | |
1206 | bool | |
1207 | ||
1208 | config SYS_FSL_ERRATUM_A007186 | |
1209 | bool | |
1210 | ||
1211 | config SYS_FSL_ERRATUM_A007212 | |
1212 | bool | |
1213 | ||
09bfd962 TB |
1214 | config SYS_FSL_ERRATUM_A007815 |
1215 | bool | |
1216 | ||
63659ff3 YS |
1217 | config SYS_FSL_ERRATUM_A007798 |
1218 | bool | |
1219 | ||
06ad970b DD |
1220 | config SYS_FSL_ERRATUM_A007907 |
1221 | bool | |
1222 | ||
63659ff3 YS |
1223 | config SYS_FSL_ERRATUM_A008044 |
1224 | bool | |
1225 | ||
1226 | config SYS_FSL_ERRATUM_CPC_A002 | |
1227 | bool | |
1228 | ||
1229 | config SYS_FSL_ERRATUM_CPC_A003 | |
1230 | bool | |
1231 | ||
1232 | config SYS_FSL_ERRATUM_CPU_A003999 | |
1233 | bool | |
1234 | ||
1235 | config SYS_FSL_ERRATUM_ELBC_A001 | |
1236 | bool | |
1237 | ||
1238 | config SYS_FSL_ERRATUM_I2C_A004447 | |
1239 | bool | |
1240 | ||
1241 | config SYS_FSL_A004447_SVR_REV | |
1242 | hex | |
1243 | depends on SYS_FSL_ERRATUM_I2C_A004447 | |
1244 | default 0x00 if ARCH_MPC8548 | |
1245 | default 0x10 if ARCH_P1010 | |
1246 | default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 | |
1247 | default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 | |
1248 | ||
1249 | config SYS_FSL_ERRATUM_IFC_A002769 | |
1250 | bool | |
1251 | ||
1252 | config SYS_FSL_ERRATUM_IFC_A003399 | |
1253 | bool | |
1254 | ||
1255 | config SYS_FSL_ERRATUM_NMG_CPU_A011 | |
1256 | bool | |
1257 | ||
1258 | config SYS_FSL_ERRATUM_NMG_ETSEC129 | |
1259 | bool | |
1260 | ||
1261 | config SYS_FSL_ERRATUM_NMG_LBC103 | |
1262 | bool | |
1263 | ||
1264 | config SYS_FSL_ERRATUM_P1010_A003549 | |
1265 | bool | |
1266 | ||
1267 | config SYS_FSL_ERRATUM_SATA_A001 | |
1268 | bool | |
1269 | ||
1270 | config SYS_FSL_ERRATUM_SEC_A003571 | |
1271 | bool | |
1272 | ||
1273 | config SYS_FSL_ERRATUM_SRIO_A004034 | |
1274 | bool | |
1275 | ||
1276 | config SYS_FSL_ERRATUM_USB14 | |
1277 | bool | |
1278 | ||
1279 | config SYS_P4080_ERRATUM_CPU22 | |
1280 | bool | |
1281 | ||
1282 | config SYS_P4080_ERRATUM_PCIE_A003 | |
1283 | bool | |
1284 | ||
1285 | config SYS_P4080_ERRATUM_SERDES8 | |
1286 | bool | |
1287 | ||
1288 | config SYS_P4080_ERRATUM_SERDES9 | |
1289 | bool | |
1290 | ||
1291 | config SYS_P4080_ERRATUM_SERDES_A001 | |
1292 | bool | |
1293 | ||
1294 | config SYS_P4080_ERRATUM_SERDES_A005 | |
1295 | bool | |
1296 | ||
7371774a YS |
1297 | config SYS_FSL_QORIQ_CHASSIS1 |
1298 | bool | |
1299 | ||
1300 | config SYS_FSL_QORIQ_CHASSIS2 | |
1301 | bool | |
1302 | ||
8303acbc YS |
1303 | config SYS_FSL_NUM_LAWS |
1304 | int "Number of local access windows" | |
1305 | depends on FSL_LAW | |
1306 | default 32 if ARCH_B4420 || \ | |
1307 | ARCH_B4860 || \ | |
1308 | ARCH_P2041 || \ | |
1309 | ARCH_P3041 || \ | |
1310 | ARCH_P4080 || \ | |
1311 | ARCH_P5020 || \ | |
1312 | ARCH_P5040 || \ | |
1313 | ARCH_T2080 || \ | |
1314 | ARCH_T2081 || \ | |
1315 | ARCH_T4160 || \ | |
1316 | ARCH_T4240 | |
08a37fd1 | 1317 | default 16 if ARCH_T1023 || \ |
8303acbc YS |
1318 | ARCH_T1024 || \ |
1319 | ARCH_T1040 || \ | |
1320 | ARCH_T1042 | |
1321 | default 12 if ARCH_BSC9131 || \ | |
1322 | ARCH_BSC9132 || \ | |
1323 | ARCH_C29X || \ | |
1324 | ARCH_MPC8536 || \ | |
1325 | ARCH_MPC8572 || \ | |
1326 | ARCH_P1010 || \ | |
1327 | ARCH_P1011 || \ | |
1328 | ARCH_P1020 || \ | |
1329 | ARCH_P1021 || \ | |
1330 | ARCH_P1022 || \ | |
1331 | ARCH_P1023 || \ | |
1332 | ARCH_P1024 || \ | |
1333 | ARCH_P1025 || \ | |
1334 | ARCH_P2020 | |
1335 | default 10 if ARCH_MPC8544 || \ | |
1336 | ARCH_MPC8548 || \ | |
1337 | ARCH_MPC8568 || \ | |
1338 | ARCH_MPC8569 | |
1339 | default 8 if ARCH_MPC8540 || \ | |
1340 | ARCH_MPC8541 || \ | |
1341 | ARCH_MPC8555 || \ | |
1342 | ARCH_MPC8560 | |
1343 | help | |
1344 | Number of local access windows. This is fixed per SoC. | |
1345 | If not sure, do not change. | |
1346 | ||
9ec10107 YS |
1347 | config SYS_FSL_THREADS_PER_CORE |
1348 | int | |
1349 | default 2 if E6500 | |
1350 | default 1 | |
1351 | ||
26e79b65 YS |
1352 | config SYS_NUM_TLBCAMS |
1353 | int "Number of TLB CAM entries" | |
1354 | default 64 if E500MC | |
1355 | default 16 | |
1356 | help | |
1357 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, | |
1358 | 16 for other E500 SoCs. | |
1359 | ||
4851278e YS |
1360 | config SYS_PPC64 |
1361 | bool | |
1362 | ||
53c95384 YS |
1363 | config SYS_PPC_E500_USE_DEBUG_TLB |
1364 | bool | |
1365 | ||
d98b98d6 PK |
1366 | config FSL_IFC |
1367 | bool | |
1368 | ||
06878977 PK |
1369 | config FSL_ELBC |
1370 | bool | |
1371 | ||
53c95384 YS |
1372 | config SYS_PPC_E500_DEBUG_TLB |
1373 | int "Temporary TLB entry for external debugger" | |
1374 | depends on SYS_PPC_E500_USE_DEBUG_TLB | |
1375 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 | |
1376 | default 1 if ARCH_MPC8536 | |
1377 | default 2 if ARCH_MPC8572 || \ | |
1378 | ARCH_P1011 || \ | |
1379 | ARCH_P1020 || \ | |
1380 | ARCH_P1021 || \ | |
1381 | ARCH_P1022 || \ | |
1382 | ARCH_P1024 || \ | |
1383 | ARCH_P1025 || \ | |
1384 | ARCH_P2020 | |
1385 | default 3 if ARCH_P1010 || \ | |
1386 | ARCH_BSC9132 || \ | |
1387 | ARCH_C29X | |
1388 | help | |
1389 | Select a temporary TLB entry to be used during boot to work | |
1390 | around limitations in e500v1 and e500v2 external debugger | |
1391 | support. This reduces the portions of the boot code where | |
1392 | breakpoints and single stepping do not work. The value of this | |
1393 | symbol should be set to the TLB1 entry to be used for this | |
1394 | purpose. If unsure, do not change. | |
1395 | ||
1c40707e PK |
1396 | config SYS_FSL_IFC_CLK_DIV |
1397 | int "Divider of platform clock" | |
1398 | depends on FSL_IFC | |
1399 | default 2 if ARCH_B4420 || \ | |
1400 | ARCH_B4860 || \ | |
1401 | ARCH_T1024 || \ | |
1402 | ARCH_T1023 || \ | |
1403 | ARCH_T1040 || \ | |
1404 | ARCH_T1042 || \ | |
1405 | ARCH_T4160 || \ | |
1406 | ARCH_T4240 | |
1407 | default 1 | |
1408 | help | |
1409 | Defines divider of platform clock(clock input to | |
1410 | IFC controller). | |
1411 | ||
add63f94 PK |
1412 | config SYS_FSL_LBC_CLK_DIV |
1413 | int "Divider of platform clock" | |
1414 | depends on FSL_ELBC || ARCH_MPC8540 || \ | |
1415 | ARCH_MPC8548 || ARCH_MPC8541 || \ | |
1416 | ARCH_MPC8555 || ARCH_MPC8560 || \ | |
1417 | ARCH_MPC8568 | |
1418 | ||
1419 | default 2 if ARCH_P2041 || \ | |
1420 | ARCH_P3041 || \ | |
1421 | ARCH_P4080 || \ | |
1422 | ARCH_P5020 || \ | |
1423 | ARCH_P5040 | |
1424 | default 1 | |
1425 | ||
1426 | help | |
1427 | Defines divider of platform clock(clock input to | |
1428 | eLBC controller). | |
1429 | ||
dd84058d MY |
1430 | source "board/freescale/b4860qds/Kconfig" |
1431 | source "board/freescale/bsc9131rdb/Kconfig" | |
1432 | source "board/freescale/bsc9132qds/Kconfig" | |
1433 | source "board/freescale/c29xpcie/Kconfig" | |
1434 | source "board/freescale/corenet_ds/Kconfig" | |
1435 | source "board/freescale/mpc8536ds/Kconfig" | |
dd84058d MY |
1436 | source "board/freescale/mpc8541cds/Kconfig" |
1437 | source "board/freescale/mpc8544ds/Kconfig" | |
1438 | source "board/freescale/mpc8548cds/Kconfig" | |
1439 | source "board/freescale/mpc8555cds/Kconfig" | |
dd84058d MY |
1440 | source "board/freescale/mpc8568mds/Kconfig" |
1441 | source "board/freescale/mpc8569mds/Kconfig" | |
1442 | source "board/freescale/mpc8572ds/Kconfig" | |
1443 | source "board/freescale/p1010rdb/Kconfig" | |
1444 | source "board/freescale/p1022ds/Kconfig" | |
1445 | source "board/freescale/p1023rdb/Kconfig" | |
dd84058d MY |
1446 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
1447 | source "board/freescale/p1_twr/Kconfig" | |
dd84058d MY |
1448 | source "board/freescale/p2041rdb/Kconfig" |
1449 | source "board/freescale/qemu-ppce500/Kconfig" | |
aba80048 | 1450 | source "board/freescale/t102xqds/Kconfig" |
48c6f328 | 1451 | source "board/freescale/t102xrdb/Kconfig" |
dd84058d MY |
1452 | source "board/freescale/t1040qds/Kconfig" |
1453 | source "board/freescale/t104xrdb/Kconfig" | |
1454 | source "board/freescale/t208xqds/Kconfig" | |
1455 | source "board/freescale/t208xrdb/Kconfig" | |
1456 | source "board/freescale/t4qds/Kconfig" | |
1457 | source "board/freescale/t4rdb/Kconfig" | |
1458 | source "board/gdsys/p1022/Kconfig" | |
1459 | source "board/keymile/kmp204x/Kconfig" | |
1460 | source "board/sbc8548/Kconfig" | |
1461 | source "board/socrates/Kconfig" | |
87e29878 | 1462 | source "board/varisys/cyrus/Kconfig" |
dd84058d MY |
1463 | source "board/xes/xpedite520x/Kconfig" |
1464 | source "board/xes/xpedite537x/Kconfig" | |
1465 | source "board/xes/xpedite550x/Kconfig" | |
8b0044ff | 1466 | source "board/Arcturus/ucp1020/Kconfig" |
dd84058d MY |
1467 | |
1468 | endmenu |