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3863585b WD |
1 | /* |
2 | * (C) Copyright 2000, 2001 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
3863585b WD |
6 | */ |
7 | ||
d4f5c728 | 8 | /* |
9 | * Support for read and write access to EEPROM like memory devices. This | |
10 | * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM). | |
11 | * FRAM devices read and write data at bus speed. In particular, there is no | |
e506a006 | 12 | * write delay. Also, there is no limit imposed on the number of bytes that can |
d4f5c728 | 13 | * be transferred with a single read or write. |
6617aae9 | 14 | * |
d4f5c728 | 15 | * Use the following configuration options to ensure no unneeded performance |
16 | * degradation (typical for EEPROM) is incured for FRAM memory: | |
6617aae9 | 17 | * |
6d0f6bcf JCPV |
18 | * #define CONFIG_SYS_I2C_FRAM |
19 | * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS | |
d4f5c728 | 20 | * |
21 | */ | |
22 | ||
3863585b WD |
23 | #include <common.h> |
24 | #include <config.h> | |
25 | #include <command.h> | |
26 | #include <i2c.h> | |
27 | ||
4f296d09 MV |
28 | #ifndef CONFIG_SYS_I2C_SPEED |
29 | #define CONFIG_SYS_I2C_SPEED 50000 | |
98f4a3df | 30 | #endif |
3863585b | 31 | |
4f296d09 | 32 | /* |
6d0f6bcf | 33 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is |
3863585b WD |
34 | * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM. |
35 | * | |
6d0f6bcf | 36 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is |
3863585b WD |
37 | * 0x00000nxx for EEPROM address selectors and page number at n. |
38 | */ | |
548738b4 | 39 | #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
4f296d09 MV |
40 | #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \ |
41 | (CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \ | |
42 | (CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2) | |
6d0f6bcf | 43 | #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2 |
3863585b WD |
44 | #endif |
45 | #endif | |
46 | ||
52cd47c9 MV |
47 | __weak int eeprom_write_enable(unsigned dev_addr, int state) |
48 | { | |
49 | return 0; | |
50 | } | |
4f296d09 MV |
51 | |
52 | void eeprom_init(void) | |
53 | { | |
54 | /* SPI EEPROM */ | |
55 | #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) | |
56 | spi_init_f (); | |
57 | #endif | |
58 | ||
59 | /* I2C EEPROM */ | |
60 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) | |
61 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
62 | #endif | |
63 | } | |
64 | ||
02c321cf MV |
65 | static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr) |
66 | { | |
67 | unsigned blk_off; | |
68 | int alen; | |
69 | ||
70 | blk_off = offset & 0xff; /* block offset */ | |
71 | #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 | |
72 | addr[0] = offset >> 8; /* block number */ | |
73 | addr[1] = blk_off; /* block offset */ | |
74 | alen = 2; | |
75 | #else | |
76 | addr[0] = offset >> 16; /* block number */ | |
77 | addr[1] = offset >> 8; /* upper address octet */ | |
78 | addr[2] = blk_off; /* lower address octet */ | |
79 | alen = 3; | |
80 | #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */ | |
81 | ||
82 | addr[0] |= dev_addr; /* insert device address */ | |
83 | ||
84 | return alen; | |
85 | } | |
86 | ||
9132088b MV |
87 | static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen, |
88 | uchar *buffer, unsigned len, bool read) | |
89 | { | |
90 | int ret = 0; | |
91 | ||
92 | /* SPI */ | |
93 | #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) | |
94 | if (read) | |
95 | spi_read(addr, alen, buffer, len); | |
96 | else | |
97 | spi_write(addr, alen, buffer, len); | |
98 | #else /* I2C */ | |
99 | ||
100 | #if defined(CONFIG_SYS_I2C_EEPROM_BUS) | |
101 | i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS); | |
102 | #endif | |
103 | ||
104 | if (read) | |
105 | ret = i2c_read(addr[0], offset, alen - 1, buffer, len); | |
106 | else | |
107 | ret = i2c_write(addr[0], offset, alen - 1, buffer, len); | |
108 | ||
109 | if (ret) | |
110 | ret = 1; | |
111 | #endif | |
112 | return ret; | |
113 | } | |
114 | ||
3863585b WD |
115 | int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) |
116 | { | |
117 | unsigned end = offset + cnt; | |
118 | unsigned blk_off; | |
119 | int rcode = 0; | |
02c321cf | 120 | uchar addr[3]; |
3863585b | 121 | |
4f296d09 MV |
122 | /* |
123 | * Read data until done or would cross a page boundary. | |
3863585b WD |
124 | * We must write the address again when changing pages |
125 | * because the next page may be in a different device. | |
126 | */ | |
127 | while (offset < end) { | |
d4f5c728 | 128 | unsigned alen, len; |
6d0f6bcf | 129 | #if !defined(CONFIG_SYS_I2C_FRAM) |
d4f5c728 | 130 | unsigned maxlen; |
131 | #endif | |
132 | ||
3863585b | 133 | blk_off = offset & 0xFF; /* block offset */ |
02c321cf | 134 | alen = eeprom_addr(dev_addr, offset, addr); |
3863585b | 135 | |
d4f5c728 | 136 | len = end - offset; |
137 | ||
138 | /* | |
139 | * For a FRAM device there is no limit on the number of the | |
140 | * bytes that can be ccessed with the single read or write | |
141 | * operation. | |
142 | */ | |
6d0f6bcf | 143 | #if !defined(CONFIG_SYS_I2C_FRAM) |
3863585b WD |
144 | maxlen = 0x100 - blk_off; |
145 | if (maxlen > I2C_RXTX_LEN) | |
146 | maxlen = I2C_RXTX_LEN; | |
3863585b WD |
147 | if (len > maxlen) |
148 | len = maxlen; | |
d4f5c728 | 149 | #endif |
150 | ||
9132088b MV |
151 | rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 1); |
152 | ||
3863585b WD |
153 | buffer += len; |
154 | offset += len; | |
155 | } | |
d4f5c728 | 156 | |
3863585b WD |
157 | return rcode; |
158 | } | |
159 | ||
3863585b WD |
160 | int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) |
161 | { | |
162 | unsigned end = offset + cnt; | |
163 | unsigned blk_off; | |
164 | int rcode = 0; | |
02c321cf | 165 | uchar addr[3]; |
3863585b | 166 | |
52cd47c9 MV |
167 | eeprom_write_enable(dev_addr, 1); |
168 | ||
4f296d09 MV |
169 | /* |
170 | * Write data until done or would cross a write page boundary. | |
3863585b WD |
171 | * We must write the address again when changing pages |
172 | * because the address counter only increments within a page. | |
173 | */ | |
174 | ||
175 | while (offset < end) { | |
d4f5c728 | 176 | unsigned alen, len; |
6d0f6bcf | 177 | #if !defined(CONFIG_SYS_I2C_FRAM) |
d4f5c728 | 178 | unsigned maxlen; |
179 | #endif | |
180 | ||
3863585b | 181 | blk_off = offset & 0xFF; /* block offset */ |
02c321cf | 182 | alen = eeprom_addr(dev_addr, offset, addr); |
3863585b | 183 | |
d4f5c728 | 184 | len = end - offset; |
185 | ||
186 | /* | |
187 | * For a FRAM device there is no limit on the number of the | |
f9a78b8d | 188 | * bytes that can be accessed with the single read or write |
d4f5c728 | 189 | * operation. |
190 | */ | |
6d0f6bcf | 191 | #if !defined(CONFIG_SYS_I2C_FRAM) |
d4f5c728 | 192 | |
6d0f6bcf | 193 | #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS) |
3863585b | 194 | |
6d0f6bcf | 195 | #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS) |
3863585b WD |
196 | #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1)) |
197 | ||
198 | maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off); | |
199 | #else | |
200 | maxlen = 0x100 - blk_off; | |
201 | #endif | |
202 | if (maxlen > I2C_RXTX_LEN) | |
203 | maxlen = I2C_RXTX_LEN; | |
204 | ||
3863585b WD |
205 | if (len > maxlen) |
206 | len = maxlen; | |
d4f5c728 | 207 | #endif |
208 | ||
9132088b | 209 | rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 0); |
3863585b | 210 | |
3863585b WD |
211 | buffer += len; |
212 | offset += len; | |
213 | ||
6d0f6bcf JCPV |
214 | #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS) |
215 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); | |
3863585b WD |
216 | #endif |
217 | } | |
52cd47c9 MV |
218 | |
219 | eeprom_write_enable(dev_addr, 0); | |
220 | ||
3863585b WD |
221 | return rcode; |
222 | } | |
223 | ||
4f296d09 | 224 | static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b | 225 | { |
4f296d09 MV |
226 | const char *const fmt = |
227 | "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... "; | |
e4f65d00 MV |
228 | char * const *args = &argv[2]; |
229 | int rcode; | |
230 | ulong dev_addr, addr, off, cnt; | |
231 | ||
232 | switch (argc) { | |
233 | #ifdef CONFIG_SYS_DEF_EEPROM_ADDR | |
234 | case 5: | |
235 | dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR; | |
236 | break; | |
237 | #endif | |
238 | case 6: | |
239 | dev_addr = simple_strtoul(*args++, NULL, 16); | |
240 | break; | |
241 | default: | |
242 | return CMD_RET_USAGE; | |
243 | } | |
548738b4 | 244 | |
e4f65d00 MV |
245 | addr = simple_strtoul(*args++, NULL, 16); |
246 | off = simple_strtoul(*args++, NULL, 16); | |
247 | cnt = simple_strtoul(*args++, NULL, 16); | |
548738b4 | 248 | |
4f296d09 | 249 | # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
e4f65d00 | 250 | eeprom_init (); |
4f296d09 | 251 | # endif /* !CONFIG_SPI */ |
90253178 | 252 | |
e4f65d00 MV |
253 | if (strcmp (argv[1], "read") == 0) { |
254 | printf(fmt, dev_addr, argv[1], addr, off, cnt); | |
4f296d09 | 255 | |
e4f65d00 | 256 | rcode = eeprom_read(dev_addr, off, (uchar *) addr, cnt); |
4f296d09 | 257 | |
e4f65d00 MV |
258 | puts ("done\n"); |
259 | return rcode; | |
260 | } else if (strcmp (argv[1], "write") == 0) { | |
261 | printf(fmt, dev_addr, argv[1], addr, off, cnt); | |
4f296d09 | 262 | |
e4f65d00 | 263 | rcode = eeprom_write(dev_addr, off, (uchar *) addr, cnt); |
4f296d09 | 264 | |
e4f65d00 MV |
265 | puts ("done\n"); |
266 | return rcode; | |
4f296d09 MV |
267 | } |
268 | ||
269 | return CMD_RET_USAGE; | |
270 | } | |
8bde7f77 | 271 | |
0d498393 WD |
272 | U_BOOT_CMD( |
273 | eeprom, 6, 1, do_eeprom, | |
2fb2604d | 274 | "EEPROM sub-system", |
8bde7f77 WD |
275 | "read devaddr addr off cnt\n" |
276 | "eeprom write devaddr addr off cnt\n" | |
a89c33db | 277 | " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'" |
0e350f81 | 278 | ) |