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i.MX28: Add cache support to MXS NAND driver
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
314284b1 43int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
44 return -1;
45}
46
314284b1 47int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
48 alias("__board_mmc_getcd")));
49
272cc70b
AF
50int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
51{
5db2fe3a
RR
52#ifdef CONFIG_MMC_TRACE
53 int ret;
54 int i;
55 u8 *ptr;
56
57 printf("CMD_SEND:%d\n", cmd->cmdidx);
58 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
59 printf("\t\tFLAG\t\t\t %d\n", cmd->flags);
60 ret = mmc->send_cmd(mmc, cmd, data);
61 switch (cmd->resp_type) {
62 case MMC_RSP_NONE:
63 printf("\t\tMMC_RSP_NONE\n");
64 break;
65 case MMC_RSP_R1:
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
67 cmd->response[0]);
68 break;
69 case MMC_RSP_R1b:
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R2:
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
75 cmd->response[0]);
76 printf("\t\t \t\t 0x%08X \n",
77 cmd->response[1]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[2]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[3]);
82 printf("\n");
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
85 int j;
86 printf("\t\t\t\t\t%03d - ", i*4);
87 ptr = &cmd->response[i];
88 ptr += 3;
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
91 printf("\n");
92 }
93 break;
94 case MMC_RSP_R3:
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 default:
99 printf("\t\tERROR MMC rsp not supported\n");
100 break;
101 }
102 return ret;
103#else
272cc70b 104 return mmc->send_cmd(mmc, cmd, data);
5db2fe3a 105#endif
272cc70b
AF
106}
107
5d4fc8d9
RR
108int mmc_send_status(struct mmc *mmc, int timeout)
109{
110 struct mmc_cmd cmd;
d617c426 111 int err, retries = 5;
5d4fc8d9
RR
112#ifdef CONFIG_MMC_TRACE
113 int status;
114#endif
115
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
120 cmd.flags = 0;
121
122 do {
123 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
124 if (!err) {
125 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
126 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
127 MMC_STATE_PRG)
128 break;
129 else if (cmd.response[0] & MMC_STATUS_MASK) {
130 printf("Status Error: 0x%08X\n",
131 cmd.response[0]);
132 return COMM_ERR;
133 }
134 } else if (--retries < 0)
5d4fc8d9 135 return err;
5d4fc8d9
RR
136
137 udelay(1000);
138
5d4fc8d9
RR
139 } while (timeout--);
140
5db2fe3a
RR
141#ifdef CONFIG_MMC_TRACE
142 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
143 printf("CURR STATE:%d\n", status);
144#endif
5d4fc8d9
RR
145 if (!timeout) {
146 printf("Timeout waiting card ready\n");
147 return TIMEOUT;
148 }
149
150 return 0;
151}
152
272cc70b
AF
153int mmc_set_blocklen(struct mmc *mmc, int len)
154{
155 struct mmc_cmd cmd;
156
157 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
158 cmd.resp_type = MMC_RSP_R1;
159 cmd.cmdarg = len;
160 cmd.flags = 0;
161
162 return mmc_send_cmd(mmc, &cmd, NULL);
163}
164
165struct mmc *find_mmc_device(int dev_num)
166{
167 struct mmc *m;
168 struct list_head *entry;
169
170 list_for_each(entry, &mmc_devices) {
171 m = list_entry(entry, struct mmc, link);
172
173 if (m->block_dev.dev == dev_num)
174 return m;
175 }
176
177 printf("MMC Device %d not found\n", dev_num);
178
179 return NULL;
180}
181
e6f99a56
LW
182static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
183{
184 struct mmc_cmd cmd;
185 ulong end;
186 int err, start_cmd, end_cmd;
187
188 if (mmc->high_capacity)
189 end = start + blkcnt - 1;
190 else {
191 end = (start + blkcnt - 1) * mmc->write_bl_len;
192 start *= mmc->write_bl_len;
193 }
194
195 if (IS_SD(mmc)) {
196 start_cmd = SD_CMD_ERASE_WR_BLK_START;
197 end_cmd = SD_CMD_ERASE_WR_BLK_END;
198 } else {
199 start_cmd = MMC_CMD_ERASE_GROUP_START;
200 end_cmd = MMC_CMD_ERASE_GROUP_END;
201 }
202
203 cmd.cmdidx = start_cmd;
204 cmd.cmdarg = start;
205 cmd.resp_type = MMC_RSP_R1;
206 cmd.flags = 0;
207
208 err = mmc_send_cmd(mmc, &cmd, NULL);
209 if (err)
210 goto err_out;
211
212 cmd.cmdidx = end_cmd;
213 cmd.cmdarg = end;
214
215 err = mmc_send_cmd(mmc, &cmd, NULL);
216 if (err)
217 goto err_out;
218
219 cmd.cmdidx = MMC_CMD_ERASE;
220 cmd.cmdarg = SECURE_ERASE;
221 cmd.resp_type = MMC_RSP_R1b;
222
223 err = mmc_send_cmd(mmc, &cmd, NULL);
224 if (err)
225 goto err_out;
226
227 return 0;
228
229err_out:
230 puts("mmc erase failed\n");
231 return err;
232}
233
234static unsigned long
235mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
236{
237 int err = 0;
238 struct mmc *mmc = find_mmc_device(dev_num);
239 lbaint_t blk = 0, blk_r = 0;
240
241 if (!mmc)
242 return -1;
243
244 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
245 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
246 "The erase range would be change to 0x%lx~0x%lx\n\n",
247 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
248 ((start + blkcnt + mmc->erase_grp_size)
249 & ~(mmc->erase_grp_size - 1)) - 1);
250
251 while (blk < blkcnt) {
252 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
253 mmc->erase_grp_size : (blkcnt - blk);
254 err = mmc_erase_t(mmc, start + blk, blk_r);
255 if (err)
256 break;
257
258 blk += blk_r;
259 }
260
261 return blk;
262}
263
272cc70b 264static ulong
0158126e 265mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
272cc70b
AF
266{
267 struct mmc_cmd cmd;
268 struct mmc_data data;
5d4fc8d9 269 int timeout = 1000;
272cc70b 270
d2bf29e3 271 if ((start + blkcnt) > mmc->block_dev.lba) {
def412b6 272 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
273 start + blkcnt, mmc->block_dev.lba);
274 return 0;
275 }
272cc70b
AF
276
277 if (blkcnt > 1)
278 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
279 else
280 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
281
282 if (mmc->high_capacity)
283 cmd.cmdarg = start;
284 else
def412b6 285 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
286
287 cmd.resp_type = MMC_RSP_R1;
288 cmd.flags = 0;
289
290 data.src = src;
291 data.blocks = blkcnt;
def412b6 292 data.blocksize = mmc->write_bl_len;
272cc70b
AF
293 data.flags = MMC_DATA_WRITE;
294
def412b6
SS
295 if (mmc_send_cmd(mmc, &cmd, &data)) {
296 printf("mmc write failed\n");
297 return 0;
272cc70b
AF
298 }
299
d52ebf10
TC
300 /* SPI multiblock writes terminate using a special
301 * token, not a STOP_TRANSMISSION request.
302 */
303 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
304 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
305 cmd.cmdarg = 0;
306 cmd.resp_type = MMC_RSP_R1b;
307 cmd.flags = 0;
def412b6
SS
308 if (mmc_send_cmd(mmc, &cmd, NULL)) {
309 printf("mmc fail to send stop cmd\n");
310 return 0;
0158126e 311 }
272cc70b
AF
312 }
313
93ad0d18
JK
314 /* Waiting for the ready status */
315 if (mmc_send_status(mmc, timeout))
316 return 0;
317
272cc70b
AF
318 return blkcnt;
319}
320
0158126e
LW
321static ulong
322mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
323{
0158126e
LW
324 lbaint_t cur, blocks_todo = blkcnt;
325
def412b6 326 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 327 if (!mmc)
def412b6 328 return 0;
0158126e 329
def412b6
SS
330 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
331 return 0;
0158126e
LW
332
333 do {
8feafcc4 334 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 335 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 336 return 0;
0158126e
LW
337 blocks_todo -= cur;
338 start += cur;
339 src += cur * mmc->write_bl_len;
340 } while (blocks_todo > 0);
341
342 return blkcnt;
343}
344
4a1a06bc 345int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt)
272cc70b
AF
346{
347 struct mmc_cmd cmd;
348 struct mmc_data data;
349
4a1a06bc
AS
350 if (blkcnt > 1)
351 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
352 else
353 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
354
355 if (mmc->high_capacity)
4a1a06bc 356 cmd.cmdarg = start;
272cc70b 357 else
4a1a06bc 358 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
359
360 cmd.resp_type = MMC_RSP_R1;
361 cmd.flags = 0;
362
363 data.dest = dst;
4a1a06bc 364 data.blocks = blkcnt;
272cc70b
AF
365 data.blocksize = mmc->read_bl_len;
366 data.flags = MMC_DATA_READ;
367
4a1a06bc
AS
368 if (mmc_send_cmd(mmc, &cmd, &data))
369 return 0;
272cc70b 370
4a1a06bc
AS
371 if (blkcnt > 1) {
372 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
373 cmd.cmdarg = 0;
374 cmd.resp_type = MMC_RSP_R1b;
375 cmd.flags = 0;
376 if (mmc_send_cmd(mmc, &cmd, NULL)) {
377 printf("mmc fail to send stop cmd\n");
378 return 0;
379 }
272cc70b
AF
380 }
381
4a1a06bc 382 return blkcnt;
272cc70b
AF
383}
384
385static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
386{
4a1a06bc
AS
387 lbaint_t cur, blocks_todo = blkcnt;
388
389 if (blkcnt == 0)
390 return 0;
272cc70b 391
4a1a06bc 392 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
393 if (!mmc)
394 return 0;
395
d2bf29e3 396 if ((start + blkcnt) > mmc->block_dev.lba) {
4a1a06bc 397 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
398 start + blkcnt, mmc->block_dev.lba);
399 return 0;
400 }
272cc70b 401
4a1a06bc 402 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 403 return 0;
272cc70b 404
4a1a06bc 405 do {
8feafcc4 406 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
407 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
408 return 0;
409 blocks_todo -= cur;
410 start += cur;
411 dst += cur * mmc->read_bl_len;
412 } while (blocks_todo > 0);
272cc70b
AF
413
414 return blkcnt;
415}
416
417int mmc_go_idle(struct mmc* mmc)
418{
419 struct mmc_cmd cmd;
420 int err;
421
422 udelay(1000);
423
424 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
425 cmd.cmdarg = 0;
426 cmd.resp_type = MMC_RSP_NONE;
427 cmd.flags = 0;
428
429 err = mmc_send_cmd(mmc, &cmd, NULL);
430
431 if (err)
432 return err;
433
434 udelay(2000);
435
436 return 0;
437}
438
439int
440sd_send_op_cond(struct mmc *mmc)
441{
442 int timeout = 1000;
443 int err;
444 struct mmc_cmd cmd;
445
446 do {
447 cmd.cmdidx = MMC_CMD_APP_CMD;
448 cmd.resp_type = MMC_RSP_R1;
449 cmd.cmdarg = 0;
450 cmd.flags = 0;
451
452 err = mmc_send_cmd(mmc, &cmd, NULL);
453
454 if (err)
455 return err;
456
457 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
458 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
459
460 /*
461 * Most cards do not answer if some reserved bits
462 * in the ocr are set. However, Some controller
463 * can set bit 7 (reserved for low voltages), but
464 * how to manage low voltages SD card is not yet
465 * specified.
466 */
d52ebf10
TC
467 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
468 (mmc->voltages & 0xff8000);
272cc70b
AF
469
470 if (mmc->version == SD_VERSION_2)
471 cmd.cmdarg |= OCR_HCS;
472
473 err = mmc_send_cmd(mmc, &cmd, NULL);
474
475 if (err)
476 return err;
477
478 udelay(1000);
479 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
480
481 if (timeout <= 0)
482 return UNUSABLE_ERR;
483
484 if (mmc->version != SD_VERSION_2)
485 mmc->version = SD_VERSION_1_0;
486
d52ebf10
TC
487 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
488 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
489 cmd.resp_type = MMC_RSP_R3;
490 cmd.cmdarg = 0;
491 cmd.flags = 0;
492
493 err = mmc_send_cmd(mmc, &cmd, NULL);
494
495 if (err)
496 return err;
497 }
498
998be3dd 499 mmc->ocr = cmd.response[0];
272cc70b
AF
500
501 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
502 mmc->rca = 0;
503
504 return 0;
505}
506
507int mmc_send_op_cond(struct mmc *mmc)
508{
31cacbab 509 int timeout = 10000;
272cc70b
AF
510 struct mmc_cmd cmd;
511 int err;
512
513 /* Some cards seem to need this */
514 mmc_go_idle(mmc);
515
31cacbab
RR
516 /* Asking to the card its capabilities */
517 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
518 cmd.resp_type = MMC_RSP_R3;
519 cmd.cmdarg = 0;
520 cmd.flags = 0;
cd6881b5 521
31cacbab 522 err = mmc_send_cmd(mmc, &cmd, NULL);
cd6881b5 523
31cacbab
RR
524 if (err)
525 return err;
cd6881b5 526
31cacbab 527 udelay(1000);
cd6881b5 528
272cc70b
AF
529 do {
530 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
531 cmd.resp_type = MMC_RSP_R3;
31cacbab
RR
532 cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 :
533 (mmc->voltages &
534 (cmd.response[0] & OCR_VOLTAGE_MASK)) |
535 (cmd.response[0] & OCR_ACCESS_MODE));
b1f1e821
ŁM
536
537 if (mmc->host_caps & MMC_MODE_HC)
538 cmd.cmdarg |= OCR_HCS;
539
272cc70b
AF
540 cmd.flags = 0;
541
542 err = mmc_send_cmd(mmc, &cmd, NULL);
543
544 if (err)
545 return err;
546
547 udelay(1000);
548 } while (!(cmd.response[0] & OCR_BUSY) && timeout--);
549
550 if (timeout <= 0)
551 return UNUSABLE_ERR;
552
d52ebf10
TC
553 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
554 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
555 cmd.resp_type = MMC_RSP_R3;
556 cmd.cmdarg = 0;
557 cmd.flags = 0;
558
559 err = mmc_send_cmd(mmc, &cmd, NULL);
560
561 if (err)
562 return err;
563 }
564
272cc70b 565 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 566 mmc->ocr = cmd.response[0];
272cc70b
AF
567
568 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
569 mmc->rca = 0;
570
571 return 0;
572}
573
574
575int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd)
576{
577 struct mmc_cmd cmd;
578 struct mmc_data data;
579 int err;
580
581 /* Get the Card Status Register */
582 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
583 cmd.resp_type = MMC_RSP_R1;
584 cmd.cmdarg = 0;
585 cmd.flags = 0;
586
587 data.dest = ext_csd;
588 data.blocks = 1;
589 data.blocksize = 512;
590 data.flags = MMC_DATA_READ;
591
592 err = mmc_send_cmd(mmc, &cmd, &data);
593
594 return err;
595}
596
597
598int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
599{
600 struct mmc_cmd cmd;
5d4fc8d9
RR
601 int timeout = 1000;
602 int ret;
272cc70b
AF
603
604 cmd.cmdidx = MMC_CMD_SWITCH;
605 cmd.resp_type = MMC_RSP_R1b;
606 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
607 (index << 16) |
608 (value << 8);
272cc70b
AF
609 cmd.flags = 0;
610
5d4fc8d9
RR
611 ret = mmc_send_cmd(mmc, &cmd, NULL);
612
613 /* Waiting for the ready status */
93ad0d18
JK
614 if (!ret)
615 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
616
617 return ret;
618
272cc70b
AF
619}
620
621int mmc_change_freq(struct mmc *mmc)
622{
a1969923 623 ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
272cc70b
AF
624 char cardtype;
625 int err;
626
627 mmc->card_caps = 0;
628
d52ebf10
TC
629 if (mmc_host_is_spi(mmc))
630 return 0;
631
272cc70b
AF
632 /* Only version 4 supports high-speed */
633 if (mmc->version < MMC_VERSION_4)
634 return 0;
635
272cc70b
AF
636 err = mmc_send_ext_csd(mmc, ext_csd);
637
638 if (err)
639 return err;
640
0560db18 641 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
642
643 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
644
645 if (err)
646 return err;
647
648 /* Now check to see that it worked */
649 err = mmc_send_ext_csd(mmc, ext_csd);
650
651 if (err)
652 return err;
653
654 /* No high-speed support */
0560db18 655 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
656 return 0;
657
658 /* High Speed is set, there are two types: 52MHz and 26MHz */
659 if (cardtype & MMC_HS_52MHZ)
660 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
661 else
662 mmc->card_caps |= MMC_MODE_HS;
663
664 return 0;
665}
666
bc897b1d
LW
667int mmc_switch_part(int dev_num, unsigned int part_num)
668{
669 struct mmc *mmc = find_mmc_device(dev_num);
670
671 if (!mmc)
672 return -1;
673
674 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
675 (mmc->part_config & ~PART_ACCESS_MASK)
676 | (part_num & PART_ACCESS_MASK));
677}
678
48972d90
TR
679int mmc_getcd(struct mmc *mmc)
680{
681 int cd;
682
683 cd = board_mmc_getcd(mmc);
684
685 if ((cd < 0) && mmc->getcd)
686 cd = mmc->getcd(mmc);
687
688 return cd;
689}
690
272cc70b
AF
691int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
692{
693 struct mmc_cmd cmd;
694 struct mmc_data data;
695
696 /* Switch the frequency */
697 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
698 cmd.resp_type = MMC_RSP_R1;
699 cmd.cmdarg = (mode << 31) | 0xffffff;
700 cmd.cmdarg &= ~(0xf << (group * 4));
701 cmd.cmdarg |= value << (group * 4);
702 cmd.flags = 0;
703
704 data.dest = (char *)resp;
705 data.blocksize = 64;
706 data.blocks = 1;
707 data.flags = MMC_DATA_READ;
708
709 return mmc_send_cmd(mmc, &cmd, &data);
710}
711
712
713int sd_change_freq(struct mmc *mmc)
714{
715 int err;
716 struct mmc_cmd cmd;
f781dd38
A
717 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
718 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
719 struct mmc_data data;
720 int timeout;
721
722 mmc->card_caps = 0;
723
d52ebf10
TC
724 if (mmc_host_is_spi(mmc))
725 return 0;
726
272cc70b
AF
727 /* Read the SCR to find out if this card supports higher speeds */
728 cmd.cmdidx = MMC_CMD_APP_CMD;
729 cmd.resp_type = MMC_RSP_R1;
730 cmd.cmdarg = mmc->rca << 16;
731 cmd.flags = 0;
732
733 err = mmc_send_cmd(mmc, &cmd, NULL);
734
735 if (err)
736 return err;
737
738 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
739 cmd.resp_type = MMC_RSP_R1;
740 cmd.cmdarg = 0;
741 cmd.flags = 0;
742
743 timeout = 3;
744
745retry_scr:
f781dd38 746 data.dest = (char *)scr;
272cc70b
AF
747 data.blocksize = 8;
748 data.blocks = 1;
749 data.flags = MMC_DATA_READ;
750
751 err = mmc_send_cmd(mmc, &cmd, &data);
752
753 if (err) {
754 if (timeout--)
755 goto retry_scr;
756
757 return err;
758 }
759
4e3d89ba
YK
760 mmc->scr[0] = __be32_to_cpu(scr[0]);
761 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
762
763 switch ((mmc->scr[0] >> 24) & 0xf) {
764 case 0:
765 mmc->version = SD_VERSION_1_0;
766 break;
767 case 1:
768 mmc->version = SD_VERSION_1_10;
769 break;
770 case 2:
771 mmc->version = SD_VERSION_2;
772 break;
773 default:
774 mmc->version = SD_VERSION_1_0;
775 break;
776 }
777
b44c7083
AS
778 if (mmc->scr[0] & SD_DATA_4BIT)
779 mmc->card_caps |= MMC_MODE_4BIT;
780
272cc70b
AF
781 /* Version 1.0 doesn't support switching */
782 if (mmc->version == SD_VERSION_1_0)
783 return 0;
784
785 timeout = 4;
786 while (timeout--) {
787 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 788 (u8 *)switch_status);
272cc70b
AF
789
790 if (err)
791 return err;
792
793 /* The high-speed function is busy. Try again */
4e3d89ba 794 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
795 break;
796 }
797
272cc70b 798 /* If high-speed isn't supported, we return */
4e3d89ba 799 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
800 return 0;
801
2c3fbf4c
ML
802 /*
803 * If the host doesn't support SD_HIGHSPEED, do not switch card to
804 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
805 * This can avoid furthur problem when the card runs in different
806 * mode between the host.
807 */
808 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
809 (mmc->host_caps & MMC_MODE_HS)))
810 return 0;
811
f781dd38 812 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
813
814 if (err)
815 return err;
816
4e3d89ba 817 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
818 mmc->card_caps |= MMC_MODE_HS;
819
820 return 0;
821}
822
823/* frequency bases */
824/* divided by 10 to be nice to platforms without floating point */
5f837c2c 825static const int fbase[] = {
272cc70b
AF
826 10000,
827 100000,
828 1000000,
829 10000000,
830};
831
832/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
833 * to platforms without floating point.
834 */
5f837c2c 835static const int multipliers[] = {
272cc70b
AF
836 0, /* reserved */
837 10,
838 12,
839 13,
840 15,
841 20,
842 25,
843 30,
844 35,
845 40,
846 45,
847 50,
848 55,
849 60,
850 70,
851 80,
852};
853
854void mmc_set_ios(struct mmc *mmc)
855{
856 mmc->set_ios(mmc);
857}
858
859void mmc_set_clock(struct mmc *mmc, uint clock)
860{
861 if (clock > mmc->f_max)
862 clock = mmc->f_max;
863
864 if (clock < mmc->f_min)
865 clock = mmc->f_min;
866
867 mmc->clock = clock;
868
869 mmc_set_ios(mmc);
870}
871
872void mmc_set_bus_width(struct mmc *mmc, uint width)
873{
874 mmc->bus_width = width;
875
876 mmc_set_ios(mmc);
877}
878
879int mmc_startup(struct mmc *mmc)
880{
4137894e 881 int err, width;
272cc70b 882 uint mult, freq;
639b7827 883 u64 cmult, csize, capacity;
272cc70b 884 struct mmc_cmd cmd;
a1969923 885 ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
4137894e 886 ALLOC_CACHE_ALIGN_BUFFER(char, test_csd, 512);
5d4fc8d9 887 int timeout = 1000;
272cc70b 888
d52ebf10
TC
889#ifdef CONFIG_MMC_SPI_CRC_ON
890 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
891 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
892 cmd.resp_type = MMC_RSP_R1;
893 cmd.cmdarg = 1;
894 cmd.flags = 0;
895 err = mmc_send_cmd(mmc, &cmd, NULL);
896
897 if (err)
898 return err;
899 }
900#endif
901
272cc70b 902 /* Put the Card in Identify Mode */
d52ebf10
TC
903 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
904 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
905 cmd.resp_type = MMC_RSP_R2;
906 cmd.cmdarg = 0;
907 cmd.flags = 0;
908
909 err = mmc_send_cmd(mmc, &cmd, NULL);
910
911 if (err)
912 return err;
913
914 memcpy(mmc->cid, cmd.response, 16);
915
916 /*
917 * For MMC cards, set the Relative Address.
918 * For SD cards, get the Relatvie Address.
919 * This also puts the cards into Standby State
920 */
d52ebf10
TC
921 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
922 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
923 cmd.cmdarg = mmc->rca << 16;
924 cmd.resp_type = MMC_RSP_R6;
925 cmd.flags = 0;
272cc70b 926
d52ebf10 927 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 928
d52ebf10
TC
929 if (err)
930 return err;
272cc70b 931
d52ebf10
TC
932 if (IS_SD(mmc))
933 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
934 }
272cc70b
AF
935
936 /* Get the Card-Specific Data */
937 cmd.cmdidx = MMC_CMD_SEND_CSD;
938 cmd.resp_type = MMC_RSP_R2;
939 cmd.cmdarg = mmc->rca << 16;
940 cmd.flags = 0;
941
942 err = mmc_send_cmd(mmc, &cmd, NULL);
943
5d4fc8d9
RR
944 /* Waiting for the ready status */
945 mmc_send_status(mmc, timeout);
946
272cc70b
AF
947 if (err)
948 return err;
949
998be3dd
RV
950 mmc->csd[0] = cmd.response[0];
951 mmc->csd[1] = cmd.response[1];
952 mmc->csd[2] = cmd.response[2];
953 mmc->csd[3] = cmd.response[3];
272cc70b
AF
954
955 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 956 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
957
958 switch (version) {
959 case 0:
960 mmc->version = MMC_VERSION_1_2;
961 break;
962 case 1:
963 mmc->version = MMC_VERSION_1_4;
964 break;
965 case 2:
966 mmc->version = MMC_VERSION_2_2;
967 break;
968 case 3:
969 mmc->version = MMC_VERSION_3;
970 break;
971 case 4:
972 mmc->version = MMC_VERSION_4;
973 break;
974 default:
975 mmc->version = MMC_VERSION_1_2;
976 break;
977 }
978 }
979
980 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
981 freq = fbase[(cmd.response[0] & 0x7)];
982 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
983
984 mmc->tran_speed = freq * mult;
985
998be3dd 986 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
987
988 if (IS_SD(mmc))
989 mmc->write_bl_len = mmc->read_bl_len;
990 else
998be3dd 991 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
992
993 if (mmc->high_capacity) {
994 csize = (mmc->csd[1] & 0x3f) << 16
995 | (mmc->csd[2] & 0xffff0000) >> 16;
996 cmult = 8;
997 } else {
998 csize = (mmc->csd[1] & 0x3ff) << 2
999 | (mmc->csd[2] & 0xc0000000) >> 30;
1000 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1001 }
1002
1003 mmc->capacity = (csize + 1) << (cmult + 2);
1004 mmc->capacity *= mmc->read_bl_len;
1005
1006 if (mmc->read_bl_len > 512)
1007 mmc->read_bl_len = 512;
1008
1009 if (mmc->write_bl_len > 512)
1010 mmc->write_bl_len = 512;
1011
1012 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1013 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1014 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1015 cmd.resp_type = MMC_RSP_R1;
d52ebf10
TC
1016 cmd.cmdarg = mmc->rca << 16;
1017 cmd.flags = 0;
1018 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1019
d52ebf10
TC
1020 if (err)
1021 return err;
1022 }
272cc70b 1023
e6f99a56
LW
1024 /*
1025 * For SD, its erase group is always one sector
1026 */
1027 mmc->erase_grp_size = 1;
bc897b1d 1028 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1029 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1030 /* check ext_csd version and capacity */
1031 err = mmc_send_ext_csd(mmc, ext_csd);
0560db18 1032 if (!err & (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1033 /*
1034 * According to the JEDEC Standard, the value of
1035 * ext_csd's capacity is valid if the value is more
1036 * than 2GB
1037 */
0560db18
LW
1038 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1039 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1040 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1041 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
639b7827 1042 capacity *= 512;
b1f1e821 1043 if ((capacity >> 20) > 2 * 1024)
639b7827 1044 mmc->capacity = capacity;
d23e2c09 1045 }
bc897b1d 1046
e6f99a56
LW
1047 /*
1048 * Check whether GROUP_DEF is set, if yes, read out
1049 * group size from ext_csd directly, or calculate
1050 * the group size from the csd value.
1051 */
0560db18
LW
1052 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF])
1053 mmc->erase_grp_size =
1054 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 512 * 1024;
e6f99a56
LW
1055 else {
1056 int erase_gsz, erase_gmul;
1057 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1058 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1059 mmc->erase_grp_size = (erase_gsz + 1)
1060 * (erase_gmul + 1);
1061 }
1062
bc897b1d 1063 /* store the partition info of emmc */
0560db18
LW
1064 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT)
1065 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
d23e2c09
SG
1066 }
1067
272cc70b
AF
1068 if (IS_SD(mmc))
1069 err = sd_change_freq(mmc);
1070 else
1071 err = mmc_change_freq(mmc);
1072
1073 if (err)
1074 return err;
1075
1076 /* Restrict card's capabilities by what the host can do */
1077 mmc->card_caps &= mmc->host_caps;
1078
1079 if (IS_SD(mmc)) {
1080 if (mmc->card_caps & MMC_MODE_4BIT) {
1081 cmd.cmdidx = MMC_CMD_APP_CMD;
1082 cmd.resp_type = MMC_RSP_R1;
1083 cmd.cmdarg = mmc->rca << 16;
1084 cmd.flags = 0;
1085
1086 err = mmc_send_cmd(mmc, &cmd, NULL);
1087 if (err)
1088 return err;
1089
1090 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1091 cmd.resp_type = MMC_RSP_R1;
1092 cmd.cmdarg = 2;
1093 cmd.flags = 0;
1094 err = mmc_send_cmd(mmc, &cmd, NULL);
1095 if (err)
1096 return err;
1097
1098 mmc_set_bus_width(mmc, 4);
1099 }
1100
1101 if (mmc->card_caps & MMC_MODE_HS)
1102 mmc_set_clock(mmc, 50000000);
1103 else
1104 mmc_set_clock(mmc, 25000000);
1105 } else {
4137894e 1106 for (width = EXT_CSD_BUS_WIDTH_8; width >= 0; width--) {
272cc70b
AF
1107 /* Set the card to use 4 bit*/
1108 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
4137894e 1109 EXT_CSD_BUS_WIDTH, width);
272cc70b
AF
1110
1111 if (err)
4137894e 1112 continue;
272cc70b 1113
4137894e
LW
1114 if (!width) {
1115 mmc_set_bus_width(mmc, 1);
1116 break;
1117 } else
1118 mmc_set_bus_width(mmc, 4 * width);
1119
1120 err = mmc_send_ext_csd(mmc, test_csd);
1121 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1122 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1123 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1124 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1125 && ext_csd[EXT_CSD_REV] \
1126 == test_csd[EXT_CSD_REV]
1127 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1128 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1129 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1130 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1131
1132 mmc->card_caps |= width;
1133 break;
1134 }
272cc70b
AF
1135 }
1136
1137 if (mmc->card_caps & MMC_MODE_HS) {
1138 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1139 mmc_set_clock(mmc, 52000000);
1140 else
1141 mmc_set_clock(mmc, 26000000);
1142 } else
1143 mmc_set_clock(mmc, 20000000);
1144 }
1145
1146 /* fill in device description */
1147 mmc->block_dev.lun = 0;
1148 mmc->block_dev.type = 0;
1149 mmc->block_dev.blksz = mmc->read_bl_len;
9b1f942c 1150 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
0b453ffe
RV
1151 sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8,
1152 (mmc->cid[2] << 8) | (mmc->cid[3] >> 24));
1153 sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff,
1154 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1155 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
1156 sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28,
1157 (mmc->cid[2] >> 24) & 0xf);
272cc70b
AF
1158 init_part(&mmc->block_dev);
1159
1160 return 0;
1161}
1162
1163int mmc_send_if_cond(struct mmc *mmc)
1164{
1165 struct mmc_cmd cmd;
1166 int err;
1167
1168 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1169 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1170 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1171 cmd.resp_type = MMC_RSP_R7;
1172 cmd.flags = 0;
1173
1174 err = mmc_send_cmd(mmc, &cmd, NULL);
1175
1176 if (err)
1177 return err;
1178
998be3dd 1179 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1180 return UNUSABLE_ERR;
1181 else
1182 mmc->version = SD_VERSION_2;
1183
1184 return 0;
1185}
1186
1187int mmc_register(struct mmc *mmc)
1188{
1189 /* Setup the universal parts of the block interface just once */
1190 mmc->block_dev.if_type = IF_TYPE_MMC;
1191 mmc->block_dev.dev = cur_dev_num++;
1192 mmc->block_dev.removable = 1;
1193 mmc->block_dev.block_read = mmc_bread;
1194 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1195 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1196 if (!mmc->b_max)
1197 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1198
1199 INIT_LIST_HEAD (&mmc->link);
1200
1201 list_add_tail (&mmc->link, &mmc_devices);
1202
1203 return 0;
1204}
1205
df3fc526 1206#ifdef CONFIG_PARTITIONS
272cc70b
AF
1207block_dev_desc_t *mmc_get_dev(int dev)
1208{
1209 struct mmc *mmc = find_mmc_device(dev);
1210
e85649c7 1211 return mmc ? &mmc->block_dev : NULL;
272cc70b 1212}
df3fc526 1213#endif
272cc70b
AF
1214
1215int mmc_init(struct mmc *mmc)
1216{
afd5932b 1217 int err;
272cc70b 1218
48972d90
TR
1219 if (mmc_getcd(mmc) == 0) {
1220 mmc->has_init = 0;
1221 printf("MMC: no card present\n");
1222 return NO_CARD_ERR;
1223 }
1224
bc897b1d
LW
1225 if (mmc->has_init)
1226 return 0;
1227
272cc70b
AF
1228 err = mmc->init(mmc);
1229
1230 if (err)
1231 return err;
1232
b86b85e2
IY
1233 mmc_set_bus_width(mmc, 1);
1234 mmc_set_clock(mmc, 1);
1235
272cc70b
AF
1236 /* Reset the Card */
1237 err = mmc_go_idle(mmc);
1238
1239 if (err)
1240 return err;
1241
bc897b1d
LW
1242 /* The internal partition reset to user partition(0) at every CMD0*/
1243 mmc->part_num = 0;
1244
272cc70b 1245 /* Test for SD version 2 */
afd5932b 1246 err = mmc_send_if_cond(mmc);
272cc70b 1247
272cc70b
AF
1248 /* Now try to get the SD card's operating condition */
1249 err = sd_send_op_cond(mmc);
1250
1251 /* If the command timed out, we check for an MMC card */
1252 if (err == TIMEOUT) {
1253 err = mmc_send_op_cond(mmc);
1254
1255 if (err) {
1256 printf("Card did not respond to voltage select!\n");
1257 return UNUSABLE_ERR;
1258 }
1259 }
1260
bc897b1d
LW
1261 err = mmc_startup(mmc);
1262 if (err)
1263 mmc->has_init = 0;
1264 else
1265 mmc->has_init = 1;
1266 return err;
272cc70b
AF
1267}
1268
1269/*
1270 * CPU and board-specific MMC initializations. Aliased function
1271 * signals caller to move on
1272 */
1273static int __def_mmc_init(bd_t *bis)
1274{
1275 return -1;
1276}
1277
f9a109b3
PT
1278int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1279int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1280
1281void print_mmc_devices(char separator)
1282{
1283 struct mmc *m;
1284 struct list_head *entry;
1285
1286 list_for_each(entry, &mmc_devices) {
1287 m = list_entry(entry, struct mmc, link);
1288
1289 printf("%s: %d", m->name, m->block_dev.dev);
1290
1291 if (entry->next != &mmc_devices)
1292 printf("%c ", separator);
1293 }
1294
1295 printf("\n");
1296}
1297
ea6ebe21
LW
1298int get_mmc_num(void)
1299{
1300 return cur_dev_num;
1301}
1302
272cc70b
AF
1303int mmc_initialize(bd_t *bis)
1304{
1305 INIT_LIST_HEAD (&mmc_devices);
1306 cur_dev_num = 0;
1307
1308 if (board_mmc_init(bis) < 0)
1309 cpu_mmc_init(bis);
1310
1311 print_mmc_devices(',');
1312
1313 return 0;
1314}