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VCMA9: remove unneeded config.mk
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1cb8e980 1/*
531716e1 2 * (C) Copyright 2002, 2003
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3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
792a09eb 5 * Gary Jennejohn <garyj@denx.de>
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6 * David Mueller <d.mueller@elsoft.ch>
7 *
8 * Configuation settings for the MPL VCMA9 board.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef __CONFIG_H
30#define __CONFIG_H
31
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32/*
33 * High Level Configuration Options
34 * (easy to change)
35 */
ac67804f 36#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
37#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
38#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
39#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
1cb8e980 40
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41#define CONFIG_SYS_TEXT_BASE 0x0
42
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43/* input clock of PLL */
44#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */
45
46#define USE_920T_MMU 1
47#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
48
53677ef1 49#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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50#define CONFIG_SETUP_MEMORY_TAGS 1
51#define CONFIG_INITRD_TAG 1
52
a5562901 53
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54/*
55 * BOOTP options
56 */
57#define CONFIG_BOOTP_BOOTFILESIZE
58#define CONFIG_BOOTP_BOOTPATH
59#define CONFIG_BOOTP_GATEWAY
60#define CONFIG_BOOTP_HOSTNAME
61
62
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63/*
64 * Command line configuration.
65 */
66#include <config_cmd_default.h>
67
68#define CONFIG_CMD_CACHE
69#define CONFIG_CMD_EEPROM
70#define CONFIG_CMD_I2C
71#define CONFIG_CMD_USB
72#define CONFIG_CMD_REGINFO
73#define CONFIG_CMD_FAT
74#define CONFIG_CMD_DATE
75#define CONFIG_CMD_ELF
76#define CONFIG_CMD_DHCP
77#define CONFIG_CMD_PING
78#define CONFIG_CMD_BSP
79
1cb8e980 80
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81#define CONFIG_SYS_HUSH_PARSER
82#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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83/***********************************************************
84 * I2C stuff:
85 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
86 * address 0x50 with 16bit addressing
87 ***********************************************************/
88#define CONFIG_HARD_I2C /* I2C with hardware support */
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89#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
90#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */
1cb8e980 91
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92#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
93#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
bb1f8b4f 94#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
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95#define CONFIG_ENV_OFFSET 0x000 /* environment starts at offset 0 */
96#define CONFIG_ENV_SIZE 0x800 /* 2KB should be more than enough */
1cb8e980 97
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98#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
99#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes page write mode on 24C256 */
100#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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101
102/*
103 * Size of malloc() pool
104 */
0e8d1586 105/*#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)*/
1cb8e980 106
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107#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
108#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* BUNZIP2 needs a lot of RAM */
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109
110/*
111 * Hardware drivers
112 */
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113#define CONFIG_NET_MULTI
114#define CONFIG_CS8900 /* we have a CS8900 on-board */
115#define CONFIG_CS8900_BASE 0x20000300
116#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
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117
118#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
119
120/*
121 * select serial console configuration
122 */
300f99f4 123#define CONFIG_S3C24X0_SERIAL
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124#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
125
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126/************************************************************
127 * USB support
128 ************************************************************/
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129#define CONFIG_USB_OHCI 1
130#define CONFIG_USB_KEYBOARD 1
131#define CONFIG_USB_STORAGE 1
132#define CONFIG_DOS_PARTITION 1
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133
134/* Enable needed helper functions */
52cb4d4f 135#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
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136
137/************************************************************
138 * RTC
139 ************************************************************/
140#define CONFIG_RTC_S3C24X0 1
141
142
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143/* allow to overwrite serial and ethaddr */
144#define CONFIG_ENV_OVERWRITE
145
146#define CONFIG_BAUDRATE 9600
147
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148#define CONFIG_BOOTDELAY 5
149/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
2893ecbf 150/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
53677ef1 151#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
a2663ea4 152
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153#define CONFIG_NETMASK 255.255.255.0
154#define CONFIG_IPADDR 10.0.0.110
155#define CONFIG_SERVERIP 10.0.0.1
156
a5562901 157#if defined(CONFIG_CMD_KGDB)
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158#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
159/* what's this ? it's not used anywhere */
160#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
161#endif
162
163/*
164 * Miscellaneous configurable options
165 */
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166#define CONFIG_SYS_LONGHELP /* undef to save memory */
167#define CONFIG_SYS_PROMPT "VCMA9 # " /* Monitor Command Prompt */
168#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
169#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
170#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
171#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
1cb8e980 172
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173#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
174#define CONFIG_SYS_MEMTEST_END 0x30F80000 /* 15.5 MB in DRAM */
531716e1 175
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176#define CONFIG_SYS_ALT_MEMTEST
177#define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */
1cb8e980 178
1cb8e980 179/* we configure PWM Timer 4 to 1us ~ 1MHz */
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180/*#define CONFIG_SYS_HZ 1000000 */
181#define CONFIG_SYS_HZ 1562500
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182
183/* valid baudrates */
6d0f6bcf 184#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
1cb8e980 185
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186/* support BZIP2 compression */
187#define CONFIG_BZIP2 1
188
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189/************************************************************
190 * Ident
191 ************************************************************/
192/*#define VERSION_TAG "released"*/
193#define VERSION_TAG "unstable"
194#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, MEV-10080-001 " VERSION_TAG
195
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196/*-----------------------------------------------------------------------
197 * Stack sizes
198 *
199 * The stack sizes are set up in start.S using the settings below
200 */
201#define CONFIG_STACKSIZE (128*1024) /* regular stack */
202#ifdef CONFIG_USE_IRQ
203#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
204#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
205#endif
206
207/*-----------------------------------------------------------------------
208 * Physical Memory Map
209 */
210#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
211#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
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212#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
213
6d0f6bcf 214#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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215
216/*-----------------------------------------------------------------------
217 * FLASH and environment organization
218 */
219
220#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
221#if 0
222#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
223#endif
224
6d0f6bcf 225#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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226#ifdef CONFIG_AMD_LV800
227#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
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228#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
229#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
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230#endif
231#ifdef CONFIG_AMD_LV400
232#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
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233#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
234#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
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235#endif
236
237/* timeout values are in ticks */
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238#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
239#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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240
241#if 0
5a1aceb0 242#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 243#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
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244#endif
245
48b42616 246
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247#define CONFIG_SYS_JFFS2_FIRST_BANK 0
248#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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249
250#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
251
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252#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
253#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
254 GENERATED_GBL_DATA_SIZE)
255
256
1cb8e980 257#endif /* __CONFIG_H */