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67fa8c25 HS |
1 | /* |
2 | * (C) Copyright 2009 | |
3 | * Marvell Semiconductor <www.marvell.com> | |
4 | * Prafulla Wadaskar <prafulla@marvell.com> | |
5 | * | |
6 | * (C) Copyright 2009 | |
7 | * Stefan Roese, DENX Software Engineering, sr@denx.de. | |
8 | * | |
b11f53f3 HS |
9 | * (C) Copyright 2010-2011 |
10 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. | |
11 | * | |
67fa8c25 HS |
12 | * See file CREDITS for list of people who contributed to this |
13 | * project. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License as | |
17 | * published by the Free Software Foundation; either version 2 of | |
18 | * the License, or (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, write to the Free Software | |
27 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
28 | * MA 02110-1301 USA | |
29 | */ | |
30 | ||
b11f53f3 HS |
31 | /* |
32 | * for linking errors see | |
33 | * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html | |
34 | */ | |
67fa8c25 HS |
35 | |
36 | #ifndef _CONFIG_KM_ARM_H | |
37 | #define _CONFIG_KM_ARM_H | |
38 | ||
8620ca2a VL |
39 | /* We got removed from Linux mach-types.h */ |
40 | #define MACH_TYPE_KM_KIRKWOOD 2255 | |
41 | ||
67fa8c25 HS |
42 | /* |
43 | * High Level Configuration Options (easy to change) | |
44 | */ | |
45 | #define CONFIG_MARVELL | |
67fa8c25 HS |
46 | #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ |
47 | #define CONFIG_KIRKWOOD /* SOC Family Name */ | |
48 | #define CONFIG_KW88F6281 /* SOC Name */ | |
802d9963 | 49 | #define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ |
67fa8c25 | 50 | |
8620ca2a VL |
51 | #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD |
52 | ||
dfeafde4 HB |
53 | #define CONFIG_NAND_ECC_BCH |
54 | #define CONFIG_BCH | |
55 | ||
67fa8c25 HS |
56 | /* include common defines/options for all Keymile boards */ |
57 | #include "keymile-common.h" | |
de3ad13d | 58 | |
b5befd82 HB |
59 | #define CONFIG_CMD_NAND |
60 | #define CONFIG_CMD_SF | |
61 | #define CONFIG_SOFT_I2C /* I2C bit-banged */ | |
62 | ||
f46b4a1a VL |
63 | /* SPI NOR Flash default params, used by sf commands */ |
64 | #define CONFIG_SF_DEFAULT_SPEED 8100000 | |
65 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
66 | ||
8170aefc HB |
67 | #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR |
68 | #define CONFIG_ENV_SPI_BUS 0 | |
69 | #define CONFIG_ENV_SPI_CS 0 | |
05c8e81f | 70 | #define CONFIG_ENV_SPI_MAX_HZ 8100000 |
8170aefc HB |
71 | #define CONFIG_ENV_SPI_MODE SPI_MODE_3 |
72 | #endif | |
73 | ||
b5befd82 HB |
74 | #include "asm/arch/config.h" |
75 | ||
e5847b77 | 76 | #define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */ |
de3ad13d HB |
77 | #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ |
78 | #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ | |
79 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ | |
80 | ||
81 | /* pseudo-non volatile RAM [hex] */ | |
82 | #define CONFIG_KM_PNVRAM 0x80000 | |
83 | /* physical RAM MTD size [hex] */ | |
84 | #define CONFIG_KM_PHRAM 0x17F000 | |
85 | ||
86 | #define CONFIG_KM_CRAMFS_ADDR 0x2400000 | |
87 | #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */ | |
88 | ||
db0bb572 HB |
89 | /* architecture specific default bootargs */ |
90 | #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ | |
66072a8c HB |
91 | "bootcountaddr=${bootcountaddr} ${mtdparts}" \ |
92 | " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" | |
db0bb572 | 93 | |
de3ad13d | 94 | #define CONFIG_KM_DEF_ENV_CPU \ |
db0bb572 | 95 | "boot=bootm ${load_addr_r} - -\0" \ |
2d9528e3 | 96 | "cramfsloadfdt=true\0" \ |
93ea89f0 | 97 | "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ |
af85f085 | 98 | CONFIG_KM_UPDATE_UBOOT \ |
de3ad13d HB |
99 | "" |
100 | ||
67fa8c25 | 101 | #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ |
67fa8c25 HS |
102 | #define CONFIG_MISC_INIT_R |
103 | ||
104 | /* | |
105 | * NS16550 Configuration | |
106 | */ | |
107 | #define CONFIG_SYS_NS16550 | |
108 | #define CONFIG_SYS_NS16550_SERIAL | |
109 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
110 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK | |
111 | #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE | |
3d3c7096 | 112 | #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE |
67fa8c25 HS |
113 | |
114 | /* | |
115 | * Serial Port configuration | |
116 | * The following definitions let you select what serial you want to use | |
117 | * for your console driver. | |
118 | */ | |
119 | ||
120 | #define CONFIG_CONS_INDEX 1 /* Console on UART0 */ | |
121 | ||
122 | /* | |
123 | * For booting Linux, the board info and command line data | |
124 | * have to be in the first 8 MB of memory, since this is | |
125 | * the maximum mapped by the Linux kernel during initialization. | |
126 | */ | |
127 | #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ | |
128 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
129 | #define CONFIG_INITRD_TAG /* enable INITRD tag */ | |
499b1a4d | 130 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ |
67fa8c25 HS |
131 | |
132 | /* | |
133 | * Commands configuration | |
134 | */ | |
135 | #define CONFIG_CMD_ELF | |
136 | #define CONFIG_CMD_MTDPARTS | |
67fa8c25 HS |
137 | #define CONFIG_CMD_NFS |
138 | ||
139 | /* | |
140 | * Without NOR FLASH we need this | |
141 | */ | |
142 | #define CONFIG_SYS_NO_FLASH | |
143 | #undef CONFIG_CMD_FLASH | |
144 | #undef CONFIG_CMD_IMLS | |
145 | ||
146 | /* | |
147 | * NAND Flash configuration | |
148 | */ | |
149 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
67fa8c25 HS |
150 | |
151 | #define BOOTFLASH_START 0x0 | |
152 | ||
3d3c7096 HB |
153 | /* Kirkwood has two serial IF */ |
154 | #if (CONFIG_CONS_INDEX == 2) | |
155 | #define CONFIG_KM_CONSOLE_TTY "ttyS1" | |
156 | #else | |
67fa8c25 | 157 | #define CONFIG_KM_CONSOLE_TTY "ttyS0" |
3d3c7096 | 158 | #endif |
67fa8c25 | 159 | |
67fa8c25 HS |
160 | /* |
161 | * Other required minimal configurations | |
162 | */ | |
163 | #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ | |
164 | #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ | |
165 | #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ | |
166 | #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ | |
167 | #define CONFIG_NR_DRAM_BANKS 4 | |
67fa8c25 HS |
168 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
169 | ||
170 | /* | |
171 | * Ethernet Driver configuration | |
172 | */ | |
173 | #define CONFIG_NETCONSOLE /* include NetConsole support */ | |
67fa8c25 | 174 | #define CONFIG_MII /* expose smi ove miiphy interface */ |
002ec08d | 175 | #define CONFIG_CMD_MII /* to debug mdio phy config */ |
d44265ad | 176 | #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ |
67fa8c25 | 177 | #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ |
d44265ad | 178 | #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ |
67fa8c25 HS |
179 | #define CONFIG_PHY_BASE_ADR 0 |
180 | #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ | |
67fa8c25 HS |
181 | |
182 | /* | |
183 | * UBI related stuff | |
184 | */ | |
185 | #define CONFIG_SYS_USE_UBI | |
186 | ||
187 | /* | |
188 | * I2C related stuff | |
189 | */ | |
67fa8c25 HS |
190 | #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ |
191 | #if defined(CONFIG_SOFT_I2C) | |
192 | #ifndef __ASSEMBLY__ | |
193 | #include <asm/arch-kirkwood/gpio.h> | |
194 | extern void __set_direction(unsigned pin, int high); | |
499b1a4d HB |
195 | void set_sda(int state); |
196 | void set_scl(int state); | |
197 | int get_sda(void); | |
198 | int get_scl(void); | |
44097e26 HS |
199 | #define KM_KIRKWOOD_SDA_PIN 8 |
200 | #define KM_KIRKWOOD_SCL_PIN 9 | |
c471d848 | 201 | #define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300 |
44097e26 HS |
202 | #define KM_KIRKWOOD_ENV_WP 38 |
203 | ||
204 | #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) | |
205 | #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) | |
206 | #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) | |
207 | #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) | |
208 | #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) | |
67fa8c25 HS |
209 | #endif |
210 | ||
9e9c6d7c | 211 | #define I2C_DELAY udelay(1) |
67fa8c25 HS |
212 | #define I2C_SOFT_DECLARATIONS |
213 | ||
67fa8c25 HS |
214 | #endif |
215 | ||
4daea6ff SB |
216 | /* EEprom support 24C128, 24C256 valid for environment eeprom */ |
217 | #define CONFIG_SYS_I2C_MULTI_EEPROMS | |
218 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE | |
219 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ | |
220 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 | |
221 | ||
67fa8c25 HS |
222 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
223 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
224 | ||
331a30dc HS |
225 | /* |
226 | * Environment variables configurations | |
227 | */ | |
8170aefc HB |
228 | #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR |
229 | #define CONFIG_ENV_IS_IN_SPI_FLASH /* use SPI-Flash for environment vars */ | |
230 | #define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */ | |
231 | #define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */ | |
232 | #define CONFIG_ENV_SECT_SIZE 0x10000 | |
233 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ | |
234 | CONFIG_ENV_SECT_SIZE) | |
235 | #define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */ | |
236 | #else | |
331a30dc HS |
237 | #define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */ |
238 | #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 | |
239 | #define CONFIG_ENV_EEPROM_IS_ON_I2C | |
240 | #define CONFIG_SYS_EEPROM_WREN | |
241 | #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ | |
331a30dc | 242 | #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) |
680cfaf8 | 243 | #define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0" |
331a30dc HS |
244 | #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ |
245 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) | |
8170aefc HB |
246 | #endif |
247 | ||
248 | #define CONFIG_SYS_REDUNDAND_ENVIRONMENT | |
331a30dc | 249 | |
331a30dc | 250 | #define CONFIG_SPI_FLASH |
331a30dc | 251 | #define CONFIG_SPI_FLASH_STMICRO |
331a30dc | 252 | |
0c25defc VL |
253 | /* SPI bus claim MPP configuration */ |
254 | #define CONFIG_SYS_KW_SPI_MPP 0x0 | |
255 | ||
331a30dc | 256 | #define FLASH_GPIO_PIN 0x00010000 |
0c25defc | 257 | #define KM_FLASH_GPIO_PIN 16 |
331a30dc | 258 | |
cf73639d AH |
259 | #ifndef MTDIDS_DEFAULT |
260 | # define MTDIDS_DEFAULT "nand0=orion_nand" | |
261 | #endif /* MTDIDS_DEFAULT */ | |
262 | ||
263 | #ifndef MTDPARTS_DEFAULT | |
264 | # define MTDPARTS_DEFAULT "mtdparts=" \ | |
265 | "orion_nand:" \ | |
266 | "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");" | |
267 | #endif /* MTDPARTS_DEFAULT */ | |
331a30dc | 268 | |
af85f085 | 269 | #define CONFIG_KM_UPDATE_UBOOT \ |
331a30dc | 270 | "update=" \ |
0c25defc VL |
271 | "sf probe 0;sf erase 0 +${filesize};" \ |
272 | "sf write ${load_addr_r} 0 ${filesize};\0" | |
331a30dc | 273 | |
8170aefc HB |
274 | #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR |
275 | #define CONFIG_KM_NEW_ENV \ | |
276 | "newenv=sf probe 0;" \ | |
93ea89f0 MV |
277 | "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ |
278 | __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" | |
8170aefc HB |
279 | #else |
280 | #define CONFIG_KM_NEW_ENV \ | |
ea616d4d VL |
281 | "newenv=setenv addr 0x100000 && " \ |
282 | "i2c dev 1; mw.b ${addr} 0 4 && " \ | |
93ea89f0 MV |
283 | "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ |
284 | " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \ | |
285 | "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ | |
286 | " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" | |
8170aefc HB |
287 | #endif |
288 | ||
289 | /* | |
290 | * Default environment variables | |
291 | */ | |
292 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
293 | CONFIG_KM_DEF_ENV \ | |
294 | CONFIG_KM_NEW_ENV \ | |
b648bfc2 | 295 | "arch=arm\0" \ |
ea616d4d VL |
296 | "EEprom_ivm=" KM_IVM_BUS "\0" \ |
297 | "" | |
298 | ||
67fa8c25 | 299 | #if defined(CONFIG_SYS_NO_FLASH) |
67fa8c25 HS |
300 | #undef CONFIG_FLASH_CFI_MTD |
301 | #undef CONFIG_JFFS2_CMDLINE | |
302 | #endif | |
303 | ||
a784c01a | 304 | /* additions for new relocation code, must be added to all boards */ |
ab86f72c | 305 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
6b0ccc3b HS |
306 | /* Do early setups now in board_init_f() */ |
307 | #define CONFIG_BOARD_EARLY_INIT_F | |
f1fef1d8 HS |
308 | |
309 | /* | |
310 | * resereved pram area at the end of memroy [hex] | |
311 | * 8Mbytes for switch + 4Kbytes for bootcount | |
312 | */ | |
313 | #define CONFIG_KM_RESERVED_PRAM 0x801000 | |
a21b5d4b HB |
314 | /* address for the bootcount (taken from end of RAM) */ |
315 | #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) | |
0044c42e SR |
316 | /* Use generic bootcount RAM driver */ |
317 | #define CONFIG_BOOTCOUNT_RAM | |
f1fef1d8 | 318 | |
9400f8fa VL |
319 | /* enable POST tests */ |
320 | #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) | |
321 | #define CONFIG_POST_SKIP_ENV_FLAGS | |
322 | #define CONFIG_POST_EXTERNAL_WORD_FUNCS | |
323 | #define CONFIG_CMD_DIAG | |
324 | ||
b37f7724 | 325 | /* we do the whole PCIe FPGA config stuff here */ |
45bd01ef | 326 | #define CONFIG_BOARD_LATE_INIT |
b37f7724 | 327 | |
67fa8c25 | 328 | #endif /* _CONFIG_KM_ARM_H */ |