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Commit | Line | Data |
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f22651cf MS |
1 | /* |
2 | * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> | |
06fe8dae JT |
3 | * (C) Copyright 2013 Xilinx, Inc. |
4 | * | |
5 | * Common configuration options for all Zynq boards. | |
f22651cf | 6 | * |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
f22651cf MS |
8 | */ |
9 | ||
06fe8dae JT |
10 | #ifndef __CONFIG_ZYNQ_COMMON_H |
11 | #define __CONFIG_ZYNQ_COMMON_H | |
f22651cf | 12 | |
f22651cf | 13 | /* CPU clock */ |
53e49f74 JT |
14 | #ifndef CONFIG_CPU_FREQ_HZ |
15 | # define CONFIG_CPU_FREQ_HZ 800000000 | |
16 | #endif | |
f22651cf | 17 | |
8cfac504 JT |
18 | /* Cache options */ |
19 | #define CONFIG_CMD_CACHE | |
20 | #define CONFIG_SYS_CACHELINE_SIZE 32 | |
21 | ||
22 | #define CONFIG_SYS_L2CACHE_OFF | |
23 | #ifndef CONFIG_SYS_L2CACHE_OFF | |
24 | # define CONFIG_SYS_L2_PL310 | |
25 | # define CONFIG_SYS_PL310_BASE 0xf8f02000 | |
26 | #endif | |
27 | ||
a2ec7fb9 MS |
28 | #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 |
29 | #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR | |
30 | #define CONFIG_SYS_TIMER_COUNTS_DOWN | |
31 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) | |
32 | ||
53e49f74 JT |
33 | /* Serial drivers */ |
34 | #define CONFIG_BAUDRATE 115200 | |
f22651cf MS |
35 | /* The following table includes the supported baudrates */ |
36 | #define CONFIG_SYS_BAUDRATE_TABLE \ | |
37 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} | |
38 | ||
53e49f74 JT |
39 | /* DCC driver */ |
40 | #if defined(CONFIG_ZYNQ_DCC) | |
41 | # define CONFIG_ARM_DCC | |
bf834950 MS |
42 | #else |
43 | # define CONFIG_ZYNQ_SERIAL | |
53e49f74 JT |
44 | #endif |
45 | ||
caacb33f | 46 | #define CONFIG_ZYNQ_GPIO |
caacb33f | 47 | |
f22651cf | 48 | /* Ethernet driver */ |
596e5782 | 49 | #if defined(CONFIG_ZYNQ_GEM) |
88fcfb1c JT |
50 | # define CONFIG_MII |
51 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN | |
88fcfb1c | 52 | # define CONFIG_PHY_MARVELL |
dd1c351f MS |
53 | # define CONFIG_BOOTP_SERVERIP |
54 | # define CONFIG_BOOTP_BOOTPATH | |
55 | # define CONFIG_BOOTP_GATEWAY | |
56 | # define CONFIG_BOOTP_HOSTNAME | |
57 | # define CONFIG_BOOTP_MAY_FAIL | |
88fcfb1c | 58 | #endif |
f22651cf | 59 | |
53e49f74 JT |
60 | /* SPI */ |
61 | #ifdef CONFIG_ZYNQ_SPI | |
53e49f74 JT |
62 | # define CONFIG_CMD_SF |
63 | #endif | |
64 | ||
a241d4ec JT |
65 | /* QSPI */ |
66 | #ifdef CONFIG_ZYNQ_QSPI | |
67 | # define CONFIG_SF_DEFAULT_SPEED 30000000 | |
232a8e4e | 68 | # define CONFIG_SPI_FLASH_ISSI |
a241d4ec JT |
69 | # define CONFIG_CMD_SF |
70 | #endif | |
71 | ||
fe5eddbf JT |
72 | /* NOR */ |
73 | #ifndef CONFIG_SYS_NO_FLASH | |
74 | # define CONFIG_SYS_FLASH_BASE 0xE2000000 | |
75 | # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) | |
76 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
77 | # define CONFIG_SYS_MAX_FLASH_SECT 512 | |
78 | # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 | |
79 | # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 | |
80 | # define CONFIG_FLASH_SHOW_PROGRESS 10 | |
81 | # define CONFIG_SYS_FLASH_CFI | |
82 | # undef CONFIG_SYS_FLASH_EMPTY_INFO | |
83 | # define CONFIG_FLASH_CFI_DRIVER | |
84 | # undef CONFIG_SYS_FLASH_PROTECTION | |
85 | # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE | |
86 | #endif | |
87 | ||
293eb33f | 88 | /* MMC */ |
ce0335f2 | 89 | #if defined(CONFIG_ZYNQ_SDHCI) |
293eb33f MS |
90 | # define CONFIG_MMC |
91 | # define CONFIG_GENERIC_MMC | |
92 | # define CONFIG_SDHCI | |
293eb33f | 93 | # define CONFIG_CMD_MMC |
f3bd7280 | 94 | # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 |
293eb33f MS |
95 | #endif |
96 | ||
c6024c8e SDPP |
97 | #ifdef CONFIG_ZYNQ_USB |
98 | # define CONFIG_USB_EHCI | |
99 | # define CONFIG_CMD_USB | |
100 | # define CONFIG_USB_STORAGE | |
c6024c8e SDPP |
101 | # define CONFIG_USB_EHCI_ZYNQ |
102 | # define CONFIG_USB_ULPI_VIEWPORT | |
103 | # define CONFIG_USB_ULPI | |
104 | # define CONFIG_EHCI_IS_TDI | |
105 | # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
87f3dbdf SDPP |
106 | |
107 | # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ | |
108 | # define CONFIG_USB_GADGET | |
109 | # define CONFIG_USB_GADGET_DUALSPEED | |
01acd6ab | 110 | # define CONFIG_USB_GADGET_DOWNLOAD |
87f3dbdf SDPP |
111 | # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 |
112 | # define DFU_DEFAULT_POLL_TIMEOUT 300 | |
01acd6ab | 113 | # define CONFIG_USB_FUNCTION_DFU |
87f3dbdf SDPP |
114 | # define CONFIG_DFU_RAM |
115 | # define CONFIG_USB_GADGET_VBUS_DRAW 2 | |
116 | # define CONFIG_G_DNL_VENDOR_NUM 0x03FD | |
117 | # define CONFIG_G_DNL_PRODUCT_NUM 0x0300 | |
118 | # define CONFIG_G_DNL_MANUFACTURER "Xilinx" | |
119 | # define CONFIG_USB_GADGET | |
120 | # define CONFIG_USB_CABLE_CHECK | |
121 | # define CONFIG_CMD_DFU | |
c4fa5114 | 122 | # define CONFIG_CMD_THOR_DOWNLOAD |
01acd6ab | 123 | # define CONFIG_USB_FUNCTION_THOR |
87f3dbdf SDPP |
124 | # define DFU_ALT_INFO_RAM \ |
125 | "dfu_ram_info=" \ | |
126 | "set dfu_alt_info " \ | |
127 | "${kernel_image} ram 0x3000000 0x500000\\\\;" \ | |
128 | "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ | |
129 | "${ramdisk_image} ram 0x2000000 0x600000\0" \ | |
c4fa5114 SDPP |
130 | "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ |
131 | "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" | |
87f3dbdf | 132 | |
ce0335f2 | 133 | # if defined(CONFIG_ZYNQ_SDHCI) |
87f3dbdf SDPP |
134 | # define CONFIG_DFU_MMC |
135 | # define DFU_ALT_INFO_MMC \ | |
136 | "dfu_mmc_info=" \ | |
137 | "set dfu_alt_info " \ | |
138 | "${kernel_image} fat 0 1\\\\;" \ | |
139 | "${devicetree_image} fat 0 1\\\\;" \ | |
140 | "${ramdisk_image} fat 0 1\0" \ | |
c4fa5114 SDPP |
141 | "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ |
142 | "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" | |
143 | ||
87f3dbdf SDPP |
144 | # define DFU_ALT_INFO \ |
145 | DFU_ALT_INFO_RAM \ | |
146 | DFU_ALT_INFO_MMC | |
147 | # else | |
148 | # define DFU_ALT_INFO \ | |
149 | DFU_ALT_INFO_RAM | |
150 | # endif | |
151 | #endif | |
152 | ||
153 | #if !defined(DFU_ALT_INFO) | |
154 | # define DFU_ALT_INFO | |
c6024c8e SDPP |
155 | #endif |
156 | ||
47b35a51 | 157 | #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) |
293eb33f | 158 | # define CONFIG_SUPPORT_VFAT |
47b35a51 | 159 | # define CONFIG_CMD_FAT |
293eb33f | 160 | # define CONFIG_CMD_EXT2 |
47b35a51 | 161 | # define CONFIG_FAT_WRITE |
293eb33f | 162 | # define CONFIG_DOS_PARTITION |
2e38a906 SDPP |
163 | # define CONFIG_CMD_EXT4 |
164 | # define CONFIG_CMD_EXT4_WRITE | |
e9d69c1c | 165 | # define CONFIG_CMD_FS_GENERIC |
293eb33f MS |
166 | #endif |
167 | ||
1c3f2c72 | 168 | #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) |
18948632 | 169 | #define CONFIG_SYS_I2C_ZYNQ |
1c3f2c72 SDPP |
170 | #endif |
171 | ||
8934f784 | 172 | /* I2C */ |
18948632 | 173 | #if defined(CONFIG_SYS_I2C_ZYNQ) |
8934f784 | 174 | # define CONFIG_CMD_I2C |
0bdffe71 | 175 | # define CONFIG_SYS_I2C |
0bdffe71 | 176 | # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 |
18948632 | 177 | # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 |
8934f784 MS |
178 | #endif |
179 | ||
65da1efd JT |
180 | /* EEPROM */ |
181 | #ifdef CONFIG_ZYNQ_EEPROM | |
182 | # define CONFIG_CMD_EEPROM | |
183 | # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 | |
184 | # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 | |
185 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 | |
186 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 | |
187 | # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ | |
188 | #endif | |
189 | ||
18eee22f JT |
190 | /* Total Size of Environment Sector */ |
191 | #define CONFIG_ENV_SIZE (128 << 10) | |
192 | ||
b660ca13 JT |
193 | /* Allow to overwrite serial and ethaddr */ |
194 | #define CONFIG_ENV_OVERWRITE | |
195 | ||
f22651cf | 196 | /* Environment */ |
ed53e4d6 JT |
197 | #ifndef CONFIG_ENV_IS_NOWHERE |
198 | # ifndef CONFIG_SYS_NO_FLASH | |
199 | # define CONFIG_ENV_IS_IN_FLASH | |
200 | # elif defined(CONFIG_SYS_NO_FLASH) | |
201 | # define CONFIG_ENV_IS_NOWHERE | |
202 | # endif | |
203 | ||
204 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
205 | # define CONFIG_ENV_OFFSET 0xE0000 | |
ed53e4d6 | 206 | #endif |
e83f61a6 JT |
207 | |
208 | /* Default environment */ | |
209 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
210 | "fit_image=fit.itb\0" \ | |
211 | "load_addr=0x2000000\0" \ | |
212 | "fit_size=0x800000\0" \ | |
213 | "flash_off=0x100000\0" \ | |
214 | "nor_flash_off=0xE2100000\0" \ | |
215 | "fdt_high=0x20000000\0" \ | |
216 | "initrd_high=0x20000000\0" \ | |
217 | "norboot=echo Copying FIT from NOR flash to RAM... && " \ | |
218 | "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ | |
219 | "bootm ${load_addr}\0" \ | |
220 | "sdboot=echo Copying FIT from SD to RAM... && " \ | |
e9d69c1c | 221 | "load mmc 0 ${load_addr} ${fit_image} && " \ |
e83f61a6 JT |
222 | "bootm ${load_addr}\0" \ |
223 | "jtagboot=echo TFTPing FIT to RAM... && " \ | |
dfa94058 | 224 | "tftpboot ${load_addr} ${fit_image} && " \ |
c6024c8e SDPP |
225 | "bootm ${load_addr}\0" \ |
226 | "usbboot=if usb start; then " \ | |
227 | "echo Copying FIT from USB to RAM... && " \ | |
e9d69c1c | 228 | "load usb 0 ${load_addr} ${fit_image} && " \ |
39bc1a8c | 229 | "bootm ${load_addr}; fi\0" \ |
87f3dbdf | 230 | DFU_ALT_INFO |
c6024c8e | 231 | |
e83f61a6 JT |
232 | #define CONFIG_BOOTCOMMAND "run $modeboot" |
233 | #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ | |
234 | #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ | |
f22651cf | 235 | |
36e0e197 | 236 | /* Miscellaneous configurable options */ |
36e0e197 JT |
237 | #define CONFIG_SYS_HUSH_PARSER |
238 | ||
239 | #define CONFIG_CMDLINE_EDITING | |
240 | #define CONFIG_AUTO_COMPLETE | |
b3de9249 | 241 | #define CONFIG_BOARD_LATE_INIT |
5a82d53c | 242 | #define CONFIG_DISPLAY_BOARDINFO |
36e0e197 | 243 | #define CONFIG_SYS_LONGHELP |
6c3e61de | 244 | #define CONFIG_CLOCKS |
d6c9bbaa | 245 | #define CONFIG_CMD_CLK |
841426ad | 246 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
36e0e197 JT |
247 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
248 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
f22651cf MS |
249 | sizeof(CONFIG_SYS_PROMPT) + 16) |
250 | ||
7cd04192 | 251 | /* Physical Memory map */ |
0f5c2156 | 252 | #define CONFIG_SYS_TEXT_BASE 0x4000000 |
f22651cf | 253 | |
7cd04192 JT |
254 | #define CONFIG_NR_DRAM_BANKS 1 |
255 | #define CONFIG_SYS_SDRAM_BASE 0 | |
7cd04192 JT |
256 | |
257 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
258 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) | |
259 | ||
599807fc | 260 | #define CONFIG_SYS_MALLOC_LEN 0x1400000 |
7cd04192 JT |
261 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE |
262 | #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN | |
263 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
264 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
265 | GENERATED_GBL_DATA_SIZE) | |
53e49f74 JT |
266 | |
267 | /* Enable the PL to be downloaded */ | |
268 | #define CONFIG_FPGA | |
269 | #define CONFIG_FPGA_XILINX | |
270 | #define CONFIG_FPGA_ZYNQPL | |
64e809af | 271 | #define CONFIG_CMD_FPGA_LOADMK |
26ea9ce5 MS |
272 | #define CONFIG_CMD_FPGA_LOADP |
273 | #define CONFIG_CMD_FPGA_LOADBP | |
1a897668 | 274 | #define CONFIG_CMD_FPGA_LOADFS |
53e49f74 JT |
275 | |
276 | /* Open Firmware flat tree */ | |
277 | #define CONFIG_OF_LIBFDT | |
278 | ||
279 | /* FIT support */ | |
21d29f7f | 280 | #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ |
f22651cf | 281 | |
f8f36c5d | 282 | /* FDT support */ |
f8f36c5d JT |
283 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
284 | ||
ae9f4899 | 285 | /* Extend size of kernel image for uncompression */ |
3d456eec | 286 | #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) |
ae9f4899 | 287 | |
09ed635b | 288 | /* Boot FreeBSD/vxWorks from an ELF image */ |
d82d63cc | 289 | #define CONFIG_SYS_MMC_MAX_DEVICE 1 |
09ed635b | 290 | |
0107f240 | 291 | #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" |
38716189 | 292 | |
f22651cf | 293 | /* Commands */ |
f22651cf MS |
294 | #define CONFIG_CMD_PING |
295 | #define CONFIG_CMD_DHCP | |
296 | #define CONFIG_CMD_MII | |
427b2d4e | 297 | #define CONFIG_CMD_TFTPPUT |
f22651cf | 298 | |
d7e269cf | 299 | /* SPL part */ |
d7e269cf MS |
300 | #define CONFIG_CMD_SPL |
301 | #define CONFIG_SPL_FRAMEWORK | |
302 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
303 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
304 | #define CONFIG_SPL_SERIAL_SUPPORT | |
1540fb72 | 305 | #define CONFIG_SPL_BOARD_INIT |
70bdf2f6 | 306 | #define CONFIG_SPL_RAM_DEVICE |
d7e269cf | 307 | |
0107f240 | 308 | #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" |
d7e269cf | 309 | |
d7e269cf | 310 | /* MMC support */ |
ce0335f2 | 311 | #ifdef CONFIG_ZYNQ_SDHCI |
d7e269cf MS |
312 | #define CONFIG_SPL_MMC_SUPPORT |
313 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
314 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
e2ccdf89 | 315 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
d7e269cf MS |
316 | #define CONFIG_SPL_LIBDISK_SUPPORT |
317 | #define CONFIG_SPL_FAT_SUPPORT | |
8741c490 | 318 | #ifdef CONFIG_OF_SEPARATE |
fa43f69e SG |
319 | # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" |
320 | #else | |
321 | # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
322 | #endif | |
0dfbcf02 MY |
323 | #endif |
324 | ||
325 | /* Disable dcache for SPL just for sure */ | |
326 | #ifdef CONFIG_SPL_BUILD | |
327 | #define CONFIG_SYS_DCACHE_OFF | |
328 | #undef CONFIG_FPGA | |
d7e269cf MS |
329 | #endif |
330 | ||
331 | /* Address in RAM where the parameters must be copied by SPL. */ | |
332 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 | |
333 | ||
205b4f33 GG |
334 | #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" |
335 | #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" | |
d7e269cf MS |
336 | |
337 | /* Not using MMC raw mode - just for compilation purpose */ | |
338 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 | |
339 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 | |
340 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 | |
341 | ||
342 | /* qspi mode is working fine */ | |
343 | #ifdef CONFIG_ZYNQ_QSPI | |
344 | #define CONFIG_SPL_SPI_SUPPORT | |
345 | #define CONFIG_SPL_SPI_LOAD | |
346 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
d7e269cf | 347 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 |
8e0e01d3 SDPP |
348 | #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 |
349 | #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 | |
350 | #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ | |
351 | CONFIG_SYS_SPI_ARGS_SIZE) | |
d7e269cf MS |
352 | #endif |
353 | ||
354 | /* for booting directly linux */ | |
355 | #define CONFIG_SPL_OS_BOOT | |
356 | ||
357 | /* SP location before relocation, must use scratch RAM */ | |
358 | #define CONFIG_SPL_TEXT_BASE 0x0 | |
359 | ||
360 | /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ | |
361 | #define CONFIG_SPL_MAX_SIZE 0x30000 | |
362 | ||
363 | /* The highest 64k OCM address */ | |
364 | #define OCM_HIGH_ADDR 0xffff0000 | |
365 | ||
d7e269cf | 366 | /* On the top of OCM space */ |
83b6464d | 367 | #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR |
ec016a17 | 368 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 |
d7e269cf | 369 | |
83b6464d MS |
370 | /* |
371 | * SPL stack position - and stack goes down | |
372 | * 0xfffffe00 is used for putting wfi loop. | |
373 | * Set it up as limit for now. | |
374 | */ | |
375 | #define CONFIG_SPL_STACK 0xfffffe00 | |
376 | ||
d7e269cf MS |
377 | /* BSS setup */ |
378 | #define CONFIG_SPL_BSS_START_ADDR 0x100000 | |
379 | #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 | |
380 | ||
381 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE | |
f22651cf | 382 | |
2b257216 | 383 | |
06fe8dae | 384 | #endif /* __CONFIG_ZYNQ_COMMON_H */ |