Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx

diff --combined board/amcc/taihu/taihu.c
index 891b4d924980fc6d8fbf3919198b5899b06b79ec,9bd30f96a73d1ac7ff2af3dd049649303d9453e7..e4fdf4ae74ab9463ef4f6bcdfc9308cd9d661606
--- 1/board/amcc/taihu/taihu.c
--- 2/board/amcc/taihu/taihu.c
+++ b/board/amcc/taihu/taihu.c
@@@ -165,20 -165,16 +165,20 @@@ unsigned char spi_read(void
        return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
  }
  
 -void taihu_spi_chipsel(int cs)
 +int spi_cs_is_valid(unsigned int bus, unsigned int cs)
  {
 -      gpio_write_bit(SPI_CS_GPIO0, cs);
 +      return bus == 0 && cs == 0;
  }
  
 -spi_chipsel_type spi_chipsel[]= {
 -      taihu_spi_chipsel
 -};
 +void spi_cs_activate(struct spi_slave *slave)
 +{
 +      gpio_write_bit(SPI_CS_GPIO0, 1);
 +}
  
 -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
 +void spi_cs_deactivate(struct spi_slave *slave)
 +{
 +      gpio_write_bit(SPI_CS_GPIO0, 0);
 +}
  
  #ifdef CONFIG_PCI
  static unsigned char int_lines[32] = {
@@@ -200,45 -196,3 +200,3 @@@ int pci_pre_init(struct pci_controller 
        return 1;
  }
  #endif /* CONFIG_PCI */
- 
- #ifdef CFG_DRAM_TEST
- int testdram(void)
- {
-       unsigned long *mem = (unsigned long *)0;
-       const unsigned long kend = (1024 / sizeof(unsigned long));
-       unsigned long k, n;
-       unsigned long msr;
-       unsigned long total_kbytes = CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS / 1024;
- 
-       msr = mfmsr();
-       mtmsr(msr & ~(MSR_EE));
- 
-       for (k = 0; k < total_kbytes ;
-            ++k, mem += (1024 / sizeof(unsigned long))) {
-               if ((k & 1023) == 0)
-                       printf("%3d MB\r", k / 1024);
- 
-               memset(mem, 0xaaaaaaaa, 1024);
-               for (n = 0; n < kend; ++n) {
-                       if (mem[n] != 0xaaaaaaaa) {
-                               printf("SDRAM test fails at: %08x\n",
-                                      (uint) & mem[n]);
-                               return 1;
-                       }
-               }
- 
-               memset(mem, 0x55555555, 1024);
-               for (n = 0; n < kend; ++n) {
-                       if (mem[n] != 0x55555555) {
-                               printf("SDRAM test fails at: %08x\n",
-                                      (uint) & mem[n]);
-                               return 1;
-                       }
-               }
-       }
-       printf("SDRAM test passes\n");
-       mtmsr(msr);
- 
-       return 0;
- }
- #endif /* CFG_DRAM_TEST */

diff --combined include/asm-ppc/processor.h
index 61a0d053e29bd1013b4efd5188474f4865a7a3e2,cfd84402379f68b5135b0e2603537cd9a72665fb..139e6869df767f1ae0ca39508a76a74914f28624
--- 1/include/asm-ppc/processor.h
--- 2/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@@ -460,17 -460,19 +460,19 @@@
  #define SPRN_PID2     0x27a   /* Process ID Register 2 */
  #define SPRN_MCSR     0x23c   /* Machine Check Syndrome register */
  #define SPRN_MCAR     0x23d   /* Machine Check Address register */
- #ifdef CONFIG_440
  #define MCSR_MCS      0x80000000      /* Machine Check Summary */
  #define MCSR_IB               0x40000000      /* Instruction PLB Error */
+ #if defined(CONFIG_440)
  #define MCSR_DRB      0x20000000      /* Data Read PLB Error */
  #define MCSR_DWB      0x10000000      /* Data Write PLB Error */
+ #else
+ #define MCSR_DB               0x20000000      /* Data PLB Error */
+ #endif /* defined(CONFIG_440) */
  #define MCSR_TLBP     0x08000000      /* TLB Parity Error */
  #define MCSR_ICP      0x04000000      /* I-Cache Parity Error */
  #define MCSR_DCSP     0x02000000      /* D-Cache Search Parity Error */
  #define MCSR_DCFP     0x01000000      /* D-Cache Flush Parity Error */
  #define MCSR_IMPE     0x00800000      /* Imprecise Machine Check Exception */
- #endif
  #define ESR_ST                0x00800000      /* Store Operation */
  
  #if defined(CONFIG_MPC86xx)
@@@ -960,17 -962,6 +962,17 @@@ n
  #define SR15  15
  
  #ifndef __ASSEMBLY__
 +
 +struct cpu_type {
 +      char name[15];
 +      u32 soc_ver;
 +};
 +
 +struct cpu_type *identify_cpu(uint ver);
 +
 +#define CPU_TYPE_ENTRY(n, v) \
 +      { .name = #n, .soc_ver = SVR_##v, }
 +
  #ifndef CONFIG_MACH_SPECIFIC
  extern int _machine;
  extern int have_of;