images of various types (kernel, FDT blob, ramdisk, etc.)
in a single blob. To boot this new uImage structure,
pass the address of the blob to the "bootm" command.
+ FIT is very flexible, supporting compression, multiple images,
+ multiple configurations, verification through hashing and also
+ verified boot (secure boot using RSA). This option enables that
+ feature.
config FIT_VERBOSE
bool "Display verbose messages on FIT boot"
This option enables signature verification of FIT uImages,
using a hash signed and verified using RSA. If
CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
- hashing is available using hardware, RSA library will use it.
- See doc/uImage.FIT/signature.txt for more details.
+ hashing is available using hardware, then then RSA library will use
+ it. See doc/uImage.FIT/signature.txt for more details.
+
+ WARNING: When relying on signed FIT images with a required signature
+ check the legacy image format is disabled by default, so that
+ unsigned images cannot be loaded. If a board needs the legacy image
+ format support in this case, enable it using
+ CONFIG_IMAGE_FORMAT_LEGACY.
+
+config FIT_BEST_MATCH
+ bool "Select the best match for the kernel device tree"
+ depends on FIT
+ help
+ When no configuration is explicitly selected, default to the
+ one whose fdt's compatibility field best matches that of
+ U-Boot itself. A match is considered "best" if it matches the
+ most specific compatibility entry of U-Boot's fdt's root node.
+ The order of entries in the configuration's fdt is ignored.
+
+config FIT_VERBOSE
+ bool "Show verbose messages when FIT images fails"
+ depends on FIT
+ help
+ Generally a system will have valid FIT images so debug messages
+ are a waste of code space. If you are debugging your images then
+ you can enable this option to get more verbose information about
+ failures.
+
+config OF_BOARD_SETUP
+ bool "Set up board-specific details in device tree before boot"
+ depends on OF_LIBFDT
+ help
+ This causes U-Boot to call ft_board_setup() before booting into
+ the Operating System. This function can set up various
+ board-specific information in the device tree for use by the OS.
+ The device tree is then passed to the OS.
+
+config OF_SYSTEM_SETUP
+ bool "Set up system-specific details in device tree before boot"
+ depends on OF_LIBFDT
+ help
+ This causes U-Boot to call ft_system_setup() before booting into
+ the Operating System. This function can set up various
+ system-specific information in the device tree for use by the OS.
+ The device tree is then passed to the OS.
+
+config OF_STDOUT_VIA_ALIAS
+ bool "Update the device-tree stdout alias from U-Boot"
+ depends on OF_LIBFDT
+ help
+ This uses U-Boot's serial alias from the aliases node to update
+ the device tree passed to the OS. The "linux,stdout-path" property
+ in the chosen node is set to point to the correct serial node.
+ This option currently references CONFIG_CONS_INDEX, which is
+ incorrect when used with device tree as this option does not
+ exist / should not be used.
config SYS_EXTRA_OPTIONS
string "Extra Options (DEPRECATED)"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
+config SPL_LOAD_FIT
+ bool "Enable SPL loading U-Boot as a FIT"
+ depends on FIT
+ help
+ Normally with the SPL framework a legacy image is generated as part
+ of the build. This contains U-Boot along with information as to
+ where it should be loaded. This option instead enables generation
+ of a FIT (Flat Image Tree) which provides more flexibility. In
+ particular it can handle selecting from multiple device tree
+ and passing the correct one to U-Boot.
+
config SYS_CLK_FREQ
depends on ARC || ARCH_SUNXI
int "CPU clock frequency"
cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
-DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
+ifdef CONFIG_SPL_LOAD_FIT
+MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
+ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
+ -b $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST)))
+else
MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
+endif
MKIMAGEFLAGS_u-boot-dtb.img = $(MKIMAGEFLAGS_u-boot.img)
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage
-u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl: u-boot.bin FORCE
+u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl: \
+ $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE
$(call if_changed,mkimage)
u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
will set it back to normal. This command currently
supports i.MX53 and i.MX6.
-- Signing support:
- CONFIG_RSA
-
- This enables the RSA algorithm used for FIT image verification
- in U-Boot. See doc/uImage.FIT/signature.txt for more information.
-
- The Modular Exponentiation algorithm in RSA is implemented using
- driver model. So CONFIG_DM needs to be enabled by default for this
- library to function.
-
- The signing part is build into mkimage regardless of this
- option. The software based modular exponentiation is built into
- mkimage irrespective of this option.
-
- bootcount support:
CONFIG_BOOTCOUNT_LIMIT
enabled per default for backward compatibility.
- FIT image support:
- CONFIG_FIT
- Enable support for the FIT uImage format.
-
- CONFIG_FIT_BEST_MATCH
- When no configuration is explicitly selected, default to the
- one whose fdt's compatibility field best matches that of
- U-Boot itself. A match is considered "best" if it matches the
- most specific compatibility entry of U-Boot's fdt's root node.
- The order of entries in the configuration's fdt is ignored.
-
- CONFIG_FIT_SIGNATURE
- This option enables signature verification of FIT uImages,
- using a hash signed and verified using RSA. If
- CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
- hashing is available using hardware, RSA library will use it.
- See doc/uImage.FIT/signature.txt for more details.
-
- WARNING: When relying on signed FIT images with required
- signature check the legacy image format is default
- disabled. If a board need legacy image format support
- enable this through CONFIG_IMAGE_FORMAT_LEGACY
-
CONFIG_FIT_DISABLE_SHA256
Supporting SHA256 hashes has quite an impact on binary size.
For constrained systems sha256 hash support can be disabled
with this option.
+ TODO(sjg@chromium.org): Adjust this option to be positive,
+ and move it to Kconfig
+
- Standalone program support:
CONFIG_STANDALONE_LOAD_ADDR
select DM
select DM_SERIAL
select DM_GPIO
+ select TI_I2C_BOARD_DETECT
config TARGET_AM335X_SL50
bool "Support am335x_sl50"
bool "Support am43xx_evm"
select CPU_V7
select SUPPORT_SPL
+ select TI_I2C_BOARD_DETECT
config TARGET_BAV335X
bool "Support bav335x"
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct ns16550_platdata lpc32xx_uart[] = {
- { UART3_BASE, 2, CONFIG_SYS_NS16550_CLK },
- { UART4_BASE, 2, CONFIG_SYS_NS16550_CLK },
- { UART5_BASE, 2, CONFIG_SYS_NS16550_CLK },
- { UART6_BASE, 2, CONFIG_SYS_NS16550_CLK },
+ { .base = UART3_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = UART4_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = UART5_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = UART6_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
};
#if defined(CONFIG_LPC32XX_HSUART)
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct ns16550_platdata am33xx_serial[] = {
- { CONFIG_SYS_NS16550_COM1, 2, CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
# ifdef CONFIG_SYS_NS16550_COM2
- { CONFIG_SYS_NS16550_COM2, 2, CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
# ifdef CONFIG_SYS_NS16550_COM3
- { CONFIG_SYS_NS16550_COM3, 2, CONFIG_SYS_NS16550_CLK },
- { CONFIG_SYS_NS16550_COM4, 2, CONFIG_SYS_NS16550_CLK },
- { CONFIG_SYS_NS16550_COM5, 2, CONFIG_SYS_NS16550_CLK },
- { CONFIG_SYS_NS16550_COM6, 2, CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
# endif
# endif
};
wait_for_lock(base);
}
-void setup_clocks_for_console(void)
+static void setup_clocks_for_console(void)
{
/* Do not add any spl_debug prints in this function */
clrsetbits_le32((*prcm)->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK,
disable_clock_domain(clk_domains[i]);
}
-void prcm_init(void)
+/**
+ * setup_early_clocks() - Setup early clocks needed for SoC
+ *
+ * Setup clocks for console, SPL basic initialization clocks and initialize
+ * the timer. This is invoked prior prcm_init.
+ */
+void setup_early_clocks(void)
{
switch (omap_hw_init_context()) {
case OMAP_INIT_CONTEXT_SPL:
case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
+ setup_clocks_for_console();
enable_basic_clocks();
timer_init();
+ /* Fall through */
+ }
+}
+
+void prcm_init(void)
+{
+ switch (omap_hw_init_context()) {
+ case OMAP_INIT_CONTEXT_SPL:
+ case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
+ case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
scale_vcores(*omap_vcores);
setup_dplls();
setup_warmreset_time();
{
struct emif_reg_struct *emif = (struct emif_reg_struct *)base;
- writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl_shdw);
+ if (!is_dra7xx())
+ writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl_shdw);
+ else
+ writel(regs->ref_ctrl_final, &emif->emif_sdram_ref_ctrl_shdw);
+
writel(regs->sdram_tim1, &emif->emif_sdram_tim_1_shdw);
writel(regs->sdram_tim2, &emif->emif_sdram_tim_2_shdw);
writel(regs->sdram_tim3, &emif->emif_sdram_tim_3_shdw);
{
struct emif_reg_struct *emif = (struct emif_reg_struct *)base;
u32 *emif_ext_phy_ctrl_reg, *emif_phy_status;
- u32 reg, i;
+ u32 reg, i, phy;
emif_phy_status = (u32 *)&emif->emif_ddr_phy_status[7];
+ phy = readl(&emif->emif_ddr_phy_ctrl_1);
/* Update PHY_REG_RDDQS_RATIO */
emif_ext_phy_ctrl_reg = (u32 *)&emif->emif_ddr_ext_phy_ctrl_7;
- for (i = 0; i < PHY_RDDQS_RATIO_REGS; i++) {
- reg = readl(emif_phy_status++);
- writel(reg, emif_ext_phy_ctrl_reg++);
- writel(reg, emif_ext_phy_ctrl_reg++);
- }
+ if (!(phy & EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_MASK))
+ for (i = 0; i < PHY_RDDQS_RATIO_REGS; i++) {
+ reg = readl(emif_phy_status++);
+ writel(reg, emif_ext_phy_ctrl_reg++);
+ writel(reg, emif_ext_phy_ctrl_reg++);
+ }
/* Update PHY_REG_FIFO_WE_SLAVE_RATIO */
emif_ext_phy_ctrl_reg = (u32 *)&emif->emif_ddr_ext_phy_ctrl_2;
- for (i = 0; i < PHY_FIFO_WE_SLAVE_RATIO_REGS; i++) {
- reg = readl(emif_phy_status++);
- writel(reg, emif_ext_phy_ctrl_reg++);
- writel(reg, emif_ext_phy_ctrl_reg++);
- }
+ emif_phy_status = (u32 *)&emif->emif_ddr_phy_status[12];
+ if (!(phy & EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_MASK))
+ for (i = 0; i < PHY_FIFO_WE_SLAVE_RATIO_REGS; i++) {
+ reg = readl(emif_phy_status++);
+ writel(reg, emif_ext_phy_ctrl_reg++);
+ writel(reg, emif_ext_phy_ctrl_reg++);
+ }
/* Update PHY_REG_WR_DQ/DQS_SLAVE_RATIO */
emif_ext_phy_ctrl_reg = (u32 *)&emif->emif_ddr_ext_phy_ctrl_12;
- for (i = 0; i < PHY_REG_WR_DQ_SLAVE_RATIO_REGS; i++) {
- reg = readl(emif_phy_status++);
- writel(reg, emif_ext_phy_ctrl_reg++);
- writel(reg, emif_ext_phy_ctrl_reg++);
- }
+ emif_phy_status = (u32 *)&emif->emif_ddr_phy_status[17];
+ if (!(phy & EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_MASK))
+ for (i = 0; i < PHY_REG_WR_DQ_SLAVE_RATIO_REGS; i++) {
+ reg = readl(emif_phy_status++);
+ writel(reg, emif_ext_phy_ctrl_reg++);
+ writel(reg, emif_ext_phy_ctrl_reg++);
+ }
/* Disable Leveling */
writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1);
{
struct emif_reg_struct *emif = (struct emif_reg_struct *)base;
- if (warm_reset())
+ if (warm_reset()) {
emif_reset_phy(base);
+ writel(0x0, &emif->emif_pwr_mgmt_ctrl);
+ }
do_ext_phy_settings(base, regs);
writel(regs->ref_ctrl | EMIF_REG_INITREF_DIS_MASK,
&hw_lisa_map_regs->dmm_lisa_map_1);
writel(lisa_map_regs->dmm_lisa_map_0,
&hw_lisa_map_regs->dmm_lisa_map_0);
+
+ setbits_le32(MA_PRIORITY, MA_HIMEM_INTERLEAVE_UN_MASK);
}
/*
}
#endif /* CONFIG_ARCH_CPU_INIT */
-/*
- * Routine: s_init
- * Description: Does early system init of watchdog, muxing, andclocks
+/**
+ * do_board_detect() - Detect board description
+ *
+ * Function to detect board description. This is expected to be
+ * overridden in the SoC family board file where desired.
+ */
+void __weak do_board_detect(void)
+{
+}
+
+void s_init(void)
+{
+}
+
+/**
+ * early_system_init - Does Early system initialization.
+ *
+ * Does early system init of watchdog, muxing, andclocks
* Watchdog disable is done always. For the rest what gets done
- * depends on the boot mode in which this function is executed
- * 1. s_init of SPL running from SRAM
- * 2. s_init of U-Boot running from FLASH
- * 3. s_init of U-Boot loaded to SDRAM by SPL
- * 4. s_init of U-Boot loaded to SDRAM by ROM code using the
+ * depends on the boot mode in which this function is executed when
+ * 1. SPL running from SRAM
+ * 2. U-Boot running from FLASH
+ * 3. U-Boot loaded to SDRAM by SPL
+ * 4. U-Boot loaded to SDRAM by ROM code using the
* Configuration Header feature
* Please have a look at the respective functions to see what gets
* done in each of these cases
* This function is called with SRAM stack.
*/
-void s_init(void)
+void early_system_init(void)
{
init_omap_revision();
hw_data_init();
set_mux_conf_regs();
#ifdef CONFIG_SPL_BUILD
srcomp_enable();
- setup_clocks_for_console();
-
do_io_settings();
#endif
+ setup_early_clocks();
+ do_board_detect();
prcm_init();
}
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong dummy)
{
+ early_system_init();
#ifdef CONFIG_BOARD_EARLY_INIT_F
board_early_init_f();
#endif
}
#endif
+int arch_cpu_init_dm(void)
+{
+ early_system_init();
+ return 0;
+}
+
/*
* Routine: wait_for_command_complete
* Description: Wait for posting to finish on watchdog
config TARGET_DRA7XX_EVM
bool "TI DRA7XX"
+ select TI_I2C_BOARD_DETECT
config TARGET_BEAGLE_X15
bool "BeagleBoard X15"
+ select TI_I2C_BOARD_DETECT
endchoice
.emif_rd_wr_exec_thresh = 0x40000305
};
-const struct emif_regs emif_1_regs_ddr3_532_mhz_1cs_dra_es1 = {
- .sdram_config_init = 0x61851ab2,
- .sdram_config = 0x61851ab2,
- .sdram_config2 = 0x08000000,
- .ref_ctrl = 0x000040F1,
- .ref_ctrl_final = 0x00001035,
- .sdram_tim1 = 0xCCCF36B3,
- .sdram_tim2 = 0x308F7FDA,
- .sdram_tim3 = 0x027F88A8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x0007190B,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0024400B,
- .emif_ddr_phy_ctlr_1 = 0x0E24400B,
- .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
- .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
- .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
- .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
-};
-
-const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = {
- .sdram_config_init = 0x61851B32,
- .sdram_config = 0x61851B32,
- .sdram_config2 = 0x08000000,
- .ref_ctrl = 0x000040F1,
- .ref_ctrl_final = 0x00001035,
- .sdram_tim1 = 0xCCCF36B3,
- .sdram_tim2 = 0x308F7FDA,
- .sdram_tim3 = 0x027F88A8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x0007190B,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0024400B,
- .emif_ddr_phy_ctlr_1 = 0x0E24400B,
- .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
- .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
- .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
- .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
-};
-
-const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = {
- .sdram_config_init = 0x61862B32,
- .sdram_config = 0x61862B32,
- .sdram_config2 = 0x08000000,
- .ref_ctrl = 0x0000514C,
- .ref_ctrl_final = 0x0000144A,
- .sdram_tim1 = 0xD113781C,
- .sdram_tim2 = 0x305A7FDA,
- .sdram_tim3 = 0x409F86A8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x5007190B,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0024400D,
- .emif_ddr_phy_ctlr_1 = 0x0E24400D,
- .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00A400A4,
- .emif_ddr_ext_phy_ctrl_3 = 0x00A900A9,
- .emif_ddr_ext_phy_ctrl_4 = 0x00B000B0,
- .emif_ddr_ext_phy_ctrl_5 = 0x00B000B0,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
-};
-
const struct dmm_lisa_map_regs lisa_map_4G_x_2_x_2 = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.is_ma_present = 0x1
};
-/*
- * DRA752 EVM board has 1.5 GB of memory
- * EMIF1 --> 2Gb * 2 = 512MB
- * EMIF2 --> 2Gb * 4 = 1GB
- * so mapping 1GB interleaved and 512MB non-interleaved
- */
-const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2_2G_x_1_x_2 = {
- .dmm_lisa_map_0 = 0x0,
- .dmm_lisa_map_1 = 0x80640300,
- .dmm_lisa_map_2 = 0xC0500220,
- .dmm_lisa_map_3 = 0xFF020100,
- .is_ma_present = 0x1
-};
-
-/*
- * DRA752 EVM EMIF1 ONLY CONFIGURATION
- */
-const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2 = {
- .dmm_lisa_map_0 = 0x0,
- .dmm_lisa_map_1 = 0x0,
- .dmm_lisa_map_2 = 0x80500100,
- .dmm_lisa_map_3 = 0xFF020100,
- .is_ma_present = 0x1
-};
-
-/*
- * DRA752 EVM EMIF2 ONLY CONFIGURATION
- */
-const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
- .dmm_lisa_map_0 = 0x0,
- .dmm_lisa_map_1 = 0x0,
- .dmm_lisa_map_2 = 0x80600200,
- .dmm_lisa_map_3 = 0xFF020100,
- .is_ma_present = 0x1
-};
-
-/*
- * DRA722 EVM EMIF1 CONFIGURATION
- */
-const struct dmm_lisa_map_regs lisa_map_2G_x_2 = {
- .dmm_lisa_map_0 = 0x0,
- .dmm_lisa_map_1 = 0x0,
- .dmm_lisa_map_2 = 0x80600100,
- .dmm_lisa_map_3 = 0xFF020100,
- .is_ma_present = 0x1
-};
-
static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
{
switch (omap_revision()) {
*regs = &emif_regs_532_mhz_2cs_es2;
break;
case OMAP5432_ES2_0:
+ default:
*regs = &emif_regs_ddr3_532_mhz_1cs_es2;
break;
- case DRA752_ES1_0:
- case DRA752_ES1_1:
- case DRA752_ES2_0:
- switch (emif_nr) {
- case 1:
- *regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1;
- break;
- case 2:
- *regs = &emif_2_regs_ddr3_532_mhz_1cs_dra_es1;
- break;
- }
- break;
- case DRA722_ES1_0:
- *regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1;
- break;
- default:
- *regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1;
}
}
case OMAP5430_ES2_0:
case OMAP5432_ES1_0:
case OMAP5432_ES2_0:
+ default:
*dmm_lisa_regs = &lisa_map_4G_x_2_x_2;
break;
- case DRA752_ES1_0:
- case DRA752_ES1_1:
- case DRA752_ES2_0:
- *dmm_lisa_regs = &lisa_map_2G_x_2_x_2_2G_x_1_x_2;
- break;
- case DRA722_ES1_0:
- default:
- *dmm_lisa_regs = &lisa_map_2G_x_2;
}
}
u32 *emif_ext_phy_ctrl_base = 0;
u32 emif_nr;
const u32 *ext_phy_ctrl_const_regs;
- u32 i, hw_leveling, size;
+ u32 i, hw_leveling, size, phy;
emif_nr = (base == EMIF1_BASE) ? 1 : 2;
hw_leveling = regs->emif_rd_wr_lvl_rmp_ctl >> EMIF_REG_RDWRLVL_EN_SHIFT;
+ phy = regs->emif_ddr_phy_ctlr_1_init;
emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1);
writel(ext_phy_ctrl_const_regs[0], &emif_ext_phy_ctrl_base[0]);
writel(ext_phy_ctrl_const_regs[0], &emif_ext_phy_ctrl_base[1]);
- if (!hw_leveling) {
- /*
- * Copy the predefined PHY register values
- * in case of sw leveling
- */
- for (i = 1; i < 25; i++) {
+ /*
+ * Copy the predefined PHY register values
+ * if leveling is disabled.
+ */
+ if (phy & EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_MASK)
+ for (i = 1; i < 6; i++) {
writel(ext_phy_ctrl_const_regs[i],
&emif_ext_phy_ctrl_base[i * 2]);
writel(ext_phy_ctrl_const_regs[i],
&emif_ext_phy_ctrl_base[i * 2 + 1]);
}
- } else {
+
+ if (phy & EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_MASK)
+ for (i = 6; i < 11; i++) {
+ writel(ext_phy_ctrl_const_regs[i],
+ &emif_ext_phy_ctrl_base[i * 2]);
+ writel(ext_phy_ctrl_const_regs[i],
+ &emif_ext_phy_ctrl_base[i * 2 + 1]);
+ }
+
+ if (phy & EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_MASK)
+ for (i = 11; i < 25; i++) {
+ writel(ext_phy_ctrl_const_regs[i],
+ &emif_ext_phy_ctrl_base[i * 2]);
+ writel(ext_phy_ctrl_const_regs[i],
+ &emif_ext_phy_ctrl_base[i * 2 + 1]);
+ }
+
+ if (hw_leveling) {
/*
* Write the init value for HW levling to occur
*/
*(.__end)
} >.sram
+ _image_binary_end = .;
+
.bss_start : {
. = ALIGN(8);
KEEP(*(.__bss_start));
};
#include "k2g-netcp.dtsi"
+
+ pmmc: pmmc@2900000 {
+ compatible = "ti,power-processor";
+ reg = <0x02900000 0x40000>;
+ ti,lpsc_module = <1>;
+ };
+
};
};
void set_muxconf_regs_essential(void);
u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
-void setup_clocks_for_console(void);
+void setup_early_clocks(void);
void prcm_init(void);
+void do_board_detect(void);
void bypass_dpll(u32 const base);
void freq_update_core(void);
u32 get_sys_clk_freq(void);
void init_omap_revision(void);
void do_io_settings(void);
void sri2c_init(void);
-void gpi2c_init(void);
int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
u32 warm_reset(void);
void force_emif_self_refresh(void);
void set_muxconf_regs_essential(void);
u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
-void setup_clocks_for_console(void);
+void setup_early_clocks(void);
void prcm_init(void);
+void do_board_detect(void);
void bypass_dpll(u32 const base);
void freq_update_core(void);
u32 get_sys_clk_freq(void);
void init_omap_revision(void);
void do_io_settings(void);
void sri2c_init(void);
-void gpi2c_init(void);
int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
u32 warm_reset(void);
void force_emif_self_refresh(void);
#define EMIF_REG_DLL_SLAVE_DLY_CTRL_SHDW_MASK (0xFF << 4)
#define EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHDW_SHIFT 12
#define EMIF_EMIF_DDR_PHY_CTRL_1_BASE_VAL_SHDW_MASK (0xFFFFF << 12)
+#define EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_SHIFT 25
+#define EMIF_DDR_PHY_CTRL_1_WRLVL_MASK_MASK (1 << 25)
+#define EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_SHIFT 26
+#define EMIF_DDR_PHY_CTRL_1_RDLVLGATE_MASK_MASK (1 << 26)
+#define EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_SHIFT 27
+#define EMIF_DDR_PHY_CTRL_1_RDLVL_MASK_MASK (1 << 27)
/* DDR_PHY_CTRL_2 */
#define EMIF_REG_DDR_PHY_CTRL_2_SHIFT 0
/* Memory Adapter */
#define MA_BASE 0x482AF040
+#define MA_PRIORITY 0x482A2000
+#define MA_HIMEM_INTERLEAVE_UN_SHIFT 8
+#define MA_HIMEM_INTERLEAVE_UN_MASK (1 << 8)
/* DMM_LISA_MAP */
#define EMIF_SYS_ADDR_SHIFT 24
#define CONFIG_CMD_BLOB
#define CONFIG_FSL_SEC_MON
#define CONFIG_SHA_PROG_HW_ACCEL
-#define CONFIG_RSA
#define CONFIG_RSA_FREESCALE_EXP
#ifndef CONFIG_FSL_CAAM
#define CONFIG_FSL_CAAM
#endif
-#ifndef CONFIG_DM
-#define CONFIG_DM
-#endif
-
#define CONFIG_KEY_REVOCATION
#ifndef CONFIG_SYS_RAMBOOT
/* The key used for verification of next level images
void omap_die_id(unsigned int *die_id);
+/* Initialize general purpose I2C(0) on the SoC */
+void gpi2c_init(void);
+
/* ABB */
#define OMAP_ABB_NOMINAL_OPP 0
#define OMAP_ABB_FAST_OPP 1
#define OMAP_SRAM_SCRATCH_VCORES_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x1C)
#define OMAP_SRAM_SCRATCH_SYS_CTRL (SRAM_SCRATCH_SPACE_ADDR + 0x20)
#define OMAP_SRAM_SCRATCH_BOOT_PARAMS (SRAM_SCRATCH_SPACE_ADDR + 0x24)
-#define OMAP5_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x28)
+#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR + 0x28)
+#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200)
+#define OMAP_SRAM_SCRATCH_SPACE_END (OMAP_SRAM_SCRATCH_BOARD_EEPROM_END)
/* Boot parameters */
#define DEVICE_DATA_OFFSET 0x18
config TARGET_CALIMAIN
bool "Calimain board"
+config TARGET_LEGOEV3
+ bool "LEGO MINDSTORMS EV3"
+
endchoice
config SYS_SOC
source "board/davinci/da8xxevm/Kconfig"
source "board/davinci/ea20/Kconfig"
source "board/omicron/calimain/Kconfig"
+source "board/lego/ev3/Kconfig"
endif
#include <asm/arch/pinmux_defs.h>
/* SPI pin muxer settings */
+const struct pinmux_config spi0_pins_base[] = {
+ { pinmux(3), 1, 0 }, /* SPI0_CLK */
+ { pinmux(3), 1, 2 }, /* SPI0_SOMI */
+ { pinmux(3), 1, 3 }, /* SPI0_SIMO */
+};
+
+const struct pinmux_config spi0_pins_scs0[] = {
+ { pinmux(4), 1, 1 }, /* SPI0_SCS[0] */
+};
+
const struct pinmux_config spi1_pins_base[] = {
{ pinmux(5), 1, 2 }, /* SPI1_CLK */
{ pinmux(5), 1, 4 }, /* SPI1_SOMI */
#define DAVINCI_SYSCFG_SUSPSRC_SPI0 (1 << 21)
#define DAVINCI_SYSCFG_SUSPSRC_SPI1 (1 << 22)
#define DAVINCI_SYSCFG_SUSPSRC_UART0 (1 << 18)
+#define DAVINCI_SYSCFG_SUSPSRC_UART1 (1 << 19)
#define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20)
#define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27)
obj-y += msmc.o
obj-y += ddr3.o cmd_ddr3.o
obj-y += keystone.o
+obj-$(CONFIG_K2E_EVM) += ddr3_spd.o
+obj-$(CONFIG_K2HK_EVM) += ddr3_spd.o
+++ /dev/null
-/*
- * Keystone2: get clk rate for K2E
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/clock_defs.h>
-
-/**
- * pll_freq_get - get pll frequency
- * Fout = Fref * NF(mult) / NR(prediv) / OD
- * @pll: pll identifier
- */
-static unsigned long pll_freq_get(int pll)
-{
- unsigned long mult = 1, prediv = 1, output_div = 2;
- unsigned long ret;
- u32 tmp, reg;
-
- if (pll == CORE_PLL) {
- ret = external_clk[sys_clk];
- if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN) {
- /* PLL mode */
- tmp = __raw_readl(KS2_MAINPLLCTL0);
- prediv = (tmp & PLL_DIV_MASK) + 1;
- mult = (((tmp & PLLM_MULT_HI_SMASK) >> 6) |
- (pllctl_reg_read(pll, mult) &
- PLLM_MULT_LO_MASK)) + 1;
- output_div = ((pllctl_reg_read(pll, secctl) >>
- PLL_CLKOD_SHIFT) & PLL_CLKOD_MASK) + 1;
-
- ret = ret / prediv / output_div * mult;
- }
- } else {
- switch (pll) {
- case PASS_PLL:
- ret = external_clk[pa_clk];
- reg = KS2_PASSPLLCTL0;
- break;
- case DDR3_PLL:
- ret = external_clk[ddr3a_clk];
- reg = KS2_DDR3APLLCTL0;
- break;
- default:
- return 0;
- }
-
- tmp = __raw_readl(reg);
-
- if (!(tmp & PLLCTL_BYPASS)) {
- /* Bypass disabled */
- prediv = (tmp & PLL_DIV_MASK) + 1;
- mult = ((tmp >> PLL_MULT_SHIFT) & PLL_MULT_MASK) + 1;
- output_div = ((tmp >> PLL_CLKOD_SHIFT) &
- PLL_CLKOD_MASK) + 1;
- ret = ((ret / prediv) * mult) / output_div;
- }
- }
-
- return ret;
-}
-
-unsigned long clk_get_rate(unsigned int clk)
-{
- switch (clk) {
- case core_pll_clk: return pll_freq_get(CORE_PLL);
- case pass_pll_clk: return pll_freq_get(PASS_PLL);
- case ddr3_pll_clk: return pll_freq_get(DDR3_PLL);
- case sys_clk0_1_clk:
- case sys_clk0_clk: return pll_freq_get(CORE_PLL) / pll0div_read(1);
- case sys_clk1_clk: return pll_freq_get(CORE_PLL) / pll0div_read(2);
- case sys_clk2_clk: return pll_freq_get(CORE_PLL) / pll0div_read(3);
- case sys_clk3_clk: return pll_freq_get(CORE_PLL) / pll0div_read(4);
- case sys_clk0_2_clk: return clk_get_rate(sys_clk0_clk) / 2;
- case sys_clk0_3_clk: return clk_get_rate(sys_clk0_clk) / 3;
- case sys_clk0_4_clk: return clk_get_rate(sys_clk0_clk) / 4;
- case sys_clk0_6_clk: return clk_get_rate(sys_clk0_clk) / 6;
- case sys_clk0_8_clk: return clk_get_rate(sys_clk0_clk) / 8;
- case sys_clk0_12_clk: return clk_get_rate(sys_clk0_clk) / 12;
- case sys_clk0_24_clk: return clk_get_rate(sys_clk0_clk) / 24;
- case sys_clk1_3_clk: return clk_get_rate(sys_clk1_clk) / 3;
- case sys_clk1_4_clk: return clk_get_rate(sys_clk1_clk) / 4;
- case sys_clk1_6_clk: return clk_get_rate(sys_clk1_clk) / 6;
- case sys_clk1_12_clk: return clk_get_rate(sys_clk1_clk) / 12;
- default:
- break;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Keystone2: get clk rate for K2HK
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/clock_defs.h>
-
-/**
- * pll_freq_get - get pll frequency
- * Fout = Fref * NF(mult) / NR(prediv) / OD
- * @pll: pll identifier
- */
-static unsigned long pll_freq_get(int pll)
-{
- unsigned long mult = 1, prediv = 1, output_div = 2;
- unsigned long ret;
- u32 tmp, reg;
-
- if (pll == CORE_PLL) {
- ret = external_clk[sys_clk];
- if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN) {
- /* PLL mode */
- tmp = __raw_readl(KS2_MAINPLLCTL0);
- prediv = (tmp & PLL_DIV_MASK) + 1;
- mult = (((tmp & PLLM_MULT_HI_SMASK) >> 6) |
- (pllctl_reg_read(pll, mult) &
- PLLM_MULT_LO_MASK)) + 1;
- output_div = ((pllctl_reg_read(pll, secctl) >>
- PLL_CLKOD_SHIFT) & PLL_CLKOD_MASK) + 1;
-
- ret = ret / prediv / output_div * mult;
- }
- } else {
- switch (pll) {
- case PASS_PLL:
- ret = external_clk[pa_clk];
- reg = KS2_PASSPLLCTL0;
- break;
- case TETRIS_PLL:
- ret = external_clk[tetris_clk];
- reg = KS2_ARMPLLCTL0;
- break;
- case DDR3A_PLL:
- ret = external_clk[ddr3a_clk];
- reg = KS2_DDR3APLLCTL0;
- break;
- case DDR3B_PLL:
- ret = external_clk[ddr3b_clk];
- reg = KS2_DDR3BPLLCTL0;
- break;
- default:
- return 0;
- }
-
- tmp = __raw_readl(reg);
-
- if (!(tmp & PLLCTL_BYPASS)) {
- /* Bypass disabled */
- prediv = (tmp & PLL_DIV_MASK) + 1;
- mult = ((tmp >> PLL_MULT_SHIFT) & PLL_MULT_MASK) + 1;
- output_div = ((tmp >> PLL_CLKOD_SHIFT) &
- PLL_CLKOD_MASK) + 1;
- ret = ((ret / prediv) * mult) / output_div;
- }
- }
-
- return ret;
-}
-
-unsigned long clk_get_rate(unsigned int clk)
-{
- switch (clk) {
- case core_pll_clk: return pll_freq_get(CORE_PLL);
- case pass_pll_clk: return pll_freq_get(PASS_PLL);
- case tetris_pll_clk: return pll_freq_get(TETRIS_PLL);
- case ddr3a_pll_clk: return pll_freq_get(DDR3A_PLL);
- case ddr3b_pll_clk: return pll_freq_get(DDR3B_PLL);
- case sys_clk0_1_clk:
- case sys_clk0_clk: return pll_freq_get(CORE_PLL) / pll0div_read(1);
- case sys_clk1_clk: return pll_freq_get(CORE_PLL) / pll0div_read(2);
- case sys_clk2_clk: return pll_freq_get(CORE_PLL) / pll0div_read(3);
- case sys_clk3_clk: return pll_freq_get(CORE_PLL) / pll0div_read(4);
- case sys_clk0_2_clk: return clk_get_rate(sys_clk0_clk) / 2;
- case sys_clk0_3_clk: return clk_get_rate(sys_clk0_clk) / 3;
- case sys_clk0_4_clk: return clk_get_rate(sys_clk0_clk) / 4;
- case sys_clk0_6_clk: return clk_get_rate(sys_clk0_clk) / 6;
- case sys_clk0_8_clk: return clk_get_rate(sys_clk0_clk) / 8;
- case sys_clk0_12_clk: return clk_get_rate(sys_clk0_clk) / 12;
- case sys_clk0_24_clk: return clk_get_rate(sys_clk0_clk) / 24;
- case sys_clk1_3_clk: return clk_get_rate(sys_clk1_clk) / 3;
- case sys_clk1_4_clk: return clk_get_rate(sys_clk1_clk) / 4;
- case sys_clk1_6_clk: return clk_get_rate(sys_clk1_clk) / 6;
- case sys_clk1_12_clk: return clk_get_rate(sys_clk1_clk) / 12;
- default:
- break;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Keystone2: get clk rate for K2L
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/clock_defs.h>
-
-/**
- * pll_freq_get - get pll frequency
- * Fout = Fref * NF(mult) / NR(prediv) / OD
- * @pll: pll identifier
- */
-static unsigned long pll_freq_get(int pll)
-{
- unsigned long mult = 1, prediv = 1, output_div = 2;
- unsigned long ret;
- u32 tmp, reg;
-
- if (pll == CORE_PLL) {
- ret = external_clk[sys_clk];
- if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN) {
- /* PLL mode */
- tmp = __raw_readl(KS2_MAINPLLCTL0);
- prediv = (tmp & PLL_DIV_MASK) + 1;
- mult = (((tmp & PLLM_MULT_HI_SMASK) >> 6) |
- (pllctl_reg_read(pll, mult) &
- PLLM_MULT_LO_MASK)) + 1;
- output_div = ((pllctl_reg_read(pll, secctl) >>
- PLL_CLKOD_SHIFT) & PLL_CLKOD_MASK) + 1;
-
- ret = ret / prediv / output_div * mult;
- }
- } else {
- switch (pll) {
- case PASS_PLL:
- ret = external_clk[pa_clk];
- reg = KS2_PASSPLLCTL0;
- break;
- case TETRIS_PLL:
- ret = external_clk[tetris_clk];
- reg = KS2_ARMPLLCTL0;
- break;
- case DDR3_PLL:
- ret = external_clk[ddr3a_clk];
- reg = KS2_DDR3APLLCTL0;
- break;
- default:
- return 0;
- }
-
- tmp = __raw_readl(reg);
- if (!(tmp & PLLCTL_BYPASS)) {
- /* Bypass disabled */
- prediv = (tmp & PLL_DIV_MASK) + 1;
- mult = ((tmp >> PLL_MULT_SHIFT) & PLL_MULT_MASK) + 1;
- output_div = ((tmp >> PLL_CLKOD_SHIFT) &
- PLL_CLKOD_MASK) + 1;
- ret = ((ret / prediv) * mult) / output_div;
- }
- }
-
- return ret;
-}
-
-unsigned long clk_get_rate(unsigned int clk)
-{
- switch (clk) {
- case core_pll_clk: return pll_freq_get(CORE_PLL);
- case pass_pll_clk: return pll_freq_get(PASS_PLL);
- case tetris_pll_clk: return pll_freq_get(TETRIS_PLL);
- case ddr3_pll_clk: return pll_freq_get(DDR3_PLL);
- case sys_clk0_1_clk:
- case sys_clk0_clk: return pll_freq_get(CORE_PLL) / pll0div_read(1);
- case sys_clk1_clk: return pll_freq_get(CORE_PLL) / pll0div_read(2);
- case sys_clk2_clk: return pll_freq_get(CORE_PLL) / pll0div_read(3);
- case sys_clk3_clk: return pll_freq_get(CORE_PLL) / pll0div_read(4);
- case sys_clk0_2_clk: return clk_get_rate(sys_clk0_clk) / 2;
- case sys_clk0_3_clk: return clk_get_rate(sys_clk0_clk) / 3;
- case sys_clk0_4_clk: return clk_get_rate(sys_clk0_clk) / 4;
- case sys_clk0_6_clk: return clk_get_rate(sys_clk0_clk) / 6;
- case sys_clk0_8_clk: return clk_get_rate(sys_clk0_clk) / 8;
- case sys_clk0_12_clk: return clk_get_rate(sys_clk0_clk) / 12;
- case sys_clk0_24_clk: return clk_get_rate(sys_clk0_clk) / 24;
- case sys_clk1_3_clk: return clk_get_rate(sys_clk1_clk) / 3;
- case sys_clk1_4_clk: return clk_get_rate(sys_clk1_clk) / 4;
- case sys_clk1_6_clk: return clk_get_rate(sys_clk1_clk) / 6;
- case sys_clk1_12_clk: return clk_get_rate(sys_clk1_clk) / 12;
- default:
- break;
- }
-
- return 0;
-}
}
}
-static int get_max_speed(u32 val, u32 speed_supported)
+static int get_max_speed(u32 val, u32 speed_supported, int *spds)
{
int speed;
/* Left most setbit gives the speed */
for (speed = DEVSPEED_NUMSPDS; speed >= 0; speed--) {
if ((val & BIT(speed)) & speed_supported)
- return speeds[speed];
+ return spds[speed];
}
- /* If no bit is set, use SPD800 */
- return SPD800;
+ /* If no bit is set, return minimum speed */
+ if (cpu_is_k2g())
+ return SPD200;
+ else
+ return SPD800;
}
static inline u32 read_efuse_bootrom(void)
return __raw_readl(KS2_EFUSE_BOOTROM);
}
-int get_max_arm_speed(void)
+int get_max_arm_speed(int *spds)
{
u32 armspeed = read_efuse_bootrom();
armspeed = (armspeed & DEVSPEED_ARMSPEED_MASK) >>
DEVSPEED_ARMSPEED_SHIFT;
- return get_max_speed(armspeed, ARM_SUPPORTED_SPEEDS);
+ return get_max_speed(armspeed, ARM_SUPPORTED_SPEEDS, spds);
}
-int get_max_dev_speed(void)
+int get_max_dev_speed(int *spds)
{
u32 devspeed = read_efuse_bootrom();
devspeed = (devspeed & DEVSPEED_DEVSPEED_MASK) >>
DEVSPEED_DEVSPEED_SHIFT;
- return get_max_speed(devspeed, DEV_SUPPORTED_SPEEDS);
+ return get_max_speed(devspeed, DEV_SUPPORTED_SPEEDS, spds);
}
/**
--- /dev/null
+/*
+ * Keystone2: DDR3 SPD configuration
+ *
+ * (C) Copyright 2015-2016 Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <i2c.h>
+#include <ddr_spd.h>
+#include <asm/arch/ddr3.h>
+#include <asm/arch/hardware.h>
+
+#define DUMP_DDR_CONFIG 0 /* set to 1 to debug */
+#define debug_ddr_cfg(fmt, args...) \
+ debug_cond(DUMP_DDR_CONFIG, fmt, ##args)
+
+static void dump_phy_config(struct ddr3_phy_config *ptr)
+{
+ debug_ddr_cfg("\npllcr 0x%08X\n", ptr->pllcr);
+ debug_ddr_cfg("pgcr1_mask 0x%08X\n", ptr->pgcr1_mask);
+ debug_ddr_cfg("pgcr1_val 0x%08X\n", ptr->pgcr1_val);
+ debug_ddr_cfg("ptr0 0x%08X\n", ptr->ptr0);
+ debug_ddr_cfg("ptr1 0x%08X\n", ptr->ptr1);
+ debug_ddr_cfg("ptr2 0x%08X\n", ptr->ptr2);
+ debug_ddr_cfg("ptr3 0x%08X\n", ptr->ptr3);
+ debug_ddr_cfg("ptr4 0x%08X\n", ptr->ptr4);
+ debug_ddr_cfg("dcr_mask 0x%08X\n", ptr->dcr_mask);
+ debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val);
+ debug_ddr_cfg("dtpr0 0x%08X\n", ptr->dtpr0);
+ debug_ddr_cfg("dtpr1 0x%08X\n", ptr->dtpr1);
+ debug_ddr_cfg("dtpr2 0x%08X\n", ptr->dtpr2);
+ debug_ddr_cfg("mr0 0x%08X\n", ptr->mr0);
+ debug_ddr_cfg("mr1 0x%08X\n", ptr->mr1);
+ debug_ddr_cfg("mr2 0x%08X\n", ptr->mr2);
+ debug_ddr_cfg("dtcr 0x%08X\n", ptr->dtcr);
+ debug_ddr_cfg("pgcr2 0x%08X\n", ptr->pgcr2);
+ debug_ddr_cfg("zq0cr1 0x%08X\n", ptr->zq0cr1);
+ debug_ddr_cfg("zq1cr1 0x%08X\n", ptr->zq1cr1);
+ debug_ddr_cfg("zq2cr1 0x%08X\n", ptr->zq2cr1);
+ debug_ddr_cfg("pir_v1 0x%08X\n", ptr->pir_v1);
+ debug_ddr_cfg("pir_v2 0x%08X\n\n", ptr->pir_v2);
+};
+
+static void dump_emif_config(struct ddr3_emif_config *ptr)
+{
+ debug_ddr_cfg("\nsdcfg 0x%08X\n", ptr->sdcfg);
+ debug_ddr_cfg("sdtim1 0x%08X\n", ptr->sdtim1);
+ debug_ddr_cfg("sdtim2 0x%08X\n", ptr->sdtim2);
+ debug_ddr_cfg("sdtim3 0x%08X\n", ptr->sdtim3);
+ debug_ddr_cfg("sdtim4 0x%08X\n", ptr->sdtim4);
+ debug_ddr_cfg("zqcfg 0x%08X\n", ptr->zqcfg);
+ debug_ddr_cfg("sdrfc 0x%08X\n\n", ptr->sdrfc);
+};
+
+#define TEMP NORMAL_TEMP
+#define VBUS_CLKPERIOD 1.875 /* Corresponds to vbus=533MHz, */
+#define PLLGS_VAL (4000.0 / VBUS_CLKPERIOD) /* 4 us */
+#define PLLPD_VAL (1000.0 / VBUS_CLKPERIOD) /* 1 us */
+#define PLLLOCK_VAL (100000.0 / VBUS_CLKPERIOD) /* 100 us */
+#define PLLRST_VAL (9000.0 / VBUS_CLKPERIOD) /* 9 us */
+#define PHYRST_VAL 0x10
+#define DDR_TERM RZQ_4_TERM
+#define SDRAM_DRIVE RZQ_7_IMP
+#define DYN_ODT ODT_DISABLE
+
+enum srt {
+ NORMAL_TEMP,
+ EXTENDED_TEMP
+};
+
+enum out_impedance {
+ RZQ_6_IMP = 0,
+ RZQ_7_IMP
+};
+
+enum die_term {
+ ODT_DISABLE = 0,
+ RZQ_4_TERM,
+ RZQ_2_TERM,
+ RZQ_6_TERM,
+ RZQ_12_TERM,
+ RZQ_8_TERM
+};
+
+struct ddr3_sodimm {
+ u32 t_ck;
+ u32 freqsel;
+ u32 t_xp;
+ u32 t_cke;
+ u32 t_pllpd;
+ u32 t_pllgs;
+ u32 t_phyrst;
+ u32 t_plllock;
+ u32 t_pllrst;
+ u32 t_rfc;
+ u32 t_xs;
+ u32 t_dinit0;
+ u32 t_dinit1;
+ u32 t_dinit2;
+ u32 t_dinit3;
+ u32 t_rtp;
+ u32 t_wtr;
+ u32 t_rp;
+ u32 t_rcd;
+ u32 t_ras;
+ u32 t_rrd;
+ u32 t_rc;
+ u32 t_faw;
+ u32 t_mrd;
+ u32 t_mod;
+ u32 t_wlo;
+ u32 t_wlmrd;
+ u32 t_xsdll;
+ u32 t_xpdll;
+ u32 t_ckesr;
+ u32 t_dllk;
+ u32 t_wr;
+ u32 t_wr_bin;
+ u32 cas;
+ u32 cwl;
+ u32 asr;
+ u32 pasr;
+ u32 t_refprd;
+ u8 sdram_type;
+ u8 ibank;
+ u8 pagesize;
+ u8 t_rrd2;
+ u8 t_ras_max;
+ u8 t_zqcs;
+ u32 refresh_rate;
+ u8 t_csta;
+
+ u8 rank;
+ u8 mirrored;
+ u8 buswidth;
+};
+
+static u8 cas_latancy(u16 temp)
+{
+ int loop;
+ u8 cas_bin = 0;
+
+ for (loop = 0; loop < 32; loop += 2, temp >>= 1) {
+ if (temp & 0x0001)
+ cas_bin = (loop > 15) ? loop - 15 : loop;
+ }
+
+ return cas_bin;
+}
+
+static int ddr3_get_size_in_mb(ddr3_spd_eeprom_t *buf)
+{
+ return (((buf->organization & 0x38) >> 3) + 1) *
+ (256 << (buf->density_banks & 0xf));
+}
+
+static int ddrtimingcalculation(ddr3_spd_eeprom_t *buf, struct ddr3_sodimm *spd,
+ struct ddr3_spd_cb *spd_cb)
+{
+ u32 mtb, clk_freq;
+
+ if ((buf->mem_type != 0x0b) ||
+ ((buf->density_banks & 0x70) != 0x00))
+ return 1;
+
+ spd->sdram_type = 0x03;
+ spd->ibank = 0x03;
+
+ mtb = buf->mtb_dividend * 1000 / buf->mtb_divisor;
+
+ spd->t_ck = buf->tck_min * mtb;
+
+ spd_cb->ddrspdclock = 2000000 / spd->t_ck;
+ clk_freq = spd_cb->ddrspdclock / 2;
+
+ spd->rank = ((buf->organization & 0x38) >> 3) + 1;
+ if (spd->rank > 2)
+ return 1;
+
+ spd->pagesize = (buf->addressing & 0x07) + 1;
+ if (spd->pagesize > 3)
+ return 1;
+
+ spd->buswidth = 8 << (buf->bus_width & 0x7);
+ if ((spd->buswidth < 16) || (spd->buswidth > 64))
+ return 1;
+
+ spd->mirrored = buf->mod_section.unbuffered.addr_mapping & 1;
+
+ printf("DDR3A Speed will be configured for %d Operation.\n",
+ spd_cb->ddrspdclock);
+ if (spd_cb->ddrspdclock == 1333) {
+ spd->t_xp = ((3 * spd->t_ck) > 6000) ?
+ 3 : ((5999 / spd->t_ck) + 1);
+ spd->t_cke = ((3 * spd->t_ck) > 5625) ?
+ 3 : ((5624 / spd->t_ck) + 1);
+ } else if (spd_cb->ddrspdclock == 1600) {
+ spd->t_xp = ((3 * spd->t_ck) > 6000) ?
+ 3 : ((5999 / spd->t_ck) + 1);
+ spd->t_cke = ((3 * spd->t_ck) > 5000) ?
+ 3 : ((4999 / spd->t_ck) + 1);
+ } else {
+ printf("Unsupported DDR3 speed %d\n", spd_cb->ddrspdclock);
+ return 1;
+ }
+
+ spd->t_xpdll = (spd->t_ck > 2400) ? 10 : 24000 / spd->t_ck;
+ spd->t_ckesr = spd->t_cke + 1;
+
+ /* SPD Calculated Values */
+ spd->cas = cas_latancy((buf->caslat_msb << 8) |
+ buf->caslat_lsb);
+
+ spd->t_wr = (buf->twr_min * mtb) / spd->t_ck;
+ spd->t_wr_bin = (spd->t_wr / 2) & 0x07;
+
+ spd->t_rcd = ((buf->trcd_min * mtb) - 1) / spd->t_ck + 1;
+ spd->t_rrd = ((buf->trrd_min * mtb) - 1) / spd->t_ck + 1;
+ spd->t_rp = (((buf->trp_min * mtb) - 1) / spd->t_ck) + 1;
+
+ spd->t_ras = (((buf->tras_trc_ext & 0x0f) << 8 | buf->tras_min_lsb) *
+ mtb) / spd->t_ck;
+
+ spd->t_rc = (((((buf->tras_trc_ext & 0xf0) << 4) | buf->trc_min_lsb) *
+ mtb) - 1) / spd->t_ck + 1;
+
+ spd->t_rfc = (buf->trfc_min_lsb | (buf->trfc_min_msb << 8)) * mtb /
+ 1000;
+ spd->t_wtr = (buf->twtr_min * mtb) / spd->t_ck;
+ spd->t_rtp = (buf->trtp_min * mtb) / spd->t_ck;
+
+ spd->t_xs = (((spd->t_rfc + 10) * 1000) / spd->t_ck);
+ spd->t_rfc = ((spd->t_rfc * 1000) - 1) / spd->t_ck + 1;
+
+ spd->t_faw = (((buf->tfaw_msb << 8) | buf->tfaw_min) * mtb) / spd->t_ck;
+ spd->t_rrd2 = ((((buf->tfaw_msb << 8) |
+ buf->tfaw_min) * mtb) / (4 * spd->t_ck)) - 1;
+
+ /* Hard-coded values */
+ spd->t_mrd = 0x00;
+ spd->t_mod = 0x00;
+ spd->t_wlo = 0x0C;
+ spd->t_wlmrd = 0x28;
+ spd->t_xsdll = 0x200;
+ spd->t_ras_max = 0x0F;
+ spd->t_csta = 0x05;
+ spd->t_dllk = 0x200;
+
+ /* CAS Write Latency */
+ if (spd->t_ck >= 2500)
+ spd->cwl = 0;
+ else if (spd->t_ck >= 1875)
+ spd->cwl = 1;
+ else if (spd->t_ck >= 1500)
+ spd->cwl = 2;
+ else if (spd->t_ck >= 1250)
+ spd->cwl = 3;
+ else if (spd->t_ck >= 1071)
+ spd->cwl = 4;
+ else
+ spd->cwl = 5;
+
+ /* SD:RAM Thermal and Refresh Options */
+ spd->asr = (buf->therm_ref_opt & 0x04) >> 2;
+ spd->pasr = (buf->therm_ref_opt & 0x80) >> 7;
+ spd->t_zqcs = 64;
+
+ spd->t_refprd = (TEMP == NORMAL_TEMP) ? 7812500 : 3906250;
+ spd->t_refprd = spd->t_refprd / spd->t_ck;
+
+ spd->refresh_rate = spd->t_refprd;
+ spd->t_refprd = spd->t_refprd * 5;
+
+ /* Set MISC PHY space registers fields */
+ if ((clk_freq / 2) >= 166 && (clk_freq / 2 < 275))
+ spd->freqsel = 0x03;
+ else if ((clk_freq / 2) > 225 && (clk_freq / 2 < 385))
+ spd->freqsel = 0x01;
+ else if ((clk_freq / 2) > 335 && (clk_freq / 2 < 534))
+ spd->freqsel = 0x00;
+
+ spd->t_dinit0 = 500000000 / spd->t_ck; /* CKE low time 500 us */
+ spd->t_dinit1 = spd->t_xs;
+ spd->t_dinit2 = 200000000 / spd->t_ck; /* Reset low time 200 us */
+ /* Time from ZQ initialization command to first command (1 us) */
+ spd->t_dinit3 = 1000000 / spd->t_ck;
+
+ spd->t_pllgs = PLLGS_VAL + 1;
+ spd->t_pllpd = PLLPD_VAL + 1;
+ spd->t_plllock = PLLLOCK_VAL + 1;
+ spd->t_pllrst = PLLRST_VAL;
+ spd->t_phyrst = PHYRST_VAL;
+
+ spd_cb->ddr_size_gbyte = ddr3_get_size_in_mb(buf) / 1024;
+
+ return 0;
+}
+
+static void init_ddr3param(struct ddr3_spd_cb *spd_cb,
+ struct ddr3_sodimm *spd)
+{
+ spd_cb->phy_cfg.pllcr = (spd->freqsel & 3) << 18 | 0xE << 13;
+ spd_cb->phy_cfg.pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK);
+ spd_cb->phy_cfg.pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23));
+ spd_cb->phy_cfg.ptr0 = ((spd->t_pllpd & 0x7ff) << 21) |
+ ((spd->t_pllgs & 0x7fff) << 6) | (spd->t_phyrst & 0x3f);
+ spd_cb->phy_cfg.ptr1 = ((spd->t_plllock & 0xffff) << 16) |
+ (spd->t_pllrst & 0x1fff);
+ spd_cb->phy_cfg.ptr2 = 0;
+ spd_cb->phy_cfg.ptr3 = ((spd->t_dinit1 & 0x1ff) << 20) |
+ (spd->t_dinit0 & 0xfffff);
+ spd_cb->phy_cfg.ptr4 = ((spd->t_dinit3 & 0x3ff) << 18) |
+ (spd->t_dinit2 & 0x3ffff);
+
+ spd_cb->phy_cfg.dcr_mask = PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK;
+ spd_cb->phy_cfg.dcr_val = 1 << 10;
+
+ if (spd->mirrored) {
+ spd_cb->phy_cfg.dcr_mask |= NOSRA_MASK | UDIMM_MASK;
+ spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29);
+ }
+
+ spd_cb->phy_cfg.dtpr0 = (spd->t_rc & 0x3f) << 26 |
+ (spd->t_rrd & 0xf) << 22 |
+ (spd->t_ras & 0x3f) << 16 | (spd->t_rcd & 0xf) << 12 |
+ (spd->t_rp & 0xf) << 8 | (spd->t_wtr & 0xf) << 4 |
+ (spd->t_rtp & 0xf);
+ spd_cb->phy_cfg.dtpr1 = (spd->t_wlo & 0xf) << 26 |
+ (spd->t_wlmrd & 0x3f) << 20 | (spd->t_rfc & 0x1ff) << 11 |
+ (spd->t_faw & 0x3f) << 5 | (spd->t_mod & 0x7) << 2 |
+ (spd->t_mrd & 0x3);
+
+ spd_cb->phy_cfg.dtpr2 = 0 << 31 | 1 << 30 | 0 << 29 |
+ (spd->t_dllk & 0x3ff) << 19 | (spd->t_ckesr & 0xf) << 15;
+
+ spd_cb->phy_cfg.dtpr2 |= (((spd->t_xp > spd->t_xpdll) ?
+ spd->t_xp : spd->t_xpdll) &
+ 0x1f) << 10;
+
+ spd_cb->phy_cfg.dtpr2 |= (((spd->t_xs > spd->t_xsdll) ?
+ spd->t_xs : spd->t_xsdll) &
+ 0x3ff);
+
+ spd_cb->phy_cfg.mr0 = 1 << 12 | (spd->t_wr_bin & 0x7) << 9 | 0 << 8 |
+ 0 << 7 | ((spd->cas & 0x0E) >> 1) << 4 | 0 << 3 |
+ (spd->cas & 0x01) << 2;
+
+ spd_cb->phy_cfg.mr1 = 0 << 12 | 0 << 11 | 0 << 7 | 0 << 3 |
+ ((DDR_TERM >> 2) & 1) << 9 | ((DDR_TERM >> 1) & 1) << 6 |
+ (DDR_TERM & 0x1) << 2 | ((SDRAM_DRIVE >> 1) & 1) << 5 |
+ (SDRAM_DRIVE & 1) << 1 | 0 << 0;
+
+ spd_cb->phy_cfg.mr2 = DYN_ODT << 9 | TEMP << 7 | (spd->asr & 1) << 6 |
+ (spd->cwl & 7) << 3 | (spd->pasr & 7);
+
+ spd_cb->phy_cfg.dtcr = (spd->rank == 2) ? 0x730035C7 : 0x710035C7;
+ spd_cb->phy_cfg.pgcr2 = (0xF << 20) | ((int)spd->t_refprd & 0x3ffff);
+
+ spd_cb->phy_cfg.zq0cr1 = 0x0000005D;
+ spd_cb->phy_cfg.zq1cr1 = 0x0000005B;
+ spd_cb->phy_cfg.zq2cr1 = 0x0000005B;
+
+ spd_cb->phy_cfg.pir_v1 = 0x00000033;
+ spd_cb->phy_cfg.pir_v2 = 0x0000FF81;
+
+ /* EMIF Registers */
+ spd_cb->emif_cfg.sdcfg = spd->sdram_type << 29 | (DDR_TERM & 7) << 25 |
+ (DYN_ODT & 3) << 22 | (spd->cwl & 0x7) << 14 |
+ (spd->cas & 0xf) << 8 | (spd->ibank & 3) << 5 |
+ (spd->buswidth & 3) << 12 | (spd->pagesize & 3);
+
+ if (spd->rank == 2)
+ spd_cb->emif_cfg.sdcfg |= 1 << 3;
+
+ spd_cb->emif_cfg.sdtim1 = ((spd->t_wr - 1) & 0x1f) << 25 |
+ ((spd->t_ras - 1) & 0x7f) << 18 |
+ ((spd->t_rc - 1) & 0xff) << 10 |
+ (spd->t_rrd2 & 0x3f) << 4 |
+ ((spd->t_wtr - 1) & 0xf);
+
+ spd_cb->emif_cfg.sdtim2 = 0x07 << 10 | ((spd->t_rp - 1) & 0x1f) << 5 |
+ ((spd->t_rcd - 1) & 0x1f);
+
+ spd_cb->emif_cfg.sdtim3 = ((spd->t_xp - 2) & 0xf) << 28 |
+ ((spd->t_xs - 1) & 0x3ff) << 18 |
+ ((spd->t_xsdll - 1) & 0x3ff) << 8 |
+ ((spd->t_rtp - 1) & 0xf) << 4 | ((spd->t_cke) & 0xf);
+
+ spd_cb->emif_cfg.sdtim4 = (spd->t_csta & 0xf) << 28 |
+ ((spd->t_ckesr - 1) & 0xf) << 24 |
+ ((spd->t_zqcs - 1) & 0xff) << 16 |
+ ((spd->t_rfc - 1) & 0x3ff) << 4 |
+ (spd->t_ras_max & 0xf);
+
+ spd_cb->emif_cfg.sdrfc = (spd->refresh_rate - 1) & 0xffff;
+
+ /* TODO zqcfg value fixed ,May be required correction for K2E evm. */
+ spd_cb->emif_cfg.zqcfg = (spd->rank == 2) ? 0xF0073200 : 0x70073200;
+}
+
+static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
+{
+ int ret;
+ int old_bus;
+
+ i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);
+
+ old_bus = i2c_get_bus_num();
+ i2c_set_bus_num(1);
+
+ ret = i2c_read(0x53, 0, 1, (unsigned char *)spd_params, 256);
+
+ i2c_set_bus_num(old_bus);
+
+ if (ret) {
+ printf("Cannot read DIMM params\n");
+ return 1;
+ }
+
+ if (ddr3_spd_check(spd_params))
+ return 1;
+
+ return 0;
+}
+
+int ddr3_get_size(void)
+{
+ ddr3_spd_eeprom_t spd_params;
+
+ if (ddr3_read_spd(&spd_params))
+ return 0;
+
+ return ddr3_get_size_in_mb(&spd_params) / 1024;
+}
+
+int ddr3_get_dimm_params_from_spd(struct ddr3_spd_cb *spd_cb)
+{
+ struct ddr3_sodimm spd;
+ ddr3_spd_eeprom_t spd_params;
+
+ memset(&spd, 0, sizeof(spd));
+
+ if (ddr3_read_spd(&spd_params))
+ return 1;
+
+ if (ddrtimingcalculation(&spd_params, &spd, spd_cb)) {
+ printf("Timing caclulation error\n");
+ return 1;
+ }
+
+ strncpy(spd_cb->dimm_name, (char *)spd_params.mpart, 18);
+ spd_cb->dimm_name[18] = '\0';
+
+ init_ddr3param(spd_cb, &spd);
+
+ dump_emif_config(&spd_cb->emif_cfg);
+ dump_phy_config(&spd_cb->phy_cfg);
+
+ return 0;
+}
#define PLLSET_CMD_LIST "<pa|arm|ddr3>"
-#define DEV_SUPPORTED_SPEEDS 0xfff
-#define ARM_SUPPORTED_SPEEDS 0xfff
+#define DEV_SUPPORTED_SPEEDS 0x1ff
+#define ARM_SUPPORTED_SPEEDS 0xff
#define KS2_CLK1_6 sys_clk0_6_clk
#define CLOCK_INDEXES_LIST CLK_LIST(GENERATE_INDX_STR)
enum {
+ SPD200,
+ SPD400,
+ SPD600,
SPD800,
SPD850,
+ SPD900,
SPD1000,
SPD1200,
SPD1250,
unsigned long clk_get_rate(unsigned int clk);
unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
int clk_set_rate(unsigned int clk, unsigned long hz);
-int get_max_dev_speed(void);
-int get_max_arm_speed(void);
+int get_max_dev_speed(int *spds);
+int get_max_arm_speed(int *spds);
void pll_pa_clk_sel(void);
#endif
unsigned int sdrfc;
};
+struct ddr3_spd_cb {
+ char dimm_name[32];
+ struct ddr3_phy_config phy_cfg;
+ struct ddr3_emif_config emif_cfg;
+ unsigned int ddrspdclock;
+ int ddr_size_gbyte;
+};
+
u32 ddr3_init(void);
void ddr3_reset_ddrphy(void);
void ddr3_init_ecc(u32 base, u32 ddr3_size);
void ddr3_enable_ecc(u32 base, int test);
void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg);
void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg);
+int ddr3_get_size(void);
#endif
#ifndef __ASM_ARCH_HARDWARE_K2G_H
#define __ASM_ARCH_HARDWARE_K2G_H
-#define KS2_NUM_DSPS 0
+#define KS2_NUM_DSPS 1
/* Power and Sleep Controller (PSC) Domains */
#define KS2_LPSC_ALWAYSON 0
#define KS2_LPSC_MCASP 15
#define KS2_LPSC_SR 16
#define KS2_LPSC_MSMC 17
-#define KS2_LPSC_GEM 18
+#ifdef KS2_LPSC_GEM_0
+#undef KS2_LPSC_GEM_0
+#endif
+#define KS2_LPSC_GEM_0 18
#define KS2_LPSC_ARM 19
#define KS2_LPSC_ASRC 20
#define KS2_LPSC_ICSS 21
/* NETCP */
#define KS2_NETCP_BASE 0x26000000
+#ifndef __ASSEMBLY__
+static inline int ddr3_get_size(void)
+{
+ return 2;
+}
+#endif
+
#endif /* __ASM_ARCH_HARDWARE_K2L_H */
#define KS2_LPSC_GEM_0 15
#define KS2_LPSC_TETRIS 52
#define KS2_TETRIS_PWR_DOMAIN 31
+#define KS2_GEM_0_PWR_DOMAIN 8
/* Chip configuration unlock codes and registers */
#define KS2_KICK0 (KS2_DEVICE_STATE_CTRL_BASE + 0x38)
#define BOOTBITMASK(x, y) ((((((u32)1 << (((u32)x) - ((u32)y) + (u32)1)) - \
(u32)1)) << ((u32)y)))
-#define BOOT_READ_BITFIELD(z, x, y) (((u32)z) & BOOTBITMASK(x, y)) >> (y)
-#define BOOT_SET_BITFIELD(z, f, x, y) (((u32)z) & ~BOOTBITMASK(x, y)) | \
- ((((u32)f) << (y)) & BOOTBITMASK(x, y))
+#define BOOT_READ_BITFIELD(z, x, y) ((((u32)z) & BOOTBITMASK(x, y)) >> (y))
+#define BOOT_SET_BITFIELD(z, f, x, y) ((((u32)z) & ~BOOTBITMASK(x, y)) | \
+ ((((u32)f) << (y)) & BOOTBITMASK(x, y)))
/* PDCTL */
#define PSC_REG_PDCTL_SET_NEXT(x, y) BOOT_SET_BITFIELD((x), (y), 0, 0)
#define PSC_REG_MDSTAT_GET_STATUS(x) BOOT_READ_BITFIELD((x), 5, 0)
#define PSC_REG_MDSTAT_GET_LRSTZ(x) BOOT_READ_BITFIELD((x), 8, 8)
#define PSC_REG_MDSTAT_GET_LRSTDONE(x) BOOT_READ_BITFIELD((x), 9, 9)
+#define PSC_REG_MDSTAT_GET_MRSTZ(x) BOOT_READ_BITFIELD((x), 10, 10)
+#define PSC_REG_MDSTAT_GET_MRSTDONE(x) BOOT_READ_BITFIELD((x), 11, 11)
/* PDCTL states */
#define PSC_REG_VAL_PDCTL_NEXT_ON 1
int psc_enable_module(u32 mod_num);
int psc_disable_module(u32 mod_num);
int psc_disable_domain(u32 domain_num);
+int psc_module_keep_in_reset_enabled(u32 mod_num, bool gate_clocks);
+int psc_module_release_from_reset(u32 mod_num);
#endif /* _PSC_DEFS_H_ */
if (psc_disable_module(i + KS2_LPSC_GEM_0))
printf("Cannot disable module for #%d DSP", i);
- if (psc_disable_domain(i + 8))
+ if (psc_disable_domain(i + KS2_GEM_0_PWR_DOMAIN))
printf("Cannot disable domain for #%d DSP", i);
}
}
#include <asm/processor.h>
#include <asm/arch/psc_defs.h>
+/**
+ * psc_delay() - delay for psc
+ *
+ * Return: 10
+ */
int psc_delay(void)
{
udelay(10);
return 10;
}
-/*
- * FUNCTION PURPOSE: Wait for end of transitional state
- *
- * DESCRIPTION: Polls pstat for the selected domain and waits for transitions
- * to be complete.
+/**
+ * psc_wait() - Wait for end of transitional state
+ * @domain_num: GPSC domain number
*
- * Since this is boot loader code it is *ASSUMED* that interrupts
- * are disabled and no other core is mucking around with the psc
- * at the same time.
+ * Polls pstat for the selected domain and waits for transitions to be complete.
+ * Since this is boot loader code it is *ASSUMED* that interrupts are disabled
+ * and no other core is mucking around with the psc at the same time.
*
- * Returns 0 when the domain is free. Returns -1 if a timeout
- * occurred waiting for the completion.
+ * Return: 0 when the domain is free. Returns -1 if a timeout occurred waiting
+ * for the completion.
*/
int psc_wait(u32 domain_num)
{
return 0;
}
+/**
+ * psc_get_domain_num() - Get the domain number
+ * @mod_num: LPSC module number
+ */
u32 psc_get_domain_num(u32 mod_num)
{
u32 domain_num;
return domain_num;
}
-/*
- * FUNCTION PURPOSE: Power up/down a module
- *
- * DESCRIPTION: Powers up/down the requested module and the associated power
- * domain if required. No action is taken it the module is
- * already powered up/down.
+/**
+ * psc_set_state() - powers up/down a module
+ * @mod_num: LPSC module number
+ * @state: 1 to enable, 0 to disable.
*
- * This only controls modules. The domain in which the module
- * resides will be left in the power on state. Multiple modules
- * can exist in a power domain, so powering down the domain based
- * on a single module is not done.
+ * Powers up/down the requested module and the associated power domain if
+ * required. No action is taken it the module is already powered up/down.
+ * This only controls modules. The domain in which the module resides will
+ * be left in the power on state. Multiple modules can exist in a power
+ * domain, so powering down the domain based on a single module is not done.
*
- * Returns 0 on success, -1 if the module can't be powered up, or
- * if there is a timeout waiting for the transition.
+ * Return: 0 on success, -1 if the module can't be powered up, or if there is a
+ * timeout waiting for the transition.
*/
int psc_set_state(u32 mod_num, u32 state)
{
return psc_wait(domain_num);
}
-/*
- * FUNCTION PURPOSE: Power up a module
+/**
+ * psc_enable_module() - power up a module
+ * @mod_num: LPSC module number
+ *
+ * Powers up the requested module and the associated power domain
+ * if required. No action is taken it the module is already powered up.
*
- * DESCRIPTION: Powers up the requested module and the associated power domain
- * if required. No action is taken it the module is already
- * powered up.
+ * Return: 0 on success, -1 if the module can't be powered up, or
+ * if there is a timeout waiting for the transition.
*
- * Returns 0 on success, -1 if the module can't be powered up, or
- * if there is a timeout waiting for the transition.
*/
int psc_enable_module(u32 mod_num)
{
return psc_set_state(mod_num, PSC_REG_VAL_MDCTL_NEXT_ON);
}
-/*
- * FUNCTION PURPOSE: Power down a module
+/**
+ * psc_disable_module() - Power down a module
+ * @mod_num: LPSC module number
*
- * DESCRIPTION: Powers down the requested module.
- *
- * Returns 0 on success, -1 on failure or timeout.
+ * Return: 0 on success, -1 on failure or timeout.
*/
int psc_disable_module(u32 mod_num)
{
return psc_set_state(mod_num, PSC_REG_VAL_MDCTL_NEXT_SWRSTDISABLE);
}
-/*
- * FUNCTION PURPOSE: Set the reset isolation bit in mdctl
+/**
+ * psc_set_reset_iso() - Set the reset isolation bit in mdctl
+ * @mod_num: LPSC module number
+ *
+ * The reset isolation enable bit is set. The state of the module is not
+ * changed.
*
- * DESCRIPTION: The reset isolation enable bit is set. The state of the module
- * is not changed. Returns 0 if the module config showed that
- * reset isolation is supported. Returns 1 otherwise. This is not
- * an error, but setting the bit in mdctl has no effect.
+ * Return: 0 if the module config showed that reset isolation is supported.
+ * Returns 1 otherwise. This is not an error, but setting the bit in mdctl
+ * has no effect.
*/
int psc_set_reset_iso(u32 mod_num)
{
return 1;
}
-/*
- * FUNCTION PURPOSE: Disable a power domain
- *
- * DESCRIPTION: The power domain is disabled
+/**
+ * psc_disable_domain() - Disable a power domain
+ * @domain_num: GPSC domain number
*/
int psc_disable_domain(u32 domain_num)
{
return psc_wait(domain_num);
}
+
+/**
+ * psc_module_keep_in_reset_enabled() - Keep module in enabled,in-reset state
+ * @mod_num: LPSC module number
+ * @gate_clocks: Can the clocks be gated on this module?
+ *
+ * Enable the module, but do not release the module from local reset. This is
+ * necessary for many processor systems on keystone SoCs to allow for system
+ * initialization from a master processor prior to releasing the processor
+ * from reset.
+ */
+int psc_module_keep_in_reset_enabled(u32 mod_num, bool gate_clocks)
+{
+ u32 mdctl, ptcmd, mdstat;
+ u32 next_state;
+ int domain_num = psc_get_domain_num(mod_num);
+ int timeout = 100000;
+
+ /* Wait for any previous transitions to complete */
+ psc_wait(domain_num);
+ mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num));
+ /* Should be set 0 to assert Local reset */
+ if ((mdctl & PSC_REG_MDCTL_SET_LRSTZ(mdctl, 1))) {
+ mdctl = PSC_REG_MDCTL_SET_LRSTZ(mdctl, 0);
+ __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num));
+ /* Wait for transition to take place */
+ psc_wait(domain_num);
+ }
+
+ /* Clear Module reset */
+ mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num));
+ next_state = gate_clocks ? PSC_REG_VAL_MDCTL_NEXT_OFF :
+ PSC_REG_VAL_MDCTL_NEXT_ON;
+ mdctl = PSC_REG_MDCTL_SET_NEXT(mdctl, next_state);
+ __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num));
+ /* Trigger PD transition */
+ ptcmd = __raw_readl(KS2_PSC_BASE + PSC_REG_PTCMD);
+ ptcmd |= (u32)(1 << domain_num);
+ __raw_writel(ptcmd, KS2_PSC_BASE + PSC_REG_PTCMD);
+ psc_wait(domain_num);
+
+ mdstat = __raw_readl(KS2_PSC_BASE + PSC_REG_MDSTAT(mod_num));
+ while (timeout) {
+ mdstat = __raw_readl(KS2_PSC_BASE + PSC_REG_MDSTAT(mod_num));
+
+ if (!(PSC_REG_MDSTAT_GET_STATUS(mdstat) & 0x30) &&
+ PSC_REG_MDSTAT_GET_MRSTDONE(mdstat) &&
+ PSC_REG_MDSTAT_GET_LRSTDONE(mdstat))
+ break;
+ timeout--;
+ }
+
+ if (!timeout) {
+ printf("%s: Timedout waiting for mdstat(0x%08x) to change\n",
+ __func__, mdstat);
+ return -ETIMEDOUT;
+ }
+ return 0;
+}
+
+/**
+ * psc_module_release_from_reset() - Release the module from reset
+ * @mod_num: LPSC module number
+ *
+ * This is the follow through for the command 'psc_module_keep_in_reset_enabled'
+ * Allowing the module to be released from reset once all required inits are
+ * complete for the module. Typically, this allows the processor module to start
+ * execution.
+ */
+int psc_module_release_from_reset(u32 mod_num)
+{
+ u32 mdctl, mdstat;
+ int domain_num = psc_get_domain_num(mod_num);
+ int timeout = 100000;
+
+ /* Wait for any previous transitions to complete */
+ psc_wait(domain_num);
+ mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num));
+ /* Should be set to 1 to de-assert Local reset */
+ if ((mdctl & PSC_REG_MDCTL_SET_LRSTZ(mdctl, 0))) {
+ mdctl = PSC_REG_MDCTL_SET_LRSTZ(mdctl, 1);
+ __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num));
+ /* Wait for transition to take place */
+ psc_wait(domain_num);
+ }
+ mdstat = __raw_readl(KS2_PSC_BASE + PSC_REG_MDSTAT(mod_num));
+ while (timeout) {
+ mdstat = __raw_readl(KS2_PSC_BASE + PSC_REG_MDSTAT(mod_num));
+
+ if (!(PSC_REG_MDSTAT_GET_STATUS(mdstat) & 0x30) &&
+ PSC_REG_MDSTAT_GET_MRSTDONE(mdstat) &&
+ PSC_REG_MDSTAT_GET_LRSTDONE(mdstat))
+ break;
+ timeout--;
+ }
+
+ if (!timeout) {
+ printf("%s: Timedout waiting for mdstat(0x%08x) to change\n",
+ __func__, mdstat);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
#include <common.h>
#include <command.h>
+#include <fdt_support.h>
#include <image.h>
#include <u-boot/zlib.h>
#include <asm/byteorder.h>
#define CONFIG_CMD_BLOB
#define CONFIG_FSL_SEC_MON
#define CONFIG_SHA_PROG_HW_ACCEL
-#define CONFIG_RSA
#define CONFIG_RSA_FREESCALE_EXP
-#ifndef CONFIG_DM
-#define CONFIG_DM
-#endif
-
#ifndef CONFIG_FSL_CAAM
#define CONFIG_FSL_CAAM
#endif
#include <common.h>
#include <asm/io.h>
#include <netdev.h>
+#include <fdt_support.h>
#include <fm_eth.h>
#include <fsl_mdio.h>
#include <fsl_dtsec.h>
+#include <libfdt.h>
#include <malloc.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
+#include <fdt_support.h>
#include <hwconfig.h>
#include <ahci.h>
#include <mmc.h>
#endif
static const struct ns16550_platdata igep_serial = {
- OMAP34XX_UART3,
- 2,
- V_NS16550_CLK
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
};
U_BOOT_DEVICE(igep_uart) = {
--- /dev/null
+if TARGET_LEGOEV3
+
+config SYS_BOARD
+ default "ev3"
+
+config SYS_VENDOR
+ default "lego"
+
+config SYS_CONFIG_NAME
+ default "legoev3"
+
+endif
--- /dev/null
+LEGOEV3 BOARD
+M: David Lechner <david@lechnology.com>
+S: Maintained
+F: board/lego/ev3/
+F: include/configs/legoev3.h
+F: configs/legoev3_defconfig
--- /dev/null
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += legoev3.o
--- /dev/null
+Summary
+=======
+
+LEGO MINDSTORMS EV3 is a toy robot produced by the LEGO Group. It is based
+on the davinci da850 evm. The EV3 has a 16MB spi flash and a SDHC microSD card
+reader.
+
+Booting
+=======
+
+The EV3 contains a bootloader in EEPROM that loads u-boot.bin from address 0x0
+of the spi flash memory. Using the default configuration, u-boot will check to
+see if there is a boot.scr file on the first FAT partition of the mmc. If there
+is, it will run the script and boot the kernel from the uImage file also in
+the FAT partition. Otherwise, it will load a kernel and rootfs from the flash.
+The kernel must be stored at address 0x50000 on the flash and have a maximum
+size of 3MiB. The rootfs must be a squasfs image and stored at 0x350000 in the
+flash and have a maximum size of 9.3MiB. The flash starting at 0xCB0000 is
+reserved for user data.
+
+Writing image to flash
+======================
+
+The EEPROM contains a program for uploading an image file to the flash memory.
+The program is started by holding down the right button on the EV3 when powering
+it on. You can also `run fwupdateboot` in the u-boot shell to reboot into this
+mode. The image can then be uploaded using the official LEGO MINDSTORMS EV3
+software or a 3rd party program capable of uploading a firmware file.
+
+If you are booting from the microSD card, it is enough to just write uboot.bin
+to the flash. If you are not using a microSD card, you will need to create an
+image file using the layout described above.
--- /dev/null
+/*
+ * Copyright (C) 2016 David Lechner <david@lechnology.com>
+ *
+ * Based on da850evm.c
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on da830evm.c. Original Copyrights follow:
+ *
+ * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <net.h>
+#include <netdev.h>
+#include <spi.h>
+#include <spi_flash.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/pinmux_defs.h>
+#include <asm/io.h>
+#include <asm/arch/davinci_misc.h>
+#include <asm/errno.h>
+#include <hwconfig.h>
+
+#ifdef CONFIG_DAVINCI_MMC
+#include <mmc.h>
+#include <asm/arch/sdmmc_defs.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u8 board_rev;
+
+#define EEPROM_I2C_ADDR 0x50
+#define EEPROM_REV_OFFSET 0x3F00
+#define EEPROM_MAC_OFFSET 0x3F06
+
+#ifdef CONFIG_DAVINCI_MMC
+static struct davinci_mmc mmc_sd0 = {
+ .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
+ .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
+ .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
+ .version = MMC_CTLR_VERSION_2,
+};
+
+int board_mmc_init(bd_t *bis)
+{
+ mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
+
+ /* Add slot-0 to mmc subsystem */
+ return davinci_mmc_init(bis, &mmc_sd0);
+}
+#endif
+
+const struct pinmux_resource pinmuxes[] = {
+ PINMUX_ITEM(spi0_pins_base),
+ PINMUX_ITEM(spi0_pins_scs0),
+ PINMUX_ITEM(uart1_pins_txrx),
+ PINMUX_ITEM(i2c0_pins),
+ PINMUX_ITEM(mmc0_pins),
+};
+
+const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
+
+const struct lpsc_resource lpsc[] = {
+ { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
+ { DAVINCI_LPSC_UART1 }, /* console */
+ { DAVINCI_LPSC_MMC_SD },
+};
+
+const int lpsc_size = ARRAY_SIZE(lpsc);
+
+u32 get_board_rev(void)
+{
+ u8 buf[2];
+
+ if (!board_rev) {
+ if (i2c_read(EEPROM_I2C_ADDR, EEPROM_REV_OFFSET, 2, buf, 2)) {
+ printf("\nBoard revision read failed!\n");
+ } else {
+ /*
+ * Board rev 3 has MAC address at EEPROM_REV_OFFSET.
+ * Other revisions have checksum at EEPROM_REV_OFFSET+1
+ * to detect this.
+ */
+ if ((buf[0] ^ buf[1]) == 0xFF)
+ board_rev = buf[0];
+ else
+ board_rev = 3;
+ }
+ }
+
+ return board_rev;
+}
+
+/*
+ * The Bluetooth MAC address serves as the board serial number.
+ */
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+ u32 offset;
+ u8 buf[6];
+
+ if (!board_rev)
+ board_rev = get_board_rev();
+
+ /* Board rev 3 has MAC address where rev should be */
+ offset = (board_rev == 3) ? EEPROM_REV_OFFSET : EEPROM_MAC_OFFSET;
+
+ if (i2c_read(EEPROM_I2C_ADDR, offset, 2, buf, 6)) {
+ printf("\nBoard serial read failed!\n");
+ } else {
+ u8 *nr;
+
+ nr = (u8 *)&serialnr->low;
+ nr[0] = buf[5];
+ nr[1] = buf[4];
+ nr[2] = buf[3];
+ nr[3] = buf[2];
+ nr = (u8 *)&serialnr->high;
+ nr[0] = buf[1];
+ nr[1] = buf[0];
+ nr[2] = 0;
+ nr[3] = 0;
+ }
+}
+
+int board_early_init_f(void)
+{
+ /*
+ * Power on required peripherals
+ * ARM does not have access by default to PSC0 and PSC1
+ * assuming here that the DSP bootloader has set the IOPU
+ * such that PSC access is available to ARM
+ */
+ if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
+ return 1;
+
+ return 0;
+}
+
+int board_init(void)
+{
+#ifndef CONFIG_USE_IRQ
+ irq_init();
+#endif
+
+ /* arch number of the board */
+ /* LEGO didn't register for a unique number and uses da850evm */
+ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ /* setup the SUSPSRC for ARM to control emulation suspend */
+ writel(readl(&davinci_syscfg_regs->suspsrc) &
+ ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
+ DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
+ DAVINCI_SYSCFG_SUSPSRC_UART1),
+ &davinci_syscfg_regs->suspsrc);
+
+ /* configure pinmux settings */
+ if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
+ return 1;
+
+ /* enable the console UART */
+ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
+ DAVINCI_UART_PWREMU_MGMT_UTRST),
+ &davinci_uart1_ctrl_regs->pwremu_mgmt);
+
+ return 0;
+}
*/
static const struct ns16550_platdata omap3logic_serial = {
- OMAP34XX_UART1,
- 2,
- V_NS16550_CLK
+ .base = OMAP34XX_UART1,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
};
U_BOOT_DEVICE(omap3logic_uart) = {
};
static const struct ns16550_platdata zoom1_serial = {
- OMAP34XX_UART3,
- 2,
- V_NS16550_CLK
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
};
U_BOOT_DEVICE(zoom1_uart) = {
} expansion_config = {0x0};
static const struct ns16550_platdata overo_serial = {
- OMAP34XX_UART3,
- 2,
- V_NS16550_CLK
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
};
U_BOOT_DEVICE(overo_uart) = {
#endif
static const struct ns16550_platdata cairo_serial = {
- OMAP34XX_UART2,
- 2,
- V_NS16550_CLK
+ .base = OMAP34XX_UART2,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
};
U_BOOT_DEVICE(cairo_uart) = {
as the ROM only partially sets up pinmux. We also default to using
NOR for environment.
+source "board/ti/common/Kconfig"
+
endif
#include <environment.h>
#include <watchdog.h>
#include <environment.h>
+#include "../common/board_detect.h"
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Read header information from EEPROM into global structure.
*/
-static int read_eeprom(struct am335x_baseboard_id *header)
+static inline int __maybe_unused read_eeprom(void)
{
- /* Check if baseboard eeprom is available */
- if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
- puts("Could not probe the EEPROM; something fundamentally "
- "wrong on the I2C bus.\n");
- return -ENODEV;
- }
-
- /* read the eeprom using i2c */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header,
- sizeof(struct am335x_baseboard_id))) {
- puts("Could not read the EEPROM; something fundamentally"
- " wrong on the I2C bus.\n");
- return -EIO;
- }
-
- if (header->magic != 0xEE3355AA) {
- /*
- * read the eeprom using i2c again,
- * but use only a 1 byte address
- */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header,
- sizeof(struct am335x_baseboard_id))) {
- puts("Could not read the EEPROM; something "
- "fundamentally wrong on the I2C bus.\n");
- return -EIO;
- }
-
- if (header->magic != 0xEE3355AA) {
- printf("Incorrect magic number (0x%x) in EEPROM\n",
- header->magic);
- return -EINVAL;
- }
- }
-
- return 0;
+ return ti_i2c_eeprom_am_get(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
}
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
void am33xx_spl_board_init(void)
{
- struct am335x_baseboard_id header;
int mpu_vdd;
- if (read_eeprom(&header) < 0)
+ if (read_eeprom() < 0)
puts("Could not get board ID.\n");
/* Get the frequency */
dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
- if (board_is_bone(&header) || board_is_bone_lt(&header)) {
+ if (board_is_bone() || board_is_bone_lt()) {
/* BeagleBone PMIC Code */
int usb_cur_lim;
* Only perform PMIC configurations if board rev > A1
* on Beaglebone White
*/
- if (board_is_bone(&header) && !strncmp(header.version,
- "00A1", 4))
+ if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4))
return;
if (i2c_probe(TPS65217_CHIP_PM))
* On Beaglebone White we need to ensure we have AC power
* before increasing the frequency.
*/
- if (board_is_bone(&header)) {
+ if (board_is_bone()) {
uchar pmic_status_reg;
if (tps65217_reg_read(TPS65217_STATUS,
&pmic_status_reg))
* Override what we have detected since we know if we have
* a Beaglebone Black it supports 1GHz.
*/
- if (board_is_bone_lt(&header))
+ if (board_is_bone_lt())
dpll_mpu_opp100.m = MPUPLL_M_1000;
/*
* Set LDO3, LDO4 output voltage to 3.3V for Beaglebone.
* Set LDO3 to 1.8V and LDO4 to 3.3V for Beaglebone Black.
*/
- if (board_is_bone(&header)) {
+ if (board_is_bone()) {
if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
TPS65217_DEFLS1,
TPS65217_LDO_VOLTAGE_OUT_3_3,
const struct dpll_params *get_dpll_ddr_params(void)
{
- struct am335x_baseboard_id header;
-
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
- if (read_eeprom(&header) < 0)
+ if (read_eeprom() < 0)
puts("Could not get board ID.\n");
- if (board_is_evm_sk(&header))
+ if (board_is_evm_sk())
return &dpll_ddr_evm_sk;
- else if (board_is_bone_lt(&header))
+ else if (board_is_bone_lt())
return &dpll_ddr_bone_black;
- else if (board_is_evm_15_or_later(&header))
+ else if (board_is_evm_15_or_later())
return &dpll_ddr_evm_sk;
else
return &dpll_ddr;
void set_mux_conf_regs(void)
{
- __maybe_unused struct am335x_baseboard_id header;
-
- if (read_eeprom(&header) < 0)
+ if (read_eeprom() < 0)
puts("Could not get board ID.\n");
- enable_board_pin_mux(&header);
+ enable_board_pin_mux();
}
const struct ctrl_ioregs ioregs_evmsk = {
void sdram_init(void)
{
- __maybe_unused struct am335x_baseboard_id header;
-
- if (read_eeprom(&header) < 0)
+ if (read_eeprom() < 0)
puts("Could not get board ID.\n");
- if (board_is_evm_sk(&header)) {
+ if (board_is_evm_sk()) {
/*
* EVM SK 1.2A and later use gpio0_7 to enable DDR3.
* This is safe enough to do on older revs.
gpio_direction_output(GPIO_DDR_VTT_EN, 1);
}
- if (board_is_evm_sk(&header))
+ if (board_is_evm_sk())
config_ddr(303, &ioregs_evmsk, &ddr3_data,
&ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
- else if (board_is_bone_lt(&header))
+ else if (board_is_bone_lt())
config_ddr(400, &ioregs_bonelt,
&ddr3_beagleblack_data,
&ddr3_beagleblack_cmd_ctrl_data,
&ddr3_beagleblack_emif_reg_data, 0);
- else if (board_is_evm_15_or_later(&header))
+ else if (board_is_evm_15_or_later())
config_ddr(303, &ioregs_evm15, &ddr3_evm_data,
&ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0);
else
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- char safe_string[HDR_NAME_LEN + 1];
- struct am335x_baseboard_id header;
+ int rc;
+ char *name = NULL;
- if (read_eeprom(&header) < 0)
+ rc = read_eeprom();
+ if (rc)
puts("Could not get board ID.\n");
- /* Now set variables based on the header. */
- strncpy(safe_string, (char *)header.name, sizeof(header.name));
- safe_string[sizeof(header.name)] = 0;
- setenv("board_name", safe_string);
-
- /* BeagleBone Green eeprom, board_rev: 0x1a 0x00 0x00 0x00 */
- if ( (header.version[0] == 0x1a) && (header.version[1] == 0x00) &&
- (header.version[2] == 0x00) && (header.version[3] == 0x00) ) {
- setenv("board_rev", "BBG1");
- } else {
- strncpy(safe_string, (char *)header.version, sizeof(header.version));
- safe_string[sizeof(header.version)] = 0;
- setenv("board_rev", safe_string);
- }
+ if (board_is_bbg1())
+ name = "BBG1";
+ set_board_info_env(name);
#endif
return 0;
int rv, n = 0;
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- __maybe_unused struct am335x_baseboard_id header;
+ __maybe_unused struct ti_am_eeprom *header;
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
eth_setenv_enetaddr("eth1addr", mac_addr);
}
- if (read_eeprom(&header) < 0)
+ if (read_eeprom() < 0)
puts("Could not get board ID.\n");
- if (board_is_bone(&header) || board_is_bone_lt(&header) ||
- board_is_idk(&header)) {
+ if (board_is_bone() || board_is_bone_lt() ||
+ board_is_idk()) {
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
#define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5
#define AR8051_RGMII_TX_CLK_DLY 0x100
- if (board_is_evm_sk(&header) || board_is_gp_evm(&header)) {
+ if (board_is_evm_sk() || board_is_gp_evm()) {
const char *devname;
devname = miiphy_get_current_dev();
#ifndef _BOARD_H_
#define _BOARD_H_
-/*
- * TI AM335x parts define a system EEPROM that defines certain sub-fields.
- * We use these fields to in turn see what board we are on, and what
- * that might require us to set or not set.
- */
-#define HDR_NO_OF_MAC_ADDR 3
-#define HDR_ETH_ALEN 6
-#define HDR_NAME_LEN 8
-
-struct am335x_baseboard_id {
- unsigned int magic;
- char name[HDR_NAME_LEN];
- char version[4];
- char serial[12];
- char config[32];
- char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];
-};
+static inline int board_is_bone(void)
+{
+ return board_ti_is("A335BONE");
+}
-static inline int board_is_bone(struct am335x_baseboard_id *header)
+static inline int board_is_bone_lt(void)
{
- return !strncmp(header->name, "A335BONE", HDR_NAME_LEN);
+ return board_ti_is("A335BNLT");
}
-static inline int board_is_bone_lt(struct am335x_baseboard_id *header)
+static inline int board_is_bbg1(void)
{
- return !strncmp(header->name, "A335BNLT", HDR_NAME_LEN);
+ return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4);
}
-static inline int board_is_evm_sk(struct am335x_baseboard_id *header)
+static inline int board_is_evm_sk(void)
{
- return !strncmp("A335X_SK", header->name, HDR_NAME_LEN);
+ return board_ti_is("A335X_SK");
}
-static inline int board_is_idk(struct am335x_baseboard_id *header)
+static inline int board_is_idk(void)
{
- return !strncmp(header->config, "SKU#02", 6);
+ return !strncmp(board_ti_get_config(), "SKU#02", 6);
}
-static inline int board_is_gp_evm(struct am335x_baseboard_id *header)
+static inline int board_is_gp_evm(void)
{
- return !strncmp("A33515BB", header->name, HDR_NAME_LEN);
+ return board_ti_is("A33515BB");
}
-static inline int board_is_evm_15_or_later(struct am335x_baseboard_id *header)
+static inline int board_is_evm_15_or_later(void)
{
- return (board_is_gp_evm(header) &&
- strncmp("1.5", header->version, 3) <= 0);
+ return (board_is_gp_evm() &&
+ strncmp("1.5", board_ti_get_rev(), 3) <= 0);
}
/*
void enable_uart4_pin_mux(void);
void enable_uart5_pin_mux(void);
void enable_i2c0_pin_mux(void);
-void enable_board_pin_mux(struct am335x_baseboard_id *header);
+void enable_board_pin_mux(void);
#endif
#include <asm/arch/mux.h>
#include <asm/io.h>
#include <i2c.h>
+#include "../common/board_detect.h"
#include "board.h"
static struct module_pin_mux uart0_pin_mux[] = {
return (1 << (val & PROFILE_MASK));
}
-void enable_board_pin_mux(struct am335x_baseboard_id *header)
+void enable_board_pin_mux(void)
{
/* Do board-specific muxes. */
- if (board_is_bone(header)) {
+ if (board_is_bone()) {
/* Beaglebone pinmux */
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
#else
configure_module_pin_mux(mmc1_pin_mux);
#endif
- } else if (board_is_gp_evm(header)) {
+ } else if (board_is_gp_evm()) {
/* General Purpose EVM */
unsigned short profile = detect_daughter_board_profile();
configure_module_pin_mux(rgmii1_pin_mux);
configure_module_pin_mux(mmc1_pin_mux);
configure_module_pin_mux(spi0_pin_mux);
}
- } else if (board_is_idk(header)) {
+ } else if (board_is_idk()) {
/* Industrial Motor Control (IDK) */
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_no_cd_pin_mux);
- } else if (board_is_evm_sk(header)) {
+ } else if (board_is_evm_sk()) {
/* Starter Kit EVM */
configure_module_pin_mux(i2c1_pin_mux);
configure_module_pin_mux(gpio0_7_pin_mux);
configure_module_pin_mux(rgmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux_sk_evm);
- } else if (board_is_bone_lt(header)) {
+ } else if (board_is_bone_lt()) {
/* Beaglebone LT pinmux */
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
config SYS_CONFIG_NAME
default "am43xx_evm"
+source "board/ti/common/Kconfig"
+
endif
#include <asm/arch/ddr_defs.h>
#include <asm/arch/gpio.h>
#include <asm/emif.h>
+#include "../common/board_detect.h"
#include "board.h"
#include <power/pmic.h>
#include <power/tps65218.h>
/*
* Read header information from EEPROM into global structure.
*/
-static int read_eeprom(struct am43xx_board_id *header)
+static inline int __maybe_unused read_eeprom(void)
{
- /* Check if baseboard eeprom is available */
- if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
- printf("Could not probe the EEPROM at 0x%x\n",
- CONFIG_SYS_I2C_EEPROM_ADDR);
- return -ENODEV;
- }
-
- /* read the eeprom using i2c */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header,
- sizeof(struct am43xx_board_id))) {
- printf("Could not read the EEPROM\n");
- return -EIO;
- }
-
- if (header->magic != 0xEE3355AA) {
- /*
- * read the eeprom using i2c again,
- * but use only a 1 byte address
- */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header,
- sizeof(struct am43xx_board_id))) {
- printf("Could not read the EEPROM at 0x%x\n",
- CONFIG_SYS_I2C_EEPROM_ADDR);
- return -EIO;
- }
-
- if (header->magic != 0xEE3355AA) {
- printf("Incorrect magic number (0x%x) in EEPROM\n",
- header->magic);
- return -EINVAL;
- }
- }
-
- strncpy(am43xx_board_name, (char *)header->name, sizeof(header->name));
- am43xx_board_name[sizeof(header->name)] = 0;
-
- strncpy(am43xx_board_rev, (char *)header->version, sizeof(header->version));
- am43xx_board_rev[sizeof(header->version)] = 0;
-
- return 0;
+ return ti_i2c_eeprom_am_get(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
}
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
{
int ind = get_sys_clk_index();
+ if (read_eeprom() < 0)
+ return NULL;
+
if (board_is_eposevm())
return &epos_evm_dpll_ddr[ind];
else if (board_is_gpevm() || board_is_sk())
else if (board_is_idk())
return &idk_dpll_ddr;
- printf(" Board '%s' not supported\n", am43xx_board_name);
+ printf(" Board '%s' not supported\n", board_ti_get_name());
return NULL;
}
}
}
+void gpi2c_init(void)
+{
+ /* When needed to be invoked prior to BSS initialization */
+ static bool first_time = true;
+
+ if (first_time) {
+ enable_i2c0_pin_mux();
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
+ CONFIG_SYS_OMAP24_I2C_SLAVE);
+ first_time = false;
+ }
+}
+
void scale_vcores(void)
{
const struct dpll_params *mpu_params;
- struct am43xx_board_id header;
- enable_i2c0_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
- if (read_eeprom(&header) < 0)
+ if (read_eeprom() < 0)
puts("Could not get board ID.\n");
+ /* Ensure I2C is initialized for PMIC configuration */
+ gpi2c_init();
+
/* Get the frequency */
mpu_params = get_dpll_mpu_params();
void sdram_init(void)
{
+ if (read_eeprom() < 0)
+ return;
/*
* EPOS EVM has 1GB LPDDR2 connected to EMIF.
* GP EMV has 1GB DDR3 connected to EMIF
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- char safe_string[HDR_NAME_LEN + 1];
- struct am43xx_board_id header;
-
- if (read_eeprom(&header) < 0)
- puts("Could not get board ID.\n");
-
- /* Now set variables based on the header. */
- strncpy(safe_string, (char *)header.name, sizeof(header.name));
- safe_string[sizeof(header.name)] = 0;
- setenv("board_name", safe_string);
-
- strncpy(safe_string, (char *)header.version, sizeof(header.version));
- safe_string[sizeof(header.version)] = 0;
- setenv("board_rev", safe_string);
+ set_board_info_env(NULL);
#endif
return 0;
}
#include <asm/arch/omap.h>
-static char *const am43xx_board_name = (char *)AM4372_BOARD_NAME_START;
-static char *const am43xx_board_rev = (char *)AM4372_BOARD_VERSION_START;
-
-/*
- * TI AM437x EVMs define a system EEPROM that defines certain sub-fields.
- * We use these fields to in turn see what board we are on, and what
- * that might require us to set or not set.
- */
-#define HDR_NO_OF_MAC_ADDR 3
-#define HDR_ETH_ALEN 6
-#define HDR_NAME_LEN 8
-
-#define DEV_ATTR_MAX_OFFSET 5
-#define DEV_ATTR_MIN_OFFSET 0
-
-struct am43xx_board_id {
- unsigned int magic;
- char name[HDR_NAME_LEN];
- char version[4];
- char serial[12];
- char config[32];
- char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];
-};
+#define DEV_ATTR_MAX_OFFSET 5
+#define DEV_ATTR_MIN_OFFSET 0
static inline int board_is_eposevm(void)
{
- return !strncmp(am43xx_board_name, "AM43EPOS", HDR_NAME_LEN);
+ return board_ti_is("AM43EPOS");
}
static inline int board_is_gpevm(void)
{
- return !strncmp(am43xx_board_name, "AM43__GP", HDR_NAME_LEN);
+ return board_ti_is("AM43__GP");
}
static inline int board_is_sk(void)
{
- return !strncmp(am43xx_board_name, "AM43__SK", HDR_NAME_LEN);
+ return board_ti_is("AM43__SK");
}
static inline int board_is_idk(void)
{
- return !strncmp(am43xx_board_name, "AM43_IDK", HDR_NAME_LEN);
+ return board_ti_is("AM43_IDK");
}
static inline int board_is_evm_14_or_later(void)
{
- return (board_is_gpevm() && strncmp("1.4", am43xx_board_rev, 3) <= 0);
+ return (board_is_gpevm() && strncmp("1.4", board_ti_get_rev(), 3) <= 0);
}
static inline int board_is_evm_12_or_later(void)
{
- return (board_is_gpevm() && strncmp("1.2", am43xx_board_rev, 3) <= 0);
+ return (board_is_gpevm() && strncmp("1.2", board_ti_get_rev(), 3) <= 0);
}
void enable_uart0_pin_mux(void);
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
+#include "../common/board_detect.h"
#include "board.h"
static struct module_pin_mux rmii1_pin_mux[] = {
config SYS_CONFIG_NAME
default "am57xx_evm"
+source "board/ti/common/Kconfig"
+
endif
#include <dwc3-omap-uboot.h>
#include <ti-usb-phy-uboot.h>
+#include "../common/board_detect.h"
#include "mux_data.h"
+#define board_is_x15() board_ti_is("BBRDX15_")
+#define board_is_am572x_evm() board_ti_is("AM572PM_")
+
#ifdef CONFIG_DRIVER_TI_CPSW
#include <cpsw.h>
#endif
/* GPIO 7_11 */
#define GPIO_DDR_VTT_EN 203
+#define SYSINFO_BOARD_NAME_MAX_LEN 45
+
const struct omap_sysinfo sysinfo = {
- "Board: BeagleBoard x15\n"
+ "Board: UNKNOWN(BeagleBoard X15?) REV UNKNOWN\n"
};
static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = {
.sdram_config_init = 0x61851b32,
.sdram_config = 0x61851b32,
- .sdram_config2 = 0x00000000,
+ .sdram_config2 = 0x08000000,
.ref_ctrl = 0x000040F1,
.ref_ctrl_final = 0x00001035,
- .sdram_tim1 = 0xceef266b,
- .sdram_tim2 = 0x328f7fda,
- .sdram_tim3 = 0x027f88a8,
+ .sdram_tim1 = 0xcccf36ab,
+ .sdram_tim2 = 0x308f7fda,
+ .sdram_tim3 = 0x409f88a8,
.read_idle_ctrl = 0x00050000,
- .zq_config = 0x0007190b,
+ .zq_config = 0x5007190b,
.temp_alert_config = 0x00000000,
.emif_ddr_phy_ctlr_1_init = 0x0024400b,
.emif_ddr_phy_ctlr_1 = 0x0e24400b,
.emif_ddr_ext_phy_ctrl_1 = 0x10040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00740074,
- .emif_ddr_ext_phy_ctrl_3 = 0x00780078,
- .emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
- .emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009b009b,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009e009e,
.emif_rd_wr_lvl_rmp_win = 0x00000000,
.emif_rd_wr_lvl_rmp_ctl = 0x80000000,
.emif_rd_wr_lvl_ctl = 0x00000000,
/* Ext phy ctrl regs 1-35 */
static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = {
0x10040100,
- 0x00740074,
- 0x00780078,
- 0x007c007c,
- 0x007b007b,
- 0x00800080,
- 0x00360036,
+ 0x00910091,
+ 0x00950095,
+ 0x009B009B,
+ 0x009E009E,
+ 0x00980098,
0x00340034,
- 0x00360036,
- 0x00350035,
0x00350035,
-
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
-
- 0x00430043,
- 0x003e003e,
- 0x004a004a,
- 0x00470047,
- 0x00400040,
-
+ 0x00340034,
+ 0x00310031,
+ 0x00340034,
+ 0x007F007F,
+ 0x007F007F,
+ 0x007F007F,
+ 0x007F007F,
+ 0x007F007F,
+ 0x00480048,
+ 0x004A004A,
+ 0x00520052,
+ 0x00550055,
+ 0x00500050,
0x00000000,
0x00600020,
0x40011080,
0x08102040,
-
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
0x0,
0x0,
0x0,
static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {
.sdram_config_init = 0x61851b32,
.sdram_config = 0x61851b32,
- .sdram_config2 = 0x00000000,
+ .sdram_config2 = 0x08000000,
.ref_ctrl = 0x000040F1,
.ref_ctrl_final = 0x00001035,
- .sdram_tim1 = 0xceef266b,
- .sdram_tim2 = 0x328f7fda,
- .sdram_tim3 = 0x027f88a8,
+ .sdram_tim1 = 0xcccf36ab,
+ .sdram_tim2 = 0x308f7fda,
+ .sdram_tim3 = 0x409f88a8,
.read_idle_ctrl = 0x00050000,
- .zq_config = 0x0007190b,
+ .zq_config = 0x5007190b,
.temp_alert_config = 0x00000000,
.emif_ddr_phy_ctlr_1_init = 0x0024400b,
.emif_ddr_phy_ctlr_1 = 0x0e24400b,
.emif_ddr_ext_phy_ctrl_1 = 0x10040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00820082,
- .emif_ddr_ext_phy_ctrl_3 = 0x008b008b,
- .emif_ddr_ext_phy_ctrl_4 = 0x00800080,
- .emif_ddr_ext_phy_ctrl_5 = 0x007e007e,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009b009b,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009e009e,
.emif_rd_wr_lvl_rmp_win = 0x00000000,
.emif_rd_wr_lvl_rmp_ctl = 0x80000000,
.emif_rd_wr_lvl_ctl = 0x00000000,
static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = {
0x10040100,
- 0x00820082,
- 0x008b008b,
- 0x00800080,
- 0x007e007e,
- 0x00800080,
- 0x00370037,
- 0x00390039,
- 0x00360036,
- 0x00370037,
+ 0x00910091,
+ 0x00950095,
+ 0x009B009B,
+ 0x009E009E,
+ 0x00980098,
+ 0x00340034,
0x00350035,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x00540054,
- 0x00540054,
- 0x004e004e,
- 0x004c004c,
- 0x00400040,
-
+ 0x00340034,
+ 0x00310031,
+ 0x00340034,
+ 0x007F007F,
+ 0x007F007F,
+ 0x007F007F,
+ 0x007F007F,
+ 0x007F007F,
+ 0x00480048,
+ 0x004A004A,
+ 0x00520052,
+ 0x00550055,
+ 0x00500050,
0x00000000,
0x00600020,
0x40011080,
0x08102040,
-
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
0x0,
0x0,
0x0,
.iva.pmic = &tps659038,
};
+#ifdef CONFIG_SPL_BUILD
+/* No env to setup for SPL */
+static inline void setup_board_eeprom_env(void) { }
+
+/* Override function to read eeprom information */
+void do_board_detect(void)
+{
+ int rc;
+
+ rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
+ CONFIG_EEPROM_CHIP_ADDRESS);
+ if (rc)
+ printf("ti_i2c_eeprom_init failed %d\n", rc);
+}
+
+#else /* CONFIG_SPL_BUILD */
+
+/* Override function to read eeprom information: actual i2c read done by SPL*/
+void do_board_detect(void)
+{
+ char *bname = NULL;
+ int rc;
+
+ rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
+ CONFIG_EEPROM_CHIP_ADDRESS);
+ if (rc)
+ printf("ti_i2c_eeprom_init failed %d\n", rc);
+
+ if (board_is_x15())
+ bname = "BeagleBoard X15";
+ else if (board_is_am572x_evm())
+ bname = "AM572x EVM";
+
+ if (bname)
+ snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN,
+ "Board: %s REV %s\n", bname, board_ti_get_rev());
+}
+
+static void setup_board_eeprom_env(void)
+{
+ char *name = "beagle_x15";
+ int rc;
+
+ rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
+ CONFIG_EEPROM_CHIP_ADDRESS);
+ if (rc)
+ goto invalid_eeprom;
+
+ if (board_is_am572x_evm())
+ name = "am57xx_evm";
+ else
+ printf("Unidentified board claims %s in eeprom header\n",
+ board_ti_get_name());
+
+invalid_eeprom:
+ set_board_info_env(name);
+}
+
+#endif /* CONFIG_SPL_BUILD */
+
void hw_data_init(void)
{
*prcm = &dra7xx_prcm;
int board_late_init(void)
{
init_sata(0);
+ setup_board_eeprom_env();
+
/*
* DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds
* This is the POWERHOLD-in-Low behavior.
} expansion_config;
static const struct ns16550_platdata beagle_serial = {
- OMAP34XX_UART3,
- 2,
- V_NS16550_CLK
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
};
U_BOOT_DEVICE(beagle_uart) = {
--- /dev/null
+config TI_I2C_BOARD_DETECT
+ bool "Support for Board detection for TI platforms"
+ help
+ Support for detection board information on Texas Instrument's
+ Evaluation Boards which have I2C based EEPROM detection
--- /dev/null
+# Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-${CONFIG_TI_I2C_BOARD_DETECT} += board_detect.o
--- /dev/null
+/*
+ * Library to support early TI EVM EEPROM handling
+ *
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ * Lokesh Vutla
+ * Steve Kipisz
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/omap_common.h>
+#include <i2c.h>
+
+#include "board_detect.h"
+
+/**
+ * ti_i2c_eeprom_init - Initialize an i2c bus and probe for a device
+ * @i2c_bus: i2c bus number to initialize
+ * @dev_addr: Device address to probe for
+ *
+ * Return: 0 on success or corresponding error on failure.
+ */
+static int __maybe_unused ti_i2c_eeprom_init(int i2c_bus, int dev_addr)
+{
+ int rc;
+
+ if (i2c_bus >= 0) {
+ rc = i2c_set_bus_num(i2c_bus);
+ if (rc)
+ return rc;
+ }
+
+ return i2c_probe(dev_addr);
+}
+
+/**
+ * ti_i2c_eeprom_read - Read data from an EEPROM
+ * @dev_addr: The device address of the EEPROM
+ * @offset: Offset to start reading in the EEPROM
+ * @ep: Pointer to a buffer to read into
+ * @epsize: Size of buffer
+ *
+ * Return: 0 on success or corresponding result of i2c_read
+ */
+static int __maybe_unused ti_i2c_eeprom_read(int dev_addr, int offset,
+ uchar *ep, int epsize)
+{
+ return i2c_read(dev_addr, offset, 2, ep, epsize);
+}
+
+/**
+ * ti_eeprom_string_cleanup() - Handle eeprom programming errors
+ * @s: eeprom string (should be NULL terminated)
+ *
+ * Some Board manufacturers do not add a NULL termination at the
+ * end of string, instead some binary information is kludged in, hence
+ * convert the string to just printable characters of ASCII chart.
+ */
+static void __maybe_unused ti_eeprom_string_cleanup(char *s)
+{
+ int i, l;
+
+ l = strlen(s);
+ for (i = 0; i < l; i++, s++)
+ if (*s < ' ' || *s > '~') {
+ *s = 0;
+ break;
+ }
+}
+
+__weak void gpi2c_init(void)
+{
+}
+
+static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
+ u32 header, u32 size, uint8_t *ep)
+{
+ u32 byte, hdr_read;
+ int rc;
+
+ gpi2c_init();
+ rc = ti_i2c_eeprom_init(bus_addr, dev_addr);
+ if (rc)
+ return rc;
+
+ /*
+ * Read the header first then only read the other contents.
+ */
+ byte = 2;
+ rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4);
+ if (rc)
+ return rc;
+
+ /* Corrupted data??? */
+ if (hdr_read != header) {
+ rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4);
+ /*
+ * read the eeprom header using i2c again, but use only a
+ * 1 byte address (some legacy boards need this..)
+ */
+ byte = 1;
+ if (rc)
+ rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read,
+ 4);
+ if (rc)
+ return rc;
+ }
+ if (hdr_read != header)
+ return -1;
+
+ rc = i2c_read(dev_addr, 0x0, byte, ep, size);
+ if (rc)
+ return rc;
+
+ return 0;
+}
+
+int __maybe_unused ti_i2c_eeprom_am_get(int bus_addr, int dev_addr)
+{
+ int rc;
+ struct ti_am_eeprom am_ep;
+ struct ti_common_eeprom *ep;
+
+ ep = TI_EEPROM_DATA;
+ if (ep->header == TI_EEPROM_HEADER_MAGIC)
+ goto already_read;
+
+ /* Initialize with a known bad marker for i2c fails.. */
+ ep->header = TI_DEAD_EEPROM_MAGIC;
+ ep->name[0] = 0x0;
+ ep->version[0] = 0x0;
+ ep->serial[0] = 0x0;
+
+ rc = ti_i2c_eeprom_get(bus_addr, dev_addr, TI_EEPROM_HEADER_MAGIC,
+ sizeof(am_ep), (uint8_t *)&am_ep);
+ if (rc)
+ return rc;
+
+ ep->header = am_ep.header;
+ strlcpy(ep->name, am_ep.name, TI_EEPROM_HDR_NAME_LEN + 1);
+ ti_eeprom_string_cleanup(ep->name);
+
+ /* BeagleBone Green '1' eeprom, board_rev: 0x1a 0x00 0x00 0x00 */
+ if (am_ep.version[0] == 0x1a && am_ep.version[1] == 0x00 &&
+ am_ep.version[2] == 0x00 && am_ep.version[3] == 0x00)
+ strlcpy(ep->version, "BBG1", TI_EEPROM_HDR_REV_LEN + 1);
+ else
+ strlcpy(ep->version, am_ep.version, TI_EEPROM_HDR_REV_LEN + 1);
+ ti_eeprom_string_cleanup(ep->version);
+ strlcpy(ep->serial, am_ep.serial, TI_EEPROM_HDR_SERIAL_LEN + 1);
+ ti_eeprom_string_cleanup(ep->serial);
+ strlcpy(ep->config, am_ep.config, TI_EEPROM_HDR_CONFIG_LEN + 1);
+ ti_eeprom_string_cleanup(ep->config);
+
+ memcpy(ep->mac_addr, am_ep.mac_addr,
+ TI_EEPROM_HDR_NO_OF_MAC_ADDR * TI_EEPROM_HDR_ETH_ALEN);
+
+already_read:
+ return 0;
+}
+
+int __maybe_unused ti_i2c_eeprom_dra7_get(int bus_addr, int dev_addr)
+{
+ int rc, offset = 0;
+ struct dra7_eeprom dra7_ep;
+ struct ti_common_eeprom *ep;
+
+ ep = TI_EEPROM_DATA;
+ if (ep->header == DRA7_EEPROM_HEADER_MAGIC)
+ goto already_read;
+
+ /* Initialize with a known bad marker for i2c fails.. */
+ ep->header = 0xADEAD12C;
+ ep->name[0] = 0x0;
+ ep->version[0] = 0x0;
+ ep->serial[0] = 0x0;
+ ep->emif1_size = 0;
+ ep->emif2_size = 0;
+
+ rc = ti_i2c_eeprom_get(bus_addr, dev_addr, DRA7_EEPROM_HEADER_MAGIC,
+ sizeof(dra7_ep), (uint8_t *)&dra7_ep);
+ if (rc)
+ return rc;
+
+ ep->header = dra7_ep.header;
+ strlcpy(ep->name, dra7_ep.name, TI_EEPROM_HDR_NAME_LEN + 1);
+ ti_eeprom_string_cleanup(ep->name);
+
+ offset = dra7_ep.version_major - 1;
+
+ /* Rev F is skipped */
+ if (offset >= 5)
+ offset = offset + 1;
+ snprintf(ep->version, TI_EEPROM_HDR_REV_LEN + 1, "%c.%d",
+ 'A' + offset, dra7_ep.version_minor);
+ ti_eeprom_string_cleanup(ep->version);
+ ep->emif1_size = (u64)dra7_ep.emif1_size;
+ ep->emif2_size = (u64)dra7_ep.emif2_size;
+ strlcpy(ep->config, dra7_ep.config, TI_EEPROM_HDR_CONFIG_LEN + 1);
+ ti_eeprom_string_cleanup(ep->config);
+
+already_read:
+ return 0;
+}
+
+bool __maybe_unused board_ti_is(char *name_tag)
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (ep->header == TI_DEAD_EEPROM_MAGIC)
+ return false;
+ return !strncmp(ep->name, name_tag, TI_EEPROM_HDR_NAME_LEN);
+}
+
+bool __maybe_unused board_ti_rev_is(char *rev_tag, int cmp_len)
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+ int l;
+
+ if (ep->header == TI_DEAD_EEPROM_MAGIC)
+ return false;
+
+ l = cmp_len > TI_EEPROM_HDR_REV_LEN ? TI_EEPROM_HDR_REV_LEN : cmp_len;
+ return !strncmp(ep->version, rev_tag, l);
+}
+
+char * __maybe_unused board_ti_get_rev(void)
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (ep->header == TI_DEAD_EEPROM_MAGIC)
+ return NULL;
+
+ return ep->version;
+}
+
+char * __maybe_unused board_ti_get_config(void)
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (ep->header == TI_DEAD_EEPROM_MAGIC)
+ return NULL;
+
+ return ep->config;
+}
+
+char * __maybe_unused board_ti_get_name(void)
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (ep->header == TI_DEAD_EEPROM_MAGIC)
+ return NULL;
+
+ return ep->name;
+}
+
+void __maybe_unused
+board_ti_get_eth_mac_addr(int index,
+ u8 mac_addr[TI_EEPROM_HDR_ETH_ALEN])
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (ep->header == TI_DEAD_EEPROM_MAGIC)
+ goto fail;
+
+ if (index < 0 || index >= TI_EEPROM_HDR_NO_OF_MAC_ADDR)
+ goto fail;
+
+ memcpy(mac_addr, ep->mac_addr[index], TI_EEPROM_HDR_ETH_ALEN);
+ return;
+
+fail:
+ memset(mac_addr, 0, TI_EEPROM_HDR_ETH_ALEN);
+}
+
+u64 __maybe_unused board_ti_get_emif1_size(void)
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (ep->header != DRA7_EEPROM_HEADER_MAGIC)
+ return 0;
+
+ return ep->emif1_size;
+}
+
+u64 __maybe_unused board_ti_get_emif2_size(void)
+{
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (ep->header != DRA7_EEPROM_HEADER_MAGIC)
+ return 0;
+
+ return ep->emif2_size;
+}
+
+void __maybe_unused set_board_info_env(char *name)
+{
+ char *unknown = "unknown";
+ struct ti_common_eeprom *ep = TI_EEPROM_DATA;
+
+ if (name)
+ setenv("board_name", name);
+ else if (ep->name)
+ setenv("board_name", ep->name);
+ else
+ setenv("board_name", unknown);
+
+ if (ep->version)
+ setenv("board_rev", ep->version);
+ else
+ setenv("board_rev", unknown);
+
+ if (ep->serial)
+ setenv("board_serial", ep->serial);
+ else
+ setenv("board_serial", unknown);
+}
--- /dev/null
+/*
+ * Library to support early TI EVM EEPROM handling
+ *
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __BOARD_DETECT_H
+#define __BOARD_DETECT_H
+
+/* TI EEPROM MAGIC Header identifier */
+#define TI_EEPROM_HEADER_MAGIC 0xEE3355AA
+#define TI_DEAD_EEPROM_MAGIC 0xADEAD12C
+
+#define TI_EEPROM_HDR_NAME_LEN 8
+#define TI_EEPROM_HDR_REV_LEN 4
+#define TI_EEPROM_HDR_SERIAL_LEN 12
+#define TI_EEPROM_HDR_CONFIG_LEN 32
+#define TI_EEPROM_HDR_NO_OF_MAC_ADDR 3
+#define TI_EEPROM_HDR_ETH_ALEN 6
+
+/**
+ * struct ti_am_eeprom - This structure holds data read in from the
+ * AM335x, AM437x, AM57xx TI EVM EEPROMs.
+ * @header: This holds the magic number
+ * @name: The name of the board
+ * @version: Board revision
+ * @serial: Board serial number
+ * @config: Reserved
+ * @mac_addr: Any MAC addresses written in the EEPROM
+ *
+ * The data is this structure is read from the EEPROM on the board.
+ * It is used for board detection which is based on name. It is used
+ * to configure specific TI boards. This allows booting of multiple
+ * TI boards with a single MLO and u-boot.
+ */
+struct ti_am_eeprom {
+ unsigned int header;
+ char name[TI_EEPROM_HDR_NAME_LEN];
+ char version[TI_EEPROM_HDR_REV_LEN];
+ char serial[TI_EEPROM_HDR_SERIAL_LEN];
+ char config[TI_EEPROM_HDR_CONFIG_LEN];
+ char mac_addr[TI_EEPROM_HDR_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
+} __attribute__ ((__packed__));
+
+/* DRA7 EEPROM MAGIC Header identifier */
+#define DRA7_EEPROM_HEADER_MAGIC 0xAA5533EE
+#define DRA7_EEPROM_HDR_NAME_LEN 16
+#define DRA7_EEPROM_HDR_CONFIG_LEN 4
+
+/**
+ * struct dra7_eeprom - This structure holds data read in from the DRA7 EVM
+ * EEPROMs.
+ * @header: This holds the magic number
+ * @name: The name of the board
+ * @version_major: Board major version
+ * @version_minor: Board minor version
+ * @config: Board specific config options
+ * @emif1_size: Size of DDR attached to EMIF1
+ * @emif2_size: Size of DDR attached to EMIF2
+ *
+ * The data is this structure is read from the EEPROM on the board.
+ * It is used for board detection which is based on name. It is used
+ * to configure specific DRA7 boards. This allows booting of multiple
+ * DRA7 boards with a single MLO and u-boot.
+ */
+struct dra7_eeprom {
+ u32 header;
+ char name[DRA7_EEPROM_HDR_NAME_LEN];
+ u16 version_major;
+ u16 version_minor;
+ char config[DRA7_EEPROM_HDR_CONFIG_LEN];
+ u32 emif1_size;
+ u32 emif2_size;
+} __attribute__ ((__packed__));
+
+/**
+ * struct ti_common_eeprom - Null terminated, usable EEPROM contents.
+ * header: Magic number
+ * @name: NULL terminated name
+ * @version: NULL terminated version
+ * @serial: NULL terminated serial number
+ * @config: NULL terminated Board specific config options
+ * @mac_addr: MAC addresses
+ * @emif1_size: Size of the ddr available on emif1
+ * @emif2_size: Size of the ddr available on emif2
+ */
+struct ti_common_eeprom {
+ u32 header;
+ char name[TI_EEPROM_HDR_NAME_LEN + 1];
+ char version[TI_EEPROM_HDR_REV_LEN + 1];
+ char serial[TI_EEPROM_HDR_SERIAL_LEN + 1];
+ char config[TI_EEPROM_HDR_CONFIG_LEN + 1];
+ char mac_addr[TI_EEPROM_HDR_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
+ u64 emif1_size;
+ u64 emif2_size;
+};
+
+#define TI_EEPROM_DATA ((struct ti_common_eeprom *)\
+ OMAP_SRAM_SCRATCH_BOARD_EEPROM_START)
+
+/**
+ * ti_i2c_eeprom_am_get() - Consolidated eeprom data collection for AM* TI EVMs
+ * @bus_addr: I2C bus address
+ * @dev_addr: I2C slave address
+ *
+ * ep in SRAM is populated by the this AM generic function that consolidates
+ * the basic initialization logic common across all AM* platforms.
+ */
+int ti_i2c_eeprom_am_get(int bus_addr, int dev_addr);
+
+/**
+ * ti_i2c_eeprom_dra7_get() - Consolidated eeprom data for DRA7 TI EVMs
+ * @bus_addr: I2C bus address
+ * @dev_addr: I2C slave address
+ */
+int ti_i2c_eeprom_dra7_get(int bus_addr, int dev_addr);
+
+/**
+ * board_ti_is() - Board detection logic for TI EVMs
+ * @name_tag: Tag used in eeprom for the board
+ *
+ * Return: false if board information does not match OR eeprom wasn't read.
+ * true otherwise
+ */
+bool board_ti_is(char *name_tag);
+
+/**
+ * board_ti_rev_is() - Compare board revision for TI EVMs
+ * @rev_tag: Revision tag to check in eeprom
+ * @cmp_len: How many chars to compare?
+ *
+ * NOTE: revision information is often messed up (hence the str len match) :(
+ *
+ * Return: false if board information does not match OR eeprom was'nt read.
+ * true otherwise
+ */
+bool board_ti_rev_is(char *rev_tag, int cmp_len);
+
+/**
+ * board_ti_get_rev() - Get board revision for TI EVMs
+ *
+ * Return: NULL if eeprom was'nt read.
+ * Board revision otherwise
+ */
+char *board_ti_get_rev(void);
+
+/**
+ * board_ti_get_config() - Get board config for TI EVMs
+ *
+ * Return: NULL if eeprom was'nt read.
+ * Board config otherwise
+ */
+char *board_ti_get_config(void);
+
+/**
+ * board_ti_get_name() - Get board name for TI EVMs
+ *
+ * Return: NULL if eeprom was'nt read.
+ * Board name otherwise
+ */
+char *board_ti_get_name(void);
+
+/**
+ * board_ti_get_eth_mac_addr() - Get Ethernet MAC address from EEPROM MAC list
+ * @index: 0 based index within the list of MAC addresses
+ * @mac_addr: MAC address contained at the index is returned here
+ *
+ * Does not sanity check the mac_addr. Whatever is stored in EEPROM is returned.
+ */
+void board_ti_get_eth_mac_addr(int index, u8 mac_addr[TI_EEPROM_HDR_ETH_ALEN]);
+
+/**
+ * board_ti_get_emif1_size() - Get size of the DDR on emif1 for TI EVMs
+ *
+ * Return: NULL if eeprom was'nt read or emif1_size is not available.
+ */
+u64 board_ti_get_emif1_size(void);
+
+/**
+ * board_ti_get_emif2_size() - Get size of the DDR on emif2 for TI EVMs
+ *
+ * Return: NULL if eeprom was'nt read or emif2_size is not available.
+ */
+u64 board_ti_get_emif2_size(void);
+
+/**
+ * set_board_info_env() - Setup commonly used board information environment vars
+ * @name: Name of the board
+ *
+ * If name is NULL, default_name is used.
+ */
+void set_board_info_env(char *name);
+
+#endif /* __BOARD_DETECT_H */
The DRA7xx (and AM57x) SoC has a total of 6 UARTs available to it.
Depending on your specific board you may want something other than UART1
here.
+
+source "board/ti/common/Kconfig"
+
endif
#include <common.h>
#include <palmas.h>
#include <sata.h>
+#include <linux/string.h>
#include <asm/gpio.h>
#include <usb.h>
#include <linux/usb/gadget.h>
#include <asm/arch/gpio.h>
#include <asm/arch/dra7xx_iodelay.h>
+#include <asm/emif.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sata.h>
#include <ti-usb-phy-uboot.h>
#include "mux_data.h"
+#include "../common/board_detect.h"
+
+#define board_is_dra74x_evm() board_ti_is("5777xCPU")
+#define board_is_dra74x_revh_or_later() board_is_dra74x_evm() && \
+ (strncmp("H", board_ti_get_rev(), 1) <= 0)
+#define board_ti_get_emif_size() board_ti_get_emif1_size() + \
+ board_ti_get_emif2_size()
#ifdef CONFIG_DRIVER_TI_CPSW
#include <cpsw.h>
/* GPIO 7_11 */
#define GPIO_DDR_VTT_EN 203
+#define SYSINFO_BOARD_NAME_MAX_LEN 37
+
const struct omap_sysinfo sysinfo = {
- "Board: DRA7xx\n"
+ "Board: UNKNOWN(DRA7 EVM) REV UNKNOWN\n"
+};
+
+static const struct emif_regs emif1_ddr3_532_mhz_1cs = {
+ .sdram_config_init = 0x61851ab2,
+ .sdram_config = 0x61851ab2,
+ .sdram_config2 = 0x08000000,
+ .ref_ctrl = 0x000040F1,
+ .ref_ctrl_final = 0x00001035,
+ .sdram_tim1 = 0xCCCF36B3,
+ .sdram_tim2 = 0x308F7FDA,
+ .sdram_tim3 = 0x427F88A8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x0007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400B,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400B,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+};
+
+static const struct emif_regs emif2_ddr3_532_mhz_1cs = {
+ .sdram_config_init = 0x61851B32,
+ .sdram_config = 0x61851B32,
+ .sdram_config2 = 0x08000000,
+ .ref_ctrl = 0x000040F1,
+ .ref_ctrl_final = 0x00001035,
+ .sdram_tim1 = 0xCCCF36B3,
+ .sdram_tim2 = 0x308F7FDA,
+ .sdram_tim3 = 0x427F88A8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x0007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400B,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400B,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+};
+
+static const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = {
+ .sdram_config_init = 0x61862B32,
+ .sdram_config = 0x61862B32,
+ .sdram_config2 = 0x08000000,
+ .ref_ctrl = 0x0000514C,
+ .ref_ctrl_final = 0x0000144A,
+ .sdram_tim1 = 0xD113781C,
+ .sdram_tim2 = 0x30717FE3,
+ .sdram_tim3 = 0x409F86A8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x5007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400D,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400D,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00A400A4,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00A900A9,
+ .emif_ddr_ext_phy_ctrl_4 = 0x00B000B0,
+ .emif_ddr_ext_phy_ctrl_5 = 0x00B000B0,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+};
+
+const struct emif_regs emif1_ddr3_532_mhz_1cs_2G = {
+ .sdram_config_init = 0x61851ab2,
+ .sdram_config = 0x61851ab2,
+ .sdram_config2 = 0x08000000,
+ .ref_ctrl = 0x000040F1,
+ .ref_ctrl_final = 0x00001035,
+ .sdram_tim1 = 0xCCCF36B3,
+ .sdram_tim2 = 0x30BF7FDA,
+ .sdram_tim3 = 0x427F8BA8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x0007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400B,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400B,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+};
+
+const struct emif_regs emif2_ddr3_532_mhz_1cs_2G = {
+ .sdram_config_init = 0x61851B32,
+ .sdram_config = 0x61851B32,
+ .sdram_config2 = 0x08000000,
+ .ref_ctrl = 0x000040F1,
+ .ref_ctrl_final = 0x00001035,
+ .sdram_tim1 = 0xCCCF36B3,
+ .sdram_tim2 = 0x308F7FDA,
+ .sdram_tim3 = 0x427F88A8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x0007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400B,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400B,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+};
+
+void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
+{
+ u64 ram_size;
+
+ ram_size = board_ti_get_emif_size();
+
+ switch (omap_revision()) {
+ case DRA752_ES1_0:
+ case DRA752_ES1_1:
+ case DRA752_ES2_0:
+ switch (emif_nr) {
+ case 1:
+ if (ram_size > CONFIG_MAX_MEM_MAPPED)
+ *regs = &emif1_ddr3_532_mhz_1cs_2G;
+ else
+ *regs = &emif1_ddr3_532_mhz_1cs;
+ break;
+ case 2:
+ if (ram_size > CONFIG_MAX_MEM_MAPPED)
+ *regs = &emif2_ddr3_532_mhz_1cs_2G;
+ else
+ *regs = &emif2_ddr3_532_mhz_1cs;
+ break;
+ }
+ break;
+ case DRA722_ES1_0:
+ *regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1;
+ break;
+ default:
+ *regs = &emif1_ddr3_532_mhz_1cs;
+ }
+}
+
+static const struct dmm_lisa_map_regs lisa_map_dra7_1536MB = {
+ .dmm_lisa_map_0 = 0x0,
+ .dmm_lisa_map_1 = 0x80640300,
+ .dmm_lisa_map_2 = 0xC0500220,
+ .dmm_lisa_map_3 = 0xFF020100,
+ .is_ma_present = 0x1
+};
+
+static const struct dmm_lisa_map_regs lisa_map_2G_x_2 = {
+ .dmm_lisa_map_0 = 0x0,
+ .dmm_lisa_map_1 = 0x0,
+ .dmm_lisa_map_2 = 0x80600100,
+ .dmm_lisa_map_3 = 0xFF020100,
+ .is_ma_present = 0x1
+};
+
+const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
+ .dmm_lisa_map_0 = 0x0,
+ .dmm_lisa_map_1 = 0x0,
+ .dmm_lisa_map_2 = 0x80740300,
+ .dmm_lisa_map_3 = 0xFF020100,
+ .is_ma_present = 0x1
};
+void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
+{
+ u64 ram_size;
+
+ ram_size = board_ti_get_emif_size();
+
+ switch (omap_revision()) {
+ case DRA752_ES1_0:
+ case DRA752_ES1_1:
+ case DRA752_ES2_0:
+ if (ram_size > CONFIG_MAX_MEM_MAPPED)
+ *dmm_lisa_regs = &lisa_map_dra7_2GB;
+ else
+ *dmm_lisa_regs = &lisa_map_dra7_1536MB;
+ break;
+ case DRA722_ES1_0:
+ default:
+ *dmm_lisa_regs = &lisa_map_2G_x_2;
+ }
+}
+
/**
* @brief board_init
*
return 0;
}
+void dram_init_banksize(void)
+{
+ u64 ram_size;
+
+ ram_size = board_ti_get_emif_size();
+
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = get_effective_memsize();
+ if (ram_size > CONFIG_MAX_MEM_MAPPED) {
+ gd->bd->bi_dram[1].start = 0x200000000;
+ gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;
+ }
+}
+
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- if (omap_revision() == DRA722_ES1_0)
- setenv("board_name", "dra72x");
+ char *name = "unknown";
+
+ if (is_dra72x())
+ name = "dra72x";
else
- setenv("board_name", "dra7xx");
+ name = "dra7xx";
+
+ set_board_info_env(name);
omap_die_id_serial();
#endif
return 0;
}
+#ifdef CONFIG_SPL_BUILD
+void do_board_detect(void)
+{
+ int rc;
+
+ rc = ti_i2c_eeprom_dra7_get(CONFIG_EEPROM_BUS_ADDRESS,
+ CONFIG_EEPROM_CHIP_ADDRESS);
+ if (rc)
+ printf("ti_i2c_eeprom_init failed %d\n", rc);
+}
+
+#else
+
+void do_board_detect(void)
+{
+ char *bname = NULL;
+ int rc;
+
+ rc = ti_i2c_eeprom_dra7_get(CONFIG_EEPROM_BUS_ADDRESS,
+ CONFIG_EEPROM_CHIP_ADDRESS);
+ if (rc)
+ printf("ti_i2c_eeprom_init failed %d\n", rc);
+
+ if (board_is_dra74x_evm()) {
+ bname = "DRA74x EVM";
+ /* If EEPROM is not populated */
+ } else {
+ if (is_dra72x())
+ bname = "DRA72x EVM";
+ else
+ bname = "DRA74x EVM";
+ }
+
+ if (bname)
+ snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN,
+ "Board: %s REV %s\n", bname, board_ti_get_rev());
+}
+#endif /* CONFIG_SPL_BUILD */
+
void set_muxconf_regs_essential(void)
{
do_set_mux32((*ctrl)->control_padconf_core_base,
switch (omap_revision()) {
case DRA722_ES1_0:
- pads = core_padconf_array_essential;
- npads = ARRAY_SIZE(core_padconf_array_essential);
- iodelay = iodelay_cfg_array;
- niodelays = ARRAY_SIZE(iodelay_cfg_array);
+ pads = dra72x_core_padconf_array;
+ npads = ARRAY_SIZE(dra72x_core_padconf_array);
+ iodelay = dra72_iodelay_cfg_array;
+ niodelays = ARRAY_SIZE(dra72_iodelay_cfg_array);
break;
case DRA752_ES1_0:
case DRA752_ES1_1:
#include <asm/arch/mux_dra7xx.h>
-const struct pad_conf_entry core_padconf_array_essential[] = {
- {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */
- {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */
- {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */
- {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */
- {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */
- {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */
- {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */
- {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */
-#if defined(CONFIG_NOR)
- /* NOR only pin-mux */
- {GPMC_A0 , M0 | IDIS | PDIS}, /* nor.GPMC_A[0 ] */
- {GPMC_A1 , M0 | IDIS | PDIS}, /* nor.GPMC_A[1 ] */
- {GPMC_A2 , M0 | IDIS | PDIS}, /* nor.GPMC_A[2 ] */
- {GPMC_A3 , M0 | IDIS | PDIS}, /* nor.GPMC_A[3 ] */
- {GPMC_A4 , M0 | IDIS | PDIS}, /* nor.GPMC_A[4 ] */
- {GPMC_A5 , M0 | IDIS | PDIS}, /* nor.GPMC_A[5 ] */
- {GPMC_A6 , M0 | IDIS | PDIS}, /* nor.GPMC_A[6 ] */
- {GPMC_A7 , M0 | IDIS | PDIS}, /* nor.GPMC_A[7 ] */
- {GPMC_A8 , M0 | IDIS | PDIS}, /* nor.GPMC_A[8 ] */
- {GPMC_A9 , M0 | IDIS | PDIS}, /* nor.GPMC_A[9 ] */
- {GPMC_A10 , M0 | IDIS | PDIS}, /* nor.GPMC_A[10] */
- {GPMC_A11 , M0 | IDIS | PDIS}, /* nor.GPMC_A[11] */
- {GPMC_A12 , M0 | IDIS | PDIS}, /* nor.GPMC_A[12] */
- {GPMC_A13 , M0 | IDIS | PDIS}, /* nor.GPMC_A[13] */
- {GPMC_A14 , M0 | IDIS | PDIS}, /* nor.GPMC_A[14] */
- {GPMC_A15 , M0 | IDIS | PDIS}, /* nor.GPMC_A[15] */
- {GPMC_A16 , M0 | IDIS | PDIS}, /* nor.GPMC_A[16] */
- {GPMC_A17 , M0 | IDIS | PDIS}, /* nor.GPMC_A[17] */
- {GPMC_A18 , M0 | IDIS | PDIS}, /* nor.GPMC_A[18] */
- {GPMC_A19 , M0 | IDIS | PDIS}, /* nor.GPMC_A[19] */
- {GPMC_A20 , M0 | IDIS | PDIS}, /* nor.GPMC_A[20] */
- {GPMC_A21 , M0 | IDIS | PDIS}, /* nor.GPMC_A[21] */
- {GPMC_A22 , M0 | IDIS | PDIS}, /* nor.GPMC_A[22] */
- {GPMC_A23 , M0 | IDIS | PDIS}, /* nor.GPMC_A[23] */
- {GPMC_A24 , M0 | IDIS | PDIS}, /* nor.GPMC_A[24] */
- {GPMC_A25 , M0 | IDIS | PDIS}, /* nor.GPMC_A[25] */
- {GPMC_A26 , M0 | IDIS | PDIS}, /* nor.GPMC_A[26] */
-#else
- /* eMMC pinmux */
- {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */
- {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */
- {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */
- {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */
- {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */
- {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */
- {GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */
- {GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */
- {GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */
- {GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */
-#endif
-#if (CONFIG_CONS_INDEX == 1)
- {UART1_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_RXD */
- {UART1_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_TXD */
- {UART1_CTSN, (IEN | PTU | PDIS | M3)}, /* UART1_CTSN */
- {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */
-#elif (CONFIG_CONS_INDEX == 3)
- {UART3_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_RXD */
- {UART3_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_TXD */
-#endif
- {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */
- {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */
- {MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */
- {MDIO_D, (IEN | PTU | PEN | M0)}, /* MDIO_D */
- {RGMII0_TXC, (PIN_OUTPUT | MANUAL_MODE | M0) },
- {RGMII0_TXCTL, (PIN_OUTPUT | MANUAL_MODE | M0) },
- {RGMII0_TXD3, (PIN_OUTPUT | MANUAL_MODE | M0) },
- {RGMII0_TXD2, (PIN_OUTPUT | MANUAL_MODE | M0) },
- {RGMII0_TXD1, (PIN_OUTPUT | MANUAL_MODE | M0) },
- {RGMII0_TXD0, (PIN_OUTPUT | MANUAL_MODE | M0) },
- {RGMII0_RXC, (PIN_INPUT | MANUAL_MODE | M0) },
- {RGMII0_RXCTL, (PIN_INPUT | MANUAL_MODE | M0) },
- {RGMII0_RXD3, (PIN_INPUT | MANUAL_MODE | M0) },
- {RGMII0_RXD2, (PIN_INPUT | MANUAL_MODE | M0) },
- {RGMII0_RXD1, (PIN_INPUT | MANUAL_MODE | M0) },
- {RGMII0_RXD0, (PIN_INPUT | MANUAL_MODE | M0) },
- {VIN2A_D12, (PIN_OUTPUT | MANUAL_MODE | M3) },
- {VIN2A_D13, (PIN_OUTPUT | MANUAL_MODE | M3) },
- {VIN2A_D14, (PIN_OUTPUT | MANUAL_MODE | M3) },
- {VIN2A_D15, (PIN_OUTPUT | MANUAL_MODE | M3) },
- {VIN2A_D16, (PIN_OUTPUT | MANUAL_MODE | M3) },
- {VIN2A_D17, (PIN_OUTPUT | MANUAL_MODE | M3) },
- {VIN2A_D18, (PIN_INPUT | MANUAL_MODE | M3)},
- {VIN2A_D19, (PIN_INPUT | MANUAL_MODE | M3)},
- {VIN2A_D20, (PIN_INPUT | MANUAL_MODE | M3)},
- {VIN2A_D21, (PIN_INPUT | MANUAL_MODE | M3)},
- {VIN2A_D22, (PIN_INPUT | MANUAL_MODE | M3)},
- {VIN2A_D23, (PIN_INPUT | MANUAL_MODE | M3)},
-#if defined(CONFIG_NAND) || defined(CONFIG_NOR)
- /* NAND / NOR pin-mux */
- {GPMC_AD0 , M0 | IEN | PDIS}, /* GPMC_AD0 */
- {GPMC_AD1 , M0 | IEN | PDIS}, /* GPMC_AD1 */
- {GPMC_AD2 , M0 | IEN | PDIS}, /* GPMC_AD2 */
- {GPMC_AD3 , M0 | IEN | PDIS}, /* GPMC_AD3 */
- {GPMC_AD4 , M0 | IEN | PDIS}, /* GPMC_AD4 */
- {GPMC_AD5 , M0 | IEN | PDIS}, /* GPMC_AD5 */
- {GPMC_AD6 , M0 | IEN | PDIS}, /* GPMC_AD6 */
- {GPMC_AD7 , M0 | IEN | PDIS}, /* GPMC_AD7 */
- {GPMC_AD8 , M0 | IEN | PDIS}, /* GPMC_AD8 */
- {GPMC_AD9 , M0 | IEN | PDIS}, /* GPMC_AD9 */
- {GPMC_AD10, M0 | IEN | PDIS}, /* GPMC_AD10 */
- {GPMC_AD11, M0 | IEN | PDIS}, /* GPMC_AD11 */
- {GPMC_AD12, M0 | IEN | PDIS}, /* GPMC_AD12 */
- {GPMC_AD13, M0 | IEN | PDIS}, /* GPMC_AD13 */
- {GPMC_AD14, M0 | IEN | PDIS}, /* GPMC_AD14 */
- {GPMC_AD15, M0 | IEN | PDIS}, /* GPMC_AD15 */
- {GPMC_CS0, M0 | IDIS | PEN | PTU}, /* GPMC chip-select */
- {GPMC_ADVN_ALE, M0 | IDIS | PEN | PTD}, /* GPMC Addr latch */
- {GPMC_OEN_REN, M0 | IDIS | PEN | PTU}, /* GPMC Read enable */
- {GPMC_WEN, M0 | IDIS | PEN | PTU}, /* GPMC Write enable_n */
- {GPMC_BEN0, M0 | IDIS | PEN | PTD}, /* GPMC Byte/Column En */
- {GPMC_WAIT0, M0 | IEN | PEN | PTU}, /* GPMC Wait/Ready */
- /* GPMC_WPN (Write Protect) is controlled by DIP Switch SW10(12) */
-#else
- /* QSPI pin-mux */
- {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */
- {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */
- {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */
- {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[0] */
- {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[1] */
- {GPMC_A18, (M1)}, /* QSPI1_SCLK */
- {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */
- {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */
- {GPMC_CS2, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS0 */
- {GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/
-#endif /* CONFIG_NAND || CONFIG_NOR */
- {USB2_DRVVBUS, (M0 | IEN | FSC) },
- {SPI1_CS1, (PEN | IDIS | M14) },
+const struct pad_conf_entry dra72x_core_padconf_array[] = {
+ {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */
+ {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */
+ {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */
+ {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */
+ {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */
+ {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */
+ {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */
+ {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */
+ {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */
+ {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */
+ {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */
+ {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */
+ {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */
+ {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */
+ {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */
+ {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */
+ {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */
+ {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */
+ {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */
+ {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */
+ {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */
+ {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */
+ {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */
+ {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */
+ {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */
+ {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */
+ {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */
+ {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */
+ {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */
+ {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */
+ {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */
+ {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */
+ {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */
+ {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */
+ {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */
+ {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */
+ {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */
+ {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */
+ {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */
+ {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */
+ {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */
+ {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */
+ {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */
+ {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */
+ {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */
+ {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */
+ {VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_clk0.vin2a_clk0 */
+ {VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_hsync0.vin2a_hsync0 */
+ {VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_vsync0.vin2a_vsync0 */
+ {VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d0.vin2a_d0 */
+ {VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d1.vin2a_d1 */
+ {VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d2.vin2a_d2 */
+ {VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d3.vin2a_d3 */
+ {VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d4.vin2a_d4 */
+ {VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d5.vin2a_d5 */
+ {VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d6.vin2a_d6 */
+ {VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d7.vin2a_d7 */
+ {VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d8.vin2a_d8 */
+ {VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d9.vin2a_d9 */
+ {VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d10.vin2a_d10 */
+ {VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d11.vin2a_d11 */
+ {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */
+ {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */
+ {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */
+ {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */
+ {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */
+ {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */
+ {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */
+ {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */
+ {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */
+ {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */
+ {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */
+ {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */
+ {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */
+ {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */
+ {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */
+ {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */
+ {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */
+ {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */
+ {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */
+ {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */
+ {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */
+ {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */
+ {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */
+ {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */
+ {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */
+ {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */
+ {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */
+ {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */
+ {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */
+ {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */
+ {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */
+ {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */
+ {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */
+ {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */
+ {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */
+ {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */
+ {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */
+ {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */
+ {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */
+ {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */
+ {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */
+ {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */
+ {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d0.rgmii1_txc */
+ {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d1.rgmii1_txctl */
+ {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d2.rgmii1_txd3 */
+ {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d3.rgmii1_txd2 */
+ {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d4.rgmii1_txd1 */
+ {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d5.rgmii1_txd0 */
+ {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d6.rgmii1_rxc */
+ {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d7.rgmii1_rxctl */
+ {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d8.rgmii1_rxd3 */
+ {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d9.rgmii1_rxd2 */
+ {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d10.rgmii1_rxd1 */
+ {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d11.rgmii1_rxd0 */
+ {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */
+ {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */
+ {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */
+ {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */
+ {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */
+ {XREF_CLK1, (M5 | PIN_OUTPUT)}, /* xref_clk1.atl_clk1 */
+ {XREF_CLK2, (M5 | PIN_OUTPUT)}, /* xref_clk2.atl_clk2 */
+ {MCASP1_AXR0, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr0.i2c5_sda */
+ {MCASP1_AXR1, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.i2c5_scl */
+ {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */
+ {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */
+ {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */
+ {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */
+ {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */
+ {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */
+ {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */
+ {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */
+ {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */
+ {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */
+ {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */
+ {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */
+ {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */
+ {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */
+ {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */
+ {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */
+ {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */
+ {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */
+ {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */
+ {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */
+ {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */
+ {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */
+ {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */
+ {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */
+ {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */
+ {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */
+ {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */
+ {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */
+ {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */
+ {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */
+ {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
+ {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */
+ {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
+ {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */
+ {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */
+ {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */
+ {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */
+ {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
+ {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */
+ {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */
+ {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */
+ {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rxd.mmc4_dat0 */
+ {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */
+ {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */
+ {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */
+ {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */
+ {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */
+ {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */
+ {WAKEUP3, (M1 | PULL_ENA | PULL_UP)}, /* Wakeup3.sys_nirq1 */
};
const struct pad_conf_entry early_padconf[] = {
};
#ifdef CONFIG_IODELAY_RECALIBRATION
-const struct iodelay_cfg_entry iodelay_cfg_array[] = {
+const struct iodelay_cfg_entry dra72_iodelay_cfg_array[] = {
{0x6F0, 359, 0}, /* RGMMI0_RXC_IN */
{0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */
{0x708, 80, 1391}, /* RGMMI0_RXD0_IN */
{0xA94, 1260, 0}, /* CFG_VIN2A_D15_OUT */
{0xAA0, 1400, 0}, /* CFG_VIN2A_D16_OUT */
{0xAAC, 1290, 0}, /* CFG_VIN2A_D17_OUT */
+ {0x144, 0, 0}, /* CFG_GPMC_A13_IN */
+ {0x150, 2062, 2277}, /* CFG_GPMC_A14_IN */
+ {0x15C, 1960, 2289}, /* CFG_GPMC_A15_IN */
+ {0x168, 2058, 2386}, /* CFG_GPMC_A16_IN */
+ {0x170, 0, 0 }, /* CFG_GPMC_A16_OUT */
+ {0x174, 2062, 2350}, /* CFG_GPMC_A17_IN */
+ {0x188, 0, 0}, /* CFG_GPMC_A18_OUT */
+ {0x374, 121, 0}, /* CFG_GPMC_CS2_OUT */
};
#endif
{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */
{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */
{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */
- {MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.mmc1_sdcd */
+ {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */
{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */
{GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */
{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */
#
# KS2-EVM: board Makefile
-# (C) Copyright 2012-2014
+# (C) Copyright 2012-2015
# Texas Instruments Incorporated, <www.ti.com>
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += board.o
-obj-y += ddr3_cfg.o
obj-$(CONFIG_K2HK_EVM) += board_k2hk.o
obj-$(CONFIG_K2HK_EVM) += ddr3_k2hk.o
obj-$(CONFIG_K2E_EVM) += board_k2e.o
obj-$(CONFIG_K2E_EVM) += ddr3_k2e.o
obj-$(CONFIG_K2L_EVM) += board_k2l.o
obj-$(CONFIG_K2L_EVM) += ddr3_k2l.o
+obj-$(CONFIG_K2L_EVM) += ddr3_cfg.o
obj-$(CONFIG_K2G_EVM) += board_k2g.o
obj-$(CONFIG_K2G_EVM) += ddr3_k2g.o
ddr3a_size = 0;
if (lpae) {
- env = getenv("ddr3a_size");
- if (env)
- ddr3a_size = simple_strtol(env, NULL, 10);
+ ddr3a_size = ddr3_get_size();
if ((ddr3a_size != 8) && (ddr3a_size != 4))
ddr3a_size = 0;
}
switch (pll) {
case MAIN_PLL:
- speed = get_max_dev_speed();
+ speed = get_max_dev_speed(speeds);
data = &core_pll_config[speed];
break;
case PASS_PLL:
[uart_clk] = SYS_CLK,
};
-static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
-static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
+static int arm_speeds[DEVSPEED_NUMSPDS] = {
+ SPD400,
+ SPD600,
+ SPD800,
+ SPD900,
+ SPD1000,
+ SPD900,
+ SPD800,
+ SPD600,
+ SPD400,
+ SPD200,
+};
+
+static int dev_speeds[DEVSPEED_NUMSPDS] = {
+ SPD600,
+ SPD800,
+ SPD900,
+ SPD1000,
+ SPD900,
+ SPD800,
+ SPD600,
+ SPD400,
+};
+
+static struct pll_init_data main_pll_config[NUM_SPDS] = {
+ [SPD400] = {MAIN_PLL, 100, 3, 2},
+ [SPD600] = {MAIN_PLL, 300, 6, 2},
+ [SPD800] = {MAIN_PLL, 200, 3, 2},
+ [SPD900] = {TETRIS_PLL, 75, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+};
+
+static struct pll_init_data tetris_pll_config[NUM_SPDS] = {
+ [SPD200] = {TETRIS_PLL, 250, 3, 10},
+ [SPD400] = {TETRIS_PLL, 100, 1, 6},
+ [SPD600] = {TETRIS_PLL, 100, 1, 4},
+ [SPD800] = {TETRIS_PLL, 400, 3, 4},
+ [SPD900] = {TETRIS_PLL, 75, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+};
+
static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 250, 3, 10};
struct pll_init_data *get_pll_init_data(int pll)
{
+ int speed;
struct pll_init_data *data = NULL;
switch (pll) {
case MAIN_PLL:
- data = &main_pll_config;
+ speed = get_max_dev_speed(dev_speeds);
+ data = &main_pll_config[speed];
break;
case TETRIS_PLL:
- data = &tetris_pll_config;
+ speed = get_max_arm_speed(arm_speeds);
+ data = &tetris_pll_config[speed];
break;
case NSS_PLL:
data = &nss_pll_config;
switch (pll) {
case MAIN_PLL:
- speed = get_max_dev_speed();
+ speed = get_max_dev_speed(speeds);
data = &core_pll_config[speed];
break;
case TETRIS_PLL:
- speed = get_max_arm_speed();
+ speed = get_max_arm_speed(speeds);
data = &tetris_pll_config[speed];
break;
case PASS_PLL:
switch (pll) {
case MAIN_PLL:
- speed = get_max_dev_speed();
+ speed = get_max_dev_speed(speeds);
data = &core_pll_config[speed];
break;
case TETRIS_PLL:
- speed = get_max_arm_speed();
+ speed = get_max_arm_speed(speeds);
data = &tetris_pll_config[speed];
break;
case PASS_PLL:
#include <common.h>
-#include <i2c.h>
#include <asm/arch/ddr3.h>
-#include <asm/arch/hardware.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* DDR3 PHY configuration data with 1600M rate, 8GB size */
-struct ddr3_phy_config ddr3phy_1600_8g = {
- .pllcr = 0x0001C000ul,
- .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK),
- .pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)),
- .ptr0 = 0x42C21590ul,
- .ptr1 = 0xD05612C0ul,
- .ptr2 = 0, /* not set in gel */
- .ptr3 = 0x0D861A80ul,
- .ptr4 = 0x0C827100ul,
- .dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
- .dcr_val = ((1 << 10)),
- .dtpr0 = 0xA19DBB66ul,
- .dtpr1 = 0x32868300ul,
- .dtpr2 = 0x50035200ul,
- .mr0 = 0x00001C70ul,
- .mr1 = 0x00000006ul,
- .mr2 = 0x00000018ul,
- .dtcr = 0x730035C7ul,
- .pgcr2 = 0x00F07A12ul,
- .zq0cr1 = 0x0000005Dul,
- .zq1cr1 = 0x0000005Bul,
- .zq2cr1 = 0x0000005Bul,
- .pir_v1 = 0x00000033ul,
- .pir_v2 = 0x0000FF81ul,
-};
-
-/* DDR3 EMIF configuration data with 1600M rate, 8GB size */
-struct ddr3_emif_config ddr3_1600_8g = {
- .sdcfg = 0x6200CE6Aul,
- .sdtim1 = 0x16709C55ul,
- .sdtim2 = 0x00001D4Aul,
- .sdtim3 = 0x435DFF54ul,
- .sdtim4 = 0x553F0CFFul,
- .zqcfg = 0xF0073200ul,
- .sdrfc = 0x00001869ul,
-};
-
-#ifdef CONFIG_K2HK_EVM
-/* DDR3 PHY configuration data with 1333M rate, and 2GB size */
-struct ddr3_phy_config ddr3phy_1333_2g = {
- .pllcr = 0x0005C000ul,
- .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK),
- .pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)),
- .ptr0 = 0x42C21590ul,
- .ptr1 = 0xD05612C0ul,
- .ptr2 = 0, /* not set in gel */
- .ptr3 = 0x0B4515C2ul,
- .ptr4 = 0x0A6E08B4ul,
- .dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
- .dcr_val = ((1 << 10)),
- .dtpr0 = 0x8558AA55ul,
- .dtpr1 = 0x32857280ul,
- .dtpr2 = 0x5002C200ul,
- .mr0 = 0x00001A60ul,
- .mr1 = 0x00000006ul,
- .mr2 = 0x00000010ul,
- .dtcr = 0x710035C7ul,
- .pgcr2 = 0x00F065B8ul,
- .zq0cr1 = 0x0000005Dul,
- .zq1cr1 = 0x0000005Bul,
- .zq2cr1 = 0x0000005Bul,
- .pir_v1 = 0x00000033ul,
- .pir_v2 = 0x0000FF81ul,
-};
-
-/* DDR3 EMIF configuration data with 1333M rate, and 2GB size */
-struct ddr3_emif_config ddr3_1333_2g = {
- .sdcfg = 0x62008C62ul,
- .sdtim1 = 0x125C8044ul,
- .sdtim2 = 0x00001D29ul,
- .sdtim3 = 0x32CDFF43ul,
- .sdtim4 = 0x543F0ADFul,
- .zqcfg = 0x70073200ul,
- .sdrfc = 0x00001457ul,
-};
-#endif
-
-#ifdef CONFIG_K2E_EVM
-/* DDR3 PHY configuration data with 1600M rate, and 4GB size */
-struct ddr3_phy_config ddr3phy_1600_4g = {
- .pllcr = 0x0001C000ul,
- .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK),
- .pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)),
- .ptr0 = 0x42C21590ul,
- .ptr1 = 0xD05612C0ul,
- .ptr2 = 0, /* not set in gel */
- .ptr3 = 0x08861A80ul,
- .ptr4 = 0x0C827100ul,
- .dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
- .dcr_val = ((1 << 10)),
- .dtpr0 = 0x9D9CBB66ul,
- .dtpr1 = 0x12840300ul,
- .dtpr2 = 0x5002D200ul,
- .mr0 = 0x00001C70ul,
- .mr1 = 0x00000006ul,
- .mr2 = 0x00000018ul,
- .dtcr = 0x710035C7ul,
- .pgcr2 = 0x00F07A12ul,
- .zq0cr1 = 0x0001005Dul,
- .zq1cr1 = 0x0001005Bul,
- .zq2cr1 = 0x0001005Bul,
- .pir_v1 = 0x00000033ul,
- .pir_v2 = 0x0000FF81ul,
-};
-
-/* DDR3 EMIF configuration data with 1600M rate, and 4GB size */
-struct ddr3_emif_config ddr3_1600_4g = {
- .sdcfg = 0x6200CE62ul,
- .sdtim1 = 0x166C9855ul,
- .sdtim2 = 0x00001D4Aul,
- .sdtim3 = 0x421DFF53ul,
- .sdtim4 = 0x543F07FFul,
- .zqcfg = 0x70073200ul,
- .sdrfc = 0x00001869ul,
-};
-#endif
+#include "ddr3_cfg.h"
struct ddr3_phy_config ddr3phy_1600_2g = {
.pllcr = 0x0001C000ul,
.zqcfg = 0x70073200ul,
.sdrfc = 0x00001869ul,
};
-
-int ddr3_get_dimm_params(char *dimm_name)
-{
- int ret;
- int old_bus;
- u8 spd_params[256];
-
- i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);
-
- old_bus = i2c_get_bus_num();
- i2c_set_bus_num(1);
-
- ret = i2c_read(0x53, 0, 1, spd_params, 256);
-
- i2c_set_bus_num(old_bus);
-
- dimm_name[0] = '\0';
-
- if (ret) {
- puts("Cannot read DIMM params\n");
- return 1;
- }
-
- /*
- * We need to convert spd data to dimm parameters
- * and to DDR3 EMIF and PHY regirsters values.
- * For now we just return DIMM type string value.
- * Caller may use this value to choose appropriate
- * a pre-set DDR3 configuration
- */
-
- strncpy(dimm_name, (char *)&spd_params[0x80], 18);
- dimm_name[18] = '\0';
-
- return 0;
-}
#ifndef __DDR3_CFG_H
#define __DDR3_CFG_H
-extern struct ddr3_phy_config ddr3phy_1600_8g;
-extern struct ddr3_emif_config ddr3_1600_8g;
-
-extern struct ddr3_phy_config ddr3phy_1333_2g;
-extern struct ddr3_emif_config ddr3_1333_2g;
-
-extern struct ddr3_phy_config ddr3phy_1600_4g;
-extern struct ddr3_emif_config ddr3_1600_4g;
+#include <asm/arch/ddr3.h>
extern struct ddr3_phy_config ddr3phy_1600_2g;
extern struct ddr3_emif_config ddr3_1600_2g;
-int ddr3_get_dimm_params(char *dimm_name);
+int ddr3_get_dimm_params_from_spd(struct ddr3_spd_cb *spd_cb);
#endif /* __DDR3_CFG_H */
/*
* Keystone2: DDR3 initialization
*
- * (C) Copyright 2014
+ * (C) Copyright 2014-2015
* Texas Instruments Incorporated, <www.ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
#include <asm/arch/ddr3.h>
static struct pll_init_data ddr3_400 = DDR3_PLL_400;
+static struct pll_init_data ddr3_333 = DDR3_PLL_333;
u32 ddr3_init(void)
{
- u32 ddr3_size;
- char dimm_name[32];
+ struct ddr3_spd_cb spd_cb;
- if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1))
- init_pll(&ddr3_400);
+ if (ddr3_get_dimm_params_from_spd(&spd_cb)) {
+ printf("Sorry, I don't know how to configure DDR3A.\n"
+ "Bye :(\n");
+ for (;;)
+ ;
+ }
- ddr3_get_dimm_params(dimm_name);
+ printf("Detected SO-DIMM [%s]\n", spd_cb.dimm_name);
- printf("Detected SO-DIMM [%s]\n", dimm_name);
+ printf("DDR3 speed %d\n", spd_cb.ddrspdclock);
+ if (spd_cb.ddrspdclock == 1600)
+ init_pll(&ddr3_400);
+ else
+ init_pll(&ddr3_333);
/* Reset DDR3 PHY after PLL enabled */
ddr3_reset_ddrphy();
- if (!strcmp(dimm_name, "18KSF1G72HZ-1G6E2 ")) {
- /* 8G SO-DIMM */
- ddr3_size = 8;
- printf("DRAM: 8 GiB\n");
- ddr3phy_1600_8g.zq0cr1 |= 0x10000;
- ddr3phy_1600_8g.zq1cr1 |= 0x10000;
- ddr3phy_1600_8g.zq2cr1 |= 0x10000;
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_8g);
- ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_8g);
- } else if (!strcmp(dimm_name, "18KSF51272HZ-1G6K2")) {
- /* 4G SO-DIMM */
- ddr3_size = 4;
- printf("DRAM: 4 GiB\n");
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g);
- ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g);
- } else {
- printf("Unknown SO-DIMM. Cannot configure DDR3\n");
- while (1)
- ;
- }
+ spd_cb.phy_cfg.zq0cr1 |= 0x10000;
+ spd_cb.phy_cfg.zq1cr1 |= 0x10000;
+ spd_cb.phy_cfg.zq2cr1 |= 0x10000;
+ ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg);
+ ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &spd_cb.emif_cfg);
+
+ printf("DRAM: %d GiB\n", spd_cb.ddr_size_gbyte);
- return ddr3_size;
+ return (u32)spd_cb.ddr_size_gbyte;
}
u32 ddr3_init(void)
{
- char dimm_name[32];
u32 ddr3_size;
+ struct ddr3_spd_cb spd_cb;
- ddr3_get_dimm_params(dimm_name);
+ if (ddr3_get_dimm_params_from_spd(&spd_cb)) {
+ printf("Sorry, I don't know how to configure DDR3A.\n"
+ "Bye :(\n");
+ for (;;)
+ ;
+ }
- printf("Detected SO-DIMM [%s]\n", dimm_name);
+ printf("Detected SO-DIMM [%s]\n", spd_cb.dimm_name);
- if (!strcmp(dimm_name, "18KSF1G72HZ-1G6E2 ")) {
- init_pll(&ddr3a_400);
- if (cpu_revision() > 0) {
- if (cpu_revision() > 1) {
- /* PG 2.0 */
- /* Reset DDR3A PHY after PLL enabled */
- ddr3_reset_ddrphy();
- ddr3phy_1600_8g.zq0cr1 |= 0x10000;
- ddr3phy_1600_8g.zq1cr1 |= 0x10000;
- ddr3phy_1600_8g.zq2cr1 |= 0x10000;
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC,
- &ddr3phy_1600_8g);
- } else {
- /* PG 1.1 */
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC,
- &ddr3phy_1600_8g);
- }
+ if ((cpu_revision() > 1) ||
+ (__raw_readl(KS2_RSTCTRL_RSTYPE) & 0x1)) {
+ printf("DDR3 speed %d\n", spd_cb.ddrspdclock);
+ if (spd_cb.ddrspdclock == 1600)
+ init_pll(&ddr3a_400);
+ else
+ init_pll(&ddr3a_333);
+ }
- ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE,
- &ddr3_1600_8g);
- printf("DRAM: Capacity 8 GiB (includes reported below)\n");
- ddr3_size = 8;
- } else {
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_8g);
- ddr3_1600_8g.sdcfg |= 0x1000;
- ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE,
- &ddr3_1600_8g);
- printf("DRAM: Capacity 4 GiB (includes reported below)\n");
- ddr3_size = 4;
- }
- } else if (!strcmp(dimm_name, "SQR-SD3T-2G1333SED")) {
- init_pll(&ddr3a_333);
- if (cpu_revision() > 0) {
- if (cpu_revision() > 1) {
- /* PG 2.0 */
- /* Reset DDR3A PHY after PLL enabled */
- ddr3_reset_ddrphy();
- ddr3phy_1333_2g.zq0cr1 |= 0x10000;
- ddr3phy_1333_2g.zq1cr1 |= 0x10000;
- ddr3phy_1333_2g.zq2cr1 |= 0x10000;
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC,
- &ddr3phy_1333_2g);
- } else {
- /* PG 1.1 */
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC,
- &ddr3phy_1333_2g);
- }
- ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE,
- &ddr3_1333_2g);
- ddr3_size = 2;
- printf("DRAM: 2 GiB");
- } else {
- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1333_2g);
- ddr3_1333_2g.sdcfg |= 0x1000;
- ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE,
- &ddr3_1333_2g);
- ddr3_size = 1;
- printf("DRAM: 1 GiB");
+ if (cpu_revision() > 0) {
+ if (cpu_revision() > 1) {
+ /* PG 2.0 */
+ /* Reset DDR3A PHY after PLL enabled */
+ ddr3_reset_ddrphy();
+ spd_cb.phy_cfg.zq0cr1 |= 0x10000;
+ spd_cb.phy_cfg.zq1cr1 |= 0x10000;
+ spd_cb.phy_cfg.zq2cr1 |= 0x10000;
}
+ ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg);
+
+ ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &spd_cb.emif_cfg);
+
+ ddr3_size = spd_cb.ddr_size_gbyte;
} else {
- printf("Unknown SO-DIMM. Cannot configure DDR3\n");
- while (1)
- ;
+ ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg);
+ spd_cb.emif_cfg.sdcfg |= 0x1000;
+ ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &spd_cb.emif_cfg);
+ ddr3_size = spd_cb.ddr_size_gbyte / 2;
}
+ printf("DRAM: %d GiB (includes reported below)\n", ddr3_size);
/* Apply the workaround for PG 1.0 and 1.1 Silicons */
if (cpu_revision() <= 1)
};
static const struct ns16550_platdata devkit8000_serial = {
- OMAP34XX_UART3,
- 2,
- V_NS16550_CLK
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
};
U_BOOT_DEVICE(devkit8000_uart) = {
#include <common.h>
#include <errno.h>
+#include <libfdt.h>
#include <spl.h>
#include <asm/arch/cpu.h>
#include <asm/arch/hardware.h>
#endif
struct blk_desc *dev_desc;
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
const void *fit_hdr = NULL;
#endif
cnt = image_get_image_size(hdr);
break;
#endif
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *) addr;
puts("Fit image detected...\n");
}
bootstage_mark(BOOTSTAGE_ID_IDE_READ);
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
/* This cannot be done earlier,
* we need complete FIT image in RAM first */
if (genimg_get_format((void *) addr) == IMAGE_FORMAT_FIT) {
!defined(CONFIG_ENV_IS_IN_DATAFLASH) && \
!defined(CONFIG_ENV_IS_IN_MMC) && \
!defined(CONFIG_ENV_IS_IN_FAT) && \
+ !defined(CONFIG_ENV_IS_IN_EXT4) && \
!defined(CONFIG_ENV_IS_IN_NAND) && \
!defined(CONFIG_ENV_IS_IN_NVRAM) && \
!defined(CONFIG_ENV_IS_IN_ONENAND) && \
!defined(CONFIG_ENV_IS_IN_UBI) && \
!defined(CONFIG_ENV_IS_NOWHERE)
# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\
-SPI_FLASH|NVRAM|MMC|FAT|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
+SPI_FLASH|NVRAM|MMC|FAT|EXT4|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
#endif
/*
obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
+obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o
obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
obj-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
-obj-$(CONFIG_OF_LIBFDT) += fdt_support.o
+obj-$(CONFIG_$(SPL_)OF_LIBFDT) += fdt_support.o
obj-$(CONFIG_MII) += miiphyutil.o
obj-$(CONFIG_CMD_MII) += miiphyutil.o
obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
+obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o
obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
endif
obj-y += image.o
obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
-obj-$(CONFIG_OF_LIBFDT) += image-fdt.o
-obj-$(CONFIG_FIT) += image-fit.o
-obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o
+obj-$(CONFIG_$(SPL_)OF_LIBFDT) += image-fdt.o
+obj-$(CONFIG_$(SPL_)FIT) += image-fit.o
+obj-$(CONFIG_$(SPL_)FIT_SIGNATURE) += image-sig.o
obj-$(CONFIG_IO_TRACE) += iotrace.o
obj-y += memsize.o
obj-y += stdio.o
images.os.arch = image_get_arch(os_hdr);
break;
#endif
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
case IMAGE_FORMAT_FIT:
if (fit_image_get_type(images.fit_hdr_os,
images.fit_noffset_os,
/* Kernel entry point is the setup.bin */
} else if (images.legacy_hdr_valid) {
images.ep = image_get_ep(&images.legacy_hdr_os_copy);
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
} else if (images.fit_uname_os) {
int ret;
return 1;
}
-#if defined(CONFIG_OF_LIBFDT)
+#if IMAGE_ENABLE_OF_LIBFDT
/* find flattened device tree */
ret = boot_get_fdt(flag, argc, argv, IH_ARCH_DEFAULT, &images,
&images.ft_addr, &images.ft_len);
set_working_fdt_addr((ulong)images.ft_addr);
#endif
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
/* find all of the loadables */
ret = boot_get_loadable(argc, argv, &images, IH_ARCH_DEFAULT,
NULL, NULL);
}
}
#endif
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_LMB)
+#if IMAGE_ENABLE_OF_LIBFDT && defined(CONFIG_LMB)
if (!ret && (states & BOOTM_STATE_FDT)) {
boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
ret = boot_relocate_fdt(&images->lmb, &images->ft_addr,
const void *buf;
const char *fit_uname_config = NULL;
const char *fit_uname_kernel = NULL;
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
int os_noffset;
#endif
bootstage_mark(BOOTSTAGE_ID_DECOMP_IMAGE);
break;
#endif
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
case IMAGE_FORMAT_FIT:
os_noffset = fit_image_load(images, img_addr,
&fit_uname_kernel, &fit_uname_config,
--- /dev/null
+/*
+ * (c) Copyright 2016 by VRT Technology
+ *
+ * Author:
+ * Stuart Longland <stuartl@vrt.com.au>
+ *
+ * Based on FAT environment driver
+ * (c) Copyright 2011 by Tigris Elektronik GmbH
+ *
+ * Author:
+ * Maximilian Schwerin <mvs@tigris.de>
+ *
+ * and EXT4 filesystem implementation
+ * (C) Copyright 2011 - 2012 Samsung Electronics
+ * EXT4 filesystem implementation in Uboot by
+ * Uma Shankar <uma.shankar@samsung.com>
+ * Manjunatha C Achar <a.manjunatha@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <search.h>
+#include <errno.h>
+#include <ext4fs.h>
+#include <mmc.h>
+
+char *env_name_spec = "EXT4";
+
+env_t *env_ptr;
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int env_init(void)
+{
+ /* use default */
+ gd->env_addr = (ulong)&default_environment[0];
+ gd->env_valid = 1;
+
+ return 0;
+}
+
+#ifdef CONFIG_CMD_SAVEENV
+int saveenv(void)
+{
+ env_t env_new;
+ block_dev_desc_t *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+
+ err = env_export(&env_new);
+ if (err)
+ return err;
+
+ part = get_device_and_partition(EXT4_ENV_INTERFACE,
+ EXT4_ENV_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ return 1;
+
+ dev = dev_desc->dev;
+ ext4fs_set_blk_dev(dev_desc, &info);
+
+ if (!ext4fs_mount(info.size)) {
+ printf("\n** Unable to use %s %s for saveenv **\n",
+ EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART);
+ return 1;
+ }
+
+ err = ext4fs_write(EXT4_ENV_FILE, (void *)&env_new, sizeof(env_t));
+ ext4fs_close();
+
+ if (err == -1) {
+ printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
+ EXT4_ENV_FILE, EXT4_ENV_INTERFACE, dev, part);
+ return 1;
+ }
+
+ puts("done\n");
+ return 0;
+}
+#endif /* CONFIG_CMD_SAVEENV */
+
+void env_relocate_spec(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+ block_dev_desc_t *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+
+ part = get_device_and_partition(EXT4_ENV_INTERFACE,
+ EXT4_ENV_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ goto err_env_relocate;
+
+ dev = dev_desc->dev;
+ ext4fs_set_blk_dev(dev_desc, &info);
+
+ if (!ext4fs_mount(info.size)) {
+ printf("\n** Unable to use %s %s for loading the env **\n",
+ EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART);
+ goto err_env_relocate;
+ }
+
+ err = ext4_read_file(EXT4_ENV_FILE, buf, 0, CONFIG_ENV_SIZE);
+ ext4fs_close();
+
+ if (err == -1) {
+ printf("\n** Unable to read \"%s\" from %s%d:%d **\n",
+ EXT4_ENV_FILE, EXT4_ENV_INTERFACE, dev, part);
+ goto err_env_relocate;
+ }
+
+ env_import(buf, 1);
+ return;
+
+err_env_relocate:
+ set_default_env(NULL);
+}
ulong fdt_addr;
char *fdt_blob = NULL;
void *buf;
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
const char *fit_uname_config = images->fit_uname_cfg;
const char *fit_uname_fdt = NULL;
ulong default_addr;
if (argc > 2)
select = argv[2];
if (select || genimg_has_config(images)) {
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
if (select) {
/*
* If the FDT blob comes from the FIT image and the
debug("* fdt: cmdline image address = 0x%08lx\n",
fdt_addr);
}
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
} else {
/* use FIT configuration provided in first bootm
* command argument
* (libfdt based) and raw FDT blob (also libfdt
* based).
*/
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
/* check FDT blob vs FIT blob */
if (fit_check_format(buf)) {
ulong load, len;
if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
(type == IH_TYPE_RAMDISK)) {
- fit_image_get_entry(fit, image_noffset, &entry);
+ ret = fit_image_get_entry(fit, image_noffset, &entry);
printf("%s Entry Point: ", p);
if (ret)
printf("unavailable\n");
return 0;
}
+static int fit_image_get_address(const void *fit, int noffset, char *name,
+ ulong *load)
+{
+ int len, cell_len;
+ const fdt32_t *cell;
+ uint64_t load64 = 0;
+
+ cell = fdt_getprop(fit, noffset, name, &len);
+ if (cell == NULL) {
+ fit_get_debug(fit, noffset, name, len);
+ return -1;
+ }
+
+ if (len > sizeof(ulong)) {
+ printf("Unsupported %s address size\n", name);
+ return -1;
+ }
+
+ cell_len = len >> 2;
+ /* Use load64 to avoid compiling warning for 32-bit target */
+ while (cell_len--) {
+ load64 = (load64 << 32) | uimage_to_cpu(*cell);
+ cell++;
+ }
+ *load = (ulong)load64;
+
+ return 0;
+}
/**
* fit_image_get_load() - get load addr property for given component image node
* @fit: pointer to the FIT format image header
*/
int fit_image_get_load(const void *fit, int noffset, ulong *load)
{
- int len;
- const uint32_t *data;
-
- data = fdt_getprop(fit, noffset, FIT_LOAD_PROP, &len);
- if (data == NULL) {
- fit_get_debug(fit, noffset, FIT_LOAD_PROP, len);
- return -1;
- }
-
- *load = uimage_to_cpu(*data);
- return 0;
+ return fit_image_get_address(fit, noffset, FIT_LOAD_PROP, load);
}
/**
*/
int fit_image_get_entry(const void *fit, int noffset, ulong *entry)
{
- int len;
- const uint32_t *data;
-
- data = fdt_getprop(fit, noffset, FIT_ENTRY_PROP, &len);
- if (data == NULL) {
- fit_get_debug(fit, noffset, FIT_ENTRY_PROP, len);
- return -1;
- }
-
- *entry = uimage_to_cpu(*data);
- return 0;
+ return fit_image_get_address(fit, noffset, FIT_ENTRY_PROP, entry);
}
/**
* Direct child node of the images parent node,
* i.e. component image node.
*/
- printf(" Hash(es) for Image %u (%s): ", count++,
+ printf(" Hash(es) for Image %u (%s): ", count,
fit_get_name(fit, noffset, NULL));
+ count++;
if (!fit_image_verify(fit, noffset))
return 0;
#include <image.h>
#include <mapmem.h>
-#if defined(CONFIG_FIT) || defined(CONFIG_OF_LIBFDT)
+#if IMAGE_ENABLE_FIT || IMAGE_ENABLE_OF_LIBFDT
#include <libfdt.h>
#include <fdt_support.h>
#endif
return (get_table_entry_name(uimage_type, "Unknown Image", type));
}
-const char *genimg_get_type_short_name(uint8_t type)
+static const char *genimg_get_short_name(const table_entry_t *table, int val)
{
- const table_entry_t *table;
-
- table = get_table_entry(uimage_type, type);
+ table = get_table_entry(table, val);
if (!table)
return "unknown";
#if defined(USE_HOSTCC) || !defined(CONFIG_NEEDS_MANUAL_RELOC)
#endif
}
+const char *genimg_get_type_short_name(uint8_t type)
+{
+ return genimg_get_short_name(uimage_type, type);
+}
+
const char *genimg_get_comp_name(uint8_t comp)
{
return (get_table_entry_name(uimage_comp, "Unknown Compression",
comp));
}
+const char *genimg_get_comp_short_name(uint8_t comp)
+{
+ return genimg_get_short_name(uimage_comp, comp);
+}
+
+const char *genimg_get_os_short_name(uint8_t os)
+{
+ return genimg_get_short_name(uimage_os, os);
+}
+
+const char *genimg_get_arch_short_name(uint8_t arch)
+{
+ return genimg_get_short_name(uimage_arch, arch);
+}
+
/**
* get_table_entry_id - translate short entry name to id
* @table: pointer to a translation table for entries of a specific type
kernel_addr = load_addr;
debug("* kernel: default image load address = 0x%08lx\n",
load_addr);
-#if defined(CONFIG_FIT)
+#if CONFIG_IS_ENABLED(FIT)
} else if (fit_parse_conf(img_addr, load_addr, &kernel_addr,
fit_uname_config)) {
debug("* kernel: config '%s' from image at 0x%08lx\n",
if (image_check_magic(hdr))
return IMAGE_FORMAT_LEGACY;
#endif
-#if defined(CONFIG_FIT) || defined(CONFIG_OF_LIBFDT)
+#if IMAGE_ENABLE_FIT || IMAGE_ENABLE_OF_LIBFDT
if (fdt_check_header(img_addr) == 0)
return IMAGE_FORMAT_FIT;
#endif
/* get header size */
h_size = image_get_header_size();
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
if (sizeof(struct fdt_header) > h_size)
h_size = sizeof(struct fdt_header);
#endif
ram_addr, d_size);
break;
#endif
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
case IMAGE_FORMAT_FIT:
d_size = fit_get_size(buf) - h_size;
debug(" FIT/FDT format image found at 0x%08lx, "
*/
int genimg_has_config(bootm_headers_t *images)
{
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
if (images->fit_uname_cfg)
return 1;
#endif
#ifdef CONFIG_SUPPORT_RAW_INITRD
char *end;
#endif
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
const char *fit_uname_config = images->fit_uname_cfg;
const char *fit_uname_ramdisk = NULL;
ulong default_addr;
debug("## Skipping init Ramdisk\n");
rd_len = rd_data = 0;
} else if (select || genimg_has_config(images)) {
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
if (select) {
/*
* If the init ramdisk comes from the FIT image and
"0x%08lx\n",
rd_addr);
}
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
} else {
/* use FIT configuration provided in first bootm
* command argument. If the property is not defined,
rd_load = image_get_load(rd_hdr);
break;
#endif
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
case IMAGE_FORMAT_FIT:
rd_noffset = fit_image_load(images,
rd_addr, &fit_uname_ramdisk,
int boot_get_setup(bootm_headers_t *images, uint8_t arch,
ulong *setup_start, ulong *setup_len)
{
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
return boot_get_setup_fit(images, arch, setup_start, setup_len);
#else
return -ENOENT;
#endif
}
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, const ulong *ld_start, ulong * const ld_len)
{
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
+obj-$(CONFIG_SPL_LOAD_FIT) += spl_fit.o
obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
obj-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
--- /dev/null
+/*
+ * Copyright (C) 2016 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <image.h>
+#include <libfdt.h>
+#include <spl.h>
+
+static ulong fdt_getprop_u32(const void *fdt, int node, const char *prop)
+{
+ const u32 *cell;
+ int len;
+
+ cell = fdt_getprop(fdt, node, prop, &len);
+ if (len != sizeof(*cell))
+ return -1U;
+ return fdt32_to_cpu(*cell);
+}
+
+static int spl_fit_select_fdt(const void *fdt, int images, int *fdt_offsetp)
+{
+ const char *name, *fdt_name;
+ int conf, node, fdt_node;
+ int len;
+
+ *fdt_offsetp = 0;
+ conf = fdt_path_offset(fdt, FIT_CONFS_PATH);
+ if (conf < 0) {
+ debug("%s: Cannot find /configurations node: %d\n", __func__,
+ conf);
+ return -EINVAL;
+ }
+ for (node = fdt_first_subnode(fdt, conf);
+ node >= 0;
+ node = fdt_next_subnode(fdt, node)) {
+ name = fdt_getprop(fdt, node, "description", &len);
+ if (!name)
+ return -EINVAL;
+ if (board_fit_config_name_match(name))
+ continue;
+
+ debug("Selecting config '%s'", name);
+ fdt_name = fdt_getprop(fdt, node, FIT_FDT_PROP, &len);
+ if (!fdt_name) {
+ debug("%s: Cannot find fdt name property: %d\n",
+ __func__, len);
+ return -EINVAL;
+ }
+
+ debug(", fdt '%s'\n", fdt_name);
+ fdt_node = fdt_subnode_offset(fdt, images, fdt_name);
+ if (fdt_node < 0) {
+ debug("%s: Cannot find fdt node '%s': %d\n",
+ __func__, fdt_name, fdt_node);
+ return -EINVAL;
+ }
+
+ *fdt_offsetp = fdt_getprop_u32(fdt, fdt_node, "data-offset");
+ len = fdt_getprop_u32(fdt, fdt_node, "data-size");
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ printf("FIT: Selected '%s'\n", name);
+#endif
+
+ return len;
+ }
+
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ printf("No matching DT out of these options:\n");
+ for (node = fdt_first_subnode(fdt, conf);
+ node >= 0;
+ node = fdt_next_subnode(fdt, node)) {
+ name = fdt_getprop(fdt, node, "name", &len);
+ printf(" %s\n", name);
+ }
+#endif
+
+ return -ENOENT;
+}
+
+int spl_load_simple_fit(struct spl_load_info *info, ulong sector, void *fit)
+{
+ int sectors;
+ ulong size, load;
+ unsigned long count;
+ int node, images;
+ void *load_ptr;
+ int fdt_offset, fdt_len;
+ int data_offset, data_size;
+ int base_offset;
+ int src_sector;
+ void *dst;
+
+ /*
+ * Figure out where the external images start. This is the base for the
+ * data-offset properties in each image.
+ */
+ size = fdt_totalsize(fit);
+ size = (size + 3) & ~3;
+ base_offset = (size + 3) & ~3;
+
+ /*
+ * So far we only have one block of data from the FIT. Read the entire
+ * thing, including that first block, placing it so it finishes before
+ * where we will load the image.
+ *
+ * Note that we will load the image such that its first byte will be
+ * at the load address. Since that byte may be part-way through a
+ * block, we may load the image up to one block before the load
+ * address. So take account of that here by subtracting an addition
+ * block length from the FIT start position.
+ *
+ * In fact the FIT has its own load address, but we assume it cannot
+ * be before CONFIG_SYS_TEXT_BASE.
+ */
+ fit = (void *)(CONFIG_SYS_TEXT_BASE - size - info->bl_len);
+ sectors = (size + info->bl_len - 1) / info->bl_len;
+ count = info->read(info, sector, sectors, fit);
+ debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu\n",
+ sector, sectors, fit, count);
+ if (count == 0)
+ return -EIO;
+
+ /* find the firmware image to load */
+ images = fdt_path_offset(fit, FIT_IMAGES_PATH);
+ if (images < 0) {
+ debug("%s: Cannot find /images node: %d\n", __func__, images);
+ return -1;
+ }
+ node = fdt_first_subnode(fit, images);
+ if (node < 0) {
+ debug("%s: Cannot find first image node: %d\n", __func__, node);
+ return -1;
+ }
+
+ /* Get its information and set up the spl_image structure */
+ data_offset = fdt_getprop_u32(fit, node, "data-offset");
+ data_size = fdt_getprop_u32(fit, node, "data-size");
+ load = fdt_getprop_u32(fit, node, "load");
+ debug("data_offset=%x, data_size=%x\n", data_offset, data_size);
+ spl_image.load_addr = load;
+ spl_image.entry_point = load;
+ spl_image.os = IH_OS_U_BOOT;
+
+ /*
+ * Work out where to place the image. We read it so that the first
+ * byte will be at 'load'. This may mean we need to load it starting
+ * before then, since we can only read whole blocks.
+ */
+ sectors = (data_size + info->bl_len - 1) / info->bl_len;
+ data_offset += base_offset;
+ load_ptr = (void *)load;
+ debug("U-Boot size %x, data %p\n", data_size, load_ptr);
+ dst = load_ptr - (data_offset % info->bl_len);
+
+ /* Read the image */
+ src_sector = sector + data_offset / info->bl_len;
+ debug("image: data_offset=%x, dst=%p, src_sector=%x, sectors=%x\n",
+ data_offset, dst, src_sector, sectors);
+ count = info->read(info, src_sector, sectors, dst);
+ if (count != sectors)
+ return -EIO;
+
+ /* Figure out which device tree the board wants to use */
+ fdt_len = spl_fit_select_fdt(fit, images, &fdt_offset);
+ if (fdt_len < 0)
+ return fdt_len;
+
+ /*
+ * Read the device tree and place it after the image. There may be
+ * some extra data before it since we can only read entire blocks.
+ */
+ dst = load_ptr + data_size;
+ fdt_offset += base_offset;
+ count = info->read(info, sector + fdt_offset / info->bl_len, sectors,
+ dst);
+ debug("fit read %x sectors to %x, dst %p, data_offset %x\n",
+ sectors, spl_image.load_addr, dst, fdt_offset);
+ if (count != sectors)
+ return -EIO;
+
+ /*
+ * Copy the device tree so that it starts immediately after the image.
+ * After this we will have the U-Boot image and its device tree ready
+ * for us to start.
+ */
+ memcpy(dst, dst + fdt_offset % info->bl_len, fdt_len);
+
+ return 0;
+}
DECLARE_GLOBAL_DATA_PTR;
+static int mmc_load_legacy(struct mmc *mmc, ulong sector,
+ struct image_header *header)
+{
+ u32 image_size_sectors;
+ unsigned long count;
+
+ spl_parse_image_header(header);
+ /* convert size to sectors - round up */
+ image_size_sectors = (spl_image.size + mmc->read_bl_len - 1) /
+ mmc->read_bl_len;
+
+ /* Read the header too to avoid extra memcpy */
+ count = mmc->block_dev.block_read(&mmc->block_dev, sector,
+ image_size_sectors,
+ (void *)(ulong)spl_image.load_addr);
+ debug("read %x sectors to %x\n", image_size_sectors,
+ spl_image.load_addr);
+ if (count != image_size_sectors)
+ return -EIO;
+
+ return 0;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
+ ulong count, void *buf)
+{
+ struct mmc *mmc = load->dev;
+
+ return mmc->block_dev.block_read(&mmc->block_dev, sector, count, buf);
+}
+#endif
+
static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
{
unsigned long count;
- u32 image_size_sectors;
struct image_header *header;
+ int ret = 0;
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct image_header));
/* read image header to find the image size & load address */
count = mmc->block_dev.block_read(&mmc->block_dev, sector, 1, header);
- debug("read sector %lx, count=%lu\n", sector, count);
- if (count == 0)
+ debug("hdr read sector %lx, count=%lu\n", sector, count);
+ if (count == 0) {
+ ret = -EIO;
goto end;
+ }
- if (image_get_magic(header) != IH_MAGIC) {
+ switch (image_get_magic(header)) {
+ case IH_MAGIC:
+ ret = mmc_load_legacy(mmc, sector, header);
+ break;
+#ifdef CONFIG_SPL_LOAD_FIT
+ case FDT_MAGIC: {
+ struct spl_load_info load;
+
+ debug("Found FIT\n");
+ load.dev = mmc;
+ load.priv = NULL;
+ load.bl_len = mmc->read_bl_len;
+ load.read = h_spl_load_read;
+ ret = spl_load_simple_fit(&load, sector, header);
+ break;
+ }
+#endif
+ default:
puts("bad magic\n");
return -1;
}
- spl_parse_image_header(header);
-
- /* convert size to sectors - round up */
- image_size_sectors = (spl_image.size + mmc->read_bl_len - 1) /
- mmc->read_bl_len;
-
- /* Read the header too to avoid extra memcpy */
- count = mmc->block_dev.block_read(&mmc->block_dev, sector,
- image_size_sectors,
- (void *)(ulong)spl_image.load_addr);
- debug("read %x sectors to %x\n", image_size_sectors,
- spl_image.load_addr);
-
end:
- if (count == 0) {
+ if (ret) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
puts("spl: mmc block read error\n");
#endif
/* Verify checksum/CRC */
if (xyz.crc_mode)
{
- cksum = cyg_crc16 (xyz.pkt, xyz.len);
+ cksum = crc16_ccitt(0, xyz.pkt, xyz.len);
if (cksum != ((xyz.crc1 << 8) | xyz.crc2))
{
ZM_DEBUG (zm_dprintf ("CRC error - recvd: %02x%02x, computed: %x\n",
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="10m50_devboard"
CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTD is not set
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTD is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH,SYS_CLK_100"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_NETCONSOLE=y
CONFIG_ETH_DESIGNWARE=y
-CONFIG_USB_EHCI_HCD=y
CONFIG_AXP_ALDO4_VOLT=2500
+CONFIG_USB_EHCI_HCD=y
CONFIG_TARGET_C29XPCIE=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip"
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CPCI4052=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_CYRUS=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,PPC_P5020"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_CYRUS=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,PPC_P5040"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPA(21)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,SATAPWR=SUNXI_GPB(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(2)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPH(2)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8308RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND"
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND"
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8315ERDB=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8323ERDB=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M,PQ_MDS_PIB=1"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M,PQ_MDS_PIB=1"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCISLAVE"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC832XEMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349EMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349ITX=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000"
CONFIG_SYS_PROMPT="MPC8349E-mITX-GP> "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349ITX=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX,SYS_TEXT_BASE=0xFE000000"
CONFIG_SYS_PROMPT="MPC8349E-mITX> "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8349ITX=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX"
CONFIG_SYS_PROMPT="MPC8349E-mITX> "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC837XEMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC837XEMDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC837XERDB=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8536DS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8540ADS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8541CDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8541CDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8544DS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8548CDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8548CDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8548CDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8555CDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8555CDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8560ADS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8568MDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8569MDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="ATM"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8569MDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8572DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_MPC8572DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_MPC8610HPCD=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_MPC8641HPCN=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PHYS_64BIT"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_MPC8641HPCN=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,STATUSLED=234"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="MINIFAP"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2D300=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2DNT2=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n"
CONFIG_AUTOBOOT_STOP_STR="++++++++++"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2DNT2=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n"
CONFIG_AUTOBOOT_STOP_STR="++++++++++"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2D=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2I=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M110\""
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M112\""
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M113\""
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O2MNT=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_O3DNT=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD,36BIT"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,36BIT"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT,SDCARD"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,SDCARD"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1023RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5020DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PLU405=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PMC405DE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PMC440=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN8I_A83T=y
+CONFIG_DRAM_TYPE=7
CONFIG_DRAM_CLK=480
CONFIG_DRAM_ZQ=15355
CONFIG_DRAM_ODT_EN=y
-CONFIG_DRAM_TYPE=7
-CONFIG_SYS_EXTRA_OPTIONS=""
-#CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
-#CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
CONFIG_AXP_GPIO=y
-#CONFIG_USB_MUSB_HOST=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-sinovoip-bpi-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_AXP_DCDC1_VOLT=3000
-CONFIG_AXP_DCDC2_VOLT=900
-CONFIG_AXP_DCDC3_VOLT=900
-CONFIG_AXP_DCDC4_VOLT=0
CONFIG_AXP_DCDC5_VOLT=1200
CONFIG_AXP_ALDO2_VOLT=0
CONFIG_AXP_ALDO3_VOLT=0
-CONFIG_AXP_DLDO4_VOLT=0
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT,T1040RDB"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,SECURE_BOOT,T1042RDB"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
+# CONFIG_SYS_MALLOC_F is not set
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SECURE_BOOT"
+CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,SYS_TEXT_BASE=0xFFF00000"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="STK52XX_REV100"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="LCD,NEC_NL6448BC20"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM823M=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_TQM834X=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM850L=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM850M=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM855L=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM855M=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM860L=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM860M=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM862L=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM862M=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM866M=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM885D=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ104V7DS01"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_TWR=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="TWR_P1025"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_UCP1020=y
CONFIG_TARGET_UCP1020_SPIFLASH=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b"
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_UCP1020=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_PROMPT="B$ "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_VOM405=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_MPC5xxx=y
CONFIG_TARGET_A3M071=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_LIB_RAND=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_A4M072=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="asdfg"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_A3M071=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="A4M2K"
# CONFIG_CMD_SETEXPR is not set
CONFIG_LIB_RAND=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_AC14XX=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="ac14xx> "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_ACADIA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_NOR=y
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_NOR=y
CONFIG_NOR_BOOT=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND,SPL_USBETH_SUPPORT"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
CONFIG_SYS_NS16550=y
-CONFIG_RSA=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
+CONFIG_RSA=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_GPIO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_DM_SERIAL=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm"
CONFIG_DM=y
CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
-CONFIG_DM_SPI=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_DMA=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA30=y
CONFIG_TARGET_APALIS_T30=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Apalis T30 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_NFS is not set
-CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_SYS_PROMPT="BIOS> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_ARCHES=y
CONFIG_DEFAULT_DEVICE_TREE="arches"
+CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_CONTROL=y
CONFIG_SYS_NS16550=y
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_ARIA=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_ARISTAINETOS2=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_ARISTAINETOS2B=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_ARISTAINETOS=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos.cfg,MX6DL"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_MISC is not set
+CONFIG_OF_LIBFDT=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="ARNDALE # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USE_TINY_PRINTF=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_BAMBOO=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_VGA_BIOS_ADDR=0xfffa0000
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
+CONFIG_FIT=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_CONTROL=y
CONFIG_CPU=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA30=y
CONFIG_TARGET_BEAVER=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra30 (Beaver) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_BAV335X=y
CONFIG_BAV_VERSION=1
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_BAV335X=y
CONFIG_BAV_VERSION=2
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_BUBINGA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_VME8349=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="CADDY2"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_NET is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_CANYONLANDS=y
CONFIG_DEFAULT_DEVICE_TREE="canyonlands"
+CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA30=y
CONFIG_TARGET_CARDHU=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_TARGET_CGTQMX6EVAL=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL"
+CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_DM=y
-CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_CHARON=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_DM_VIDEO=y
CONFIG_I2C_EDID=y
+CONFIG_VIDEO_ROTATION=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
+CONFIG_FIT=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
CONFIG_HAVE_MRC=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_VGA_BIOS=y
+CONFIG_FIT=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_CM5200=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_CM_FX6=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL"
CONFIG_SYS_PROMPT="CM-FX6 # "
# CONFIG_CMD_IMLS is not set
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_NFS is not set
CONFIG_DM=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_SERIAL=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_CM_T54=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="CM-T54 # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA20=y
CONFIG_TARGET_COLIBRI_T20=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Colibri T20 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_TEGRA30=y
CONFIG_TARGET_COLIBRI_T30=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Colibri T30 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
CONFIG_FSL_LPUART=y
CONFIG_FSL_DSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD,DEVELOP"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_FSL_ESPI=y
CONFIG_TPM_AUTH_SESSIONS=y
CONFIG_TPM=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_FSL_ESPI=y
CONFIG_TPM_AUTH_SESSIONS=y
CONFIG_TPM=y
+CONFIG_OF_LIBFDT=y
CONFIG_X86=y
CONFIG_VENDOR_COREBOOT=y
CONFIG_TARGET_COREBOOT=y
+CONFIG_FIT=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
+CONFIG_FIT=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_CONTROL=y
CONFIG_CPU=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA114=y
CONFIG_TARGET_DALMORE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="DEVCONCENTER"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DM=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR=" "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000,DIGSY_REV5"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_DIGSY_MTC=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="DIGSY_REV5"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_DLVISION_10G=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_DLVISION=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_DM_SERIAL=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="dra72-evm"
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
-CONFIG_DM_SPI=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_ARM=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_DRA7XX_EVM=y
+CONFIG_DM_SERIAL=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
-CONFIG_DM_SPI=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA=y
CONFIG_TEGRA210=y
CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra210 (E2220-1170) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_OMAP34XX=y
CONFIG_TARGET_ECO5PK=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="ECO5-PK # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_VENDOR_EFI=y
CONFIG_DEFAULT_DEVICE_TREE="efi"
CONFIG_TARGET_EFI=y
+CONFIG_FIT=y
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ROCKCHIP_RK3036=y
CONFIG_TARGET_EVB_RK3036=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CLK=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_RESET=y
-CONFIG_LED=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_PINCTRL=y
+CONFIG_LED=y
+CONFIG_RESET=y
+CONFIG_DM_MMC=y
CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_PINCTRL=y
CONFIG_ROCKCHIP_3036_PINCTRL=y
-CONFIG_ROCKCHIP_GPIO=y
CONFIG_RAM=y
-CONFIG_DM_MMC=y
-CONFIG_USE_PRIVATE_LIBGCC=y
-CONFIG_CMD_DHRYSTONE=y
-CONFIG_ERRNO_STR=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_DEBUG_UART=y
-CONFIG_DEBUG_UART_NS16550=y
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
-# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y
CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SYS_NS16550=y
CONFIG_DM_VIDEO=y
CONFIG_I2C_EDID=y
+CONFIG_VIDEO_ROTATION=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_ARM=y
CONFIG_TARGET_FLEA3=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="flea3 U-Boot > "
# CONFIG_CMD_SETEXPR is not set
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_TQM5200=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="FO300"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_TARGET_GALILEO=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_FIT=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_GDPPC440ETX=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_GLACIER=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
+CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SYS_NS16550=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_GLACIER=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/canyonlands/u-boot-ram.lds"
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
CONFIG_SYS_PROMPT="Ventana > "
# CONFIG_CMD_IMLS is not set
CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_H2200=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
CONFIG_DRAM_CLK=480
CONFIG_DRAM_ZQ=15355
CONFIG_DRAM_ODT_EN=y
-#CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
-#CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
CONFIG_AXP_GPIO=y
-#CONFIG_USB_MUSB_HOST=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-allwinner-h8homlet-v2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_AXP_DCDC1_VOLT=3000
-CONFIG_AXP_DCDC2_VOLT=900
-CONFIG_AXP_DCDC3_VOLT=900
-CONFIG_AXP_DCDC4_VOLT=0
CONFIG_AXP_DCDC5_VOLT=1500
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_KILAUEA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="HALEAKALA"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA20=y
CONFIG_TARGET_HARMONY=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (Harmony) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_ARM=y
CONFIG_ARCH_HIGHBANK=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n"
CONFIG_AUTOBOOT_KEYED_CTRLC=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_HRCON=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_HRCON=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="HRCON_DH"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,MACPWR=SUNXI_GPH(21)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_ICON=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_IDS8313=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFFF00000"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n"
CONFIG_AUTOBOOT_DELAY_STR="ids"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_SYS_NS16550=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_SYS_NS16550=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_SYS_NS16550=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CM720T=y
CONFIG_SYS_PROMPT="Integrator-AP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CM920T=y
CONFIG_SYS_PROMPT="Integrator-AP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CM926EJ_S=y
CONFIG_SYS_PROMPT="Integrator-AP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CM946ES=y
CONFIG_SYS_PROMPT="Integrator-AP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CM1136=y
CONFIG_SYS_PROMPT="Integrator-CP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CM920T=y
CONFIG_SYS_PROMPT="Integrator-CP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CM926EJ_S=y
CONFIG_SYS_PROMPT="Integrator-CP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CM946ES=y
CONFIG_SYS_PROMPT="Integrator-CP # "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="INTIB"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_IO64=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_IO=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_4xx=y
CONFIG_TARGET_IOCON=y
CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_IPEK01=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,MACPWR=SUNXI_GPH(19)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_TEGRA124=y
CONFIG_TARGET_JETSON_TK1=y
CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="k2e-evm"
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="K2E EVM # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="k2g-evm"
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_REMOTEPROC_TI_POWER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="k2hk-evm"
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="K2HK EVM # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="k2l-evm"
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="K2L EVM # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_KATMAI=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_KILAUEA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="KILAUEA"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_KMP204X=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMCOGE4"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_KM8360=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMCOGE5NE"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_KM8360=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMETER1"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_KMP204X=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMLION1"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMOPTI2"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMSUPX5"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_SUVD3=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMTEPR2"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_SUVD3=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_TIME=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ROCKCHIP_RK3036=y
CONFIG_TARGET_KYLIN_RK3036=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CLK=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_RESET=y
-CONFIG_LED=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_PINCTRL=y
+CONFIG_LED=y
+CONFIG_RESET=y
+CONFIG_DM_MMC=y
CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_PINCTRL=y
CONFIG_ROCKCHIP_3036_PINCTRL=y
-CONFIG_ROCKCHIP_GPIO=y
CONFIG_RAM=y
-CONFIG_DM_MMC=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
CONFIG_TARGET_KZM9G=y
CONFIG_SYS_PROMPT="KZM-A9-GT# "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_OF_LIBFDT=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_DAVINCI=y
+CONFIG_TARGET_LEGOEV3=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n"
+CONFIG_AUTOBOOT_STOP_STR="l"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SYS_NS16550=y
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART"
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_FSL_LPUART=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_FSL_LPUART=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_RSA=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart"
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
-CONFIG_DM_SPI=y
+CONFIG_SYS_NS16550=y
CONFIG_DM_SERIAL=y
CONFIG_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
-CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_SYS_NS16550=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_DM_SPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_DM_SPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT"
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
-CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SYS_NS16550=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_DM_SPI=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, SECURE_BOOT"
-CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, SECURE_BOOT"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
-CONFIG_DM_SPI=y
\ No newline at end of file
+CONFIG_SYS_NS16550=y
+CONFIG_RSA=y
CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
-CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
-CONFIG_DM_SPI=y
+CONFIG_SYS_NS16550=y
CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
+CONFIG_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT,SYS_FSL_DDR4"
-CONFIG_SYS_NS16550=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
-CONFIG_DM_SPI=y
+CONFIG_SYS_NS16550=y
CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
+CONFIG_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4"
-CONFIG_SYS_NS16550=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
-CONFIG_DM_SPI=y
+CONFIG_SYS_NS16550=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_EMU=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2080A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_SIMU=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2080A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_MISC is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080AQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080ARDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_EMU=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2085A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_SIMU=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2085A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_MISC is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080AQDS=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND,LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_ARM=y
CONFIG_TARGET_LS2080ARDB=y
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND,LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_LUAN=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_LWMON5=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_M28EVK=y
CONFIG_SPL=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_M53EVK=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/denx/m53evk/imximage.cfg"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_OF_LIBFDT=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MA5D4EVK=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4"
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_MAKALU=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_MCX=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="mcx # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_MECP5123=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA20=y
CONFIG_TARGET_MEDCOM_WIDE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide"
+CONFIG_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MEESC=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MEESC=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC8260=y
CONFIG_TARGET_KM82XX=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="MGCOGE3NE"
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC8260=y
CONFIG_TARGET_KM82XX=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="MGCOGE"
+CONFIG_OF_LIBFDT=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_CONTROL=y
CONFIG_CPU=y
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPA(21)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_MOTIONPRO=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_MPC5121ADS=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_MPC5121ADS=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="MPC5121ADS_REV2"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8308_P1M=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_MT_VENTOUX=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="mt_ventoux => "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_MUNICES=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_MX35PDK=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_MX53ARD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
# CONFIG_CMD_IMLS is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_NEO=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_KOSAGI_NOVENA=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NSA310S=y
-CONFIG_SYS_NS16550=y
+CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="nsa310s => "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_DHCP=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_PING=y
-CONFIG_CMD_USB=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA124=y
CONFIG_TARGET_NYAN_BIG=y
CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big"
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="ODROID-XU3 # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
CONFIG_SYS_PROMPT="Odroid # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA210=y
CONFIG_TARGET_P2371_0000=y
CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_TEGRA210=y
CONFIG_TARGET_P2371_2180=y
CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_NFS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PCI_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA114_SPI=y
-CONFIG_PCI_TEGRA=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_TEGRA210=y
CONFIG_TARGET_P2571=y
CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra210 (P2571) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_TEGRA20=y
CONFIG_TARGET_PAZ00=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_PCM030=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFF000000"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_PCM030=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="uboot> "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_FSL_LPUART=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC512X=y
CONFIG_TARGET_PDM360NG=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="Peach-Pi # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="Peach-Pit # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA20=y
CONFIG_TARGET_PLUTUX=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux"
+CONFIG_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (Plutux) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_ARM=y
CONFIG_TARGET_PXM2=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_QEMU_PPCE500=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_MAX_CPUS=2
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
+CONFIG_FIT=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_CONTROL=y
CONFIG_CPU=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAINIER"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_REDWOOD=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y
CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SYS_NS16550=y
CONFIG_DM_VIDEO=y
CONFIG_I2C_EDID=y
+CONFIG_VIDEO_ROTATION=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
CONFIG_TARGET_RPI_2=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_PHYS_TO_BUS=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
CONFIG_TARGET_RPI=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_PHYS_TO_BUS=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_RUT=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_SBC8349=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_SBC8349=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_SBC8349=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,33,PCIE"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,33"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,66,PCIE"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI,66"
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SBC8548=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_SBC8641D=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA20=y
CONFIG_TARGET_SEABOARD=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SMARTWEB=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
+CONFIG_OF_LIBFDT=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="SMDK5250 # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="SMDK5420 # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SNAPPER9260=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_SYS_PROMPT="Snapper> "
# CONFIG_CMD_BDI is not set
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SNAPPER9260=y
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_GADGET=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="snow # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_DM_MMC=y
CONFIG_USB=y
CONFIG_DM_USB=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_DM_MMC=y
CONFIG_USB=y
CONFIG_DM_USB=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
-CONFIG_SPL_SIMPLE_BUS=y
CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_DM_MMC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
-CONFIG_SPL_SIMPLE_BUS=y
CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_DM_MMC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_DM_MMC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_DM_MMC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_SR1500=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
-CONFIG_DM_MMC=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_SOCRATES=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DM_I2C=y
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring"
CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_PROMPT="spring # "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
CONFIG_TARGET_STM32F429_DISCOVERY=y
CONFIG_SYS_PROMPT="U-Boot > "
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_STRIDER=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CON"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_STRIDER=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CPU"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_SUVD3=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SUVD3"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_WALNUT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_T3CORP=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USE_TINY_PRINTF=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_TBS2910=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="Matrix U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA30=y
CONFIG_TARGET_TEC_NG=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng"
+CONFIG_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_TEGRA20=y
CONFIG_TARGET_TEC=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec"
+CONFIG_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (TEC) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
+CONFIG_FIT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_TQMA6=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_TQMA6=y
CONFIG_TQMA6X_SPI_BOOT=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_TQMA6=y
CONFIG_TQMA6S=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_TQMA6=y
CONFIG_TQMA6S=y
CONFIG_TQMA6X_SPI_BOOT=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_TQMA6=y
CONFIG_TQMA6S=y
CONFIG_WRU4=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter password in %d seconds to stop autoboot\n"
CONFIG_AUTOBOOT_ENCRYPTION=y
CONFIG_AUTOBOOT_STOP_STR_SHA256="36a9e7f1c95b82ffb99743e0c5c4ce95d83c9a430aac59f84ef3cbfab6145068"
CONFIG_CMD_GPIO=y
CONFIG_PCA9551_LED=y
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_TRATS2=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
CONFIG_SYS_PROMPT="Trats2 # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
CONFIG_ARCH_EXYNOS=y
CONFIG_TARGET_TRATS=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
CONFIG_SYS_PROMPT="Trats # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA20=y
CONFIG_TARGET_TRIMSLICE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_TARGET_TS4800=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_TARGET_TSERIES=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_TIME=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
CONFIG_ARM=y
CONFIG_TARGET_TSERIES=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_TIME=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
CONFIG_ARM=y
CONFIG_TARGET_TSERIES=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="TUGE1"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_TUXX1=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="TUXX1"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TWISTER=y
CONFIG_SPL=y
+CONFIG_FIT=y
CONFIG_SYS_PROMPT="twister => "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_TIME=y
# CONFIG_CMD_MISC is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_SPL_SIMPLE_BUS=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MMC_UNIPHIER=y
CONFIG_NAND_DENALI=y
CONFIG_CMD_TIME=y
# CONFIG_CMD_MISC is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_SPL_SIMPLE_BUS=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MMC_UNIPHIER=y
CONFIG_NAND_DENALI=y
CONFIG_CMD_TIME=y
# CONFIG_CMD_MISC is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_SPL_SIMPLE_BUS=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MMC_UNIPHIER=y
CONFIG_NAND_DENALI=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TARGET_USBARMORY=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_VE8313=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA124=y
CONFIG_TARGET_VENICE2=y
CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra124 (Venice2) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_TEGRA20=y
CONFIG_TARGET_VENTANA=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (Ventana) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_DM=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_DM=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_DM=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPI_FLASH=y
CONFIG_FSL_LPUART=y
+CONFIG_OF_LIBFDT=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPI_FLASH=y
CONFIG_FSL_LPUART=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_VME8349=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_WALNUT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_CMD_GPIO=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_OF_LIBFDT=y
CONFIG_TEGRA20=y
CONFIG_TARGET_WHISTLER=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-whistler"
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PROMPT="Tegra20 (Whistler) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_PPC=y
CONFIG_8xx=y
CONFIG_TARGET_TQM823L=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ065T9DR51U"
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_USE_TINY_PRINTF=y
+CONFIG_OF_LIBFDT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_XPEDITE1000=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
CONFIG_PPC=y
CONFIG_MPC86xx=y
CONFIG_TARGET_XPEDITE517X=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_XPEDITE520X=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_XPEDITE537X=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_XPEDITE550X=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_YOSEMITE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="YELLOWSTONE"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_YOSEMITE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="YOSEMITE"
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_YUCCA=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
.P
.B Create FIT image:
+.TP
+.BI "\-b
+Specifies that the following arguments are device tree binary files (.dtb).
+
.TP
.BI "\-c [" "comment" "]"
Specifies a comment to be added when signing. This is typically a useful
create the image.
.TP
-.BI "\-f [" "image tree source file" "]"
+.BI "\-E
+After processing, move the image data outside the FIT and store a data offset
+in the FIT. Images will be placed one after the other immediately after the
+FIT, with each one aligned to a 4-byte boundary. The existing 'data' property
+in each image will be replaced with 'data-offset' and 'data-size' properties.
+A 'data-offset' of 0 indicates that it starts in the first (4-byte aligned)
+byte after the FIT.
+
+.TP
+.BI "\-f [" "image tree source file" " | " "auto" "]"
Image tree source file that describes the structure and contents of the
FIT image.
+This can be automatically generated for some simple cases.
+Use "-f auto" for this. In that case the arguments -d, -A, -O, -T, -C, -a
+and -e are used to specify the image to include in the FIT and its attributes.
+No .its file is required.
+
.TP
.BI "\-F"
Indicates that an existing FIT image should be modified. No dtc
.nf
.B mkimage -f kernel.its -k /public/signing-keys -K u-boot.dtb \\\\
.br
-.B -c "Kernel 3.8 image for production devices" kernel.itb
+.B -c """Kernel 3.8 image for production devices""" kernel.itb
.fi
.P
.nf
.B mkimage -F -k /secret/signing-keys -K u-boot.dtb \\\\
.br
-.B -c "Kernel 3.8 image for production devices" kernel.itb
+.B -c """Kernel 3.8 image for production devices""" kernel.itb
+.fi
+
+.P
+Create a FIT image containing a kernel, using automatic mode. No .its file
+is required.
+.nf
+.B mkimage -f auto -A arm -O linux -T kernel -C none -a 43e00000 -e 0 \\\\
+.br
+.B -c """Kernel 4.4 image for production devices""" -d vmlinuz kernel.itb
+.fi
+.P
+Create a FIT image containing a kernel and some device tree files, using
+automatic mode. No .its file is required.
+.nf
+.B mkimage -f auto -A arm -O linux -T kernel -C none -a 43e00000 -e 0 \\\\
+.br
+.B -c """Kernel 4.4 image for production devices""" -d vmlinuz \\\\
+.B -b /path/to/rk3288-firefly.dtb /path/to/rk3288-jerry.dtb kernel.itb
.fi
.SH HOMEPAGE
==========================================================
Author: Marian Balakowicz <m8@semihalf.com>
+External data additions, 25/1/16 Simon Glass <sjg@chromium.org>
1) Introduction
---------------
not* be specified in a configuration node.
-8) Examples
+8) External data
+----------------
+
+The above format shows a 'data' property which holds the data for each image.
+It is also possible for this data to reside outside the FIT itself. This
+allows the FIT to be quite small, so that it can be loaded and scanned
+without loading a large amount of data. Then when an image is needed it can
+be loaded from an external source.
+
+In this case the 'data' property is omitted. Instead you can use:
+
+ - data-offset : offset of the data in a separate image store. The image
+ store is placed immediately after the last byte of the device tree binary,
+ aligned to a 4-byte boundary.
+ - data-size : size of the data in bytes
+
+
+9) Examples
-----------
Please see doc/uImage.FIT/*.its for actual image source files.
obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
-endif
obj-$(CONFIG_FSL_DEBUG_SERVER) += fsl_debug_server.o
+endif
obj-$(CONFIG_FSL_IIM) += fsl_iim.o
obj-$(CONFIG_GPIO_LED) += gpio_led.o
obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
spi_xfer(spi, bsize * 8, NULL, buf, 0);
spi_xfer(spi, 2 * 8, NULL, &crc, 0);
#ifdef CONFIG_MMC_SPI_CRC_ON
- if (be_to_cpu16(cyg_crc16(buf, bsize)) != crc) {
+ if (be_to_cpu16(crc16_ccitt(0, buf, bsize)) != crc) {
debug("%s: CRC error\n", mmc->cfg->name);
r1 = R1_SPI_COM_CRC;
break;
tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
while (bcnt--) {
#ifdef CONFIG_MMC_SPI_CRC_ON
- crc = cpu_to_be16(cyg_crc16((u8 *)buf, bsize));
+ crc = cpu_to_be16(crc16_ccitt(0, (u8 *)buf, bsize));
#endif
spi_xfer(spi, 2 * 8, tok, NULL, 0);
spi_xfer(spi, bsize * 8, buf, NULL, 0);
#include <errno.h>
#include <common.h>
#include <asm/io.h>
+#include <fdt_support.h>
#include <fsl_mdio.h>
#ifdef CONFIG_FSL_LAYERSCAPE
#include <asm/arch/fsl_serdes.h>
help
Say 'y' here to add support for test processor which does dummy
operations for sandbox platform.
+
+config REMOTEPROC_TI_POWER
+ bool "Support for TI Power processor"
+ select REMOTEPROC
+ depends on DM
+ depends on ARCH_KEYSTONE
+ depends on OF_CONTROL
+ help
+ Say 'y' here to add support for TI power processors such as those
+ found on certain TI keystone and OMAP generation SoCs.
endmenu
# Remote proc drivers - Please keep this list alphabetically sorted.
obj-$(CONFIG_REMOTEPROC_SANDBOX) += sandbox_testproc.o
+obj-$(CONFIG_REMOTEPROC_TI_POWER) += ti_power_proc.o
--- /dev/null
+/*
+ * (C) Copyright 2015-2016
+ * Texas Instruments Incorporated - http://www.ti.com/
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#define pr_fmt(fmt) "%s: " fmt, __func__
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <remoteproc.h>
+#include <mach/psc_defs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * struct ti_powerproc_privdata - power processor private data
+ * @loadaddr: base address for loading the power processor
+ * @psc_module: psc module address.
+ */
+struct ti_powerproc_privdata {
+ phys_addr_t loadaddr;
+ u32 psc_module;
+};
+
+/**
+ * ti_of_to_priv() - generate private data from device tree
+ * @dev: corresponding ti remote processor device
+ * @priv: pointer to driver specific private data
+ *
+ * Return: 0 if all went ok, else corresponding -ve error
+ */
+static int ti_of_to_priv(struct udevice *dev,
+ struct ti_powerproc_privdata *priv)
+{
+ int node = dev->of_offset;
+ const void *blob = gd->fdt_blob;
+ int tmp;
+
+ if (!blob) {
+ debug("'%s' no dt?\n", dev->name);
+ return -EINVAL;
+ }
+
+ priv->loadaddr = fdtdec_get_addr(blob, node, "reg");
+ if (priv->loadaddr == FDT_ADDR_T_NONE) {
+ debug("'%s': no 'reg' property\n", dev->name);
+ return -EINVAL;
+ }
+
+ tmp = fdtdec_get_int(blob, node, "ti,lpsc_module", -EINVAL);
+ if (tmp < 0) {
+ debug("'%s': no 'ti,lpsc_module' property\n", dev->name);
+ return tmp;
+ }
+ priv->psc_module = tmp;
+
+ return 0;
+}
+
+/**
+ * ti_powerproc_probe() - Basic probe
+ * @dev: corresponding ti remote processor device
+ *
+ * Return: 0 if all went ok, else corresponding -ve error
+ */
+static int ti_powerproc_probe(struct udevice *dev)
+{
+ struct dm_rproc_uclass_pdata *uc_pdata;
+ struct ti_powerproc_privdata *priv;
+ int ret;
+
+ uc_pdata = dev_get_uclass_platdata(dev);
+ priv = dev_get_priv(dev);
+
+ ret = ti_of_to_priv(dev, priv);
+
+ debug("%s probed with slave_addr=0x%08lX module=%d(%d)\n",
+ uc_pdata->name, priv->loadaddr, priv->psc_module, ret);
+
+ return ret;
+}
+
+/**
+ * ti_powerproc_load() - Loadup the TI remote processor
+ * @dev: corresponding ti remote processor device
+ * @addr: Address in memory where image binary is stored
+ * @size: Size in bytes of the image binary
+ *
+ * Return: 0 if all went ok, else corresponding -ve error
+ */
+static int ti_powerproc_load(struct udevice *dev, ulong addr, ulong size)
+{
+ struct dm_rproc_uclass_pdata *uc_pdata;
+ struct ti_powerproc_privdata *priv;
+ int ret;
+
+ uc_pdata = dev_get_uclass_platdata(dev);
+ if (!uc_pdata) {
+ debug("%s: no uc pdata!\n", dev->name);
+ return -EINVAL;
+ }
+
+ priv = dev_get_priv(dev);
+ ret = psc_module_keep_in_reset_enabled(priv->psc_module, false);
+ if (ret) {
+ debug("%s Unable to disable module '%d'(ret=%d)\n",
+ uc_pdata->name, priv->psc_module, ret);
+ return ret;
+ }
+
+ debug("%s: Loading binary from 0x%08lX, size 0x%08lX to 0x%08lX\n",
+ uc_pdata->name, addr, size, priv->loadaddr);
+
+ memcpy((void *)priv->loadaddr, (void *)addr, size);
+
+ debug("%s: Complete!\n", uc_pdata->name);
+ return 0;
+}
+
+/**
+ * ti_powerproc_start() - (replace: short desc)
+ * @dev: corresponding ti remote processor device
+ *
+ * Return: 0 if all went ok, else corresponding -ve error
+ */
+static int ti_powerproc_start(struct udevice *dev)
+{
+ struct dm_rproc_uclass_pdata *uc_pdata;
+ struct ti_powerproc_privdata *priv;
+ int ret;
+
+ uc_pdata = dev_get_uclass_platdata(dev);
+ if (!uc_pdata) {
+ debug("%s: no uc pdata!\n", dev->name);
+ return -EINVAL;
+ }
+
+ priv = dev_get_priv(dev);
+ ret = psc_disable_module(priv->psc_module);
+ if (ret) {
+ debug("%s Unable to disable module '%d'(ret=%d)\n",
+ uc_pdata->name, priv->psc_module, ret);
+ return ret;
+ }
+
+ ret = psc_module_release_from_reset(priv->psc_module);
+ if (ret) {
+ debug("%s Failed to wait for module '%d'(ret=%d)\n",
+ uc_pdata->name, priv->psc_module, ret);
+ return ret;
+ }
+ ret = psc_enable_module(priv->psc_module);
+ if (ret) {
+ debug("%s Unable to disable module '%d'(ret=%d)\n",
+ uc_pdata->name, priv->psc_module, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct dm_rproc_ops ti_powerproc_ops = {
+ .load = ti_powerproc_load,
+ .start = ti_powerproc_start,
+};
+
+static const struct udevice_id ti_powerproc_ids[] = {
+ {.compatible = "ti,power-processor"},
+ {}
+};
+
+U_BOOT_DRIVER(ti_powerproc) = {
+ .name = "ti_power_proc",
+ .of_match = ti_powerproc_ids,
+ .id = UCLASS_REMOTEPROC,
+ .ops = &ti_powerproc_ops,
+ .probe = ti_powerproc_probe,
+ .priv_auto_alloc_size = sizeof(struct ti_powerproc_privdata),
+};
{
struct omap_timer_priv *priv = dev_get_priv(dev);
- priv->regs = (struct omap_gptimer_regs *)dev_get_addr(dev);
+ priv->regs = map_physmem(dev_get_addr(dev),
+ sizeof(struct omap_gptimer_regs), MAP_NOCACHE);
return 0;
}
config DEFAULT_DEVICE_TREE
string "Default Device Tree for DT control"
+ depends on OF_CONTROL
help
This option specifies the default Device Tree used for DT control.
It can be overridden from the command line:
$ make DEVICE_TREE=<device-tree-name>
+config OF_LIST
+ string "List of device tree files to include for DT control"
+ depends on SPL_LOAD_FIT
+ help
+ This option specifies a list of device tree files to use for DT
+ control. These will be packaged into a FIT. At run-time, SPL will
+ select the correct DT to use by examining the hardware (e.g.
+ reading a board ID value). This is a list of device tree files
+ (without the directory or .dtb suffix) separated by <space>.
+
config OF_SPL_REMOVE_PROPS
string "List of device tree properties to drop for SPL"
depends on SPL_OF_CONTROL
ulong get_tbclk (void);
void reset_misc (void);
void reset_cpu (ulong addr);
-#if defined (CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
void ft_cpu_setup(void *blob, bd_t *bd);
-#ifdef CONFIG_PCI
void ft_pci_setup(void *blob, bd_t *bd);
-#endif
-#endif
void smp_set_core_boot_addr(unsigned long addr, int corenr);
void smp_kick_all_cpus(void);
#if defined(CONFIG_MPC85xx)
typedef MPC85xx_SYS_INFO sys_info_t;
void get_sys_info ( sys_info_t * );
-# if defined(CONFIG_OF_LIBFDT)
- void ft_fixup_cpu(void *, u64);
- void ft_fixup_num_cores(void *);
-# endif
+void ft_fixup_cpu(void *, u64);
+void ft_fixup_num_cores(void *);
#endif
#if defined(CONFIG_MPC86xx)
typedef MPC86xx_SYS_INFO sys_info_t;
#define CONFIG_BOOTP_PXE_CLIENTARCH 0x9
#endif
-#define CONFIG_OF_LIBFDT
-
#ifdef CONFIG_ARM64
#define CONFIG_CMD_BOOTI
#else
/*
* FDT options
*/
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
#define CONFIG_LMB
/*
/*
* FDT options
*/
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
#define CONFIG_LMB
/*
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#endif
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#endif
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400800 /* I2C speed and slave address*/
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CONFIG_MISC_INIT_R
-/* new uImage format support */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
-
#define CONFIG_MMC 1
#ifdef CONFIG_MMC
#define CONFIG_SYS_HUSH_PARSER
/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
/* I2C */
#define CONFIG_SYS_I2C
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
#define CONFIG_MPC83XX_GPIO 1
/*
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* PCI
*/
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
-/* new uImage format support */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree to kernel
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
-
/* maximum size of the flat tree (8K) */
#define OF_FLAT_TREE_MAX_SIZE 8192
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree to kernel
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_VGA_AS_SINGLE_DEVICE
#endif
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_USB
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
#define CONFIG_PRAM 0
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define CONFIG_API 1
#endif /* __CONFIG_H */
#endif
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#undef CONFIG_SYS_FLASH_EMPTY_INFO
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#undef CONFIG_SYS_FLASH_EMPTY_INFO
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#endif
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/*
* I2C
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/*
* I2C
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
* Open firmware flat tree support
*-----------------------------------------------------------------------
*/
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#undef CONFIG_WATCHDOG /* watchdog disabled */
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 256 MB of memory, since this is
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
#define CONFIG_ETHPRIME "SCC"
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_HWCONFIG 1
#endif /* __CONFIG_H */
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_CMD_PING
#define CONFIG_CMD_EEPROM
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
-#define CONFIG_FIT
/*
* IPB Bus clocking configuration.
#undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
#endif
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
/* maximum size of the flat tree (8K) */
#define OF_FLAT_TREE_MAX_SIZE 8192
* Open firmware flat tree support
*-----------------------------------------------------------------------
*/
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define CONFIG_ARP_TIMEOUT 200UL
-#define CONFIG_FIT 1
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1
#define OF_CPU "PowerPC,5121@0"
#include <configs/ti_am335x_common.h>
#ifndef CONFIG_SPL_BUILD
-#ifndef CONFIG_FIT
-# define CONFIG_FIT
-#endif
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
#endif
#undef CONFIG_BOOTDELAY
#ifndef CONFIG_SPL_BUILD
-#ifndef CONFIG_FIT
-# define CONFIG_FIT
-#endif
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
#endif
/* Display CPU and Board information */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_OF_LIBFDT
#define CONFIG_MISC_INIT_R
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
+/* EEPROM */
+#define CONFIG_EEPROM_CHIP_ADDRESS 0x50
+#define CONFIG_EEPROM_BUS_ADDRESS 0
+
#endif /* __CONFIG_AM57XX_EVM_H */
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/
#endif
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
/* Update size in "reg" property of NOR FLASH device tree nodes */
#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
#define CONFIG_INITRD_TAG /* send initrd params */
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_BOOTDELAY 5
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
/*
* Command line configuration
*/
-
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_BOOTCOMMAND "run flash_self"
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1
#define OF_CPU "PowerPC,5121@0"
#define CONFIG_HW_WATCHDOG
#define CONFIG_IMX_WATCHDOG
-#define CONFIG_FIT
-
/* Framebuffer */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
#define BOARD_LATE_INIT
#define CONFIG_BAUDRATE 115200
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT /* Device Tree support */
-
/* general purpose I/O */
#define CONFIG_AT91_GPIO
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
/*
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_OF_LIBFDT
-
-
#define CONFIG_ATMEL_LEGACY
#define CONFIG_SYS_TEXT_BASE 0x21f00000
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
-
/*
* Hardware drivers
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_OF_LIBFDT
-
/* general purpose I/O */
#define CONFIG_AT91_GPIO
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_ATMEL_LEGACY
#define CONFIG_AT91_GPIO 1
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_OF_LIBFDT
-
/*
* NAND Flash configuration
*/
/* FIT support */
#define CONFIG_SYS_BOOTM_LEN SZ_64M
-#define CONFIG_OF_BOARD_SETUP
/* UBI Support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_ENV_IS_NOWHERE
#ifndef CONFIG_SPL_BUILD
-# define CONFIG_FIT
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
# ifdef CONFIG_ENABLE_VBOOT
-# define CONFIG_FIT_SIGNATURE
-# define CONFIG_RSA
# endif
#endif
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
-/* Enable devicetree support */
-#define CONFIG_OF_LIBFDT
-
/* SHA hashing */
#define CONFIG_CMD_HASH
#define CONFIG_HASH_VERIFY
/*
* Flat Device Tree support
*/
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define CONFIG_STACKSIZE (128 * 1024)
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
-#define CONFIG_OF_BOARD_SETUP
#define CONFIG_MISC_INIT_R
/* SPL */
#define CONFIG_MISC_INIT_R
-#define CONFIG_OF_LIBFDT 1
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_MISC_INIT_R
-#define CONFIG_OF_LIBFDT
/*
* The early kernel mapping on ARM currently only maps from the base of DRAM
* to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
#undef CONFIG_SPL_OS_BOOT
-/* Device Tree defines */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
/* EEPROM related defines */
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_LZMA /* LZMA compression support */
-#define CONFIG_OF_LIBFDT
/*
* Serial Console Configuration
#define CONFIG_ENV_OFFSET (12 * 64 * 2048)
#endif
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_SYS_NO_FLASH
#define CONFIG_MISC_INIT_R
#define CONFIG_LAST_STAGE_INIT
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
-
#else /* CONFIG_TRAILBLAZER */
#define CONFIG_BOARD_EARLY_INIT_F
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_LONGHELP
#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC
-#define CONFIG_OF_LIBFDT
/*
* Linux Information
/*
* Pass open firmware flat tree
*/
-#define CONFIG_OF_LIBFDT
/*
* Environment
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
#define CONFIG_SYS_FLASH_WRITE_TOUT 500
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define PLLMR1_DEFAULT PLLMR1_266_133_66
/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
#define CONFIG_FIT_DISABLE_SHA256
#define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
#define PLLMR1_DEFAULT PLLMR1_266_133_66_33
/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
#define CONFIG_FIT_DISABLE_SHA256
#define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-/*
- * Enable device tree support
- */
-#define CONFIG_OF_LIBFDT
-
/*
* Display cpu info at boot
*/
#define CONFIG_IODELAY_RECALIBRATION
#endif
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_PHYS_64BIT
+#define CONFIG_NR_DRAM_BANKS 2
+#define CONFIG_MAX_MEM_MAPPED 0x80000000
+
#ifndef CONFIG_QSPI_BOOT
/* MMC ENV related defines */
#define CONFIG_ENV_IS_IN_MMC
#endif
#endif /* NOR support */
+/* EEPROM */
+#define CONFIG_EEPROM_CHIP_ADDRESS 0x50
+#define CONFIG_EEPROM_BUS_ADDRESS 0
+
#endif /* __CONFIG_DRA7XX_EVM_H */
#define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002
#define EXYNOS_IRAM_SECONDARY_BASE 0x02020018
-/* Enable FIT support and comparison */
-#define CONFIG_FIT
-#define CONFIG_FIT_BEST_MATCH
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
/* Enable FIT images support */
#define CONFIG_CMD_FDT
-#define CONFIG_FIT
#endif /* __CONFIG_H */
#endif /* CONFIG_SPI_FLASH */
-/* Flattened Image Tree Suport */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
-
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
"done"
/* Device Tree Support */
-#define CONFIG_OF_BOARD_SETUP
#define CONFIG_FDT_FIXUP_PARTITIONS
#endif /* __CONFIG_H */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 }
-#define CONFIG_FIT
#define CONFIG_FIT_DISABLE_SHA256
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_FIT
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
#define CONFIG_SYS_TIMER_RATE (150000000/256)
#define CONFIG_IDENT_STRING "hikey"
-/* Flat Device Tree Definitions */
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_BOARD_EARLY_INIT_F
/* Physical Memory Map */
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT
-/* new uImage format support */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
-
#define CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
#define CONFIG_SYS_HUSH_PARSER
/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
/*
* The reserved memory
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_OF_LIBFDT /* enable passing a Device Tree */
#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
/*
#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_BOARD_TYPES 1 /* support board types */
-#define CONFIG_FIT
#define CFG_ALT_MEMTEST
#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
#define CONFIG_FIT_DISABLE_SHA256
#define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
-
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
/*
* Open firmware flat tree support
*/
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#if 0
/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
#define CONFIG_KSNET_CPSW_NUM_PORTS 9
#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
+#define CONFIG_DDR_SPD
+
#endif /* __CONFIG_K2E_EVM_H */
/* U-Boot general configuration */
#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
DEFAULT_MMC_TI_ARGS \
+ DEFAULT_PMMC_BOOT_ENV \
"console=ttyS0,115200n8\0" \
"bootpart=0:2\0" \
"bootdir=/boot\0" \
"name_ubi=k2g-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2g-evm.gph\0" \
"init_mmc=run args_all args_mmc\0" \
+ "soc_variant=k2g\0" \
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0"\
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
"${bootdir}/${name_kern}\0" \
"get_mon_mmc=load mmc ${bootpart} ${addr_mon} ${bootdir}/${name_mon}\0"\
+#define CONFIG_BOOTCOMMAND \
+ "run set_name_pmmc init_${boot} get_pmmc_${boot} run_pmmc " \
+ "get_fdt_${boot} get_mon_${boot} get_kern_${boot} " \
+ "run_mon run_kern"
+
#include <configs/ti_armv7_keystone2.h>
/* SPL SPI Loader Configuration */
#define CONFIG_KSNET_NETCP_V1_0
#define CONFIG_KSNET_CPSW_NUM_PORTS 5
+#define CONFIG_DDR_SPD
+
#endif /* __CONFIG_K2HK_EVM_H */
#define CONFIG_CMD_DTT
#define CONFIG_JFFS2_CMDLINE
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
/* standard km ethernet_present for piggy */
#define CONFIG_KM_COMMON_ETH_INIT
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
/*
* QE UEC ethernet configuration
*/
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_MISC_INIT_R
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-
/*
* NS16550 Configuration
*/
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */
-#define CONFIG_FIT 1
-
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc/cpm/serial@11a90"
#undef CONFIG_BOOTM_RTEMS
/* Support both device trees and ATAGs. */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-/*
- * Enable device tree support
- */
-#define CONFIG_OF_LIBFDT
-
/*
* Environment variables configurations
*/
--- /dev/null
+/*
+ * Copyright (C) 2016 David Lechner <david@lechnology.com>
+ *
+ * Based on da850evm.h
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on davinci_dvevm.h. Original Copyrights follow:
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MACH_DAVINCI_DA850_EVM
+#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
+#define CONFIG_SOC_DA850 /* TI DA850 SoC */
+#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
+#define CONFIG_SYS_OSCIN_FREQ 24000000
+#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
+#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SYS_DA850_PLL_INIT
+#define CONFIG_SYS_DA850_DDR_INIT
+
+#define CONFIG_SYS_TEXT_BASE 0xc1080000
+
+
+/*
+ * Memory Info
+ */
+#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
+#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
+#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
+#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
+
+/* memtest start addr */
+#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
+
+/* memtest will be run on 16MB */
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
+
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+
+#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
+ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
+ DAVINCI_SYSCFG_SUSPSRC_SPI0 | \
+ DAVINCI_SYSCFG_SUSPSRC_UART1 | \
+ DAVINCI_SYSCFG_SUSPSRC_EMAC | \
+ DAVINCI_SYSCFG_SUSPSRC_I2C)
+
+/*
+ * PLL configuration
+ */
+#define CONFIG_SYS_DV_CLKMODE 0
+#define CONFIG_SYS_DA850_PLL0_POSTDIV 1
+#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
+#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
+#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
+#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
+#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
+#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1
+#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
+
+#define CONFIG_SYS_DA850_PLL1_POSTDIV 1
+#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
+#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
+#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
+
+#define CONFIG_SYS_DA850_PLL0_PLLM 24
+#define CONFIG_SYS_DA850_PLL1_PLLM 21
+
+/*
+ * DDR2 memory configuration
+ */
+#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \
+ DV_DDR_PHY_EXT_STRBEN | \
+ (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT))
+
+#define CONFIG_SYS_DA850_DDR2_SDBCR ( \
+ (1 << DV_DDR_SDCR_MSDRAMEN_SHIFT) | \
+ (1 << DV_DDR_SDCR_DDREN_SHIFT) | \
+ (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \
+ (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \
+ (0x3 << DV_DDR_SDCR_CL_SHIFT) | \
+ (0x2 << DV_DDR_SDCR_IBANK_SHIFT) | \
+ (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
+
+/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */
+#define CONFIG_SYS_DA850_DDR2_SDBCR2 0
+
+#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \
+ (14 << DV_DDR_SDTMR1_RFC_SHIFT) | \
+ (2 << DV_DDR_SDTMR1_RP_SHIFT) | \
+ (2 << DV_DDR_SDTMR1_RCD_SHIFT) | \
+ (1 << DV_DDR_SDTMR1_WR_SHIFT) | \
+ (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \
+ (8 << DV_DDR_SDTMR1_RC_SHIFT) | \
+ (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \
+ (0 << DV_DDR_SDTMR1_WTR_SHIFT))
+
+#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \
+ (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \
+ (0 << DV_DDR_SDTMR2_XP_SHIFT) | \
+ (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \
+ (17 << DV_DDR_SDTMR2_XSNR_SHIFT) | \
+ (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \
+ (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \
+ (0 << DV_DDR_SDTMR2_CKE_SHIFT))
+
+#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000494
+#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
+#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART1_BASE /* Base address of UART1 */
+#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+
+#define CONFIG_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_DAVINCI_SPI
+#define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE
+#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID)
+#define CONFIG_SF_DEFAULT_SPEED 50000000
+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+
+/*
+ * I2C Configuration
+ */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_DAVINCI
+#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
+
+/*
+ * U-Boot general configuration
+ */
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+#define CONFIG_OF_LIBFDT
+
+/*
+ * Linux Information
+ */
+#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
+#define CONFIG_HWCONFIG /* enable hwconfig */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SERIAL_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_SETUP_INITRD_TAG
+#define CONFIG_BOOTDELAY 0
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_BOOTCOMMAND \
+ "if mmc rescan; then " \
+ "if run loadbootscr; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loadimage; then " \
+ "run mmcargs; " \
+ "run mmcboot; " \
+ "else " \
+ "run flashargs; " \
+ "run flashboot; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "run flashargs; " \
+ "run flashboot; " \
+ "fi"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "hostname=EV3\0" \
+ "memsize=64M\0" \
+ "filesyssize=10M\0" \
+ "verify=n\0" \
+ "console=ttyS1,115200n8\0" \
+ "bootscraddr=0xC0600000\0" \
+ "loadaddr=0xC0007FC0\0" \
+ "filesysaddr=0xC1180000\0" \
+ "fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \
+ "mmcargs=setenv bootargs mem=${memsize} console=${console} root=/dev/mmcblk0p2 rw rootwait lpj=747520\0" \
+ "mmcboot=bootm ${loadaddr}\0" \
+ "flashargs=setenv bootargs mem=${memsize} initrd=${filesysaddr},${filesyssize} root=/dev/ram0 rw rootfstype=squashfs console=${console} lpj=747520\0" \
+ "flashboot=sf probe 0; sf read ${loadaddr} 0x50000 0x300000; sf read ${filesysaddr} 0x350000 0x960000; bootm ${loadaddr}\0" \
+ "loadimage=fatload mmc 0 ${loadaddr} uImage\0" \
+ "loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
+ "bootscript=source ${bootscraddr}\0" \
+
+/*
+ * U-Boot commands
+ */
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
+#define CONFIG_CMD_SPI
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_SIZE (16 << 10)
+
+/* SD/MMC configuration */
+#define CONFIG_MMC
+#define CONFIG_DAVINCI_MMC_SD1
+#define CONFIG_GENERIC_MMC
+#define CONFIG_DAVINCI_MMC
+
+/*
+ * Enable MMC commands only when
+ * MMC support is present
+ */
+#ifdef CONFIG_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT3
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_MMC
+#endif
+
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE 0xc0000000
+
+#define CONFIG_SYS_INIT_SP_ADDR 0x80010000
+
+#endif /* __CONFIG_H */
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
#define CONFIG_CMD_BOOTZ
#define CONFIG_MISC_INIT_R
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
#define CONFIG_CMD_BOOTZ
#define CONFIG_MISC_INIT_R
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F 1
-/* Flat Device Tree Definitions */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
#ifndef CONFIG_SYS_FSL_DDR4
#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */
#endif
#define CONFIG_ENV_SIZE 0x20000
#endif
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_MII
#define CONFIG_CMDLINE_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F 1
-/* Flat Device Tree Definitions */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
#ifndef CONFIG_SPL
#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
#endif
#define CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_KIRKWOOD_GPIO
-#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_HUSH_PARSER
CONFIG_SYS_I2C_DSPIC_KEYB_ADDR,\
CONFIG_SYS_I2C_DSPIC_IO_ADDR }
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
/* Update size in "reg" property of NOR FLASH device tree nodes */
#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
-#define CONFIG_FIT /* enable FIT image support */
-
#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */
#define CONFIG_PREBOOT "setenv bootdelay 15"
#define MACH_TYPE_M28EVK 3613
#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
-#define CONFIG_FIT
-
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_FSL_CLK
-#define CONFIG_FIT
-
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
/*
#define CONFIG_LOADADDR 0x70800000
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_OF_LIBFDT
/*
* NAND SPL
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_FIT
-
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#include "at91-sama5_common.h"
*/
#define CONFIG_LOOPW
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#endif /* __MANROLAND_COMMON_H */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap.h>
-#define CONFIG_OF_LIBFDT
-#define CONFIG_FIT
-
/*
* Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
* and older u-boot.bin with the new U-Boot SPL.
#define CONFIG_BOOTCOMMAND "run flash_self"
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
#define OF_CPU "PowerPC,5121@0"
#define OF_SOC_COMPAT "fsl,mpc5121-immr"
#define OF_TBCLK (bd->bi_busfreq / 4)
/* LCD support */
#define CONFIG_SYS_WHITE_ON_BLACK
-/* support the new (FDT-based) image format */
-#define CONFIG_FIT
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
/*
* Hardware drivers
/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
-#define CONFIG_FIT
#define CONFIG_NET_RETRY_COUNT 20
#undef CONFIG_RESET_PHY_R
/* Enable flat device tree support */
#define CONFIG_LMB 1
-#define CONFIG_OF_LIBFDT 1
#if defined(CONFIG_XILINX_AXIEMAC)
# define CONFIG_MII 1
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
-#define CONFIG_FIT_SIGNATURE
-#define CONFIG_RSA
-
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x007fe000
/* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
#define CONFIG_SYS_RESET_ADDRESS 0xfff00100
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define CONFIG_BOOTCOMMAND "run flash_self"
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1
#define OF_CPU "PowerPC,5121@0"
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
#define CONFIG_SYS_RESET_ADDRESS 0xff000000
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_SOC "soc5200@f0000000"
#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
#define CONFIG_PREBOOT
-#define CONFIG_OF_LIBFDT /* Device tree support */
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
#define CONFIG_CMD_BOOTZ
#endif /* CONFIG_SYS_MVFS */
-/*
- * Enable device tree support
- */
-#define CONFIG_OF_LIBFDT
-
/*
* Commands configuration
*/
#define CONFIG_SYS_LONGHELP
/* U-Boot commands */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_MMC
#define CONFIG_MACH_TYPE MACH_TYPE_MX31ADS
-/*
- * Disabled for now due to build problems under Debian and a significant increase
- * in the final file size: 144260 vs. 109536 Bytes.
- */
-#if 0
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
-#endif
-
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
/*
* Command definition
*/
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
/*
* Size of malloc() pool
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_OF_LIBFDT
#define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
#define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
#define CONFIG_SYS_FSL_CLK
-#define CONFIG_OF_LIBFDT
-
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_CMD_SATA
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_OF_LIBFDT
-
#endif /* __CONFIG_H */
#define CONFIG_BAUDRATE 115200
/* Filesystems and image support */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_BMODE
#define CONFIG_BAUDRATE 115200
/* Filesystems and image support */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2
* CPU specifics
*/
-/* MXS uses FDT */
-#define CONFIG_OF_LIBFDT
-
/* Startup hooks */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif
-
-/*
- * Device Tree
- */
-#define CONFIG_OF_LIBFDT
-
/*
* EFI partition
*/
#define PLLMR1_DEFAULT PLLMR1_266_133_66_33
/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
#define CONFIG_FIT_DISABLE_SHA256
#define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MISC_INIT_R
-#define CONFIG_FIT
#define CONFIG_KEYBOARD
#include <config_distro_defaults.h>
/* General networking support */
#define CONFIG_CMD_DHCP
-#define CONFIG_FIT
-#define CONFIG_FIT_BEST_MATCH
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_KEYBOARD
#undef CONFIG_LOADADDR
/*
* DT support
*/
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_CMD_BOOTZ
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#define CONFIG_SYS_LONGHELP
#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC
-#define CONFIG_OF_LIBFDT
/*
* Linux Information
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
-#define CONFIG_OF_LIBFDT
#define CONFIG_LMB
/*
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#endif
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_USB_STORAGE
/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-
#define OF_CPU "PowerPC,5200@0"
#define OF_TBCLK CONFIG_SYS_MPC5XXX_CLKIN
#define OF_SOC "soc5200@f0000000"
#define CONFIG_ENV_OFFSET_REDUND 0xC0000
#endif
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#endif
#define CONFIG_BOOTCOMMAND "run env_cont"
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
#define OF_CPU "PowerPC,5121@0"
#define OF_SOC_COMPAT "fsl,mpc5121-immr"
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
/* General networking support */
#define CONFIG_CMD_DHCP
-/* support the new (FDT-based) image format */
-#define CONFIG_FIT
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
#define CONFIG_SYS_CONSOLE_FG_COL 0x00
#endif
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_FIT
-#endif
-
#endif /* ! __CONFIG_PXM2_H */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/*
* General PCI
* Memory space is mapped 1-1, but I/O space must start from 0.
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_OF_LIBFDT
#define CONFIG_BAUDRATE 38400
#define CONFIG_BOOTDELAY 3
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_THUMB_BUILD
-#define CONFIG_OF_LIBFDT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
#define CONFIG_PARTITION_UUIDS
#define CONFIG_CMD_PART
-/* Device tree support */
-#define CONFIG_OF_BOARD_SETUP
/* ATAGs support for bootm/bootz */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_SYS_CONSOLE_FG_COL 0x00
#endif
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_FIT
-#endif
-
#endif /* ! __CONFIG_RUT_H */
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_FUNCTION_MASS_STORAGE
-#define CONFIG_OF_LIBFDT
-
-
#endif /* __CONFIG_H */
/* Number of bits in a C 'long' on this architecture */
#define CONFIG_SANDBOX_BITS_PER_LONG 64
-#define CONFIG_OF_LIBFDT
#define CONFIG_LMB
#define CONFIG_CMD_FDT
#define CONFIG_ANDROID_BOOT_IMAGE
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
-/*
- * Pass open firmware flat tree to kernel
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
*/
#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \
"setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
- "${x_bootcmd_usb}; bootm 0x6400000;"
+ "bootm 0x6400000;"
#define CONFIG_MTDPARTS \
- "mtdparts=orion_nand:512K(uboot)," \
+ "orion_nand:512K(uboot)," \
"512K(env),1M(script),6M(kernel)," \
- "12M(ramdisk),4M(spare),-(rootfs)"
+ "12M(ramdisk),4M(spare),-(rootfs)\0"
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \
#define CONFIG_BOOTCOUNT_ENV
/* Enable Device-Tree (FDT) support */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_FDT
#endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */
# undef CONFIG_CMD_NFS
#endif /* CONFIG_MACB */
-#if !defined(CONFIG_SPL_BUILD)
-/* Enable Device-Tree (FDT) support */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_FDT
-#define CONFIG_FIT
-#endif
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR 0x301000
#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/
#endif /* CONFIG_CMD_NET */
-#define CONFIG_OF_LIBFDT
-
-
#endif /* __CONFIG_H */
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_FIT
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_CRC32_VERIFY
-#define CONFIG_FIT
-#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024)
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#ifndef __CONFIG_H
#define __CONFIG_H
-/* new uImage format support */
-#define CONFIG_FIT 1
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
-
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_BOOTCOMMAND "run boot_nor"
/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
/* USB support */
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_STM32F4DISCOVERY
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT
-/* new uImage format support */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
-
#define CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
#define CONFIG_SYS_HUSH_PARSER
/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTCOMMAND "go 0x40040000"
-#define CONFIG_OF_LIBFDT
-
/*
+ * QSPI support
+ */
#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
#define CONFIG_IDENT_STRING " Allwinner Technology"
+#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
#define CONFIG_VGA_AS_SINGLE_DEVICE
-/* To be able to hook simplefb into dt */
-#ifdef CONFIG_VIDEO_DT_SIMPLEFB
-#define CONFIG_OF_BOARD_SETUP
-#endif
-
#endif /* CONFIG_VIDEO */
/* Ethernet support */
#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_BOARD_TYPES 1 /* support board types */
-#define CONFIG_FIT
#define CFG_ALT_MEMTEST
/*
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
-#define CONFIG_OF_LIBFDT
-#define CONFIG_FIT
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_MISC_INIT_R
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 16
/* Filesystems / image support */
#define CONFIG_EFI_PARTITION
-#define CONFIG_FIT
/* MMC */
#define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-/* support the new (FDT-based) image format */
-#define CONFIG_FIT
#include "tegra-common-post.h"
/* LCD support */
#define CONFIG_SYS_WHITE_ON_BLACK
-/* support the new (FDT-based) image format */
-#define CONFIG_FIT
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
#define CONFIG_FAT_WRITE
#endif
-#define CONFIG_OF_SYSTEM_SETUP
-
#endif /* _TEGRA_COMMON_H_ */
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_PREBOOT
-#define CONFIG_FIT
#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_TEXT_BASE 0x00500000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-/* Flat Device Tree Definitions */
-#define CONFIG_OF_LIBFDT
-
/* SMP Spin Table Definitions */
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_SYS_NO_FLASH
#define CONFIG_MACH_TYPE MACH_TYPE_TI8148EVM
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG /* for ramdisk support */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_MACH_TYPE MACH_TYPE_TI8168EVM
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG /* required for ramdisk support */
#define CONFIG_SYS_NO_FLASH
/* Support both device trees and ATAGs. */
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* EDMA3 */
#define CONFIG_TI_EDMA3
+#define DEFAULT_PMMC_BOOT_ENV \
+ "set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
+ "dev_pmmc=0\0" \
+ "get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0" \
+ "get_pmmc_ramfs=run get_pmmc_net\0" \
+ "get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} " \
+ "${bootdir}/${name_pmmc}\0" \
+ "get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0" \
+ "run_pmmc=rproc init; rproc list; " \
+ "rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; " \
+ "rproc start ${dev_pmmc}\0" \
+
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
"mtdparts=mtdparts=davinci_nand.0:" \
"1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
+#ifndef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND \
"run init_${boot} get_fdt_${boot} get_mon_${boot} " \
"get_kern_${boot} run_mon run_kern"
+#endif
#define CONFIG_BOOTARGS \
-/* Linux interfacing */
-#define CONFIG_OF_BOARD_SETUP
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
"setenv fdtfile dra72-evm.dtb; fi;" \
"if test $board_name = beagle_x15; then " \
"setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
+ "if test $board_name = am57xx_evm; then " \
+ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine device tree to use; fi; \0" \
"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
-
/*
* All the defines above are for the TQMa6 SoM
*
#define MACH_TYPE_TRATS 3928
#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
-#define CONFIG_OF_LIBFDT
-
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (1024*1024)
#define CONFIG_HW_WATCHDOG
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_MACH_TYPE MACH_TYPE_TS48XX
/* text base address used when linking */
#define CONFIG_POWER_TPS65217
/* Support both device trees and ATAGs. */
-#define CONFIG_OF_LIBFDT
#define CONFIG_USE_FDT /* use fdt within board code */
-#define CONFIG_OF_BOARD_SETUP
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_BOOTMAPSZ 0x20000000
-/* Open Firmware flat tree */
-#define CONFIG_OF_LIBFDT
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_TEXT_BASE 0x23f00000
/*
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_FSL_CLK
#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_OF_LIBFDT
#define CONFIG_MXC_GPIO
#include <asm/arch/imx-regs.h>
| OR_GPCM_EAD)
/* 0xfe0009f7 */
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* Serial Port
*/
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
-/* Flat Device Tree Definitions */
-#define CONFIG_OF_LIBFDT
-
/* CS register bases for the original memory map. */
#define V2M_PA_CS0 0x00000000
#define V2M_PA_CS1 0x14000000
#define CONFIG_ENV_OFFSET 0x180000
#endif
-#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#endif
/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
#define CONFIG_CMDLINE_TAG
-#define CONFIG_OF_LIBFDT /* enable passing of devicetree */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_LMB
-#define CONFIG_OF_LIBFDT
#define CONFIG_LZO
-#define CONFIG_FIT
#undef CONFIG_ZLIB
#undef CONFIG_GZIP
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
/* Flat Device Tree Definitions */
-#define CONFIG_OF_LIBFDT
/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if !defined(COUNTER_FREQUENCY)
#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
#define CONFIG_PANIC_HANG /* do not reset board on panic */
#define CONFIG_PREBOOT /* enable preboot variable */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
*/
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
#define CONFIG_PANIC_HANG /* do not reset board on panic */
#define CONFIG_PREBOOT /* enable preboot variable */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
/*
*/
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
#define CONFIG_PANIC_HANG /* do not reset board on panic */
#define CONFIG_PREBOOT /* enable preboot variable */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
*/
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
/*
* I2C
*/
#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
#define CONFIG_PANIC_HANG /* do not reset board on panic */
#define CONFIG_PREBOOT /* enable preboot variable */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
/*
*/
#define CONFIG_SYS_HUSH_PARSER
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
#define CONFIG_FDT_FIXUP_PCI_IRQ 1
/*
#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
#define CONFIG_PANIC_HANG /* do not reset board on panic */
#define CONFIG_PREBOOT /* enable preboot variable */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
/*
#define CONFIG_CMD_FPGA_LOADBP
#define CONFIG_CMD_FPGA_LOADFS
-/* Open Firmware flat tree */
-#define CONFIG_OF_LIBFDT
-
/* FIT support */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
# endif
#endif
-/* Compute a CRC, using the POSIX 1003 definition */
-extern uint32_t
-cyg_posix_crc32(unsigned char *s, int len);
+/* 16 bit CRC with polynomial x^16+x^12+x^5+1 (CRC-CCITT) */
-/* Gary S. Brown's 32 bit CRC */
-
-extern uint32_t
-cyg_crc32(unsigned char *s, int len);
-
-/* Gary S. Brown's 32 bit CRC, but accumulate the result from a */
-/* previous CRC calculation */
-
-extern uint32_t
-cyg_crc32_accumulate(uint32_t crc, unsigned char *s, int len);
-
-/* Ethernet FCS Algorithm */
-
-extern uint32_t
-cyg_ether_crc32(unsigned char *s, int len);
-
-/* Ethernet FCS algorithm, but accumulate the result from a previous */
-/* CRC calculation. */
-
-extern uint32_t
-cyg_ether_crc32_accumulate(uint32_t crc, unsigned char *s, int len);
-
-/* 16 bit CRC with polynomial x^16+x^12+x^5+1 */
-
-extern uint16_t cyg_crc16(unsigned char *s, int len);
+uint16_t crc16_ccitt(uint16_t crc_start, unsigned char *s, int len);
#endif /* _SERVICES_CRC_CRC_H_ */
#include <sys/types.h>
/* new uImage format support enabled on host */
-#define CONFIG_FIT 1
-#define CONFIG_OF_LIBFDT 1
+#define IMAGE_ENABLE_FIT 1
+#define IMAGE_ENABLE_OF_LIBFDT 1
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
#define IMAGE_ENABLE_IGNORE 0
#define IMAGE_ENABLE_IGNORE 1
#define IMAGE_INDENT_STRING " "
+#define IMAGE_ENABLE_FIT CONFIG_IS_ENABLED(FIT)
+#define IMAGE_ENABLE_OF_LIBFDT CONFIG_IS_ENABLED(OF_LIBFDT)
+
#endif /* USE_HOSTCC */
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
#include <hash.h>
#include <libfdt.h>
#include <fdt_support.h>
#define IMAGE_ENABLE_SHA256 0
#endif
-#endif /* CONFIG_FIT */
+#endif /* IMAGE_ENABLE_FIT */
#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
# define IMAGE_ENABLE_RAMDISK_HIGH 1
# define IMAGE_ENABLE_RAMDISK_HIGH 0
#endif
-#ifdef CONFIG_OF_LIBFDT
-# define IMAGE_ENABLE_OF_LIBFDT 1
-#else
-# define IMAGE_ENABLE_OF_LIBFDT 0
-#endif
-
#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
# define IMAGE_BOOT_GET_CMDLINE 1
#else
image_header_t legacy_hdr_os_copy; /* header copy */
ulong legacy_hdr_valid;
-#if defined(CONFIG_FIT)
+#if IMAGE_ENABLE_FIT
const char *fit_uname_cfg; /* configuration node unit name */
void *fit_hdr_os; /* os FIT image header */
char *get_table_entry_name(const table_entry_t *table, char *msg, int id);
const char *genimg_get_os_name(uint8_t os);
+
+/**
+ * genimg_get_os_short_name() - get the short name for an OS
+ *
+ * @param os OS (IH_OS_...)
+ * @return OS short name, or "unknown" if unknown
+ */
+const char *genimg_get_os_short_name(uint8_t comp);
+
const char *genimg_get_arch_name(uint8_t arch);
+
+/**
+ * genimg_get_arch_short_name() - get the short name for an architecture
+ *
+ * @param arch Architecture type (IH_ARCH_...)
+ * @return architecture short name, or "unknown" if unknown
+ */
+const char *genimg_get_arch_short_name(uint8_t arch);
+
const char *genimg_get_type_name(uint8_t type);
/**
const char *genimg_get_type_short_name(uint8_t type);
const char *genimg_get_comp_name(uint8_t comp);
+
+/**
+ * genimg_get_comp_short_name() - get the short name for a compression method
+ *
+ * @param comp compression method (IH_COMP_...)
+ * @return compression method short name, or "unknown" if unknown
+ */
+const char *genimg_get_comp_short_name(uint8_t comp);
+
int genimg_get_os_id(const char *name);
int genimg_get_arch_id(const char *name);
int genimg_get_type_id(const char *name);
/*******************************************************************/
/* New uImage format specific code (prefixed with fit_) */
/*******************************************************************/
-#if defined(CONFIG_FIT)
#define FIT_IMAGES_PATH "/images"
#define FIT_CONFS_PATH "/configurations"
#define FIT_MAX_HASH_LEN HASH_MAX_DIGEST_SIZE
+#if IMAGE_ENABLE_FIT
/* cmdline argument format parsing */
int fit_parse_conf(const char *spec, ulong addr_curr,
ulong *addr, const char **conf_name);
int required_keynode; /* Node offset of key to use: -1=any */
const char *require_keys; /* Value for 'required' property */
};
+#endif /* Allow struct image_region to always be defined for rsa.h */
/* A part of an image, used for hashing */
struct image_region {
int size;
};
+#if IMAGE_ENABLE_FIT
+
#if IMAGE_ENABLE_VERIFY
# include <u-boot/rsa-checksum.h>
#endif
#endif /* CONFIG_ANDROID_BOOT_IMAGE */
+/**
+ * board_fit_config_name_match() - Check for a matching board name
+ *
+ * This is used when SPL loads a FIT containing multiple device tree files
+ * and wants to work out which one to use. The description of each one is
+ * passed to this function. The description comes from the 'description' field
+ * in each (FDT) image node.
+ *
+ * @name: Device tree description
+ * @return 0 if this device tree should be used, non-zero to try the next
+ */
+int board_fit_config_name_match(const char *name);
+
#endif /* __IMAGE_H__ */
{
return fdt_property_u32(fdt, name, val);
}
+
+/**
+ * fdt_property_placeholder - add a new property and return a ptr to its value
+ *
+ * @fdt: pointer to the device tree blob
+ * @name: name of property to add
+ * @len: length of property value in bytes
+ * @valp: returns a pointer to where where the value should be placed
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_NOSPACE, standard meanings
+ */
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp);
+
#define fdt_property_string(fdt, name, str) \
fdt_property(fdt, name, str, strlen(str)+1)
int fdt_end_node(void *fdt);
u32 flags;
};
+/*
+ * Information required to load data from a device
+ *
+ * @dev: Pointer to the device, e.g. struct mmc *
+ * @priv: Private data for the device
+ * @bl_len: Block length for reading in bytes
+ * @read: Function to call to read from the device
+ */
+struct spl_load_info {
+ void *dev;
+ void *priv;
+ int bl_len;
+ ulong (*read)(struct spl_load_info *load, ulong sector, ulong count,
+ void *buf);
+};
+
+int spl_load_simple_fit(struct spl_load_info *info, ulong sector, void *fdt);
+
#define SPL_COPY_PAYLOAD_ONLY 1
extern struct spl_image_info spl_image;
uint64_t exponent; /* public exponent */
};
+struct image_sign_info;
+
#if IMAGE_ENABLE_SIGN
/**
* sign() - calculate and return signature for given input data
- if errno is null or positive number - a pointer to "Success" message
- if errno is negative - a pointer to errno related message
+config OF_LIBFDT
+ bool "Enable the FDT library"
+ default y if OF_CONTROL
+ help
+ This enables the FDT library (libfdt). It provides functions for
+ accessing binary device tree images in memory, such as adding and
+ removing notes and properties, scanning through the tree and finding
+ particular compatible nodes. The library operates on a flattened
+ version of the device tree.
+
+config SPL_OF_LIBFDT
+ bool "Enable the FDT library for SPL"
+ default y if SPL_OF_CONTROL
+ help
+ This enables the FDT library (libfdt). It provides functions for
+ accessing binary device tree images in memory, such as adding and
+ removing notes and properties, scanning through the tree and finding
+ particular compatible nodes. The library operates on a flattened
+ version of the device tree.
+
source lib/efi/Kconfig
endmenu
obj-$(CONFIG_ZLIB) += zlib/
obj-$(CONFIG_BZIP2) += bzip2/
obj-$(CONFIG_TIZEN) += tizen/
-obj-$(CONFIG_OF_LIBFDT) += libfdt/
-obj-$(CONFIG_FIT) += libfdt/
obj-$(CONFIG_FIT) += libfdt/
obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
obj-y += list_sort.o
endif
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_OF_LIBFDT) += libfdt/
-endif
+obj-$(CONFIG_$(SPL_)OF_LIBFDT) += libfdt/
ifdef CONFIG_SPL_OF_CONTROL
obj-$(CONFIG_OF_LIBFDT) += libfdt/
endif
/* Table of CRC constants - implements x^16+x^12+x^5+1 */
static const uint16_t crc16_tab[] = {
- 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
- 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
- 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
- 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
- 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
- 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
- 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
- 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
- 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
- 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
- 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
- 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
- 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
- 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
- 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
- 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
- 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
- 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
- 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
- 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
- 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
- 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
- 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
- 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
- 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
- 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
- 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
- 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
- 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
- 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
- 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
- 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0,
+ 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+ 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+ 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+ 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+ 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+ 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+ 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+ 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+ 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+ 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+ 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+ 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+ 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+ 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+ 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+ 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+ 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+ 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+ 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+ 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+ 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+ 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+ 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+ 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+ 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+ 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+ 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+ 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+ 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+ 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+ 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+ 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0,
};
-uint16_t
-cyg_crc16(unsigned char *buf, int len)
+uint16_t crc16_ccitt(uint16_t crc_start, unsigned char *buf, int len)
{
- int i;
- uint16_t cksum;
+ int i;
+ uint16_t cksum;
- cksum = 0;
- for (i = 0; i < len; i++) {
- cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xFF] ^ (cksum << 8);
- }
- return cksum;
+ cksum = crc_start;
+ for (i = 0; i < len; i++)
+ cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xff] ^ (cksum << 8);
+
+ return cksum;
}
return offset;
}
-int fdt_property(void *fdt, const char *name, const void *val, int len)
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
{
struct fdt_property *prop;
int nameoff;
prop->tag = cpu_to_fdt32(FDT_PROP);
prop->nameoff = cpu_to_fdt32(nameoff);
prop->len = cpu_to_fdt32(len);
- memcpy(prop->data, val, len);
+ *valp = prop->data;
+ return 0;
+}
+
+int fdt_property(void *fdt, const char *name, const void *val, int len)
+{
+ void *ptr;
+ int ret;
+
+ ret = fdt_property_placeholder(fdt, name, len, &ptr);
+ if (ret)
+ return ret;
+ memcpy(ptr, val, len);
return 0;
}
RSA support. This enables the RSA algorithm used for FIT image
verification in U-Boot.
See doc/uImage.FIT/signature.txt for more details.
+ The Modular Exponentiation algorithm in RSA is implemented using
+ driver model. So CONFIG_DM needs to be enabled by default for this
+ library to function.
+ The signing part is build into mkimage regardless of this
+ option. The software based modular exponentiation is built into
+ mkimage irrespective of this option.
if RSA
config RSA_SOFTWARE_EXP
# Flattened device tree objects
LIBFDT_OBJS := $(addprefix lib/libfdt/, \
fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_wip.o \
- fdt_region.o)
+ fdt_region.o fdt_sw.o)
RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
rsa-sign.o rsa-verify.o rsa-checksum.o \
rsa-mod-exp.o)
#include "fit_common.h"
#include "mkimage.h"
#include <image.h>
+#include <stdarg.h>
+#include <version.h>
#include <u-boot/crc.h>
static image_header_t header;
return ret;
}
+/**
+ * fit_calc_size() - Calculate the approximate size of the FIT we will generate
+ */
+static int fit_calc_size(struct image_tool_params *params)
+{
+ struct content_info *cont;
+ int size, total_size;
+
+ size = imagetool_get_filesize(params, params->datafile);
+ if (size < 0)
+ return -1;
+
+ total_size = size;
+ for (cont = params->content_head; cont; cont = cont->next) {
+ size = imagetool_get_filesize(params, cont->fname);
+ if (size < 0)
+ return -1;
+
+ /* Add space for properties */
+ total_size += size + 300;
+ }
+
+ /* Add plenty of space for headers, properties, nodes, etc. */
+ total_size += 4096;
+
+ return total_size;
+}
+
+static int fdt_property_file(struct image_tool_params *params,
+ void *fdt, const char *name, const char *fname)
+{
+ struct stat sbuf;
+ void *ptr;
+ int ret;
+ int fd;
+
+ fd = open(fname, O_RDWR | O_BINARY);
+ if (fd < 0) {
+ fprintf(stderr, "%s: Can't open %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ return -1;
+ }
+
+ if (fstat(fd, &sbuf) < 0) {
+ fprintf(stderr, "%s: Can't stat %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ goto err;
+ }
+
+ ret = fdt_property_placeholder(fdt, "data", sbuf.st_size, &ptr);
+ if (ret)
+ return ret;
+ ret = read(fd, ptr, sbuf.st_size);
+ if (ret != sbuf.st_size) {
+ fprintf(stderr, "%s: Can't read %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ goto err;
+ }
+
+ return 0;
+err:
+ close(fd);
+ return -1;
+}
+
+static int fdt_property_strf(void *fdt, const char *name, const char *fmt, ...)
+{
+ char str[100];
+ va_list ptr;
+
+ va_start(ptr, fmt);
+ vsnprintf(str, sizeof(str), fmt, ptr);
+ va_end(ptr);
+ return fdt_property_string(fdt, name, str);
+}
+
+static void get_basename(char *str, int size, const char *fname)
+{
+ const char *p, *start, *end;
+ int len;
+
+ /*
+ * Use the base name as the 'name' field. So for example:
+ *
+ * "arch/arm/dts/sun7i-a20-bananapro.dtb"
+ * becomes "sun7i-a20-bananapro"
+ */
+ p = strrchr(fname, '/');
+ start = p ? p + 1 : fname;
+ p = strrchr(fname, '.');
+ end = p ? p : fname + strlen(fname);
+ len = end - start;
+ if (len >= size)
+ len = size - 1;
+ memcpy(str, start, len);
+ str[len] = '\0';
+}
+
+/**
+ * fit_write_images() - Write out a list of images to the FIT
+ *
+ * We always include the main image (params->datafile). If there are device
+ * tree files, we include an fdt@ node for each of those too.
+ */
+static int fit_write_images(struct image_tool_params *params, char *fdt)
+{
+ struct content_info *cont;
+ const char *typename;
+ char str[100];
+ int upto;
+ int ret;
+
+ fdt_begin_node(fdt, "images");
+
+ /* First the main image */
+ typename = genimg_get_type_short_name(params->fit_image_type);
+ snprintf(str, sizeof(str), "%s@1", typename);
+ fdt_begin_node(fdt, str);
+ fdt_property_string(fdt, "description", params->imagename);
+ fdt_property_string(fdt, "type", typename);
+ fdt_property_string(fdt, "arch", genimg_get_arch_name(params->arch));
+ fdt_property_string(fdt, "os", genimg_get_os_short_name(params->os));
+ fdt_property_string(fdt, "compression",
+ genimg_get_comp_short_name(params->comp));
+ fdt_property_u32(fdt, "load", params->addr);
+ fdt_property_u32(fdt, "entry", params->ep);
+
+ /*
+ * Put data last since it is large. SPL may only load the first part
+ * of the DT, so this way it can access all the above fields.
+ */
+ ret = fdt_property_file(params, fdt, "data", params->datafile);
+ if (ret)
+ return ret;
+ fdt_end_node(fdt);
+
+ /* Now the device tree files if available */
+ upto = 0;
+ for (cont = params->content_head; cont; cont = cont->next) {
+ if (cont->type != IH_TYPE_FLATDT)
+ continue;
+ snprintf(str, sizeof(str), "%s@%d", FIT_FDT_PROP, ++upto);
+ fdt_begin_node(fdt, str);
+
+ get_basename(str, sizeof(str), cont->fname);
+ fdt_property_string(fdt, "description", str);
+ ret = fdt_property_file(params, fdt, "data", cont->fname);
+ if (ret)
+ return ret;
+ fdt_property_string(fdt, "type", typename);
+ fdt_property_string(fdt, "arch",
+ genimg_get_arch_short_name(params->arch));
+ fdt_property_string(fdt, "compression",
+ genimg_get_comp_short_name(IH_COMP_NONE));
+ fdt_end_node(fdt);
+ }
+
+ fdt_end_node(fdt);
+
+ return 0;
+}
+
+/**
+ * fit_write_configs() - Write out a list of configurations to the FIT
+ *
+ * If there are device tree files, we include a configuration for each, which
+ * selects the main image (params->datafile) and its corresponding device
+ * tree file.
+ *
+ * Otherwise we just create a configuration with the main image in it.
+ */
+static void fit_write_configs(struct image_tool_params *params, char *fdt)
+{
+ struct content_info *cont;
+ const char *typename;
+ char str[100];
+ int upto;
+
+ fdt_begin_node(fdt, "configurations");
+ fdt_property_string(fdt, "default", "conf@1");
+
+ upto = 0;
+ for (cont = params->content_head; cont; cont = cont->next) {
+ if (cont->type != IH_TYPE_FLATDT)
+ continue;
+ typename = genimg_get_type_short_name(cont->type);
+ snprintf(str, sizeof(str), "conf@%d", ++upto);
+ fdt_begin_node(fdt, str);
+
+ get_basename(str, sizeof(str), cont->fname);
+ fdt_property_string(fdt, "description", str);
+
+ typename = genimg_get_type_short_name(params->fit_image_type);
+ snprintf(str, sizeof(str), "%s@1", typename);
+ fdt_property_string(fdt, typename, str);
+
+ snprintf(str, sizeof(str), FIT_FDT_PROP "@%d", upto);
+ fdt_property_string(fdt, FIT_FDT_PROP, str);
+ fdt_end_node(fdt);
+ }
+ if (!upto) {
+ fdt_begin_node(fdt, "conf@1");
+ typename = genimg_get_type_short_name(params->fit_image_type);
+ snprintf(str, sizeof(str), "%s@1", typename);
+ fdt_property_string(fdt, typename, str);
+ fdt_end_node(fdt);
+ }
+
+ fdt_end_node(fdt);
+}
+
+static int fit_build_fdt(struct image_tool_params *params, char *fdt, int size)
+{
+ int ret;
+
+ ret = fdt_create(fdt, size);
+ if (ret)
+ return ret;
+ fdt_finish_reservemap(fdt);
+ fdt_begin_node(fdt, "");
+ fdt_property_strf(fdt, "description",
+ "%s image with one or more FDT blobs",
+ genimg_get_type_name(params->fit_image_type));
+ fdt_property_strf(fdt, "creator", "U-Boot mkimage %s", PLAIN_VERSION);
+ fdt_property_u32(fdt, "#address-cells", 1);
+ ret = fit_write_images(params, fdt);
+ if (ret)
+ return ret;
+ fit_write_configs(params, fdt);
+ fdt_end_node(fdt);
+ ret = fdt_finish(fdt);
+ if (ret)
+ return ret;
+
+ return fdt_totalsize(fdt);
+}
+
+static int fit_build(struct image_tool_params *params, const char *fname)
+{
+ char *buf;
+ int size;
+ int ret;
+ int fd;
+
+ size = fit_calc_size(params);
+ if (size < 0)
+ return -1;
+ buf = malloc(size);
+ if (!buf) {
+ fprintf(stderr, "%s: Out of memory (%d bytes)\n",
+ params->cmdname, size);
+ return -1;
+ }
+ ret = fit_build_fdt(params, buf, size);
+ if (ret < 0) {
+ fprintf(stderr, "%s: Failed to build FIT image\n",
+ params->cmdname);
+ goto err;
+ }
+ size = ret;
+ fd = open(fname, O_RDWR | O_CREAT | O_TRUNC | O_BINARY, 0666);
+ if (fd < 0) {
+ fprintf(stderr, "%s: Can't open %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ goto err;
+ }
+ ret = write(fd, buf, size);
+ if (ret != size) {
+ fprintf(stderr, "%s: Can't write %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ close(fd);
+ goto err;
+ }
+ close(fd);
+
+ return 0;
+err:
+ free(buf);
+ return -1;
+}
+
+/**
+ * fit_extract_data() - Move all data outside the FIT
+ *
+ * This takes a normal FIT file and removes all the 'data' properties from it.
+ * The data is placed in an area after the FIT so that it can be accessed
+ * using an offset into that area. The 'data' properties turn into
+ * 'data-offset' properties.
+ *
+ * This function cannot cope with FITs with 'data-offset' properties. All
+ * data must be in 'data' properties on entry.
+ */
+static int fit_extract_data(struct image_tool_params *params, const char *fname)
+{
+ void *buf;
+ int buf_ptr;
+ int fit_size, new_size;
+ int fd;
+ struct stat sbuf;
+ void *fdt;
+ int ret;
+ int images;
+ int node;
+
+ fd = mmap_fdt(params->cmdname, fname, 0, &fdt, &sbuf, false);
+ if (fd < 0)
+ return -EIO;
+ fit_size = fdt_totalsize(fdt);
+
+ /* Allocate space to hold the image data we will extract */
+ buf = malloc(fit_size);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto err;
+ }
+ buf_ptr = 0;
+
+ images = fdt_path_offset(fdt, FIT_IMAGES_PATH);
+ if (images < 0) {
+ debug("%s: Cannot find /images node: %d\n", __func__, images);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ for (node = fdt_first_subnode(fdt, images);
+ node >= 0;
+ node = fdt_next_subnode(fdt, node)) {
+ const char *data;
+ int len;
+
+ data = fdt_getprop(fdt, node, "data", &len);
+ if (!data)
+ continue;
+ memcpy(buf + buf_ptr, data, len);
+ debug("Extracting data size %x\n", len);
+
+ ret = fdt_delprop(fdt, node, "data");
+ if (ret) {
+ ret = -EPERM;
+ goto err;
+ }
+ fdt_setprop_u32(fdt, node, "data-offset", buf_ptr);
+ fdt_setprop_u32(fdt, node, "data-size", len);
+
+ buf_ptr += (len + 3) & ~3;
+ }
+
+ /* Pack the FDT and place the data after it */
+ fdt_pack(fdt);
+
+ debug("Size reduced from %x to %x\n", fit_size, fdt_totalsize(fdt));
+ debug("External data size %x\n", buf_ptr);
+ new_size = fdt_totalsize(fdt);
+ new_size = (new_size + 3) & ~3;
+ munmap(fdt, sbuf.st_size);
+
+ if (ftruncate(fd, new_size)) {
+ debug("%s: Failed to truncate file: %s\n", __func__,
+ strerror(errno));
+ ret = -EIO;
+ goto err;
+ }
+ if (lseek(fd, new_size, SEEK_SET) < 0) {
+ debug("%s: Failed to seek to end of file: %s\n", __func__,
+ strerror(errno));
+ ret = -EIO;
+ goto err;
+ }
+ if (write(fd, buf, buf_ptr) != buf_ptr) {
+ debug("%s: Failed to write external data to file %s\n",
+ __func__, strerror(errno));
+ ret = -EIO;
+ goto err;
+ }
+ close(fd);
+
+ ret = 0;
+
+err:
+ close(fd);
+ return ret;
+}
+
+static int fit_import_data(struct image_tool_params *params, const char *fname)
+{
+ void *fdt, *old_fdt;
+ int fit_size, new_size, size, data_base;
+ int fd;
+ struct stat sbuf;
+ int ret;
+ int images;
+ int node;
+
+ fd = mmap_fdt(params->cmdname, fname, 0, &old_fdt, &sbuf, false);
+ if (fd < 0)
+ return -EIO;
+ fit_size = fdt_totalsize(old_fdt);
+ data_base = (fit_size + 3) & ~3;
+
+ /* Allocate space to hold the new FIT */
+ size = sbuf.st_size + 16384;
+ fdt = malloc(size);
+ if (!fdt) {
+ fprintf(stderr, "%s: Failed to allocate memory (%d bytes)\n",
+ __func__, size);
+ ret = -ENOMEM;
+ goto err;
+ }
+ ret = fdt_open_into(old_fdt, fdt, size);
+ if (ret) {
+ debug("%s: Failed to expand FIT: %s\n", __func__,
+ fdt_strerror(errno));
+ ret = -EINVAL;
+ goto err;
+ }
+
+ images = fdt_path_offset(fdt, FIT_IMAGES_PATH);
+ if (images < 0) {
+ debug("%s: Cannot find /images node: %d\n", __func__, images);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ for (node = fdt_first_subnode(fdt, images);
+ node >= 0;
+ node = fdt_next_subnode(fdt, node)) {
+ int buf_ptr;
+ int len;
+
+ buf_ptr = fdtdec_get_int(fdt, node, "data-offset", -1);
+ len = fdtdec_get_int(fdt, node, "data-size", -1);
+ if (buf_ptr == -1 || len == -1)
+ continue;
+ debug("Importing data size %x\n", len);
+
+ ret = fdt_setprop(fdt, node, "data", fdt + data_base + buf_ptr,
+ len);
+ if (ret) {
+ debug("%s: Failed to write property: %s\n", __func__,
+ fdt_strerror(ret));
+ ret = -EINVAL;
+ goto err;
+ }
+ }
+
+ munmap(fdt, sbuf.st_size);
+ close(fd);
+
+ /* Pack the FDT and place the data after it */
+ fdt_pack(fdt);
+
+ new_size = fdt_totalsize(fdt);
+ debug("Size expanded from %x to %x\n", fit_size, new_size);
+
+ fd = open(fname, O_RDWR | O_CREAT | O_TRUNC | O_BINARY, 0666);
+ if (fd < 0) {
+ fprintf(stderr, "%s: Can't open %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ goto err;
+ }
+ if (write(fd, fdt, new_size) != new_size) {
+ debug("%s: Failed to write external data to file %s\n",
+ __func__, strerror(errno));
+ ret = -EIO;
+ goto err;
+ }
+ close(fd);
+
+ ret = 0;
+
+err:
+ close(fd);
+ return ret;
+}
+
/**
* fit_handle_file - main FIT file processing function
*
sprintf (tmpfile, "%s%s", params->imagefile, MKIMAGE_TMPFILE_SUFFIX);
/* We either compile the source file, or use the existing FIT image */
- if (params->datafile) {
+ if (params->auto_its) {
+ if (fit_build(params, tmpfile)) {
+ fprintf(stderr, "%s: failed to build FIT\n",
+ params->cmdname);
+ return EXIT_FAILURE;
+ }
+ *cmd = '\0';
+ } else if (params->datafile) {
/* dtc -I dts -O dtb -p 500 datafile > tmpfile */
snprintf(cmd, sizeof(cmd), "%s %s %s > %s",
MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
snprintf(cmd, sizeof(cmd), "cp %s %s",
params->imagefile, tmpfile);
}
- if (system (cmd) == -1) {
+ if (*cmd && system(cmd) == -1) {
fprintf (stderr, "%s: system(%s) failed: %s\n",
params->cmdname, cmd, strerror(errno));
goto err_system;
}
+ /* Move the data so it is internal to the FIT, if needed */
+ ret = fit_import_data(params, tmpfile);
+ if (ret)
+ goto err_system;
+
/*
* Set hashes for images in the blob. Unfortunately we may need more
* space in either FDT, so keep trying until we succeed.
goto err_system;
}
+ /* Move the data so it is external to the FIT, if requested */
+ if (params->external_data) {
+ ret = fit_extract_data(params, tmpfile);
+ if (ret)
+ goto err_system;
+ }
+
if (rename (tmpfile, params->imagefile) == -1) {
fprintf (stderr, "%s: Can't rename %s to %s: %s\n",
params->cmdname, tmpfile, params->imagefile,
static int fit_check_params(struct image_tool_params *params)
{
+ if (params->auto_its)
+ return 0;
return ((params->dflag && (params->fflag || params->lflag)) ||
(params->fflag && (params->dflag || params->lflag)) ||
(params->lflag && (params->dflag || params->fflag)));
return 0;
}
+
+int imagetool_get_filesize(struct image_tool_params *params, const char *fname)
+{
+ struct stat sbuf;
+ int fd;
+
+ fd = open(fname, O_RDONLY | O_BINARY);
+ if (fd < 0) {
+ fprintf(stderr, "%s: Can't open %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ return -1;
+ }
+
+ if (fstat(fd, &sbuf) < 0) {
+ fprintf(stderr, "%s: Can't stat %s: %s\n",
+ params->cmdname, fname, strerror(errno));
+ return -1;
+ }
+ close(fd);
+
+ return sbuf.st_size;
+}
#define IH_ARCH_DEFAULT IH_ARCH_INVALID
+/* Information about a file that needs to be placed into the FIT */
+struct content_info {
+ struct content_info *next;
+ int type; /* File type (IH_TYPE_...) */
+ const char *fname;
+};
+
/*
* This structure defines all such variables those are initialized by
* mkimage and dumpimage main core and need to be referred by image
int require_keys; /* 1 to mark signing keys as 'required' */
int file_size; /* Total size of output file */
int orig_file_size; /* Original size for file before padding */
+ bool auto_its; /* Automatically create the .its file */
+ int fit_image_type; /* Image type to put into the FIT */
+ struct content_info *content_head; /* List of files to include */
+ struct content_info *content_tail;
+ bool external_data; /* Store data outside the FIT */
};
/*
ulong file_data,
ulong file_len);
+/**
+ * imagetool_get_filesize() - Utility function to obtain the size of a file
+ *
+ * This function prints a message if an error occurs, showing the error that
+ * was obtained.
+ *
+ * @params: mkimage parameters
+ * @fname: filename to check
+ * @return size of file, or -ve value on error
+ */
+int imagetool_get_filesize(struct image_tool_params *params, const char *fname);
+
/*
* There is a c file associated with supported image type low level code
* for ex. default_image.c, fit_image.c
#include <version.h>
static void copy_file(int, const char *, int);
-static void usage(void);
/* parameters initialized by core will be used by the image type code */
-struct image_tool_params params = {
+static struct image_tool_params params = {
.os = IH_OS_LINUX,
.arch = IH_ARCH_PPC,
.type = IH_TYPE_KERNEL,
fprintf(stderr, "\n");
}
+static void usage(const char *msg)
+{
+ fprintf(stderr, "Error: %s\n", msg);
+ fprintf(stderr, "Usage: %s -l image\n"
+ " -l ==> list image header information\n",
+ params.cmdname);
+ fprintf(stderr,
+ " %s [-x] -A arch -O os -T type -C comp -a addr -e ep -n name -d data_file[:data_file...] image\n"
+ " -A ==> set architecture to 'arch'\n"
+ " -O ==> set operating system to 'os'\n"
+ " -T ==> set image type to 'type'\n"
+ " -C ==> set compression type 'comp'\n"
+ " -a ==> set load address to 'addr' (hex)\n"
+ " -e ==> set entry point to 'ep' (hex)\n"
+ " -n ==> set image name to 'name'\n"
+ " -d ==> use image data from 'datafile'\n"
+ " -x ==> set XIP (execute in place)\n",
+ params.cmdname);
+ fprintf(stderr,
+ " %s [-D dtc_options] [-f fit-image.its|-f auto|-F] [-b <dtb_list>] fit-image\n"
+ " <dtb_list> is used with -f auto, and is a space-separated list of .dtb files\n",
+ params.cmdname);
+ fprintf(stderr,
+ " -D => set all options for device tree compiler\n"
+ " -f => input filename for FIT source\n");
+#ifdef CONFIG_FIT_SIGNATURE
+ fprintf(stderr,
+ "Signing / verified boot options: [-k keydir] [-K dtb] [ -c <comment>] [-r]\n"
+ " -k => set directory containing private keys\n"
+ " -K => write public keys to this .dtb file\n"
+ " -c => add comment in signature node\n"
+ " -F => re-sign existing FIT image\n"
+ " -r => mark keys used as 'required' in dtb\n");
+#else
+ fprintf(stderr,
+ "Signing / verified boot not supported (CONFIG_FIT_SIGNATURE undefined)\n");
+#endif
+ fprintf(stderr, " %s -V ==> print version information and exit\n",
+ params.cmdname);
+ fprintf(stderr, "Use -T to see a list of available image types\n");
+
+ exit(EXIT_FAILURE);
+}
+
+static int add_content(int type, const char *fname)
+{
+ struct content_info *cont;
+
+ cont = calloc(1, sizeof(*cont));
+ if (!cont)
+ return -1;
+ cont->type = type;
+ cont->fname = fname;
+ if (params.content_tail)
+ params.content_tail->next = cont;
+ else
+ params.content_head = cont;
+ params.content_tail = cont;
+
+ return 0;
+}
+
+static void process_args(int argc, char **argv)
+{
+ char *ptr;
+ int type = IH_TYPE_INVALID;
+ char *datafile = NULL;
+ int expecting;
+ int opt;
+
+ expecting = IH_TYPE_COUNT; /* Unknown */
+ while ((opt = getopt(argc, argv,
+ "-a:A:bcC:d:D:e:Ef:Fk:K:ln:O:rR:sT:vVx")) != -1) {
+ switch (opt) {
+ case 'a':
+ params.addr = strtoull(optarg, &ptr, 16);
+ if (*ptr) {
+ fprintf(stderr, "%s: invalid load address %s\n",
+ params.cmdname, optarg);
+ exit(EXIT_FAILURE);
+ }
+ break;
+ case 'A':
+ params.arch = genimg_get_arch_id(optarg);
+ if (params.arch < 0)
+ usage("Invalid architecture");
+ break;
+ case 'b':
+ expecting = IH_TYPE_FLATDT;
+ break;
+ case 'c':
+ params.comment = optarg;
+ break;
+ case 'C':
+ params.comp = genimg_get_comp_id(optarg);
+ if (params.comp < 0)
+ usage("Invalid compression type");
+ break;
+ case 'd':
+ params.datafile = optarg;
+ params.dflag = 1;
+ break;
+ case 'D':
+ params.dtc = optarg;
+ break;
+ case 'e':
+ params.ep = strtoull(optarg, &ptr, 16);
+ if (*ptr) {
+ fprintf(stderr, "%s: invalid entry point %s\n",
+ params.cmdname, optarg);
+ exit(EXIT_FAILURE);
+ }
+ params.eflag = 1;
+ break;
+ case 'E':
+ params.external_data = true;
+ break;
+ case 'f':
+ datafile = optarg;
+ params.auto_its = !strcmp(datafile, "auto");
+ /* no break */
+ case 'F':
+ /*
+ * The flattened image tree (FIT) format
+ * requires a flattened device tree image type
+ */
+ params.fit_image_type = params.type;
+ params.type = IH_TYPE_FLATDT;
+ params.fflag = 1;
+ break;
+ case 'k':
+ params.keydir = optarg;
+ break;
+ case 'K':
+ params.keydest = optarg;
+ break;
+ case 'l':
+ params.lflag = 1;
+ break;
+ case 'n':
+ params.imagename = optarg;
+ break;
+ case 'O':
+ params.os = genimg_get_os_id(optarg);
+ if (params.os < 0)
+ usage("Invalid operating system");
+ break;
+ case 'r':
+ params.require_keys = 1;
+ break;
+ case 'R':
+ /*
+ * This entry is for the second configuration
+ * file, if only one is not enough.
+ */
+ params.imagename2 = optarg;
+ break;
+ case 's':
+ params.skipcpy = 1;
+ break;
+ case 'T':
+ type = genimg_get_type_id(optarg);
+ if (type < 0) {
+ show_image_types();
+ usage("Invalid image type");
+ }
+ expecting = type;
+ break;
+ case 'v':
+ params.vflag++;
+ break;
+ case 'V':
+ printf("mkimage version %s\n", PLAIN_VERSION);
+ exit(EXIT_SUCCESS);
+ case 'x':
+ params.xflag++;
+ break;
+ case 1:
+ if (expecting == type || optind == argc) {
+ params.imagefile = optarg;
+ expecting = IH_TYPE_INVALID;
+ } else if (expecting == IH_TYPE_INVALID) {
+ fprintf(stderr,
+ "%s: Unknown content type: use -b before device tree files",
+ params.cmdname);
+ exit(EXIT_FAILURE);
+ } else {
+ if (add_content(expecting, optarg)) {
+ fprintf(stderr,
+ "%s: Out of memory adding content '%s'",
+ params.cmdname, optarg);
+ exit(EXIT_FAILURE);
+ }
+ }
+ break;
+ default:
+ usage("Invalid option");
+ }
+ }
+
+ /*
+ * For auto-generated FIT images we need to know the image type to put
+ * in the FIT, which is separate from the file's image type (which
+ * will always be IH_TYPE_FLATDT in this case).
+ */
+ if (params.type == IH_TYPE_FLATDT) {
+ params.fit_image_type = type;
+ if (!params.auto_its)
+ params.datafile = datafile;
+ } else if (type != IH_TYPE_INVALID) {
+ params.type = type;
+ }
+
+ if (!params.imagefile)
+ usage("Missing output filename");
+}
+
+
int main(int argc, char **argv)
{
int ifd = -1;
int dfd;
params.cmdname = *argv;
- params.addr = params.ep = 0;
-
- while (--argc > 0 && **++argv == '-') {
- while (*++*argv) {
- switch (**argv) {
- case 'l':
- params.lflag = 1;
- break;
- case 'A':
- if ((--argc <= 0) ||
- (params.arch =
- genimg_get_arch_id (*++argv)) < 0)
- usage ();
- goto NXTARG;
- case 'c':
- if (--argc <= 0)
- usage();
- params.comment = *++argv;
- goto NXTARG;
- case 'C':
- if ((--argc <= 0) ||
- (params.comp =
- genimg_get_comp_id (*++argv)) < 0)
- usage ();
- goto NXTARG;
- case 'D':
- if (--argc <= 0)
- usage ();
- params.dtc = *++argv;
- goto NXTARG;
-
- case 'O':
- if ((--argc <= 0) ||
- (params.os =
- genimg_get_os_id (*++argv)) < 0)
- usage ();
- goto NXTARG;
- case 'T':
- params.type = -1;
- if (--argc >= 0 && argv[1]) {
- params.type =
- genimg_get_type_id(*++argv);
- }
- if (params.type < 0) {
- show_image_types();
- usage();
- }
- goto NXTARG;
- case 'a':
- if (--argc <= 0)
- usage ();
- params.addr = strtoull(*++argv, &ptr, 16);
- if (*ptr) {
- fprintf (stderr,
- "%s: invalid load address %s\n",
- params.cmdname, *argv);
- exit (EXIT_FAILURE);
- }
- goto NXTARG;
- case 'd':
- if (--argc <= 0)
- usage ();
- params.datafile = *++argv;
- params.dflag = 1;
- goto NXTARG;
- case 'e':
- if (--argc <= 0)
- usage ();
- params.ep = strtoull(*++argv, &ptr, 16);
- if (*ptr) {
- fprintf (stderr,
- "%s: invalid entry point %s\n",
- params.cmdname, *argv);
- exit (EXIT_FAILURE);
- }
- params.eflag = 1;
- goto NXTARG;
- case 'f':
- if (--argc <= 0)
- usage ();
- params.datafile = *++argv;
- /* no break */
- case 'F':
- /*
- * The flattened image tree (FIT) format
- * requires a flattened device tree image type
- */
- params.type = IH_TYPE_FLATDT;
- params.fflag = 1;
- goto NXTARG;
- case 'k':
- if (--argc <= 0)
- usage();
- params.keydir = *++argv;
- goto NXTARG;
- case 'K':
- if (--argc <= 0)
- usage();
- params.keydest = *++argv;
- goto NXTARG;
- case 'n':
- if (--argc <= 0)
- usage ();
- params.imagename = *++argv;
- goto NXTARG;
- case 'r':
- params.require_keys = 1;
- break;
- case 'R':
- if (--argc <= 0)
- usage();
- /*
- * This entry is for the second configuration
- * file, if only one is not enough.
- */
- params.imagename2 = *++argv;
- goto NXTARG;
- case 's':
- params.skipcpy = 1;
- break;
- case 'v':
- params.vflag++;
- break;
- case 'V':
- printf("mkimage version %s\n", PLAIN_VERSION);
- exit(EXIT_SUCCESS);
- case 'x':
- params.xflag++;
- break;
- default:
- usage ();
- }
- }
-NXTARG: ;
- }
+ params.addr = 0;
+ params.ep = 0;
- if (argc != 1)
- usage ();
+ process_args(argc, argv);
/* set tparams as per input type_id */
tparams = imagetool_get_type(params.type);
*/
if (tparams->check_params)
if (tparams->check_params (¶ms))
- usage ();
+ usage("Bad parameters for image type");
if (!params.eflag) {
params.ep = params.addr;
params.ep += tparams->header_size;
}
- params.imagefile = *argv;
-
if (params.fflag){
if (tparams->fflag_handle)
/*
(void) munmap((void *)ptr, sbuf.st_size);
(void) close (dfd);
}
-
-static void usage(void)
-{
- fprintf (stderr, "Usage: %s -l image\n"
- " -l ==> list image header information\n",
- params.cmdname);
- fprintf (stderr, " %s [-x] -A arch -O os -T type -C comp "
- "-a addr -e ep -n name -d data_file[:data_file...] image\n"
- " -A ==> set architecture to 'arch'\n"
- " -O ==> set operating system to 'os'\n"
- " -T ==> set image type to 'type'\n"
- " -C ==> set compression type 'comp'\n"
- " -a ==> set load address to 'addr' (hex)\n"
- " -e ==> set entry point to 'ep' (hex)\n"
- " -n ==> set image name to 'name'\n"
- " -d ==> use image data from 'datafile'\n"
- " -x ==> set XIP (execute in place)\n",
- params.cmdname);
- fprintf(stderr, " %s [-D dtc_options] [-f fit-image.its|-F] fit-image\n",
- params.cmdname);
- fprintf(stderr, " -D => set all options for device tree compiler\n"
- " -f => input filename for FIT source\n");
-#ifdef CONFIG_FIT_SIGNATURE
- fprintf(stderr, "Signing / verified boot options: [-k keydir] [-K dtb] [ -c <comment>] [-r]\n"
- " -k => set directory containing private keys\n"
- " -K => write public keys to this .dtb file\n"
- " -c => add comment in signature node\n"
- " -F => re-sign existing FIT image\n"
- " -r => mark keys used as 'required' in dtb\n");
-#else
- fprintf(stderr, "Signing / verified boot not supported (CONFIG_FIT_SIGNATURE undefined)\n");
-#endif
- fprintf (stderr, " %s -V ==> print version information and exit\n",
- params.cmdname);
- fprintf(stderr, "Use -T to see a list of available image types\n");
-
- exit (EXIT_FAILURE);
-}
projects / people / ms / u-boot.git / commitdiff
