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c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
0fd88904 2
6aba47ca 3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
9b254dd1 4 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
c5aa993b 11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b 18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
20
21#include "defs.h"
615967cb 22#include "doublest.h"
c906108c 23#include "frame.h"
d2427a71
RH
24#include "frame-unwind.h"
25#include "frame-base.h"
baa490c4 26#include "dwarf2-frame.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
7d9b040b 42#include "infcall.h"
dc129d82
JT
43
44#include "elf-bfd.h"
45
46#include "alpha-tdep.h"
47
c906108c 48\f
515921d7
JB
49/* Return the name of the REGNO register.
50
51 An empty name corresponds to a register number that used to
52 be used for a virtual register. That virtual register has
53 been removed, but the index is still reserved to maintain
54 compatibility with existing remote alpha targets. */
55
fa88f677 56static const char *
d93859e2 57alpha_register_name (struct gdbarch *gdbarch, int regno)
636a6dfc 58{
5ab84872 59 static const char * const register_names[] =
636a6dfc
JT
60 {
61 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
62 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
63 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
64 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
65 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
66 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
67 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
68 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 69 "pc", "", "unique"
636a6dfc
JT
70 };
71
72 if (regno < 0)
5ab84872 73 return NULL;
e8d2d628 74 if (regno >= ARRAY_SIZE(register_names))
5ab84872
RH
75 return NULL;
76 return register_names[regno];
636a6dfc 77}
d734c450 78
dc129d82 79static int
64a3914f 80alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
d734c450 81{
515921d7 82 return (regno == ALPHA_ZERO_REGNUM
64a3914f 83 || strlen (alpha_register_name (gdbarch, regno)) == 0);
d734c450
JT
84}
85
dc129d82 86static int
64a3914f 87alpha_cannot_store_register (struct gdbarch *gdbarch, int regno)
d734c450 88{
515921d7 89 return (regno == ALPHA_ZERO_REGNUM
64a3914f 90 || strlen (alpha_register_name (gdbarch, regno)) == 0);
d734c450
JT
91}
92
dc129d82 93static struct type *
c483c494 94alpha_register_type (struct gdbarch *gdbarch, int regno)
0d056799 95{
72667056
RH
96 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
97 return builtin_type_void_data_ptr;
98 if (regno == ALPHA_PC_REGNUM)
99 return builtin_type_void_func_ptr;
100
101 /* Don't need to worry about little vs big endian until
102 some jerk tries to port to alpha-unicosmk. */
b38b6be2 103 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
8da61cc4 104 return builtin_type_ieee_double;
72667056
RH
105
106 return builtin_type_int64;
0d056799 107}
f8453e34 108
615967cb
RH
109/* Is REGNUM a member of REGGROUP? */
110
111static int
112alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
113 struct reggroup *group)
114{
115 /* Filter out any registers eliminated, but whose regnum is
116 reserved for backward compatibility, e.g. the vfp. */
ec7cc0e8
UW
117 if (gdbarch_register_name (gdbarch, regnum) == NULL
118 || *gdbarch_register_name (gdbarch, regnum) == '\0')
615967cb
RH
119 return 0;
120
df4a182b
RH
121 if (group == all_reggroup)
122 return 1;
123
124 /* Zero should not be saved or restored. Technically it is a general
125 register (just as $f31 would be a float if we represented it), but
126 there's no point displaying it during "info regs", so leave it out
127 of all groups except for "all". */
128 if (regnum == ALPHA_ZERO_REGNUM)
129 return 0;
130
131 /* All other registers are saved and restored. */
132 if (group == save_reggroup || group == restore_reggroup)
615967cb
RH
133 return 1;
134
135 /* All other groups are non-overlapping. */
136
137 /* Since this is really a PALcode memory slot... */
138 if (regnum == ALPHA_UNIQUE_REGNUM)
139 return group == system_reggroup;
140
141 /* Force the FPCR to be considered part of the floating point state. */
142 if (regnum == ALPHA_FPCR_REGNUM)
143 return group == float_reggroup;
144
145 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
146 return group == float_reggroup;
147 else
148 return group == general_reggroup;
149}
150
c483c494
RH
151/* The following represents exactly the conversion performed by
152 the LDS instruction. This applies to both single-precision
153 floating point and 32-bit integers. */
154
155static void
156alpha_lds (void *out, const void *in)
157{
158 ULONGEST mem = extract_unsigned_integer (in, 4);
159 ULONGEST frac = (mem >> 0) & 0x7fffff;
160 ULONGEST sign = (mem >> 31) & 1;
161 ULONGEST exp_msb = (mem >> 30) & 1;
162 ULONGEST exp_low = (mem >> 23) & 0x7f;
163 ULONGEST exp, reg;
164
165 exp = (exp_msb << 10) | exp_low;
166 if (exp_msb)
167 {
168 if (exp_low == 0x7f)
169 exp = 0x7ff;
170 }
171 else
172 {
173 if (exp_low != 0x00)
174 exp |= 0x380;
175 }
176
177 reg = (sign << 63) | (exp << 52) | (frac << 29);
178 store_unsigned_integer (out, 8, reg);
179}
180
181/* Similarly, this represents exactly the conversion performed by
182 the STS instruction. */
183
39efb398 184static void
c483c494
RH
185alpha_sts (void *out, const void *in)
186{
187 ULONGEST reg, mem;
188
189 reg = extract_unsigned_integer (in, 8);
190 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
191 store_unsigned_integer (out, 4, mem);
192}
193
d2427a71
RH
194/* The alpha needs a conversion between register and memory format if the
195 register is a floating point register and memory format is float, as the
196 register format must be double or memory format is an integer with 4
197 bytes or less, as the representation of integers in floating point
198 registers is different. */
199
c483c494 200static int
0abe36f5 201alpha_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
14696584 202{
83acabca
DJ
203 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
204 && TYPE_LENGTH (type) != 8);
14696584
RH
205}
206
d2427a71 207static void
ff2e87ac 208alpha_register_to_value (struct frame_info *frame, int regnum,
5b819568 209 struct type *valtype, gdb_byte *out)
5868c862 210{
2a1ce6ec
MK
211 gdb_byte in[MAX_REGISTER_SIZE];
212
ff2e87ac 213 frame_register_read (frame, regnum, in);
c483c494 214 switch (TYPE_LENGTH (valtype))
d2427a71 215 {
c483c494
RH
216 case 4:
217 alpha_sts (out, in);
218 break;
c483c494 219 default:
323e0a4a 220 error (_("Cannot retrieve value from floating point register"));
d2427a71 221 }
d2427a71 222}
5868c862 223
d2427a71 224static void
ff2e87ac 225alpha_value_to_register (struct frame_info *frame, int regnum,
5b819568 226 struct type *valtype, const gdb_byte *in)
d2427a71 227{
2a1ce6ec
MK
228 gdb_byte out[MAX_REGISTER_SIZE];
229
c483c494 230 switch (TYPE_LENGTH (valtype))
d2427a71 231 {
c483c494
RH
232 case 4:
233 alpha_lds (out, in);
234 break;
c483c494 235 default:
323e0a4a 236 error (_("Cannot store value in floating point register"));
d2427a71 237 }
ff2e87ac 238 put_frame_register (frame, regnum, out);
5868c862
JT
239}
240
d2427a71
RH
241\f
242/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
243 the stack. The register arguments are stored in ARG_REG_BUFFER, and
244 then moved into the register file; this simplifies the passing of a
245 large struct which extends from the registers to the stack, plus avoids
246 three ptrace invocations per word.
247
248 We don't bother tracking which register values should go in integer
249 regs or fp regs; we load the same values into both.
250
d2427a71
RH
251 If the called function is returning a structure, the address of the
252 structure to be returned is passed as a hidden first argument. */
c906108c 253
d2427a71 254static CORE_ADDR
7d9b040b 255alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
c88e30c0
RH
256 struct regcache *regcache, CORE_ADDR bp_addr,
257 int nargs, struct value **args, CORE_ADDR sp,
258 int struct_return, CORE_ADDR struct_addr)
c906108c 259{
d2427a71
RH
260 int i;
261 int accumulate_size = struct_return ? 8 : 0;
d2427a71 262 struct alpha_arg
c906108c 263 {
2a1ce6ec 264 gdb_byte *contents;
d2427a71
RH
265 int len;
266 int offset;
267 };
c88e30c0
RH
268 struct alpha_arg *alpha_args
269 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
52f0bd74 270 struct alpha_arg *m_arg;
2a1ce6ec 271 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 272 int required_arg_regs;
7d9b040b 273 CORE_ADDR func_addr = find_function_addr (function, NULL);
c906108c 274
c88e30c0
RH
275 /* The ABI places the address of the called function in T12. */
276 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
277
278 /* Set the return address register to point to the entry point
279 of the program, where a breakpoint lies in wait. */
280 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
281
282 /* Lay out the arguments in memory. */
d2427a71
RH
283 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
284 {
285 struct value *arg = args[i];
4991999e 286 struct type *arg_type = check_typedef (value_type (arg));
c88e30c0 287
d2427a71
RH
288 /* Cast argument to long if necessary as the compiler does it too. */
289 switch (TYPE_CODE (arg_type))
c906108c 290 {
d2427a71
RH
291 case TYPE_CODE_INT:
292 case TYPE_CODE_BOOL:
293 case TYPE_CODE_CHAR:
294 case TYPE_CODE_RANGE:
295 case TYPE_CODE_ENUM:
0ede8eca 296 if (TYPE_LENGTH (arg_type) == 4)
d2427a71 297 {
0ede8eca
RH
298 /* 32-bit values must be sign-extended to 64 bits
299 even if the base data type is unsigned. */
300 arg_type = builtin_type_int32;
301 arg = value_cast (arg_type, arg);
302 }
303 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
304 {
305 arg_type = builtin_type_int64;
d2427a71
RH
306 arg = value_cast (arg_type, arg);
307 }
308 break;
7b5e1cb3 309
c88e30c0
RH
310 case TYPE_CODE_FLT:
311 /* "float" arguments loaded in registers must be passed in
312 register format, aka "double". */
313 if (accumulate_size < sizeof (arg_reg_buffer)
314 && TYPE_LENGTH (arg_type) == 4)
315 {
8da61cc4 316 arg_type = builtin_type_ieee_double;
c88e30c0
RH
317 arg = value_cast (arg_type, arg);
318 }
319 /* Tru64 5.1 has a 128-bit long double, and passes this by
320 invisible reference. No one else uses this data type. */
321 else if (TYPE_LENGTH (arg_type) == 16)
322 {
323 /* Allocate aligned storage. */
324 sp = (sp & -16) - 16;
325
326 /* Write the real data into the stack. */
0fd88904 327 write_memory (sp, value_contents (arg), 16);
c88e30c0
RH
328
329 /* Construct the indirection. */
330 arg_type = lookup_pointer_type (arg_type);
331 arg = value_from_pointer (arg_type, sp);
332 }
333 break;
7b5e1cb3
RH
334
335 case TYPE_CODE_COMPLEX:
336 /* ??? The ABI says that complex values are passed as two
337 separate scalar values. This distinction only matters
338 for complex float. However, GCC does not implement this. */
339
340 /* Tru64 5.1 has a 128-bit long double, and passes this by
341 invisible reference. */
342 if (TYPE_LENGTH (arg_type) == 32)
343 {
344 /* Allocate aligned storage. */
345 sp = (sp & -16) - 16;
346
347 /* Write the real data into the stack. */
0fd88904 348 write_memory (sp, value_contents (arg), 32);
7b5e1cb3
RH
349
350 /* Construct the indirection. */
351 arg_type = lookup_pointer_type (arg_type);
352 arg = value_from_pointer (arg_type, sp);
353 }
354 break;
355
d2427a71
RH
356 default:
357 break;
c906108c 358 }
d2427a71
RH
359 m_arg->len = TYPE_LENGTH (arg_type);
360 m_arg->offset = accumulate_size;
361 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
0fd88904 362 m_arg->contents = value_contents_writeable (arg);
c906108c
SS
363 }
364
d2427a71
RH
365 /* Determine required argument register loads, loading an argument register
366 is expensive as it uses three ptrace calls. */
367 required_arg_regs = accumulate_size / 8;
368 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
369 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 370
d2427a71 371 /* Make room for the arguments on the stack. */
c88e30c0
RH
372 if (accumulate_size < sizeof(arg_reg_buffer))
373 accumulate_size = 0;
374 else
375 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 376 sp -= accumulate_size;
c906108c 377
c88e30c0 378 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 379 sp &= ~15;
c906108c 380
d2427a71
RH
381 /* `Push' arguments on the stack. */
382 for (i = nargs; m_arg--, --i >= 0;)
c906108c 383 {
2a1ce6ec 384 gdb_byte *contents = m_arg->contents;
c88e30c0
RH
385 int offset = m_arg->offset;
386 int len = m_arg->len;
387
388 /* Copy the bytes destined for registers into arg_reg_buffer. */
389 if (offset < sizeof(arg_reg_buffer))
390 {
391 if (offset + len <= sizeof(arg_reg_buffer))
392 {
393 memcpy (arg_reg_buffer + offset, contents, len);
394 continue;
395 }
396 else
397 {
398 int tlen = sizeof(arg_reg_buffer) - offset;
399 memcpy (arg_reg_buffer + offset, contents, tlen);
400 offset += tlen;
401 contents += tlen;
402 len -= tlen;
403 }
404 }
405
406 /* Everything else goes to the stack. */
407 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 408 }
c88e30c0
RH
409 if (struct_return)
410 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 411
d2427a71
RH
412 /* Load the argument registers. */
413 for (i = 0; i < required_arg_regs; i++)
414 {
09cc52fd
RH
415 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
416 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
417 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
418 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 419 }
c906108c 420
09cc52fd
RH
421 /* Finally, update the stack pointer. */
422 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
423
c88e30c0 424 return sp;
c906108c
SS
425}
426
5ec2bb99
RH
427/* Extract from REGCACHE the value about to be returned from a function
428 and copy it into VALBUF. */
d2427a71 429
dc129d82 430static void
5ec2bb99 431alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
5b819568 432 gdb_byte *valbuf)
140f9984 433{
7b5e1cb3 434 int length = TYPE_LENGTH (valtype);
2a1ce6ec 435 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
5ec2bb99
RH
436 ULONGEST l;
437
438 switch (TYPE_CODE (valtype))
439 {
440 case TYPE_CODE_FLT:
7b5e1cb3 441 switch (length)
5ec2bb99
RH
442 {
443 case 4:
444 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
c483c494 445 alpha_sts (valbuf, raw_buffer);
5ec2bb99
RH
446 break;
447
448 case 8:
449 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
450 break;
451
24064b5c
RH
452 case 16:
453 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
454 read_memory (l, valbuf, 16);
455 break;
456
5ec2bb99 457 default:
323e0a4a 458 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
5ec2bb99
RH
459 }
460 break;
461
7b5e1cb3
RH
462 case TYPE_CODE_COMPLEX:
463 switch (length)
464 {
465 case 8:
466 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
467 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
468 break;
469
470 case 16:
471 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
2a1ce6ec 472 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
7b5e1cb3
RH
473 break;
474
475 case 32:
476 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
477 read_memory (l, valbuf, 32);
478 break;
479
480 default:
323e0a4a 481 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
7b5e1cb3
RH
482 }
483 break;
484
5ec2bb99
RH
485 default:
486 /* Assume everything else degenerates to an integer. */
487 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
7b5e1cb3 488 store_unsigned_integer (valbuf, length, l);
5ec2bb99
RH
489 break;
490 }
140f9984
JT
491}
492
5ec2bb99
RH
493/* Insert the given value into REGCACHE as if it was being
494 returned by a function. */
0d056799 495
d2427a71 496static void
5ec2bb99 497alpha_store_return_value (struct type *valtype, struct regcache *regcache,
5b819568 498 const gdb_byte *valbuf)
c906108c 499{
d2427a71 500 int length = TYPE_LENGTH (valtype);
2a1ce6ec 501 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
5ec2bb99 502 ULONGEST l;
d2427a71 503
5ec2bb99 504 switch (TYPE_CODE (valtype))
c906108c 505 {
5ec2bb99
RH
506 case TYPE_CODE_FLT:
507 switch (length)
508 {
509 case 4:
c483c494 510 alpha_lds (raw_buffer, valbuf);
f75d70cc
RH
511 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
512 break;
5ec2bb99
RH
513
514 case 8:
515 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
516 break;
517
24064b5c
RH
518 case 16:
519 /* FIXME: 128-bit long doubles are returned like structures:
520 by writing into indirect storage provided by the caller
521 as the first argument. */
323e0a4a 522 error (_("Cannot set a 128-bit long double return value."));
24064b5c 523
5ec2bb99 524 default:
323e0a4a 525 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
5ec2bb99
RH
526 }
527 break;
d2427a71 528
7b5e1cb3
RH
529 case TYPE_CODE_COMPLEX:
530 switch (length)
531 {
532 case 8:
533 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
534 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
535 break;
536
537 case 16:
538 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
2a1ce6ec 539 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
7b5e1cb3
RH
540 break;
541
542 case 32:
543 /* FIXME: 128-bit long doubles are returned like structures:
544 by writing into indirect storage provided by the caller
545 as the first argument. */
323e0a4a 546 error (_("Cannot set a 128-bit long double return value."));
7b5e1cb3
RH
547
548 default:
323e0a4a 549 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
7b5e1cb3
RH
550 }
551 break;
552
5ec2bb99
RH
553 default:
554 /* Assume everything else degenerates to an integer. */
0ede8eca
RH
555 /* 32-bit values must be sign-extended to 64 bits
556 even if the base data type is unsigned. */
557 if (length == 4)
558 valtype = builtin_type_int32;
5ec2bb99
RH
559 l = unpack_long (valtype, valbuf);
560 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
561 break;
562 }
c906108c
SS
563}
564
9823e921
RH
565static enum return_value_convention
566alpha_return_value (struct gdbarch *gdbarch, struct type *type,
567 struct regcache *regcache, gdb_byte *readbuf,
568 const gdb_byte *writebuf)
569{
570 enum type_code code = TYPE_CODE (type);
571
572 if ((code == TYPE_CODE_STRUCT
573 || code == TYPE_CODE_UNION
574 || code == TYPE_CODE_ARRAY)
575 && gdbarch_tdep (gdbarch)->return_in_memory (type))
576 {
577 if (readbuf)
578 {
579 ULONGEST addr;
580 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
581 read_memory (addr, readbuf, TYPE_LENGTH (type));
582 }
583
584 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
585 }
586
587 if (readbuf)
588 alpha_extract_return_value (type, regcache, readbuf);
589 if (writebuf)
590 alpha_store_return_value (type, regcache, writebuf);
591
592 return RETURN_VALUE_REGISTER_CONVENTION;
593}
594
595static int
596alpha_return_in_memory_always (struct type *type)
597{
598 return 1;
599}
d2427a71 600\f
2a1ce6ec 601static const gdb_byte *
67d57894 602alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
c906108c 603{
2a1ce6ec 604 static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 605
2a1ce6ec
MK
606 *len = sizeof(break_insn);
607 return break_insn;
d2427a71 608}
c906108c 609
d2427a71
RH
610\f
611/* This returns the PC of the first insn after the prologue.
612 If we can't find the prologue, then return 0. */
c906108c 613
d2427a71
RH
614CORE_ADDR
615alpha_after_prologue (CORE_ADDR pc)
c906108c 616{
d2427a71
RH
617 struct symtab_and_line sal;
618 CORE_ADDR func_addr, func_end;
c906108c 619
d2427a71 620 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 621 return 0;
c906108c 622
d2427a71
RH
623 sal = find_pc_line (func_addr, 0);
624 if (sal.end < func_end)
625 return sal.end;
c5aa993b 626
d2427a71
RH
627 /* The line after the prologue is after the end of the function. In this
628 case, tell the caller to find the prologue the hard way. */
629 return 0;
c906108c
SS
630}
631
d2427a71
RH
632/* Read an instruction from memory at PC, looking through breakpoints. */
633
634unsigned int
635alpha_read_insn (CORE_ADDR pc)
c906108c 636{
e8d2d628 637 gdb_byte buf[ALPHA_INSN_SIZE];
d2427a71 638 int status;
c5aa993b 639
e8d2d628 640 status = read_memory_nobpt (pc, buf, sizeof (buf));
d2427a71
RH
641 if (status)
642 memory_error (status, pc);
e8d2d628 643 return extract_unsigned_integer (buf, sizeof (buf));
d2427a71 644}
c5aa993b 645
d2427a71
RH
646/* To skip prologues, I use this predicate. Returns either PC itself
647 if the code at PC does not look like a function prologue; otherwise
648 returns an address that (if we're lucky) follows the prologue. If
649 LENIENT, then we must skip everything which is involved in setting
650 up the frame (it's OK to skip more, just so long as we don't skip
651 anything which might clobber the registers which are being saved. */
c906108c 652
d2427a71
RH
653static CORE_ADDR
654alpha_skip_prologue (CORE_ADDR pc)
655{
656 unsigned long inst;
657 int offset;
658 CORE_ADDR post_prologue_pc;
e8d2d628 659 gdb_byte buf[ALPHA_INSN_SIZE];
c906108c 660
d2427a71
RH
661 /* Silently return the unaltered pc upon memory errors.
662 This could happen on OSF/1 if decode_line_1 tries to skip the
663 prologue for quickstarted shared library functions when the
664 shared library is not yet mapped in.
665 Reading target memory is slow over serial lines, so we perform
666 this check only if the target has shared libraries (which all
667 Alpha targets do). */
e8d2d628 668 if (target_read_memory (pc, buf, sizeof (buf)))
d2427a71 669 return pc;
c906108c 670
d2427a71
RH
671 /* See if we can determine the end of the prologue via the symbol table.
672 If so, then return either PC, or the PC after the prologue, whichever
673 is greater. */
c906108c 674
d2427a71
RH
675 post_prologue_pc = alpha_after_prologue (pc);
676 if (post_prologue_pc != 0)
677 return max (pc, post_prologue_pc);
c906108c 678
d2427a71
RH
679 /* Can't determine prologue from the symbol table, need to examine
680 instructions. */
dc1b0db2 681
d2427a71
RH
682 /* Skip the typical prologue instructions. These are the stack adjustment
683 instruction and the instructions that save registers on the stack
684 or in the gcc frame. */
e8d2d628 685 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
d2427a71
RH
686 {
687 inst = alpha_read_insn (pc + offset);
c906108c 688
d2427a71
RH
689 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
690 continue;
691 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
692 continue;
693 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
694 continue;
695 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
696 continue;
c906108c 697
d2427a71
RH
698 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
699 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
700 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
701 continue;
c906108c 702
d2427a71
RH
703 if (inst == 0x47de040f) /* bis sp,sp,fp */
704 continue;
705 if (inst == 0x47fe040f) /* bis zero,sp,fp */
706 continue;
c906108c 707
d2427a71 708 break;
c906108c 709 }
d2427a71
RH
710 return pc + offset;
711}
c906108c 712
d2427a71
RH
713\f
714/* Figure out where the longjmp will land.
715 We expect the first arg to be a pointer to the jmp_buf structure from
716 which we extract the PC (JB_PC) that we will land at. The PC is copied
717 into the "pc". This routine returns true on success. */
c906108c
SS
718
719static int
60ade65d 720alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
c906108c 721{
60ade65d 722 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
d2427a71 723 CORE_ADDR jb_addr;
2a1ce6ec 724 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 725
60ade65d 726 jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM);
c906108c 727
d2427a71
RH
728 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
729 raw_buffer, tdep->jb_elt_size))
c906108c 730 return 0;
d2427a71 731
7c0b4a20 732 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 733 return 1;
c906108c
SS
734}
735
d2427a71
RH
736\f
737/* Frame unwinder for signal trampolines. We use alpha tdep bits that
738 describe the location and shape of the sigcontext structure. After
739 that, all registers are in memory, so it's easy. */
740/* ??? Shouldn't we be able to do this generically, rather than with
741 OSABI data specific to Alpha? */
742
743struct alpha_sigtramp_unwind_cache
c906108c 744{
d2427a71
RH
745 CORE_ADDR sigcontext_addr;
746};
c906108c 747
d2427a71
RH
748static struct alpha_sigtramp_unwind_cache *
749alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
750 void **this_prologue_cache)
751{
752 struct alpha_sigtramp_unwind_cache *info;
753 struct gdbarch_tdep *tdep;
c906108c 754
d2427a71
RH
755 if (*this_prologue_cache)
756 return *this_prologue_cache;
c906108c 757
d2427a71
RH
758 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
759 *this_prologue_cache = info;
c906108c 760
ec7cc0e8 761 tdep = gdbarch_tdep (get_frame_arch (next_frame));
d2427a71 762 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 763
d2427a71 764 return info;
c906108c
SS
765}
766
138e7be5
MK
767/* Return the address of REGNUM in a sigtramp frame. Since this is
768 all arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 769
d2427a71 770static CORE_ADDR
138e7be5 771alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum)
d2427a71 772{
138e7be5
MK
773 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
774
775 if (regnum >= 0 && regnum < 32)
776 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
777 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
778 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
779 else if (regnum == ALPHA_PC_REGNUM)
780 return sigcontext_addr + tdep->sc_pc_offset;
c5aa993b 781
d2427a71 782 return 0;
c906108c
SS
783}
784
d2427a71
RH
785/* Given a GDB frame, determine the address of the calling function's
786 frame. This will be used to create a new GDB frame struct. */
140f9984 787
dc129d82 788static void
d2427a71
RH
789alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
790 void **this_prologue_cache,
791 struct frame_id *this_id)
c906108c 792{
d2427a71
RH
793 struct alpha_sigtramp_unwind_cache *info
794 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
795 struct gdbarch_tdep *tdep;
796 CORE_ADDR stack_addr, code_addr;
797
798 /* If the OSABI couldn't locate the sigcontext, give up. */
799 if (info->sigcontext_addr == 0)
800 return;
801
802 /* If we have dynamic signal trampolines, find their start.
803 If we do not, then we must assume there is a symbol record
804 that can provide the start address. */
ec7cc0e8 805 tdep = gdbarch_tdep (get_frame_arch (next_frame));
d2427a71 806 if (tdep->dynamic_sigtramp_offset)
c906108c 807 {
d2427a71
RH
808 int offset;
809 code_addr = frame_pc_unwind (next_frame);
810 offset = tdep->dynamic_sigtramp_offset (code_addr);
811 if (offset >= 0)
812 code_addr -= offset;
c906108c 813 else
d2427a71 814 code_addr = 0;
c906108c 815 }
d2427a71 816 else
93d42b30 817 code_addr = frame_func_unwind (next_frame, SIGTRAMP_FRAME);
c906108c 818
d2427a71
RH
819 /* The stack address is trivially read from the sigcontext. */
820 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
821 ALPHA_SP_REGNUM);
b21fd293
RH
822 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
823 ALPHA_REGISTER_SIZE);
c906108c 824
d2427a71 825 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
826}
827
d2427a71 828/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 829
d2427a71
RH
830static void
831alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
832 void **this_prologue_cache,
833 int regnum, int *optimizedp,
834 enum lval_type *lvalp, CORE_ADDR *addrp,
5b819568 835 int *realnump, gdb_byte *bufferp)
c906108c 836{
d2427a71
RH
837 struct alpha_sigtramp_unwind_cache *info
838 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
839 CORE_ADDR addr;
c906108c 840
d2427a71 841 if (info->sigcontext_addr != 0)
c906108c 842 {
d2427a71
RH
843 /* All integer and fp registers are stored in memory. */
844 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
845 if (addr != 0)
c906108c 846 {
d2427a71
RH
847 *optimizedp = 0;
848 *lvalp = lval_memory;
849 *addrp = addr;
850 *realnump = -1;
851 if (bufferp != NULL)
b21fd293 852 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
d2427a71 853 return;
c906108c 854 }
c906108c
SS
855 }
856
d2427a71
RH
857 /* This extra register may actually be in the sigcontext, but our
858 current description of it in alpha_sigtramp_frame_unwind_cache
859 doesn't include it. Too bad. Fall back on whatever's in the
860 outer frame. */
5efde112
DJ
861 *optimizedp = 0;
862 *lvalp = lval_register;
863 *addrp = 0;
864 *realnump = regnum;
865 if (bufferp)
866 frame_unwind_register (next_frame, *realnump, bufferp);
d2427a71 867}
c906108c 868
d2427a71
RH
869static const struct frame_unwind alpha_sigtramp_frame_unwind = {
870 SIGTRAMP_FRAME,
871 alpha_sigtramp_frame_this_id,
872 alpha_sigtramp_frame_prev_register
873};
c906108c 874
d2427a71 875static const struct frame_unwind *
336d1bba 876alpha_sigtramp_frame_sniffer (struct frame_info *next_frame)
d2427a71 877{
ec7cc0e8 878 struct gdbarch *gdbarch = get_frame_arch (next_frame);
336d1bba 879 CORE_ADDR pc = frame_pc_unwind (next_frame);
d2427a71 880 char *name;
c906108c 881
f2524b93
AC
882 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
883 look at tramp-frame.h and other simplier per-architecture
884 sigtramp unwinders. */
885
886 /* We shouldn't even bother to try if the OSABI didn't register a
887 sigcontext_addr handler or pc_in_sigtramp hander. */
ec7cc0e8 888 if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
f2524b93 889 return NULL;
ec7cc0e8 890 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
d2427a71 891 return NULL;
c906108c 892
d2427a71
RH
893 /* Otherwise we should be in a signal frame. */
894 find_pc_partial_function (pc, &name, NULL, NULL);
ec7cc0e8 895 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (pc, name))
d2427a71 896 return &alpha_sigtramp_frame_unwind;
c906108c 897
d2427a71 898 return NULL;
c906108c 899}
d2427a71
RH
900\f
901/* Fallback alpha frame unwinder. Uses instruction scanning and knows
902 something about the traditional layout of alpha stack frames. */
c906108c 903
d2427a71 904struct alpha_heuristic_unwind_cache
c906108c 905{
d2427a71
RH
906 CORE_ADDR *saved_regs;
907 CORE_ADDR vfp;
908 CORE_ADDR start_pc;
909 int return_reg;
910};
c906108c 911
d2427a71
RH
912/* Heuristic_proc_start may hunt through the text section for a long
913 time across a 2400 baud serial line. Allows the user to limit this
914 search. */
915static unsigned int heuristic_fence_post = 0;
c906108c 916
d2427a71
RH
917/* Attempt to locate the start of the function containing PC. We assume that
918 the previous function ends with an about_to_return insn. Not foolproof by
919 any means, since gcc is happy to put the epilogue in the middle of a
920 function. But we're guessing anyway... */
c906108c 921
d2427a71
RH
922static CORE_ADDR
923alpha_heuristic_proc_start (CORE_ADDR pc)
924{
925 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
926 CORE_ADDR last_non_nop = pc;
927 CORE_ADDR fence = pc - heuristic_fence_post;
928 CORE_ADDR orig_pc = pc;
fbe586ae 929 CORE_ADDR func;
9e0b60a8 930
d2427a71
RH
931 if (pc == 0)
932 return 0;
9e0b60a8 933
fbe586ae
RH
934 /* First see if we can find the start of the function from minimal
935 symbol information. This can succeed with a binary that doesn't
936 have debug info, but hasn't been stripped. */
937 func = get_pc_function_start (pc);
938 if (func)
939 return func;
940
d2427a71
RH
941 if (heuristic_fence_post == UINT_MAX
942 || fence < tdep->vm_min_address)
943 fence = tdep->vm_min_address;
c906108c 944
d2427a71
RH
945 /* Search back for previous return; also stop at a 0, which might be
946 seen for instance before the start of a code section. Don't include
947 nops, since this usually indicates padding between functions. */
e8d2d628 948 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
c906108c 949 {
d2427a71
RH
950 unsigned int insn = alpha_read_insn (pc);
951 switch (insn)
c906108c 952 {
d2427a71
RH
953 case 0: /* invalid insn */
954 case 0x6bfa8001: /* ret $31,($26),1 */
955 return last_non_nop;
956
957 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
958 case 0x47ff041f: /* nop: bis $31,$31,$31 */
959 break;
960
961 default:
962 last_non_nop = pc;
963 break;
c906108c 964 }
d2427a71 965 }
c906108c 966
d2427a71
RH
967 /* It's not clear to me why we reach this point when stopping quietly,
968 but with this test, at least we don't print out warnings for every
969 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
970 if (stop_soon == NO_STOP_QUIETLY)
971 {
972 static int blurb_printed = 0;
c906108c 973
d2427a71 974 if (fence == tdep->vm_min_address)
323e0a4a
AC
975 warning (_("Hit beginning of text section without finding \
976enclosing function for address 0x%s"), paddr_nz (orig_pc));
c906108c 977 else
323e0a4a
AC
978 warning (_("Hit heuristic-fence-post without finding \
979enclosing function for address 0x%s"), paddr_nz (orig_pc));
c906108c 980
d2427a71
RH
981 if (!blurb_printed)
982 {
323e0a4a 983 printf_filtered (_("\
d2427a71
RH
984This warning occurs if you are debugging a function without any symbols\n\
985(for example, in a stripped executable). In that case, you may wish to\n\
986increase the size of the search with the `set heuristic-fence-post' command.\n\
987\n\
988Otherwise, you told GDB there was a function where there isn't one, or\n\
323e0a4a 989(more likely) you have encountered a bug in GDB.\n"));
d2427a71
RH
990 blurb_printed = 1;
991 }
992 }
c906108c 993
d2427a71
RH
994 return 0;
995}
c906108c 996
fbe586ae 997static struct alpha_heuristic_unwind_cache *
d2427a71
RH
998alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
999 void **this_prologue_cache,
1000 CORE_ADDR start_pc)
1001{
1002 struct alpha_heuristic_unwind_cache *info;
1003 ULONGEST val;
1004 CORE_ADDR limit_pc, cur_pc;
1005 int frame_reg, frame_size, return_reg, reg;
c906108c 1006
d2427a71
RH
1007 if (*this_prologue_cache)
1008 return *this_prologue_cache;
c906108c 1009
d2427a71
RH
1010 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
1011 *this_prologue_cache = info;
1012 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 1013
d2427a71
RH
1014 limit_pc = frame_pc_unwind (next_frame);
1015 if (start_pc == 0)
1016 start_pc = alpha_heuristic_proc_start (limit_pc);
1017 info->start_pc = start_pc;
c906108c 1018
d2427a71
RH
1019 frame_reg = ALPHA_SP_REGNUM;
1020 frame_size = 0;
1021 return_reg = -1;
c906108c 1022
d2427a71
RH
1023 /* If we've identified a likely place to start, do code scanning. */
1024 if (start_pc != 0)
c5aa993b 1025 {
d2427a71
RH
1026 /* Limit the forward search to 50 instructions. */
1027 if (start_pc + 200 < limit_pc)
1028 limit_pc = start_pc + 200;
c5aa993b 1029
e8d2d628 1030 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
d2427a71
RH
1031 {
1032 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1033
d2427a71
RH
1034 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1035 {
1036 if (word & 0x8000)
1037 {
1038 /* Consider only the first stack allocation instruction
1039 to contain the static size of the frame. */
1040 if (frame_size == 0)
1041 frame_size = (-word) & 0xffff;
1042 }
1043 else
1044 {
1045 /* Exit loop if a positive stack adjustment is found, which
1046 usually means that the stack cleanup code in the function
1047 epilogue is reached. */
1048 break;
1049 }
1050 }
1051 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1052 {
1053 reg = (word & 0x03e00000) >> 21;
1054
d15bfd3a
AC
1055 /* Ignore this instruction if we have already encountered
1056 an instruction saving the same register earlier in the
1057 function code. The current instruction does not tell
1058 us where the original value upon function entry is saved.
1059 All it says is that the function we are scanning reused
1060 that register for some computation of its own, and is now
1061 saving its result. */
1062 if (info->saved_regs[reg])
1063 continue;
1064
d2427a71
RH
1065 if (reg == 31)
1066 continue;
1067
1068 /* Do not compute the address where the register was saved yet,
1069 because we don't know yet if the offset will need to be
1070 relative to $sp or $fp (we can not compute the address
1071 relative to $sp if $sp is updated during the execution of
1072 the current subroutine, for instance when doing some alloca).
1073 So just store the offset for the moment, and compute the
1074 address later when we know whether this frame has a frame
1075 pointer or not. */
1076 /* Hack: temporarily add one, so that the offset is non-zero
1077 and we can tell which registers have save offsets below. */
1078 info->saved_regs[reg] = (word & 0xffff) + 1;
1079
1080 /* Starting with OSF/1-3.2C, the system libraries are shipped
1081 without local symbols, but they still contain procedure
1082 descriptors without a symbol reference. GDB is currently
1083 unable to find these procedure descriptors and uses
1084 heuristic_proc_desc instead.
1085 As some low level compiler support routines (__div*, __add*)
1086 use a non-standard return address register, we have to
1087 add some heuristics to determine the return address register,
1088 or stepping over these routines will fail.
1089 Usually the return address register is the first register
1090 saved on the stack, but assembler optimization might
1091 rearrange the register saves.
1092 So we recognize only a few registers (t7, t9, ra) within
1093 the procedure prologue as valid return address registers.
1094 If we encounter a return instruction, we extract the
1095 the return address register from it.
1096
1097 FIXME: Rewriting GDB to access the procedure descriptors,
1098 e.g. via the minimal symbol table, might obviate this hack. */
1099 if (return_reg == -1
1100 && cur_pc < (start_pc + 80)
1101 && (reg == ALPHA_T7_REGNUM
1102 || reg == ALPHA_T9_REGNUM
1103 || reg == ALPHA_RA_REGNUM))
1104 return_reg = reg;
1105 }
1106 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1107 return_reg = (word >> 16) & 0x1f;
1108 else if (word == 0x47de040f) /* bis sp,sp,fp */
1109 frame_reg = ALPHA_GCC_FP_REGNUM;
1110 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1111 frame_reg = ALPHA_GCC_FP_REGNUM;
1112 }
c5aa993b 1113
d2427a71
RH
1114 /* If we haven't found a valid return address register yet, keep
1115 searching in the procedure prologue. */
1116 if (return_reg == -1)
1117 {
1118 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1119 {
1120 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1121
d2427a71
RH
1122 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1123 {
1124 reg = (word & 0x03e00000) >> 21;
1125 if (reg == ALPHA_T7_REGNUM
1126 || reg == ALPHA_T9_REGNUM
1127 || reg == ALPHA_RA_REGNUM)
1128 {
1129 return_reg = reg;
1130 break;
1131 }
1132 }
1133 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1134 {
1135 return_reg = (word >> 16) & 0x1f;
1136 break;
1137 }
85b32d22 1138
e8d2d628 1139 cur_pc += ALPHA_INSN_SIZE;
d2427a71
RH
1140 }
1141 }
c906108c 1142 }
c906108c 1143
d2427a71
RH
1144 /* Failing that, do default to the customary RA. */
1145 if (return_reg == -1)
1146 return_reg = ALPHA_RA_REGNUM;
1147 info->return_reg = return_reg;
f8453e34 1148
11411de3 1149 val = frame_unwind_register_unsigned (next_frame, frame_reg);
d2427a71 1150 info->vfp = val + frame_size;
c906108c 1151
d2427a71
RH
1152 /* Convert offsets to absolute addresses. See above about adding
1153 one to the offsets to make all detected offsets non-zero. */
1154 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1155 if (info->saved_regs[reg])
1156 info->saved_regs[reg] += val - 1;
1157
1158 return info;
c906108c 1159}
c906108c 1160
d2427a71
RH
1161/* Given a GDB frame, determine the address of the calling function's
1162 frame. This will be used to create a new GDB frame struct. */
1163
fbe586ae 1164static void
d2427a71
RH
1165alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1166 void **this_prologue_cache,
1167 struct frame_id *this_id)
c906108c 1168{
d2427a71
RH
1169 struct alpha_heuristic_unwind_cache *info
1170 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1171
d2427a71 1172 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1173}
1174
d2427a71
RH
1175/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1176
fbe586ae 1177static void
d2427a71
RH
1178alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1179 void **this_prologue_cache,
1180 int regnum, int *optimizedp,
1181 enum lval_type *lvalp, CORE_ADDR *addrp,
5b819568 1182 int *realnump, gdb_byte *bufferp)
c906108c 1183{
d2427a71
RH
1184 struct alpha_heuristic_unwind_cache *info
1185 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1186
1187 /* The PC of the previous frame is stored in the link register of
1188 the current frame. Frob regnum so that we pull the value from
1189 the correct place. */
1190 if (regnum == ALPHA_PC_REGNUM)
1191 regnum = info->return_reg;
1192
1193 /* For all registers known to be saved in the current frame,
1194 do the obvious and pull the value out. */
1195 if (info->saved_regs[regnum])
c906108c 1196 {
d2427a71
RH
1197 *optimizedp = 0;
1198 *lvalp = lval_memory;
1199 *addrp = info->saved_regs[regnum];
1200 *realnump = -1;
1201 if (bufferp != NULL)
b21fd293 1202 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1203 return;
1204 }
1205
d2427a71
RH
1206 /* The stack pointer of the previous frame is computed by popping
1207 the current stack frame. */
1208 if (regnum == ALPHA_SP_REGNUM)
c906108c 1209 {
d2427a71
RH
1210 *optimizedp = 0;
1211 *lvalp = not_lval;
1212 *addrp = 0;
1213 *realnump = -1;
1214 if (bufferp != NULL)
1215 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1216 return;
c906108c 1217 }
95b80706 1218
d2427a71 1219 /* Otherwise assume the next frame has the same register value. */
5efde112
DJ
1220 *optimizedp = 0;
1221 *lvalp = lval_register;
1222 *addrp = 0;
1223 *realnump = regnum;
1224 if (bufferp)
1225 frame_unwind_register (next_frame, *realnump, bufferp);
95b80706
JT
1226}
1227
d2427a71
RH
1228static const struct frame_unwind alpha_heuristic_frame_unwind = {
1229 NORMAL_FRAME,
1230 alpha_heuristic_frame_this_id,
1231 alpha_heuristic_frame_prev_register
1232};
c906108c 1233
d2427a71 1234static const struct frame_unwind *
336d1bba 1235alpha_heuristic_frame_sniffer (struct frame_info *next_frame)
c906108c 1236{
d2427a71 1237 return &alpha_heuristic_frame_unwind;
c906108c
SS
1238}
1239
fbe586ae 1240static CORE_ADDR
d2427a71
RH
1241alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1242 void **this_prologue_cache)
c906108c 1243{
d2427a71
RH
1244 struct alpha_heuristic_unwind_cache *info
1245 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1246
d2427a71 1247 return info->vfp;
c906108c
SS
1248}
1249
d2427a71
RH
1250static const struct frame_base alpha_heuristic_frame_base = {
1251 &alpha_heuristic_frame_unwind,
1252 alpha_heuristic_frame_base_address,
1253 alpha_heuristic_frame_base_address,
1254 alpha_heuristic_frame_base_address
1255};
1256
c906108c 1257/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1258 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1259
1260static void
fba45db2 1261reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1262{
1263 reinit_frame_cache ();
1264}
1265
d2427a71 1266\f
d2427a71
RH
1267/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1268 dummy frame. The frame ID's base needs to match the TOS value
1269 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1270 breakpoint. */
d734c450 1271
d2427a71
RH
1272static struct frame_id
1273alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1274{
d2427a71 1275 ULONGEST base;
11411de3 1276 base = frame_unwind_register_unsigned (next_frame, ALPHA_SP_REGNUM);
d2427a71 1277 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1278}
1279
dc129d82 1280static CORE_ADDR
d2427a71 1281alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1282{
d2427a71 1283 ULONGEST pc;
11411de3 1284 pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM);
d2427a71 1285 return pc;
accc6d1f
JT
1286}
1287
98a8e1e5
RH
1288\f
1289/* Helper routines for alpha*-nat.c files to move register sets to and
1290 from core files. The UNIQUE pointer is allowed to be NULL, as most
1291 targets don't supply this value in their core files. */
1292
1293void
390c1522
UW
1294alpha_supply_int_regs (struct regcache *regcache, int regno,
1295 const void *r0_r30, const void *pc, const void *unique)
98a8e1e5 1296{
2a1ce6ec 1297 const gdb_byte *regs = r0_r30;
98a8e1e5
RH
1298 int i;
1299
1300 for (i = 0; i < 31; ++i)
1301 if (regno == i || regno == -1)
390c1522 1302 regcache_raw_supply (regcache, i, regs + i * 8);
98a8e1e5
RH
1303
1304 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
390c1522 1305 regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, NULL);
98a8e1e5
RH
1306
1307 if (regno == ALPHA_PC_REGNUM || regno == -1)
390c1522 1308 regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1309
1310 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
390c1522 1311 regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1312}
1313
1314void
390c1522
UW
1315alpha_fill_int_regs (const struct regcache *regcache,
1316 int regno, void *r0_r30, void *pc, void *unique)
98a8e1e5 1317{
2a1ce6ec 1318 gdb_byte *regs = r0_r30;
98a8e1e5
RH
1319 int i;
1320
1321 for (i = 0; i < 31; ++i)
1322 if (regno == i || regno == -1)
390c1522 1323 regcache_raw_collect (regcache, i, regs + i * 8);
98a8e1e5
RH
1324
1325 if (regno == ALPHA_PC_REGNUM || regno == -1)
390c1522 1326 regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1327
1328 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
390c1522 1329 regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1330}
1331
1332void
390c1522
UW
1333alpha_supply_fp_regs (struct regcache *regcache, int regno,
1334 const void *f0_f30, const void *fpcr)
98a8e1e5 1335{
2a1ce6ec 1336 const gdb_byte *regs = f0_f30;
98a8e1e5
RH
1337 int i;
1338
1339 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1340 if (regno == i || regno == -1)
390c1522 1341 regcache_raw_supply (regcache, i,
2a1ce6ec 1342 regs + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1343
1344 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
390c1522 1345 regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1346}
1347
1348void
390c1522
UW
1349alpha_fill_fp_regs (const struct regcache *regcache,
1350 int regno, void *f0_f30, void *fpcr)
98a8e1e5 1351{
2a1ce6ec 1352 gdb_byte *regs = f0_f30;
98a8e1e5
RH
1353 int i;
1354
1355 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1356 if (regno == i || regno == -1)
390c1522 1357 regcache_raw_collect (regcache, i,
2a1ce6ec 1358 regs + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1359
1360 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
390c1522 1361 regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1362}
1363
d2427a71 1364\f
0de94d4b
JB
1365
1366/* Return nonzero if the G_floating register value in REG is equal to
1367 zero for FP control instructions. */
1368
1369static int
1370fp_register_zero_p (LONGEST reg)
1371{
1372 /* Check that all bits except the sign bit are zero. */
1373 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1374
1375 return ((reg & zero_mask) == 0);
1376}
1377
1378/* Return the value of the sign bit for the G_floating register
1379 value held in REG. */
1380
1381static int
1382fp_register_sign_bit (LONGEST reg)
1383{
1384 const LONGEST sign_mask = (LONGEST) 1 << 63;
1385
1386 return ((reg & sign_mask) != 0);
1387}
1388
ec32e4be
JT
1389/* alpha_software_single_step() is called just before we want to resume
1390 the inferior, if we want to single-step it but there is no hardware
1391 or kernel single-step support (NetBSD on Alpha, for example). We find
e0cd558a 1392 the target of the coming instruction and breakpoint it. */
ec32e4be
JT
1393
1394static CORE_ADDR
0b1b3e42 1395alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
ec32e4be
JT
1396{
1397 unsigned int insn;
1398 unsigned int op;
551e4f2e 1399 int regno;
ec32e4be
JT
1400 int offset;
1401 LONGEST rav;
1402
b21fd293 1403 insn = alpha_read_insn (pc);
ec32e4be
JT
1404
1405 /* Opcode is top 6 bits. */
1406 op = (insn >> 26) & 0x3f;
1407
1408 if (op == 0x1a)
1409 {
1410 /* Jump format: target PC is:
1411 RB & ~3 */
0b1b3e42 1412 return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
ec32e4be
JT
1413 }
1414
1415 if ((op & 0x30) == 0x30)
1416 {
1417 /* Branch format: target PC is:
1418 (new PC) + (4 * sext(displacement)) */
1419 if (op == 0x30 || /* BR */
1420 op == 0x34) /* BSR */
1421 {
1422 branch_taken:
1423 offset = (insn & 0x001fffff);
1424 if (offset & 0x00100000)
1425 offset |= 0xffe00000;
e8d2d628
MK
1426 offset *= ALPHA_INSN_SIZE;
1427 return (pc + ALPHA_INSN_SIZE + offset);
ec32e4be
JT
1428 }
1429
1430 /* Need to determine if branch is taken; read RA. */
551e4f2e
JB
1431 regno = (insn >> 21) & 0x1f;
1432 switch (op)
1433 {
1434 case 0x31: /* FBEQ */
1435 case 0x36: /* FBGE */
1436 case 0x37: /* FBGT */
1437 case 0x33: /* FBLE */
1438 case 0x32: /* FBLT */
1439 case 0x35: /* FBNE */
ec7cc0e8 1440 regno += gdbarch_fp0_regnum (get_frame_arch (frame));
551e4f2e
JB
1441 }
1442
0b1b3e42 1443 rav = get_frame_register_signed (frame, regno);
0de94d4b 1444
ec32e4be
JT
1445 switch (op)
1446 {
1447 case 0x38: /* BLBC */
1448 if ((rav & 1) == 0)
1449 goto branch_taken;
1450 break;
1451 case 0x3c: /* BLBS */
1452 if (rav & 1)
1453 goto branch_taken;
1454 break;
1455 case 0x39: /* BEQ */
1456 if (rav == 0)
1457 goto branch_taken;
1458 break;
1459 case 0x3d: /* BNE */
1460 if (rav != 0)
1461 goto branch_taken;
1462 break;
1463 case 0x3a: /* BLT */
1464 if (rav < 0)
1465 goto branch_taken;
1466 break;
1467 case 0x3b: /* BLE */
1468 if (rav <= 0)
1469 goto branch_taken;
1470 break;
1471 case 0x3f: /* BGT */
1472 if (rav > 0)
1473 goto branch_taken;
1474 break;
1475 case 0x3e: /* BGE */
1476 if (rav >= 0)
1477 goto branch_taken;
1478 break;
d2427a71 1479
0de94d4b
JB
1480 /* Floating point branches. */
1481
1482 case 0x31: /* FBEQ */
1483 if (fp_register_zero_p (rav))
1484 goto branch_taken;
1485 break;
1486 case 0x36: /* FBGE */
1487 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1488 goto branch_taken;
1489 break;
1490 case 0x37: /* FBGT */
1491 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1492 goto branch_taken;
1493 break;
1494 case 0x33: /* FBLE */
1495 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1496 goto branch_taken;
1497 break;
1498 case 0x32: /* FBLT */
1499 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1500 goto branch_taken;
1501 break;
1502 case 0x35: /* FBNE */
1503 if (! fp_register_zero_p (rav))
1504 goto branch_taken;
1505 break;
ec32e4be
JT
1506 }
1507 }
1508
1509 /* Not a branch or branch not taken; target PC is:
1510 pc + 4 */
e8d2d628 1511 return (pc + ALPHA_INSN_SIZE);
ec32e4be
JT
1512}
1513
e6590a1b 1514int
0b1b3e42 1515alpha_software_single_step (struct frame_info *frame)
ec32e4be 1516{
e0cd558a 1517 CORE_ADDR pc, next_pc;
ec32e4be 1518
0b1b3e42
UW
1519 pc = get_frame_pc (frame);
1520 next_pc = alpha_next_pc (frame, pc);
ec32e4be 1521
e0cd558a 1522 insert_single_step_breakpoint (next_pc);
e6590a1b 1523 return 1;
c906108c
SS
1524}
1525
dc129d82 1526\f
dc129d82
JT
1527/* Initialize the current architecture based on INFO. If possible, re-use an
1528 architecture from ARCHES, which is a list of architectures already created
1529 during this debugging session.
1530
1531 Called e.g. at program startup, when reading a core file, and when reading
1532 a binary file. */
1533
1534static struct gdbarch *
1535alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1536{
1537 struct gdbarch_tdep *tdep;
1538 struct gdbarch *gdbarch;
dc129d82
JT
1539
1540 /* Try to determine the ABI of the object we are loading. */
4be87837 1541 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1542 {
4be87837
DJ
1543 /* If it's an ECOFF file, assume it's OSF/1. */
1544 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1545 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1546 }
1547
1548 /* Find a candidate among extant architectures. */
4be87837
DJ
1549 arches = gdbarch_list_lookup_by_info (arches, &info);
1550 if (arches != NULL)
1551 return arches->gdbarch;
dc129d82
JT
1552
1553 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1554 gdbarch = gdbarch_alloc (&info, tdep);
1555
d2427a71
RH
1556 /* Lowest text address. This is used by heuristic_proc_start()
1557 to decide when to stop looking. */
594706e6 1558 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
d9b023cc 1559
36a6271d 1560 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1561 tdep->sigcontext_addr = NULL;
138e7be5
MK
1562 tdep->sc_pc_offset = 2 * 8;
1563 tdep->sc_regs_offset = 4 * 8;
1564 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
36a6271d 1565
accc6d1f
JT
1566 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1567
9823e921
RH
1568 tdep->return_in_memory = alpha_return_in_memory_always;
1569
dc129d82
JT
1570 /* Type sizes */
1571 set_gdbarch_short_bit (gdbarch, 16);
1572 set_gdbarch_int_bit (gdbarch, 32);
1573 set_gdbarch_long_bit (gdbarch, 64);
1574 set_gdbarch_long_long_bit (gdbarch, 64);
1575 set_gdbarch_float_bit (gdbarch, 32);
1576 set_gdbarch_double_bit (gdbarch, 64);
1577 set_gdbarch_long_double_bit (gdbarch, 64);
1578 set_gdbarch_ptr_bit (gdbarch, 64);
1579
1580 /* Register info */
1581 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1582 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1583 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1584 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1585
1586 set_gdbarch_register_name (gdbarch, alpha_register_name);
c483c494 1587 set_gdbarch_register_type (gdbarch, alpha_register_type);
dc129d82
JT
1588
1589 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1590 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1591
c483c494
RH
1592 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1593 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1594 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
dc129d82 1595
615967cb
RH
1596 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1597
d2427a71 1598 /* Prologue heuristics. */
dc129d82
JT
1599 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1600
5ef165c2
RH
1601 /* Disassembler. */
1602 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1603
d2427a71 1604 /* Call info. */
dc129d82 1605
9823e921 1606 set_gdbarch_return_value (gdbarch, alpha_return_value);
dc129d82
JT
1607
1608 /* Settings for calling functions in the inferior. */
c88e30c0 1609 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1610
1611 /* Methods for saving / extracting a dummy frame's ID. */
1612 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
d2427a71
RH
1613
1614 /* Return the unwound PC value. */
1615 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1616
1617 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1618 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1619
95b80706 1620 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
e8d2d628 1621 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
9d519230 1622 set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
95b80706 1623
44dffaac 1624 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1625 gdbarch_init_osabi (info, gdbarch);
44dffaac 1626
accc6d1f
JT
1627 /* Now that we have tuned the configuration, set a few final things
1628 based on what the OS ABI has told us. */
1629
1630 if (tdep->jb_pc >= 0)
1631 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1632
336d1bba
AC
1633 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer);
1634 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer);
dc129d82 1635
d2427a71 1636 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1637
d2427a71 1638 return gdbarch;
dc129d82
JT
1639}
1640
baa490c4
RH
1641void
1642alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1643{
336d1bba
AC
1644 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1645 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
baa490c4
RH
1646}
1647
a78f21af
AC
1648extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1649
c906108c 1650void
fba45db2 1651_initialize_alpha_tdep (void)
c906108c
SS
1652{
1653 struct cmd_list_element *c;
1654
d2427a71 1655 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1656
1657 /* Let the user set the fence post for heuristic_proc_start. */
1658
1659 /* We really would like to have both "0" and "unlimited" work, but
1660 command.c doesn't deal with that. So make it a var_zinteger
1661 because the user can always use "999999" or some such for unlimited. */
edefbb7c
AC
1662 /* We need to throw away the frame cache when we set this, since it
1663 might change our ability to get backtraces. */
1664 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
7915a72c
AC
1665 &heuristic_fence_post, _("\
1666Set the distance searched for the start of a function."), _("\
1667Show the distance searched for the start of a function."), _("\
c906108c
SS
1668If you are debugging a stripped executable, GDB needs to search through the\n\
1669program for the start of a function. This command sets the distance of the\n\
323e0a4a 1670search. The only need to set it is when debugging a stripped executable."),
2c5b56ce 1671 reinit_frame_cache_sfunc,
7915a72c 1672 NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */
edefbb7c 1673 &setlist, &showlist);
c906108c 1674}