opcodes/riscv-dis.c

   1 /* RISC-V disassembler
   2    Copyright (C) 2011-2021 Free Software Foundation, Inc.
   3
   4    Contributed by Andrew Waterman (andrew@sifive.com).
   5    Based on MIPS target.
   6
   7    This file is part of the GNU opcodes library.
   8
   9    This library is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; see the file COPYING3. If not,
  21    see <http://www.gnu.org/licenses/>.  */
  22
  23 #include "sysdep.h"
  24 #include "disassemble.h"
  25 #include "libiberty.h"
  26 #include "opcode/riscv.h"
  27 #include "opintl.h"
  28 #include "elf-bfd.h"
  29 #include "elf/riscv.h"
  30 #include "cpu-riscv.h"
  31
  32 #include <stdint.h>
  33 #include <ctype.h>
  34
  35 static enum riscv_spec_class default_priv_spec = PRIV_SPEC_CLASS_NONE;
  36
  37 struct riscv_private_data
  38 {
  39   bfd_vma gp;
  40   bfd_vma print_addr;
  41   bfd_vma hi_addr[OP_MASK_RD + 1];
  42 };
  43
  44 static const char * const *riscv_gpr_names;
  45 static const char * const *riscv_fpr_names;
  46
  47 /* If set, disassemble as most general instruction.  */
  48 static int no_aliases;
  49
  50 static void
  51 set_default_riscv_dis_options (void)
  52 {
  53   riscv_gpr_names = riscv_gpr_names_abi;
  54   riscv_fpr_names = riscv_fpr_names_abi;
  55   no_aliases = 0;
  56 }
  57
  58 static bool
  59 parse_riscv_dis_option_without_args (const char *option)
  60 {
  61   if (strcmp (option, "no-aliases") == 0)
  62     no_aliases = 1;
  63   else if (strcmp (option, "numeric") == 0)
  64     {
  65       riscv_gpr_names = riscv_gpr_names_numeric;
  66       riscv_fpr_names = riscv_fpr_names_numeric;
  67     }
  68   else
  69     return false;
  70   return true;
  71 }
  72
  73 static void
  74 parse_riscv_dis_option (const char *option)
  75 {
  76   char *equal, *value;
  77
  78   if (parse_riscv_dis_option_without_args (option))
  79     return;
  80
  81   equal = strchr (option, '=');
  82   if (equal == NULL)
  83     {
  84       /* The option without '=' should be defined above.  */
  85       opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
  86       return;
  87     }
  88   if (equal == option
  89       || *(equal + 1) == '\0')
  90     {
  91       /* Invalid options with '=', no option name before '=',
  92        and no value after '='.  */
  93       opcodes_error_handler (_("unrecognized disassembler option with '=': %s"),
  94                             option);
  95       return;
  96     }
  97
  98   *equal = '\0';
  99   value = equal + 1;
 100   if (strcmp (option, "priv-spec") == 0)
 101     {
 102       enum riscv_spec_class priv_spec = PRIV_SPEC_CLASS_NONE;
 103       const char *name = NULL;
 104
 105       RISCV_GET_PRIV_SPEC_CLASS (value, priv_spec);
 106       if (priv_spec == PRIV_SPEC_CLASS_NONE)
 107         opcodes_error_handler (_("unknown privileged spec set by %s=%s"),
 108                                option, value);
 109       else if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
 110         default_priv_spec = priv_spec;
 111       else if (default_priv_spec != priv_spec)
 112         {
 113           RISCV_GET_PRIV_SPEC_NAME (name, default_priv_spec);
 114           opcodes_error_handler (_("mis-matched privilege spec set by %s=%s, "
 115                                    "the elf privilege attribute is %s"),
 116                                  option, value, name);
 117         }
 118     }
 119   else
 120     {
 121       /* xgettext:c-format */
 122       opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
 123     }
 124 }
 125
 126 static void
 127 parse_riscv_dis_options (const char *opts_in)
 128 {
 129   char *opts = xstrdup (opts_in), *opt = opts, *opt_end = opts;
 130
 131   set_default_riscv_dis_options ();
 132
 133   for ( ; opt_end != NULL; opt = opt_end + 1)
 134     {
 135       if ((opt_end = strchr (opt, ',')) != NULL)
 136         *opt_end = 0;
 137       parse_riscv_dis_option (opt);
 138     }
 139
 140   free (opts);
 141 }
 142
 143 /* Print one argument from an array.  */
 144
 145 static void
 146 arg_print (struct disassemble_info *info, unsigned long val,
 147            const char* const* array, size_t size)
 148 {
 149   const char *s = val >= size || array[val] == NULL ? "unknown" : array[val];
 150   (*info->fprintf_func) (info->stream, "%s", s);
 151 }
 152
 153 static void
 154 maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset)
 155 {
 156   if (pd->hi_addr[base_reg] != (bfd_vma)-1)
 157     {
 158       pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset;
 159       pd->hi_addr[base_reg] = -1;
 160     }
 161   else if (base_reg == X_GP && pd->gp != (bfd_vma)-1)
 162     pd->print_addr = pd->gp + offset;
 163   else if (base_reg == X_TP || base_reg == 0)
 164     pd->print_addr = offset;
 165 }
 166
 167 /* Print insn arguments for 32/64-bit code.  */
 168
 169 static void
 170 print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
 171 {
 172   struct riscv_private_data *pd = info->private_data;
 173   int rs1 = (l >> OP_SH_RS1) & OP_MASK_RS1;
 174   int rd = (l >> OP_SH_RD) & OP_MASK_RD;
 175   fprintf_ftype print = info->fprintf_func;
 176
 177   if (*d != '\0')
 178     print (info->stream, "\t");
 179
 180   for (; *d != '\0'; d++)
 181     {
 182       switch (*d)
 183         {
 184         case 'C': /* RVC */
 185           switch (*++d)
 186             {
 187             case 's': /* RS1 x8-x15.  */
 188             case 'w': /* RS1 x8-x15.  */
 189               print (info->stream, "%s",
 190                      riscv_gpr_names[EXTRACT_OPERAND (CRS1S, l) + 8]);
 191               break;
 192             case 't': /* RS2 x8-x15.  */
 193             case 'x': /* RS2 x8-x15.  */
 194               print (info->stream, "%s",
 195                      riscv_gpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
 196               break;
 197             case 'U': /* RS1, constrained to equal RD.  */
 198               print (info->stream, "%s", riscv_gpr_names[rd]);
 199               break;
 200             case 'c': /* RS1, constrained to equal sp.  */
 201               print (info->stream, "%s", riscv_gpr_names[X_SP]);
 202               break;
 203             case 'V': /* RS2 */
 204               print (info->stream, "%s",
 205                      riscv_gpr_names[EXTRACT_OPERAND (CRS2, l)]);
 206               break;
 207             case 'o':
 208             case 'j':
 209               print (info->stream, "%d", (int)EXTRACT_CITYPE_IMM (l));
 210               break;
 211             case 'k':
 212               print (info->stream, "%d", (int)EXTRACT_CLTYPE_LW_IMM (l));
 213               break;
 214             case 'l':
 215               print (info->stream, "%d", (int)EXTRACT_CLTYPE_LD_IMM (l));
 216               break;
 217             case 'm':
 218               print (info->stream, "%d", (int)EXTRACT_CITYPE_LWSP_IMM (l));
 219               break;
 220             case 'n':
 221               print (info->stream, "%d", (int)EXTRACT_CITYPE_LDSP_IMM (l));
 222               break;
 223             case 'K':
 224               print (info->stream, "%d", (int)EXTRACT_CIWTYPE_ADDI4SPN_IMM (l));
 225               break;
 226             case 'L':
 227               print (info->stream, "%d", (int)EXTRACT_CITYPE_ADDI16SP_IMM (l));
 228               break;
 229             case 'M':
 230               print (info->stream, "%d", (int)EXTRACT_CSSTYPE_SWSP_IMM (l));
 231               break;
 232             case 'N':
 233               print (info->stream, "%d", (int)EXTRACT_CSSTYPE_SDSP_IMM (l));
 234               break;
 235             case 'p':
 236               info->target = EXTRACT_CBTYPE_IMM (l) + pc;
 237               (*info->print_address_func) (info->target, info);
 238               break;
 239             case 'a':
 240               info->target = EXTRACT_CJTYPE_IMM (l) + pc;
 241               (*info->print_address_func) (info->target, info);
 242               break;
 243             case 'u':
 244               print (info->stream, "0x%x",
 245                      (int)(EXTRACT_CITYPE_IMM (l) & (RISCV_BIGIMM_REACH-1)));
 246               break;
 247             case '>':
 248               print (info->stream, "0x%x", (int)EXTRACT_CITYPE_IMM (l) & 0x3f);
 249               break;
 250             case '<':
 251               print (info->stream, "0x%x", (int)EXTRACT_CITYPE_IMM (l) & 0x1f);
 252               break;
 253             case 'T': /* Floating-point RS2.  */
 254               print (info->stream, "%s",
 255                      riscv_fpr_names[EXTRACT_OPERAND (CRS2, l)]);
 256               break;
 257             case 'D': /* Floating-point RS2 x8-x15.  */
 258               print (info->stream, "%s",
 259                      riscv_fpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
 260               break;
 261             }
 262           break;
 263
 264         case ',':
 265         case '(':
 266         case ')':
 267         case '[':
 268         case ']':
 269           print (info->stream, "%c", *d);
 270           break;
 271
 272         case '0':
 273           /* Only print constant 0 if it is the last argument.  */
 274           if (!d[1])
 275             print (info->stream, "0");
 276           break;
 277
 278         case 'b':
 279         case 's':
 280           if ((l & MASK_JALR) == MATCH_JALR)
 281             maybe_print_address (pd, rs1, 0);
 282           print (info->stream, "%s", riscv_gpr_names[rs1]);
 283           break;
 284
 285         case 't':
 286           print (info->stream, "%s",
 287                  riscv_gpr_names[EXTRACT_OPERAND (RS2, l)]);
 288           break;
 289
 290         case 'u':
 291           print (info->stream, "0x%x",
 292                  (unsigned)EXTRACT_UTYPE_IMM (l) >> RISCV_IMM_BITS);
 293           break;
 294
 295         case 'm':
 296           arg_print (info, EXTRACT_OPERAND (RM, l),
 297                      riscv_rm, ARRAY_SIZE (riscv_rm));
 298           break;
 299
 300         case 'P':
 301           arg_print (info, EXTRACT_OPERAND (PRED, l),
 302                      riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
 303           break;
 304
 305         case 'Q':
 306           arg_print (info, EXTRACT_OPERAND (SUCC, l),
 307                      riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
 308           break;
 309
 310         case 'o':
 311           maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l));
 312           /* Fall through.  */
 313         case 'j':
 314           if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0)
 315               || (l & MASK_JALR) == MATCH_JALR)
 316             maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l));
 317           print (info->stream, "%d", (int)EXTRACT_ITYPE_IMM (l));
 318           break;
 319
 320         case 'q':
 321           maybe_print_address (pd, rs1, EXTRACT_STYPE_IMM (l));
 322           print (info->stream, "%d", (int)EXTRACT_STYPE_IMM (l));
 323           break;
 324
 325         case 'a':
 326           info->target = EXTRACT_JTYPE_IMM (l) + pc;
 327           (*info->print_address_func) (info->target, info);
 328           break;
 329
 330         case 'p':
 331           info->target = EXTRACT_BTYPE_IMM (l) + pc;
 332           (*info->print_address_func) (info->target, info);
 333           break;
 334
 335         case 'd':
 336           if ((l & MASK_AUIPC) == MATCH_AUIPC)
 337             pd->hi_addr[rd] = pc + EXTRACT_UTYPE_IMM (l);
 338           else if ((l & MASK_LUI) == MATCH_LUI)
 339             pd->hi_addr[rd] = EXTRACT_UTYPE_IMM (l);
 340           else if ((l & MASK_C_LUI) == MATCH_C_LUI)
 341             pd->hi_addr[rd] = EXTRACT_CITYPE_LUI_IMM (l);
 342           print (info->stream, "%s", riscv_gpr_names[rd]);
 343           break;
 344
 345         case 'z':
 346           print (info->stream, "%s", riscv_gpr_names[0]);
 347           break;
 348
 349         case '>':
 350           print (info->stream, "0x%x", (int)EXTRACT_OPERAND (SHAMT, l));
 351           break;
 352
 353         case '<':
 354           print (info->stream, "0x%x", (int)EXTRACT_OPERAND (SHAMTW, l));
 355           break;
 356
 357         case 'S':
 358         case 'U':
 359           print (info->stream, "%s", riscv_fpr_names[rs1]);
 360           break;
 361
 362         case 'T':
 363           print (info->stream, "%s", riscv_fpr_names[EXTRACT_OPERAND (RS2, l)]);
 364           break;
 365
 366         case 'D':
 367           print (info->stream, "%s", riscv_fpr_names[rd]);
 368           break;
 369
 370         case 'R':
 371           print (info->stream, "%s", riscv_fpr_names[EXTRACT_OPERAND (RS3, l)]);
 372           break;
 373
 374         case 'E':
 375           {
 376             static const char *riscv_csr_hash[4096]; /* Total 2^12 CSRs.  */
 377             static bool init_csr = false;
 378             unsigned int csr = EXTRACT_OPERAND (CSR, l);
 379
 380             if (!init_csr)
 381               {
 382                 unsigned int i;
 383                 for (i = 0; i < 4096; i++)
 384                   riscv_csr_hash[i] = NULL;
 385
 386                 /* Set to the newest privileged version.  */
 387                 if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
 388                   default_priv_spec = PRIV_SPEC_CLASS_DRAFT - 1;
 389
 390 #define DECLARE_CSR(name, num, class, define_version, abort_version)    \
 391                 if (riscv_csr_hash[num] == NULL                         \
 392                     && ((define_version == PRIV_SPEC_CLASS_NONE         \
 393                          && abort_version == PRIV_SPEC_CLASS_NONE)      \
 394                         || (default_priv_spec >= define_version         \
 395                             && default_priv_spec < abort_version)))     \
 396                   riscv_csr_hash[num] = #name;
 397 #define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
 398                 DECLARE_CSR (name, num, class, define_version, abort_version)
 399 #include "opcode/riscv-opc.h"
 400 #undef DECLARE_CSR
 401               }
 402
 403             if (riscv_csr_hash[csr] != NULL)
 404               print (info->stream, "%s", riscv_csr_hash[csr]);
 405             else
 406               print (info->stream, "0x%x", csr);
 407             break;
 408           }
 409
 410         case 'Z':
 411           print (info->stream, "%d", rs1);
 412           break;
 413
 414         default:
 415           /* xgettext:c-format */
 416           print (info->stream, _("# internal error, undefined modifier (%c)"),
 417                  *d);
 418           return;
 419         }
 420     }
 421 }
 422
 423 /* Print the RISC-V instruction at address MEMADDR in debugged memory,
 424    on using INFO.  Returns length of the instruction, in bytes.
 425    BIGENDIAN must be 1 if this is big-endian code, 0 if
 426    this is little-endian code.  */
 427
 428 static int
 429 riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
 430 {
 431   const struct riscv_opcode *op;
 432   static bool init = 0;
 433   static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1];
 434   struct riscv_private_data *pd;
 435   int insnlen;
 436
 437 #define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP))
 438
 439   /* Build a hash table to shorten the search time.  */
 440   if (! init)
 441     {
 442       for (op = riscv_opcodes; op->name; op++)
 443         if (!riscv_hash[OP_HASH_IDX (op->match)])
 444           riscv_hash[OP_HASH_IDX (op->match)] = op;
 445
 446       init = 1;
 447     }
 448
 449   if (info->private_data == NULL)
 450     {
 451       int i;
 452
 453       pd = info->private_data = xcalloc (1, sizeof (struct riscv_private_data));
 454       pd->gp = -1;
 455       pd->print_addr = -1;
 456       for (i = 0; i < (int)ARRAY_SIZE (pd->hi_addr); i++)
 457         pd->hi_addr[i] = -1;
 458
 459       for (i = 0; i < info->symtab_size; i++)
 460         if (strcmp (bfd_asymbol_name (info->symtab[i]), RISCV_GP_SYMBOL) == 0)
 461           pd->gp = bfd_asymbol_value (info->symtab[i]);
 462     }
 463   else
 464     pd = info->private_data;
 465
 466   insnlen = riscv_insn_length (word);
 467
 468   /* RISC-V instructions are always little-endian.  */
 469   info->endian_code = BFD_ENDIAN_LITTLE;
 470
 471   info->bytes_per_chunk = insnlen % 4 == 0 ? 4 : 2;
 472   info->bytes_per_line = 8;
 473   /* We don't support constant pools, so this must be code.  */
 474   info->display_endian = info->endian_code;
 475   info->insn_info_valid = 1;
 476   info->branch_delay_insns = 0;
 477   info->data_size = 0;
 478   info->insn_type = dis_nonbranch;
 479   info->target = 0;
 480   info->target2 = 0;
 481
 482   op = riscv_hash[OP_HASH_IDX (word)];
 483   if (op != NULL)
 484     {
 485       unsigned xlen = 0;
 486
 487       /* If XLEN is not known, get its value from the ELF class.  */
 488       if (info->mach == bfd_mach_riscv64)
 489         xlen = 64;
 490       else if (info->mach == bfd_mach_riscv32)
 491         xlen = 32;
 492       else if (info->section != NULL)
 493         {
 494           Elf_Internal_Ehdr *ehdr = elf_elfheader (info->section->owner);
 495           xlen = ehdr->e_ident[EI_CLASS] == ELFCLASS64 ? 64 : 32;
 496         }
 497
 498       for (; op->name; op++)
 499         {
 500           /* Does the opcode match?  */
 501           if (! (op->match_func) (op, word))
 502             continue;
 503           /* Is this a pseudo-instruction and may we print it as such?  */
 504           if (no_aliases && (op->pinfo & INSN_ALIAS))
 505             continue;
 506           /* Is this instruction restricted to a certain value of XLEN?  */
 507           if ((op->xlen_requirement != 0) && (op->xlen_requirement != xlen))
 508             continue;
 509
 510           /* It's a match.  */
 511           (*info->fprintf_func) (info->stream, "%s", op->name);
 512           print_insn_args (op->args, word, memaddr, info);
 513
 514           /* Try to disassemble multi-instruction addressing sequences.  */
 515           if (pd->print_addr != (bfd_vma)-1)
 516             {
 517               info->target = pd->print_addr;
 518               (*info->fprintf_func) (info->stream, " # ");
 519               (*info->print_address_func) (info->target, info);
 520               pd->print_addr = -1;
 521             }
 522
 523           /* Finish filling out insn_info fields.  */
 524           switch (op->pinfo & INSN_TYPE)
 525             {
 526             case INSN_BRANCH:
 527               info->insn_type = dis_branch;
 528               break;
 529             case INSN_CONDBRANCH:
 530               info->insn_type = dis_condbranch;
 531               break;
 532             case INSN_JSR:
 533               info->insn_type = dis_jsr;
 534               break;
 535             case INSN_DREF:
 536               info->insn_type = dis_dref;
 537               break;
 538             default:
 539               break;
 540             }
 541
 542           if (op->pinfo & INSN_DATA_SIZE)
 543             {
 544               int size = ((op->pinfo & INSN_DATA_SIZE)
 545                           >> INSN_DATA_SIZE_SHIFT);
 546               info->data_size = 1 << (size - 1);
 547             }
 548
 549           return insnlen;
 550         }
 551     }
 552
 553   /* We did not find a match, so just print the instruction bits.  */
 554   info->insn_type = dis_noninsn;
 555   (*info->fprintf_func) (info->stream, "0x%llx", (unsigned long long)word);
 556   return insnlen;
 557 }
 558
 559 int
 560 print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info)
 561 {
 562   bfd_byte packet[2];
 563   insn_t insn = 0;
 564   bfd_vma n;
 565   int status;
 566
 567   if (info->disassembler_options != NULL)
 568     {
 569       parse_riscv_dis_options (info->disassembler_options);
 570       /* Avoid repeatedly parsing the options.  */
 571       info->disassembler_options = NULL;
 572     }
 573   else if (riscv_gpr_names == NULL)
 574     set_default_riscv_dis_options ();
 575
 576   /* Instructions are a sequence of 2-byte packets in little-endian order.  */
 577   for (n = 0; n < sizeof (insn) && n < riscv_insn_length (insn); n += 2)
 578     {
 579       status = (*info->read_memory_func) (memaddr + n, packet, 2, info);
 580       if (status != 0)
 581         {
 582           /* Don't fail just because we fell off the end.  */
 583           if (n > 0)
 584             break;
 585           (*info->memory_error_func) (status, memaddr, info);
 586           return status;
 587         }
 588
 589       insn |= ((insn_t) bfd_getl16 (packet)) << (8 * n);
 590     }
 591
 592   return riscv_disassemble_insn (memaddr, insn, info);
 593 }
 594
 595 disassembler_ftype
 596 riscv_get_disassembler (bfd *abfd)
 597 {
 598   if (abfd)
 599     {
 600       const char *sec_name = get_elf_backend_data (abfd)->obj_attrs_section;
 601       if (bfd_get_section_by_name (abfd, sec_name) != NULL)
 602         {
 603           obj_attribute *attr = elf_known_obj_attributes_proc (abfd);
 604           unsigned int Tag_a = Tag_RISCV_priv_spec;
 605           unsigned int Tag_b = Tag_RISCV_priv_spec_minor;
 606           unsigned int Tag_c = Tag_RISCV_priv_spec_revision;
 607           riscv_get_priv_spec_class_from_numbers (attr[Tag_a].i,
 608                                                   attr[Tag_b].i,
 609                                                   attr[Tag_c].i,
 610                                                   &default_priv_spec);
 611         }
 612     }
 613    return print_insn_riscv;
 614 }
 615
 616 /* Prevent use of the fake labels that are generated as part of the DWARF
 617    and for relaxable relocations in the assembler.  */
 618
 619 bool
 620 riscv_symbol_is_valid (asymbol * sym,
 621                        struct disassemble_info * info ATTRIBUTE_UNUSED)
 622 {
 623   const char * name;
 624
 625   if (sym == NULL)
 626     return false;
 627
 628   name = bfd_asymbol_name (sym);
 629
 630   return (strcmp (name, RISCV_FAKE_LABEL_NAME) != 0);
 631 }
 632
 633 void
 634 print_riscv_disassembler_options (FILE *stream)
 635 {
 636   fprintf (stream, _("\n\
 637 The following RISC-V-specific disassembler options are supported for use\n\
 638 with the -M switch (multiple options should be separated by commas):\n"));
 639
 640   fprintf (stream, _("\n\
 641   numeric         Print numeric register names, rather than ABI names.\n"));
 642
 643   fprintf (stream, _("\n\
 644   no-aliases      Disassemble only into canonical instructions, rather\n\
 645                   than into pseudoinstructions.\n"));
 646
 647   fprintf (stream, _("\n\
 648   priv-spec=PRIV  Print the CSR according to the chosen privilege spec\n\
 649                   (1.9, 1.9.1, 1.10, 1.11).\n"));
 650
 651   fprintf (stream, _("\n"));
 652 }