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Updated pci.ids to today's snapshot
[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
4284af58 2 * The PCI Utilities -- List All PCI Devices
98e39e09 3 *
62e78fa6 4 * Copyright (c) 1997--2018 Martin Mares <mj@ucw.cz>
98e39e09
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
98e39e09 13
c7a34993 14#include "lspci.h"
98e39e09
MM
15
16/* Options */
17
c7a34993 18int verbose; /* Show detailed information */
a387042e 19static int opt_hex; /* Show contents of config space as hexadecimal numbers */
c7a34993 20struct pci_filter filter; /* Device filter */
ce22dfec 21static int opt_filter; /* Any filter was given */
a387042e 22static int opt_tree; /* Show bus tree */
62e78fa6 23static int opt_path; /* Show bridge path */
a387042e
MM
24static int opt_machine; /* Generate machine-readable output */
25static int opt_map_mode; /* Bus mapping mode enabled */
26static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
11339c0d 27static int opt_kernel; /* Show kernel drivers */
cca2f7c6
MM
28static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
29static int opt_query_all; /* Query the DNS for all entries */
c7a34993 30char *opt_pcimap; /* Override path to Linux modules.pcimap */
98e39e09 31
81afa98c
MM
32const char program_name[] = "lspci";
33
62e78fa6 34static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ;
cca2f7c6
MM
35
36static char help_msg[] =
37"Usage: lspci [<switches>]\n"
38"\n"
1b99a704
MM
39"Basic display modes:\n"
40"-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
41"-t\t\tShow bus tree\n"
42"\n"
43"Display options:\n"
44"-v\t\tBe verbose (-vv for very verbose)\n"
45#ifdef PCI_OS_LINUX
46"-k\t\tShow kernel drivers handling each device\n"
47#endif
48"-x\t\tShow hex-dump of the standard part of the config space\n"
49"-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
50"-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
51"-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
52"-D\t\tAlways show domain numbers\n"
62e78fa6
MM
53"-P\t\tDisplay bridge path in addition to bus and device number\n"
54"-PP\t\tDisplay bus path in addition to bus and device number\n"
1b99a704
MM
55"\n"
56"Resolving of device ID's to names:\n"
cca2f7c6
MM
57"-n\t\tShow numeric ID's\n"
58"-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
59#ifdef PCI_USE_DNS
60"-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
61"-qq\t\tAs above, but re-query locally cached entries\n"
62"-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
63#endif
1b99a704
MM
64"\n"
65"Selection of devices:\n"
cca2f7c6 66"-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
4d1c9525 67"-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
1b99a704
MM
68"\n"
69"Other options:\n"
cca2f7c6 70"-i <file>\tUse specified ID database instead of %s\n"
c1c952d2 71#ifdef PCI_OS_LINUX
cca2f7c6 72"-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
c1c952d2 73#endif
cca2f7c6 74"-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
1b99a704
MM
75"\n"
76"PCI access options:\n"
727ce158
MM
77GENERIC_HELP
78;
98e39e09 79
a387042e 80/*** Our view of the PCI bus ***/
98e39e09 81
c7a34993
MM
82struct pci_access *pacc;
83struct device *first_dev;
934e7e36 84static int seen_errors;
ce22dfec 85static int need_topology;
98e39e09 86
c7a34993 87int
ec25b52d
MM
88config_fetch(struct device *d, unsigned int pos, unsigned int len)
89{
90 unsigned int end = pos+len;
91 int result;
84d437d6
MM
92
93 while (pos < d->config_bufsize && len && d->present[pos])
94 pos++, len--;
95 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
96 len--;
97 if (!len)
ec25b52d 98 return 1;
84d437d6 99
ec25b52d
MM
100 if (end > d->config_bufsize)
101 {
84d437d6 102 int orig_size = d->config_bufsize;
ec25b52d
MM
103 while (end > d->config_bufsize)
104 d->config_bufsize *= 2;
105 d->config = xrealloc(d->config, d->config_bufsize);
84d437d6 106 d->present = xrealloc(d->present, d->config_bufsize);
1ac3a99d 107 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
ec25b52d
MM
108 }
109 result = pci_read_block(d->dev, pos, d->config + pos, len);
84d437d6
MM
110 if (result)
111 memset(d->present + pos, 1, len);
ec25b52d
MM
112 return result;
113}
114
c7a34993 115struct device *
1812a795
MM
116scan_device(struct pci_dev *p)
117{
1812a795
MM
118 struct device *d;
119
a387042e
MM
120 if (p->domain && !opt_domains)
121 opt_domains = 1;
ce22dfec 122 if (!pci_filter_match(&filter, p) && !need_topology)
1812a795
MM
123 return NULL;
124 d = xmalloc(sizeof(struct device));
1ac3a99d 125 memset(d, 0, sizeof(*d));
1812a795 126 d->dev = p;
84d437d6 127 d->config_cached = d->config_bufsize = 64;
ec25b52d 128 d->config = xmalloc(64);
84d437d6
MM
129 d->present = xmalloc(64);
130 memset(d->present, 1, 64);
09817437 131 if (!pci_read_block(p, 0, d->config, 64))
934e7e36
MM
132 {
133 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
134 p->domain, p->bus, p->dev, p->func);
135 seen_errors++;
136 return NULL;
137 }
09817437 138 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
1812a795 139 {
ec25b52d
MM
140 /* For cardbus bridges, we need to fetch 64 bytes more to get the
141 * full standard header... */
84d437d6
MM
142 if (config_fetch(d, 64, 64))
143 d->config_cached += 64;
1812a795 144 }
84d437d6 145 pci_setup_cache(p, d->config, d->config_cached);
ef6c9ec3 146 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
1812a795
MM
147 return d;
148}
149
98e39e09 150static void
727ce158 151scan_devices(void)
98e39e09
MM
152{
153 struct device *d;
727ce158 154 struct pci_dev *p;
98e39e09 155
727ce158 156 pci_scan_bus(pacc);
de7ef8bc 157 for (p=pacc->devices; p; p=p->next)
1812a795
MM
158 if (d = scan_device(p))
159 {
160 d->next = first_dev;
161 first_dev = d;
162 }
98e39e09
MM
163}
164
a387042e 165/*** Config space accesses ***/
98e39e09 166
84d437d6
MM
167static void
168check_conf_range(struct device *d, unsigned int pos, unsigned int len)
169{
170 while (len)
171 if (!d->present[pos])
172 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
173 else
174 pos++, len--;
175}
176
c7a34993 177byte
98e39e09
MM
178get_conf_byte(struct device *d, unsigned int pos)
179{
84d437d6 180 check_conf_range(d, pos, 1);
98e39e09
MM
181 return d->config[pos];
182}
183
c7a34993 184word
98e39e09
MM
185get_conf_word(struct device *d, unsigned int pos)
186{
84d437d6 187 check_conf_range(d, pos, 2);
98e39e09
MM
188 return d->config[pos] | (d->config[pos+1] << 8);
189}
190
c7a34993 191u32
98e39e09
MM
192get_conf_long(struct device *d, unsigned int pos)
193{
84d437d6 194 check_conf_range(d, pos, 4);
98e39e09
MM
195 return d->config[pos] |
196 (d->config[pos+1] << 8) |
197 (d->config[pos+2] << 16) |
198 (d->config[pos+3] << 24);
199}
200
a387042e 201/*** Sorting ***/
98e39e09
MM
202
203static int
204compare_them(const void *A, const void *B)
205{
727ce158
MM
206 const struct pci_dev *a = (*(const struct device **)A)->dev;
207 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09 208
84c8d1bb
MM
209 if (a->domain < b->domain)
210 return -1;
211 if (a->domain > b->domain)
212 return 1;
98e39e09
MM
213 if (a->bus < b->bus)
214 return -1;
215 if (a->bus > b->bus)
216 return 1;
727ce158
MM
217 if (a->dev < b->dev)
218 return -1;
219 if (a->dev > b->dev)
220 return 1;
221 if (a->func < b->func)
98e39e09 222 return -1;
727ce158 223 if (a->func > b->func)
98e39e09
MM
224 return 1;
225 return 0;
226}
227
228static void
229sort_them(void)
230{
727ce158 231 struct device **index, **h, **last_dev;
98e39e09
MM
232 int cnt;
233 struct device *d;
234
c7a34993
MM
235 cnt = 0;
236 for (d=first_dev; d; d=d->next)
237 cnt++;
238 h = index = alloca(sizeof(struct device *) * cnt);
239 for (d=first_dev; d; d=d->next)
240 *h++ = d;
241 qsort(index, cnt, sizeof(struct device *), compare_them);
242 last_dev = &first_dev;
243 h = index;
244 while (cnt--)
245 {
246 *last_dev = *h;
247 last_dev = &(*h)->next;
248 h++;
c1c952d2 249 }
c7a34993 250 *last_dev = NULL;
c1c952d2
MM
251}
252
c7a34993 253/*** Normal output ***/
11339c0d 254
62e78fa6
MM
255static void
256show_slot_path(struct device *d)
257{
258 struct pci_dev *p = d->dev;
259
260 if (opt_path)
261 {
262 struct bus *bus = d->parent_bus;
263 struct bridge *br = bus->parent_bridge;
264
265 if (br && br->br_dev)
266 {
267 show_slot_path(br->br_dev);
268 if (opt_path > 1)
269 printf("/%02x:%02x.%d", p->bus, p->dev, p->func);
270 else
271 printf("/%02x.%d", p->dev, p->func);
272 return;
273 }
274 }
275 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
276}
277
c7a34993
MM
278static void
279show_slot_name(struct device *d)
c1c952d2 280{
c7a34993 281 struct pci_dev *p = d->dev;
c1c952d2 282
c7a34993
MM
283 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
284 printf("%04x:", p->domain);
62e78fa6 285 show_slot_path(d);
c1c952d2
MM
286}
287
c7a34993
MM
288void
289get_subid(struct device *d, word *subvp, word *subdp)
c1c952d2 290{
c7a34993 291 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
11339c0d 292
c7a34993
MM
293 if (htype == PCI_HEADER_TYPE_NORMAL)
294 {
295 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
296 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
297 }
298 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
299 {
300 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
301 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
302 }
303 else
304 *subvp = *subdp = 0xffff;
c1c952d2
MM
305}
306
11339c0d 307static void
c7a34993 308show_terse(struct device *d)
11339c0d 309{
c7a34993
MM
310 int c;
311 struct pci_dev *p = d->dev;
312 char classbuf[128], devbuf[128];
11339c0d 313
c7a34993
MM
314 show_slot_name(d);
315 printf(" %s: %s",
316 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
317 PCI_LOOKUP_CLASS,
318 p->device_class),
319 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
320 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
321 p->vendor_id, p->device_id));
322 if (c = get_conf_byte(d, PCI_REVISION_ID))
323 printf(" (rev %02x)", c);
324 if (verbose)
325 {
326 char *x;
327 c = get_conf_byte(d, PCI_CLASS_PROG);
328 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
329 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
330 p->device_class, c);
331 if (c || x)
332 {
333 printf(" (prog-if %02x", c);
334 if (x)
335 printf(" [%s]", x);
336 putchar(')');
337 }
338 }
339 putchar('\n');
c1c952d2 340
c7a34993
MM
341 if (verbose || opt_kernel)
342 {
343 word subsys_v, subsys_d;
344 char ssnamebuf[256];
c1c952d2 345
2a39bc9e
VP
346 pci_fill_info(p, PCI_FILL_LABEL);
347
aecf5b35
TR
348 if (p->label)
349 printf("\tDeviceName: %s", p->label);
c7a34993
MM
350 get_subid(d, &subsys_v, &subsys_d);
351 if (subsys_v && subsys_v != 0xffff)
352 printf("\tSubsystem: %s\n",
353 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
354 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
355 p->vendor_id, p->device_id, subsys_v, subsys_d));
356 }
c1c952d2
MM
357}
358
a387042e
MM
359/*** Verbose output ***/
360
361static void
41d883cb 362show_size(u64 x)
a387042e 363{
0188807c 364 static const char suffix[][2] = { "", "K", "M", "G", "T" };
f2f8adaa 365 unsigned i;
a387042e
MM
366 if (!x)
367 return;
f2f8adaa 368 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
558f736b 369 if (x % 1024)
f2f8adaa
MW
370 break;
371 x /= 1024;
372 }
373 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
a387042e
MM
374}
375
41d883cb
MM
376static void
377show_range(char *prefix, u64 base, u64 limit, int is_64bit)
378{
379 if (base > limit)
380 {
381 if (!verbose)
382 return;
383 else if (verbose < 3)
384 {
385 printf("%s: None\n", prefix);
386 return;
387 }
388 }
389
390 printf("%s: ", prefix);
391 if (is_64bit)
3f30d0d1 392 printf("%016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit);
41d883cb
MM
393 else
394 printf("%08x-%08x", (unsigned) base, (unsigned) limit);
395 if (base <= limit)
396 show_size(limit - base + 1);
397 else
398 printf(" [empty]");
399 putchar('\n');
400}
401
a387042e
MM
402static void
403show_bases(struct device *d, int cnt)
404{
405 struct pci_dev *p = d->dev;
406 word cmd = get_conf_word(d, PCI_COMMAND);
407 int i;
659d438b 408 int virtual = 0;
a387042e 409
de7ef8bc 410 for (i=0; i<cnt; i++)
a387042e
MM
411 {
412 pciaddr_t pos = p->base_addr[i];
413 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
558f736b 414 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
a387042e
MM
415 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
416 if (flg == 0xffffffff)
417 flg = 0;
418 if (!pos && !flg && !len)
419 continue;
420 if (verbose > 1)
421 printf("\tRegion %d: ", i);
422 else
423 putchar('\t');
3d0a6d88 424 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b 425 printf("[enhanced] ");
4cd087d8 426 else if (pos && !(flg & ((flg & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)))
a387042e 427 {
4cd087d8 428 /* Reported by the OS, but not by the device */
a387042e
MM
429 printf("[virtual] ");
430 flg = pos;
659d438b 431 virtual = 1;
a387042e
MM
432 }
433 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
434 {
435 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
436 printf("I/O ports at ");
00bf6625 437 if (a || (cmd & PCI_COMMAND_IO))
a387042e
MM
438 printf(PCIADDR_PORT_FMT, a);
439 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
440 printf("<ignored>");
441 else
442 printf("<unassigned>");
659d438b 443 if (!virtual && !(cmd & PCI_COMMAND_IO))
a387042e
MM
444 printf(" [disabled]");
445 }
446 else
447 {
448 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
449 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
450 int done = 0;
451 u32 z = 0;
452
453 printf("Memory at ");
454 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
455 {
456 if (i >= cnt - 1)
457 {
458 printf("<invalid-64bit-slot>");
459 done = 1;
460 }
461 else
462 {
463 i++;
464 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
a387042e
MM
465 }
466 }
467 if (!done)
468 {
469 if (a)
470 printf(PCIADDR_T_FMT, a);
471 else
472 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
473 }
474 printf(" (%s, %sprefetchable)",
475 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
476 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
477 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
478 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
659d438b 479 if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
480 printf(" [disabled]");
481 }
482 show_size(len);
483 putchar('\n');
484 }
485}
486
487static void
488show_rom(struct device *d, int reg)
489{
490 struct pci_dev *p = d->dev;
491 pciaddr_t rom = p->rom_base_addr;
492 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
558f736b 493 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
a387042e
MM
494 u32 flg = get_conf_long(d, reg);
495 word cmd = get_conf_word(d, PCI_COMMAND);
659d438b 496 int virtual = 0;
a387042e
MM
497
498 if (!rom && !flg && !len)
499 return;
500 putchar('\t');
3d0a6d88 501 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b
SS
502 printf("[enhanced] ");
503 else if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
a387042e
MM
504 {
505 printf("[virtual] ");
506 flg = rom;
659d438b 507 virtual = 1;
a387042e
MM
508 }
509 printf("Expansion ROM at ");
510 if (rom & PCI_ROM_ADDRESS_MASK)
511 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
512 else if (flg & PCI_ROM_ADDRESS_MASK)
513 printf("<ignored>");
514 else
515 printf("<unassigned>");
516 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
517 printf(" [disabled]");
659d438b 518 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
519 printf(" [disabled by cmd]");
520 show_size(len);
521 putchar('\n');
522}
523
e95c8373
MM
524static void
525show_htype0(struct device *d)
526{
527 show_bases(d, 6);
6aa54f1b 528 show_rom(d, PCI_ROM_ADDRESS);
21510591 529 show_caps(d, PCI_CAPABILITY_LIST);
e95c8373
MM
530}
531
98e39e09
MM
532static void
533show_htype1(struct device *d)
534{
535 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
536 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
537 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
538 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
539 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
540 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
541 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
542 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
543 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
138c0385 544 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
98e39e09
MM
545 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
546
547 show_bases(d, 2);
548 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
549 get_conf_byte(d, PCI_PRIMARY_BUS),
550 get_conf_byte(d, PCI_SECONDARY_BUS),
551 get_conf_byte(d, PCI_SUBORDINATE_BUS),
552 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
553
554 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
555 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
556 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
557 else
558 {
559 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
560 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
561 if (io_type == PCI_IO_RANGE_TYPE_32)
562 {
563 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
564 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
565 }
41d883cb 566 show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0);
98e39e09
MM
567 }
568
569 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
570 mem_type)
571 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 572 else
98e39e09
MM
573 {
574 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
575 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
41d883cb 576 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0);
98e39e09
MM
577 }
578
579 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
580 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
581 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 582 else
98e39e09 583 {
41d883cb
MM
584 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
585 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
586 if (pref_type == PCI_PREF_RANGE_TYPE_64)
e306e911 587 {
41d883cb
MM
588 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
589 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
e306e911 590 }
41d883cb 591 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64));
98e39e09
MM
592 }
593
138c0385 594 if (verbose > 1)
c1c2c30e 595 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
138c0385
MM
596 FLAG(sec_stat, PCI_STATUS_66MHZ),
597 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
598 FLAG(sec_stat, PCI_STATUS_PARITY),
599 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
600 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
601 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
602 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
603 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
604 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
605 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
606 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
98e39e09 607
6aa54f1b 608 show_rom(d, PCI_ROM_ADDRESS1);
98e39e09
MM
609
610 if (verbose > 1)
da322bfb 611 {
b2a45526 612 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
da322bfb
MM
613 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
614 FLAG(brc, PCI_BRIDGE_CTL_SERR),
615 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
616 FLAG(brc, PCI_BRIDGE_CTL_VGA),
b2a45526 617 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
da322bfb
MM
618 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
619 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
620 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
621 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
622 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
623 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
624 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
625 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
626 }
e95c8373 627
21510591 628 show_caps(d, PCI_CAPABILITY_LIST);
98e39e09
MM
629}
630
2f48f637
MM
631static void
632show_htype2(struct device *d)
633{
96e4f295
MM
634 int i;
635 word cmd = get_conf_word(d, PCI_COMMAND);
636 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
84d437d6 637 word exca;
e306e911 638 int verb = verbose > 2;
96e4f295
MM
639
640 show_bases(d, 1);
641 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
642 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
643 get_conf_byte(d, PCI_CB_CARD_BUS),
644 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
645 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
de7ef8bc 646 for (i=0; i<2; i++)
96e4f295
MM
647 {
648 int p = 8*i;
649 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
650 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
f288d32f
BH
651 limit = limit + 0xfff;
652 if (base <= limit || verb)
81077814 653 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM
654 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
655 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
656 }
de7ef8bc 657 for (i=0; i<2; i++)
96e4f295
MM
658 {
659 int p = 8*i;
660 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
661 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
662 if (!(base & PCI_IO_RANGE_TYPE_32))
663 {
664 base &= 0xffff;
665 limit &= 0xffff;
666 }
667 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 668 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM
669 if (base <= limit || verb)
670 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
671 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM
672 }
673
674 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
675 printf("\tSecondary status: SERR\n");
676 if (verbose > 1)
677 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM
678 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
679 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
680 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
681 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
682 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
683 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
684 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
685 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
84d437d6
MM
686
687 if (d->config_cached < 128)
688 {
689 printf("\t<access denied to the rest>\n");
690 return;
691 }
692
693 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
96e4f295
MM
694 if (exca)
695 printf("\t16-bit legacy interface ports at %04x\n", exca);
21510591 696 show_caps(d, PCI_CB_CAPABILITY_LIST);
2f48f637
MM
697}
698
98e39e09
MM
699static void
700show_verbose(struct device *d)
701{
727ce158 702 struct pci_dev *p = d->dev;
98e39e09
MM
703 word status = get_conf_word(d, PCI_STATUS);
704 word cmd = get_conf_word(d, PCI_COMMAND);
c2b144ef 705 word class = p->device_class;
98e39e09
MM
706 byte bist = get_conf_byte(d, PCI_BIST);
707 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
708 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
709 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
710 byte max_lat, min_gnt;
711 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
ef6c9ec3 712 unsigned int irq;
c02d903c 713 char *dt_node;
98e39e09
MM
714
715 show_terse(d);
716
ef6c9ec3 717 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
6d701ce3 718 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
ef6c9ec3
MM
719 irq = p->irq;
720
98e39e09
MM
721 switch (htype)
722 {
2f48f637
MM
723 case PCI_HEADER_TYPE_NORMAL:
724 if (class == PCI_CLASS_BRIDGE_PCI)
56164f4f 725 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
98e39e09
MM
726 max_lat = get_conf_byte(d, PCI_MAX_LAT);
727 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
98e39e09 728 break;
2f48f637 729 case PCI_HEADER_TYPE_BRIDGE:
cce2caac 730 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 731 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
001b9ac6 732 min_gnt = max_lat = 0;
2f48f637
MM
733 break;
734 case PCI_HEADER_TYPE_CARDBUS:
735 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 736 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
96e4f295 737 min_gnt = max_lat = 0;
98e39e09
MM
738 break;
739 default:
740 printf("\t!!! Unknown header type %02x\n", htype);
741 return;
742 }
743
2849a165
AC
744 if (p->phy_slot)
745 printf("\tPhysical Slot: %s\n", p->phy_slot);
746
c02d903c
MM
747 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
748 printf("\tDevice tree node: %s\n", dt_node);
749
98e39e09
MM
750 if (verbose > 1)
751 {
da322bfb 752 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
1c31d620
MM
753 FLAG(cmd, PCI_COMMAND_IO),
754 FLAG(cmd, PCI_COMMAND_MEMORY),
755 FLAG(cmd, PCI_COMMAND_MASTER),
756 FLAG(cmd, PCI_COMMAND_SPECIAL),
757 FLAG(cmd, PCI_COMMAND_INVALIDATE),
758 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
759 FLAG(cmd, PCI_COMMAND_PARITY),
760 FLAG(cmd, PCI_COMMAND_WAIT),
761 FLAG(cmd, PCI_COMMAND_SERR),
da322bfb
MM
762 FLAG(cmd, PCI_COMMAND_FAST_BACK),
763 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
764 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
1c31d620
MM
765 FLAG(status, PCI_STATUS_CAP_LIST),
766 FLAG(status, PCI_STATUS_66MHZ),
767 FLAG(status, PCI_STATUS_UDF),
768 FLAG(status, PCI_STATUS_FAST_BACK),
769 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM
770 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
771 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
772 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM
773 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
774 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
775 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
776 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
da322bfb
MM
777 FLAG(status, PCI_STATUS_DETECTED_PARITY),
778 FLAG(status, PCI_STATUS_INTx));
98e39e09
MM
779 if (cmd & PCI_COMMAND_MASTER)
780 {
56164f4f
MM
781 printf("\tLatency: %d", latency);
782 if (min_gnt || max_lat)
783 {
784 printf(" (");
785 if (min_gnt)
786 printf("%dns min", min_gnt*250);
787 if (min_gnt && max_lat)
788 printf(", ");
789 if (max_lat)
790 printf("%dns max", max_lat*250);
791 putchar(')');
792 }
98e39e09 793 if (cache_line)
7a61b93c 794 printf(", Cache Line Size: %d bytes", cache_line * 4);
98e39e09
MM
795 putchar('\n');
796 }
727ce158 797 if (int_pin || irq)
9739916e 798 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
727ce158 799 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
1d9d1a01
MM
800 if (p->numa_node != -1)
801 printf("\tNUMA node: %d\n", p->numa_node);
98e39e09
MM
802 }
803 else
804 {
805 printf("\tFlags: ");
806 if (cmd & PCI_COMMAND_MASTER)
807 printf("bus master, ");
808 if (cmd & PCI_COMMAND_VGA_PALETTE)
809 printf("VGA palette snoop, ");
810 if (cmd & PCI_COMMAND_WAIT)
811 printf("stepping, ");
812 if (cmd & PCI_COMMAND_FAST_BACK)
813 printf("fast Back2Back, ");
814 if (status & PCI_STATUS_66MHZ)
c1c2c30e 815 printf("66MHz, ");
98e39e09
MM
816 if (status & PCI_STATUS_UDF)
817 printf("user-definable features, ");
818 printf("%s devsel",
819 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
820 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
821 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
822 if (cmd & PCI_COMMAND_MASTER)
823 printf(", latency %d", latency);
727ce158 824 if (irq)
9739916e 825 printf(", IRQ " PCIIRQ_FMT, irq);
90ec4a6d
MW
826 if (p->numa_node != -1)
827 printf(", NUMA node %d", p->numa_node);
98e39e09
MM
828 putchar('\n');
829 }
830
831 if (bist & PCI_BIST_CAPABLE)
832 {
833 if (bist & PCI_BIST_START)
834 printf("\tBIST is running\n");
835 else
836 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
837 }
838
839 switch (htype)
840 {
2f48f637 841 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
842 show_htype0(d);
843 break;
2f48f637 844 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
845 show_htype1(d);
846 break;
2f48f637
MM
847 case PCI_HEADER_TYPE_CARDBUS:
848 show_htype2(d);
849 break;
98e39e09
MM
850 }
851}
852
a387042e
MM
853/*** Machine-readable dumps ***/
854
98e39e09
MM
855static void
856show_hex_dump(struct device *d)
857{
09817437 858 unsigned int i, cnt;
98e39e09 859
84d437d6 860 cnt = d->config_cached;
a387042e 861 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
09817437
MM
862 {
863 cnt = 256;
a387042e 864 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
09817437
MM
865 cnt = 4096;
866 }
867
de7ef8bc 868 for (i=0; i<cnt; i++)
98e39e09
MM
869 {
870 if (! (i & 15))
871 printf("%02x:", i);
872 printf(" %02x", get_conf_byte(d, i));
873 if ((i & 15) == 15)
874 putchar('\n');
875 }
876}
877
13081e57
MM
878static void
879print_shell_escaped(char *c)
880{
881 printf(" \"");
882 while (*c)
883 {
884 if (*c == '"' || *c == '\\')
885 putchar('\\');
886 putchar(*c++);
887 }
888 putchar('"');
889}
890
0a33d0ec
MM
891static void
892show_machine(struct device *d)
893{
727ce158 894 struct pci_dev *p = d->dev;
0a33d0ec 895 int c;
c1c952d2 896 word sv_id, sd_id;
727ce158 897 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
c02d903c 898 char *dt_node;
ce503b7f 899
c1c952d2 900 get_subid(d, &sv_id, &sd_id);
0a33d0ec
MM
901
902 if (verbose)
903 {
6d701ce3 904 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
a387042e 905 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
84c8d1bb
MM
906 show_slot_name(d);
907 putchar('\n');
727ce158 908 printf("Class:\t%s\n",
c2b144ef 909 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
727ce158 910 printf("Vendor:\t%s\n",
224707ba 911 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
727ce158 912 printf("Device:\t%s\n",
224707ba 913 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
ce503b7f
MM
914 if (sv_id && sv_id != 0xffff)
915 {
727ce158 916 printf("SVendor:\t%s\n",
a99c0d69 917 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
727ce158 918 printf("SDevice:\t%s\n",
d4798a32 919 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 920 }
2849a165
AC
921 if (p->phy_slot)
922 printf("PhySlot:\t%s\n", p->phy_slot);
0a33d0ec
MM
923 if (c = get_conf_byte(d, PCI_REVISION_ID))
924 printf("Rev:\t%02x\n", c);
925 if (c = get_conf_byte(d, PCI_CLASS_PROG))
926 printf("ProgIf:\t%02x\n", c);
11339c0d
MM
927 if (opt_kernel)
928 show_kernel_machine(d);
1d9d1a01
MM
929 if (p->numa_node != -1)
930 printf("NUMANode:\t%d\n", p->numa_node);
c02d903c
MM
931 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
932 printf("DTNode:\t%s\n", dt_node);
0a33d0ec
MM
933 }
934 else
935 {
84c8d1bb 936 show_slot_name(d);
13081e57
MM
937 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
938 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
939 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
0a33d0ec
MM
940 if (c = get_conf_byte(d, PCI_REVISION_ID))
941 printf(" -r%02x", c);
942 if (c = get_conf_byte(d, PCI_CLASS_PROG))
943 printf(" -p%02x", c);
ce503b7f 944 if (sv_id && sv_id != 0xffff)
13081e57
MM
945 {
946 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
947 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
948 }
ce503b7f
MM
949 else
950 printf(" \"\" \"\"");
0a33d0ec
MM
951 putchar('\n');
952 }
953}
954
a387042e
MM
955/*** Main show function ***/
956
c7a34993 957void
1812a795
MM
958show_device(struct device *d)
959{
a387042e 960 if (opt_machine)
1812a795 961 show_machine(d);
1812a795 962 else
11339c0d
MM
963 {
964 if (verbose)
965 show_verbose(d);
966 else
967 show_terse(d);
968 if (opt_kernel || verbose)
969 show_kernel(d);
970 }
a387042e 971 if (opt_hex)
1812a795 972 show_hex_dump(d);
a387042e 973 if (verbose || opt_hex)
1812a795
MM
974 putchar('\n');
975}
976
98e39e09
MM
977static void
978show(void)
979{
980 struct device *d;
981
de7ef8bc 982 for (d=first_dev; d; d=d->next)
ce22dfec
MM
983 if (pci_filter_match(&filter, d->dev))
984 show_device(d);
98e39e09
MM
985}
986
987/* Main */
988
989int
990main(int argc, char **argv)
991{
992 int i;
e4842ff3 993 char *msg;
98e39e09 994
496d4021
MM
995 if (argc == 2 && !strcmp(argv[1], "--version"))
996 {
997 puts("lspci version " PCIUTILS_VERSION);
998 return 0;
999 }
727ce158
MM
1000
1001 pacc = pci_alloc();
1002 pacc->error = die;
1003 pci_filter_init(pacc, &filter);
1004
98e39e09
MM
1005 while ((i = getopt(argc, argv, options)) != -1)
1006 switch (i)
1007 {
1008 case 'n':
bc2eed2d 1009 pacc->numeric_ids++;
98e39e09
MM
1010 break;
1011 case 'v':
1012 verbose++;
1013 break;
1014 case 'b':
727ce158 1015 pacc->buscentric = 1;
98e39e09 1016 break;
e4842ff3 1017 case 's':
727ce158 1018 if (msg = pci_filter_parse_slot(&filter, optarg))
b7fd8e19 1019 die("-s: %s", msg);
ce22dfec 1020 opt_filter = 1;
98e39e09 1021 break;
e4842ff3 1022 case 'd':
727ce158
MM
1023 if (msg = pci_filter_parse_id(&filter, optarg))
1024 die("-d: %s", msg);
ce22dfec 1025 opt_filter = 1;
98e39e09
MM
1026 break;
1027 case 'x':
a387042e 1028 opt_hex++;
98e39e09 1029 break;
62e78fa6
MM
1030 case 'P':
1031 opt_path++;
ce22dfec 1032 need_topology = 1;
62e78fa6 1033 break;
6d0dc0fd 1034 case 't':
a387042e 1035 opt_tree++;
ce22dfec 1036 need_topology = 1;
6d0dc0fd 1037 break;
18928b91 1038 case 'i':
cc062b4a 1039 pci_set_name_list_path(pacc, optarg, 0);
18928b91 1040 break;
0a33d0ec 1041 case 'm':
a387042e 1042 opt_machine++;
0a33d0ec 1043 break;
c1c952d2
MM
1044 case 'p':
1045 opt_pcimap = optarg;
1046 break;
1b99a704 1047#ifdef PCI_OS_LINUX
11339c0d
MM
1048 case 'k':
1049 opt_kernel++;
1050 break;
1b99a704 1051#endif
1812a795 1052 case 'M':
a387042e 1053 opt_map_mode++;
1812a795 1054 break;
af61eb25 1055 case 'D':
a387042e 1056 opt_domains = 2;
af61eb25 1057 break;
e022789d 1058#ifdef PCI_USE_DNS
cca2f7c6
MM
1059 case 'q':
1060 opt_query_dns++;
1061 break;
1062 case 'Q':
1063 opt_query_all = 1;
1064 break;
e022789d
MM
1065#else
1066 case 'q':
1067 case 'Q':
1068 die("DNS queries are not available in this version");
1069#endif
98e39e09 1070 default:
727ce158
MM
1071 if (parse_generic_option(i, pacc, optarg))
1072 break;
98e39e09 1073 bad:
727ce158 1074 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
1075 return 1;
1076 }
1077 if (optind < argc)
1078 goto bad;
1079
ce22dfec
MM
1080 if (opt_tree && opt_filter)
1081 die("Tree mode does not support filtering");
1082
cca2f7c6
MM
1083 if (opt_query_dns)
1084 {
1085 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1086 if (opt_query_dns > 1)
1087 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1088 }
1089 if (opt_query_all)
1090 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1091
727ce158 1092 pci_init(pacc);
a387042e 1093 if (opt_map_mode)
62e78fa6 1094 {
ce22dfec
MM
1095 if (need_topology)
1096 die("Bus mapping mode does not recognize bus topology");
62e78fa6
MM
1097 map_the_bus();
1098 }
6d0dc0fd 1099 else
1812a795
MM
1100 {
1101 scan_devices();
1102 sort_them();
ce22dfec
MM
1103 if (need_topology)
1104 grow_tree();
a387042e 1105 if (opt_tree)
1812a795
MM
1106 show_forest();
1107 else
1108 show();
1109 }
17ec7e70 1110 show_kernel_cleanup();
727ce158 1111 pci_cleanup(pacc);
98e39e09 1112
934e7e36 1113 return (seen_errors ? 2 : 0);
98e39e09 1114}