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98e39e09 1/*
4284af58 2 * The PCI Utilities -- List All PCI Devices
98e39e09 3 *
62e78fa6 4 * Copyright (c) 1997--2018 Martin Mares <mj@ucw.cz>
98e39e09
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
98e39e09 13
c7a34993 14#include "lspci.h"
98e39e09
MM
15
16/* Options */
17
c7a34993 18int verbose; /* Show detailed information */
a387042e 19static int opt_hex; /* Show contents of config space as hexadecimal numbers */
c7a34993 20struct pci_filter filter; /* Device filter */
a387042e 21static int opt_tree; /* Show bus tree */
62e78fa6 22static int opt_path; /* Show bridge path */
a387042e
MM
23static int opt_machine; /* Generate machine-readable output */
24static int opt_map_mode; /* Bus mapping mode enabled */
25static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
11339c0d 26static int opt_kernel; /* Show kernel drivers */
cca2f7c6
MM
27static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
28static int opt_query_all; /* Query the DNS for all entries */
c7a34993 29char *opt_pcimap; /* Override path to Linux modules.pcimap */
98e39e09 30
81afa98c
MM
31const char program_name[] = "lspci";
32
62e78fa6 33static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ;
cca2f7c6
MM
34
35static char help_msg[] =
36"Usage: lspci [<switches>]\n"
37"\n"
1b99a704
MM
38"Basic display modes:\n"
39"-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
40"-t\t\tShow bus tree\n"
41"\n"
42"Display options:\n"
43"-v\t\tBe verbose (-vv for very verbose)\n"
44#ifdef PCI_OS_LINUX
45"-k\t\tShow kernel drivers handling each device\n"
46#endif
47"-x\t\tShow hex-dump of the standard part of the config space\n"
48"-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
49"-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
50"-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
51"-D\t\tAlways show domain numbers\n"
62e78fa6
MM
52"-P\t\tDisplay bridge path in addition to bus and device number\n"
53"-PP\t\tDisplay bus path in addition to bus and device number\n"
1b99a704
MM
54"\n"
55"Resolving of device ID's to names:\n"
cca2f7c6
MM
56"-n\t\tShow numeric ID's\n"
57"-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
58#ifdef PCI_USE_DNS
59"-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
60"-qq\t\tAs above, but re-query locally cached entries\n"
61"-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
62#endif
1b99a704
MM
63"\n"
64"Selection of devices:\n"
cca2f7c6 65"-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
4d1c9525 66"-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
1b99a704
MM
67"\n"
68"Other options:\n"
cca2f7c6 69"-i <file>\tUse specified ID database instead of %s\n"
c1c952d2 70#ifdef PCI_OS_LINUX
cca2f7c6 71"-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
c1c952d2 72#endif
cca2f7c6 73"-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
1b99a704
MM
74"\n"
75"PCI access options:\n"
727ce158
MM
76GENERIC_HELP
77;
98e39e09 78
a387042e 79/*** Our view of the PCI bus ***/
98e39e09 80
c7a34993
MM
81struct pci_access *pacc;
82struct device *first_dev;
934e7e36 83static int seen_errors;
98e39e09 84
c7a34993 85int
ec25b52d
MM
86config_fetch(struct device *d, unsigned int pos, unsigned int len)
87{
88 unsigned int end = pos+len;
89 int result;
84d437d6
MM
90
91 while (pos < d->config_bufsize && len && d->present[pos])
92 pos++, len--;
93 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
94 len--;
95 if (!len)
ec25b52d 96 return 1;
84d437d6 97
ec25b52d
MM
98 if (end > d->config_bufsize)
99 {
84d437d6 100 int orig_size = d->config_bufsize;
ec25b52d
MM
101 while (end > d->config_bufsize)
102 d->config_bufsize *= 2;
103 d->config = xrealloc(d->config, d->config_bufsize);
84d437d6 104 d->present = xrealloc(d->present, d->config_bufsize);
1ac3a99d 105 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
ec25b52d
MM
106 }
107 result = pci_read_block(d->dev, pos, d->config + pos, len);
84d437d6
MM
108 if (result)
109 memset(d->present + pos, 1, len);
ec25b52d
MM
110 return result;
111}
112
c7a34993 113struct device *
1812a795
MM
114scan_device(struct pci_dev *p)
115{
1812a795
MM
116 struct device *d;
117
a387042e
MM
118 if (p->domain && !opt_domains)
119 opt_domains = 1;
1812a795
MM
120 if (!pci_filter_match(&filter, p))
121 return NULL;
122 d = xmalloc(sizeof(struct device));
1ac3a99d 123 memset(d, 0, sizeof(*d));
1812a795 124 d->dev = p;
84d437d6 125 d->config_cached = d->config_bufsize = 64;
ec25b52d 126 d->config = xmalloc(64);
84d437d6
MM
127 d->present = xmalloc(64);
128 memset(d->present, 1, 64);
09817437 129 if (!pci_read_block(p, 0, d->config, 64))
934e7e36
MM
130 {
131 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
132 p->domain, p->bus, p->dev, p->func);
133 seen_errors++;
134 return NULL;
135 }
09817437 136 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
1812a795 137 {
ec25b52d
MM
138 /* For cardbus bridges, we need to fetch 64 bytes more to get the
139 * full standard header... */
84d437d6
MM
140 if (config_fetch(d, 64, 64))
141 d->config_cached += 64;
1812a795 142 }
84d437d6 143 pci_setup_cache(p, d->config, d->config_cached);
ef6c9ec3 144 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
1812a795
MM
145 return d;
146}
147
98e39e09 148static void
727ce158 149scan_devices(void)
98e39e09
MM
150{
151 struct device *d;
727ce158 152 struct pci_dev *p;
98e39e09 153
727ce158 154 pci_scan_bus(pacc);
de7ef8bc 155 for (p=pacc->devices; p; p=p->next)
1812a795
MM
156 if (d = scan_device(p))
157 {
158 d->next = first_dev;
159 first_dev = d;
160 }
98e39e09
MM
161}
162
a387042e 163/*** Config space accesses ***/
98e39e09 164
84d437d6
MM
165static void
166check_conf_range(struct device *d, unsigned int pos, unsigned int len)
167{
168 while (len)
169 if (!d->present[pos])
170 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
171 else
172 pos++, len--;
173}
174
c7a34993 175byte
98e39e09
MM
176get_conf_byte(struct device *d, unsigned int pos)
177{
84d437d6 178 check_conf_range(d, pos, 1);
98e39e09
MM
179 return d->config[pos];
180}
181
c7a34993 182word
98e39e09
MM
183get_conf_word(struct device *d, unsigned int pos)
184{
84d437d6 185 check_conf_range(d, pos, 2);
98e39e09
MM
186 return d->config[pos] | (d->config[pos+1] << 8);
187}
188
c7a34993 189u32
98e39e09
MM
190get_conf_long(struct device *d, unsigned int pos)
191{
84d437d6 192 check_conf_range(d, pos, 4);
98e39e09
MM
193 return d->config[pos] |
194 (d->config[pos+1] << 8) |
195 (d->config[pos+2] << 16) |
196 (d->config[pos+3] << 24);
197}
198
a387042e 199/*** Sorting ***/
98e39e09
MM
200
201static int
202compare_them(const void *A, const void *B)
203{
727ce158
MM
204 const struct pci_dev *a = (*(const struct device **)A)->dev;
205 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09 206
84c8d1bb
MM
207 if (a->domain < b->domain)
208 return -1;
209 if (a->domain > b->domain)
210 return 1;
98e39e09
MM
211 if (a->bus < b->bus)
212 return -1;
213 if (a->bus > b->bus)
214 return 1;
727ce158
MM
215 if (a->dev < b->dev)
216 return -1;
217 if (a->dev > b->dev)
218 return 1;
219 if (a->func < b->func)
98e39e09 220 return -1;
727ce158 221 if (a->func > b->func)
98e39e09
MM
222 return 1;
223 return 0;
224}
225
226static void
227sort_them(void)
228{
727ce158 229 struct device **index, **h, **last_dev;
98e39e09
MM
230 int cnt;
231 struct device *d;
232
c7a34993
MM
233 cnt = 0;
234 for (d=first_dev; d; d=d->next)
235 cnt++;
236 h = index = alloca(sizeof(struct device *) * cnt);
237 for (d=first_dev; d; d=d->next)
238 *h++ = d;
239 qsort(index, cnt, sizeof(struct device *), compare_them);
240 last_dev = &first_dev;
241 h = index;
242 while (cnt--)
243 {
244 *last_dev = *h;
245 last_dev = &(*h)->next;
246 h++;
c1c952d2 247 }
c7a34993 248 *last_dev = NULL;
c1c952d2
MM
249}
250
c7a34993 251/*** Normal output ***/
11339c0d 252
62e78fa6
MM
253static void
254show_slot_path(struct device *d)
255{
256 struct pci_dev *p = d->dev;
257
258 if (opt_path)
259 {
260 struct bus *bus = d->parent_bus;
261 struct bridge *br = bus->parent_bridge;
262
263 if (br && br->br_dev)
264 {
265 show_slot_path(br->br_dev);
266 if (opt_path > 1)
267 printf("/%02x:%02x.%d", p->bus, p->dev, p->func);
268 else
269 printf("/%02x.%d", p->dev, p->func);
270 return;
271 }
272 }
273 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
274}
275
c7a34993
MM
276static void
277show_slot_name(struct device *d)
c1c952d2 278{
c7a34993 279 struct pci_dev *p = d->dev;
c1c952d2 280
c7a34993
MM
281 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
282 printf("%04x:", p->domain);
62e78fa6 283 show_slot_path(d);
c1c952d2
MM
284}
285
c7a34993
MM
286void
287get_subid(struct device *d, word *subvp, word *subdp)
c1c952d2 288{
c7a34993 289 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
11339c0d 290
c7a34993
MM
291 if (htype == PCI_HEADER_TYPE_NORMAL)
292 {
293 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
294 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
295 }
296 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
297 {
298 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
299 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
300 }
301 else
302 *subvp = *subdp = 0xffff;
c1c952d2
MM
303}
304
11339c0d 305static void
c7a34993 306show_terse(struct device *d)
11339c0d 307{
c7a34993
MM
308 int c;
309 struct pci_dev *p = d->dev;
310 char classbuf[128], devbuf[128];
11339c0d 311
c7a34993
MM
312 show_slot_name(d);
313 printf(" %s: %s",
314 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
315 PCI_LOOKUP_CLASS,
316 p->device_class),
317 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
318 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
319 p->vendor_id, p->device_id));
320 if (c = get_conf_byte(d, PCI_REVISION_ID))
321 printf(" (rev %02x)", c);
322 if (verbose)
323 {
324 char *x;
325 c = get_conf_byte(d, PCI_CLASS_PROG);
326 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
327 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
328 p->device_class, c);
329 if (c || x)
330 {
331 printf(" (prog-if %02x", c);
332 if (x)
333 printf(" [%s]", x);
334 putchar(')');
335 }
336 }
337 putchar('\n');
c1c952d2 338
c7a34993
MM
339 if (verbose || opt_kernel)
340 {
341 word subsys_v, subsys_d;
342 char ssnamebuf[256];
c1c952d2 343
2a39bc9e
VP
344 pci_fill_info(p, PCI_FILL_LABEL);
345
aecf5b35
TR
346 if (p->label)
347 printf("\tDeviceName: %s", p->label);
c7a34993
MM
348 get_subid(d, &subsys_v, &subsys_d);
349 if (subsys_v && subsys_v != 0xffff)
350 printf("\tSubsystem: %s\n",
351 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
352 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
353 p->vendor_id, p->device_id, subsys_v, subsys_d));
354 }
c1c952d2
MM
355}
356
a387042e
MM
357/*** Verbose output ***/
358
359static void
41d883cb 360show_size(u64 x)
a387042e 361{
0188807c 362 static const char suffix[][2] = { "", "K", "M", "G", "T" };
f2f8adaa 363 unsigned i;
a387042e
MM
364 if (!x)
365 return;
f2f8adaa 366 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
558f736b 367 if (x % 1024)
f2f8adaa
MW
368 break;
369 x /= 1024;
370 }
371 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
a387042e
MM
372}
373
41d883cb
MM
374static void
375show_range(char *prefix, u64 base, u64 limit, int is_64bit)
376{
377 if (base > limit)
378 {
379 if (!verbose)
380 return;
381 else if (verbose < 3)
382 {
383 printf("%s: None\n", prefix);
384 return;
385 }
386 }
387
388 printf("%s: ", prefix);
389 if (is_64bit)
3f30d0d1 390 printf("%016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit);
41d883cb
MM
391 else
392 printf("%08x-%08x", (unsigned) base, (unsigned) limit);
393 if (base <= limit)
394 show_size(limit - base + 1);
395 else
396 printf(" [empty]");
397 putchar('\n');
398}
399
a387042e
MM
400static void
401show_bases(struct device *d, int cnt)
402{
403 struct pci_dev *p = d->dev;
404 word cmd = get_conf_word(d, PCI_COMMAND);
405 int i;
659d438b 406 int virtual = 0;
a387042e 407
de7ef8bc 408 for (i=0; i<cnt; i++)
a387042e
MM
409 {
410 pciaddr_t pos = p->base_addr[i];
411 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
558f736b 412 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
a387042e
MM
413 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
414 if (flg == 0xffffffff)
415 flg = 0;
416 if (!pos && !flg && !len)
417 continue;
418 if (verbose > 1)
419 printf("\tRegion %d: ", i);
420 else
421 putchar('\t');
3d0a6d88 422 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b 423 printf("[enhanced] ");
4cd087d8 424 else if (pos && !(flg & ((flg & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)))
a387042e 425 {
4cd087d8 426 /* Reported by the OS, but not by the device */
a387042e
MM
427 printf("[virtual] ");
428 flg = pos;
659d438b 429 virtual = 1;
a387042e
MM
430 }
431 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
432 {
433 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
434 printf("I/O ports at ");
00bf6625 435 if (a || (cmd & PCI_COMMAND_IO))
a387042e
MM
436 printf(PCIADDR_PORT_FMT, a);
437 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
438 printf("<ignored>");
439 else
440 printf("<unassigned>");
659d438b 441 if (!virtual && !(cmd & PCI_COMMAND_IO))
a387042e
MM
442 printf(" [disabled]");
443 }
444 else
445 {
446 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
447 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
448 int done = 0;
449 u32 z = 0;
450
451 printf("Memory at ");
452 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
453 {
454 if (i >= cnt - 1)
455 {
456 printf("<invalid-64bit-slot>");
457 done = 1;
458 }
459 else
460 {
461 i++;
462 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
a387042e
MM
463 }
464 }
465 if (!done)
466 {
467 if (a)
468 printf(PCIADDR_T_FMT, a);
469 else
470 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
471 }
472 printf(" (%s, %sprefetchable)",
473 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
474 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
475 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
476 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
659d438b 477 if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
478 printf(" [disabled]");
479 }
480 show_size(len);
481 putchar('\n');
482 }
483}
484
485static void
486show_rom(struct device *d, int reg)
487{
488 struct pci_dev *p = d->dev;
489 pciaddr_t rom = p->rom_base_addr;
490 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
558f736b 491 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
a387042e
MM
492 u32 flg = get_conf_long(d, reg);
493 word cmd = get_conf_word(d, PCI_COMMAND);
659d438b 494 int virtual = 0;
a387042e
MM
495
496 if (!rom && !flg && !len)
497 return;
498 putchar('\t');
3d0a6d88 499 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b
SS
500 printf("[enhanced] ");
501 else if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
a387042e
MM
502 {
503 printf("[virtual] ");
504 flg = rom;
659d438b 505 virtual = 1;
a387042e
MM
506 }
507 printf("Expansion ROM at ");
508 if (rom & PCI_ROM_ADDRESS_MASK)
509 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
510 else if (flg & PCI_ROM_ADDRESS_MASK)
511 printf("<ignored>");
512 else
513 printf("<unassigned>");
514 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
515 printf(" [disabled]");
659d438b 516 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
517 printf(" [disabled by cmd]");
518 show_size(len);
519 putchar('\n');
520}
521
e95c8373
MM
522static void
523show_htype0(struct device *d)
524{
525 show_bases(d, 6);
6aa54f1b 526 show_rom(d, PCI_ROM_ADDRESS);
21510591 527 show_caps(d, PCI_CAPABILITY_LIST);
e95c8373
MM
528}
529
98e39e09
MM
530static void
531show_htype1(struct device *d)
532{
533 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
534 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
535 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
536 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
537 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
538 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
539 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
540 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
541 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
138c0385 542 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
98e39e09
MM
543 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
544
545 show_bases(d, 2);
546 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
547 get_conf_byte(d, PCI_PRIMARY_BUS),
548 get_conf_byte(d, PCI_SECONDARY_BUS),
549 get_conf_byte(d, PCI_SUBORDINATE_BUS),
550 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
551
552 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
553 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
554 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
555 else
556 {
557 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
558 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
559 if (io_type == PCI_IO_RANGE_TYPE_32)
560 {
561 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
562 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
563 }
41d883cb 564 show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0);
98e39e09
MM
565 }
566
567 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
568 mem_type)
569 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 570 else
98e39e09
MM
571 {
572 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
573 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
41d883cb 574 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0);
98e39e09
MM
575 }
576
577 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
578 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
579 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 580 else
98e39e09 581 {
41d883cb
MM
582 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
583 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
584 if (pref_type == PCI_PREF_RANGE_TYPE_64)
e306e911 585 {
41d883cb
MM
586 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
587 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
e306e911 588 }
41d883cb 589 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64));
98e39e09
MM
590 }
591
138c0385 592 if (verbose > 1)
c1c2c30e 593 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
138c0385
MM
594 FLAG(sec_stat, PCI_STATUS_66MHZ),
595 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
596 FLAG(sec_stat, PCI_STATUS_PARITY),
597 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
598 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
599 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
600 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
601 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
602 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
603 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
604 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
98e39e09 605
6aa54f1b 606 show_rom(d, PCI_ROM_ADDRESS1);
98e39e09
MM
607
608 if (verbose > 1)
da322bfb 609 {
b2a45526 610 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
da322bfb
MM
611 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
612 FLAG(brc, PCI_BRIDGE_CTL_SERR),
613 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
614 FLAG(brc, PCI_BRIDGE_CTL_VGA),
b2a45526 615 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
da322bfb
MM
616 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
617 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
618 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
619 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
620 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
621 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
622 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
623 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
624 }
e95c8373 625
21510591 626 show_caps(d, PCI_CAPABILITY_LIST);
98e39e09
MM
627}
628
2f48f637
MM
629static void
630show_htype2(struct device *d)
631{
96e4f295
MM
632 int i;
633 word cmd = get_conf_word(d, PCI_COMMAND);
634 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
84d437d6 635 word exca;
e306e911 636 int verb = verbose > 2;
96e4f295
MM
637
638 show_bases(d, 1);
639 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
640 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
641 get_conf_byte(d, PCI_CB_CARD_BUS),
642 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
643 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
de7ef8bc 644 for (i=0; i<2; i++)
96e4f295
MM
645 {
646 int p = 8*i;
647 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
648 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
f288d32f
BH
649 limit = limit + 0xfff;
650 if (base <= limit || verb)
81077814 651 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM
652 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
653 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
654 }
de7ef8bc 655 for (i=0; i<2; i++)
96e4f295
MM
656 {
657 int p = 8*i;
658 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
659 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
660 if (!(base & PCI_IO_RANGE_TYPE_32))
661 {
662 base &= 0xffff;
663 limit &= 0xffff;
664 }
665 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 666 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM
667 if (base <= limit || verb)
668 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
669 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM
670 }
671
672 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
673 printf("\tSecondary status: SERR\n");
674 if (verbose > 1)
675 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM
676 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
677 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
678 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
679 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
680 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
681 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
682 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
683 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
84d437d6
MM
684
685 if (d->config_cached < 128)
686 {
687 printf("\t<access denied to the rest>\n");
688 return;
689 }
690
691 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
96e4f295
MM
692 if (exca)
693 printf("\t16-bit legacy interface ports at %04x\n", exca);
21510591 694 show_caps(d, PCI_CB_CAPABILITY_LIST);
2f48f637
MM
695}
696
98e39e09
MM
697static void
698show_verbose(struct device *d)
699{
727ce158 700 struct pci_dev *p = d->dev;
98e39e09
MM
701 word status = get_conf_word(d, PCI_STATUS);
702 word cmd = get_conf_word(d, PCI_COMMAND);
c2b144ef 703 word class = p->device_class;
98e39e09
MM
704 byte bist = get_conf_byte(d, PCI_BIST);
705 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
706 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
707 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
708 byte max_lat, min_gnt;
709 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
ef6c9ec3 710 unsigned int irq;
c02d903c 711 char *dt_node;
98e39e09
MM
712
713 show_terse(d);
714
ef6c9ec3 715 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
6d701ce3 716 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
ef6c9ec3
MM
717 irq = p->irq;
718
98e39e09
MM
719 switch (htype)
720 {
2f48f637
MM
721 case PCI_HEADER_TYPE_NORMAL:
722 if (class == PCI_CLASS_BRIDGE_PCI)
56164f4f 723 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
98e39e09
MM
724 max_lat = get_conf_byte(d, PCI_MAX_LAT);
725 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
98e39e09 726 break;
2f48f637 727 case PCI_HEADER_TYPE_BRIDGE:
cce2caac 728 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 729 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
001b9ac6 730 min_gnt = max_lat = 0;
2f48f637
MM
731 break;
732 case PCI_HEADER_TYPE_CARDBUS:
733 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 734 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
96e4f295 735 min_gnt = max_lat = 0;
98e39e09
MM
736 break;
737 default:
738 printf("\t!!! Unknown header type %02x\n", htype);
739 return;
740 }
741
2849a165
AC
742 if (p->phy_slot)
743 printf("\tPhysical Slot: %s\n", p->phy_slot);
744
c02d903c
MM
745 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
746 printf("\tDevice tree node: %s\n", dt_node);
747
98e39e09
MM
748 if (verbose > 1)
749 {
da322bfb 750 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
1c31d620
MM
751 FLAG(cmd, PCI_COMMAND_IO),
752 FLAG(cmd, PCI_COMMAND_MEMORY),
753 FLAG(cmd, PCI_COMMAND_MASTER),
754 FLAG(cmd, PCI_COMMAND_SPECIAL),
755 FLAG(cmd, PCI_COMMAND_INVALIDATE),
756 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
757 FLAG(cmd, PCI_COMMAND_PARITY),
758 FLAG(cmd, PCI_COMMAND_WAIT),
759 FLAG(cmd, PCI_COMMAND_SERR),
da322bfb
MM
760 FLAG(cmd, PCI_COMMAND_FAST_BACK),
761 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
762 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
1c31d620
MM
763 FLAG(status, PCI_STATUS_CAP_LIST),
764 FLAG(status, PCI_STATUS_66MHZ),
765 FLAG(status, PCI_STATUS_UDF),
766 FLAG(status, PCI_STATUS_FAST_BACK),
767 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM
768 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
769 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
770 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM
771 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
772 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
773 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
774 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
da322bfb
MM
775 FLAG(status, PCI_STATUS_DETECTED_PARITY),
776 FLAG(status, PCI_STATUS_INTx));
98e39e09
MM
777 if (cmd & PCI_COMMAND_MASTER)
778 {
56164f4f
MM
779 printf("\tLatency: %d", latency);
780 if (min_gnt || max_lat)
781 {
782 printf(" (");
783 if (min_gnt)
784 printf("%dns min", min_gnt*250);
785 if (min_gnt && max_lat)
786 printf(", ");
787 if (max_lat)
788 printf("%dns max", max_lat*250);
789 putchar(')');
790 }
98e39e09 791 if (cache_line)
7a61b93c 792 printf(", Cache Line Size: %d bytes", cache_line * 4);
98e39e09
MM
793 putchar('\n');
794 }
727ce158 795 if (int_pin || irq)
9739916e 796 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
727ce158 797 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
1d9d1a01
MM
798 if (p->numa_node != -1)
799 printf("\tNUMA node: %d\n", p->numa_node);
98e39e09
MM
800 }
801 else
802 {
803 printf("\tFlags: ");
804 if (cmd & PCI_COMMAND_MASTER)
805 printf("bus master, ");
806 if (cmd & PCI_COMMAND_VGA_PALETTE)
807 printf("VGA palette snoop, ");
808 if (cmd & PCI_COMMAND_WAIT)
809 printf("stepping, ");
810 if (cmd & PCI_COMMAND_FAST_BACK)
811 printf("fast Back2Back, ");
812 if (status & PCI_STATUS_66MHZ)
c1c2c30e 813 printf("66MHz, ");
98e39e09
MM
814 if (status & PCI_STATUS_UDF)
815 printf("user-definable features, ");
816 printf("%s devsel",
817 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
818 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
819 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
820 if (cmd & PCI_COMMAND_MASTER)
821 printf(", latency %d", latency);
727ce158 822 if (irq)
9739916e 823 printf(", IRQ " PCIIRQ_FMT, irq);
90ec4a6d
MW
824 if (p->numa_node != -1)
825 printf(", NUMA node %d", p->numa_node);
98e39e09
MM
826 putchar('\n');
827 }
828
829 if (bist & PCI_BIST_CAPABLE)
830 {
831 if (bist & PCI_BIST_START)
832 printf("\tBIST is running\n");
833 else
834 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
835 }
836
837 switch (htype)
838 {
2f48f637 839 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
840 show_htype0(d);
841 break;
2f48f637 842 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
843 show_htype1(d);
844 break;
2f48f637
MM
845 case PCI_HEADER_TYPE_CARDBUS:
846 show_htype2(d);
847 break;
98e39e09
MM
848 }
849}
850
a387042e
MM
851/*** Machine-readable dumps ***/
852
98e39e09
MM
853static void
854show_hex_dump(struct device *d)
855{
09817437 856 unsigned int i, cnt;
98e39e09 857
84d437d6 858 cnt = d->config_cached;
a387042e 859 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
09817437
MM
860 {
861 cnt = 256;
a387042e 862 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
09817437
MM
863 cnt = 4096;
864 }
865
de7ef8bc 866 for (i=0; i<cnt; i++)
98e39e09
MM
867 {
868 if (! (i & 15))
869 printf("%02x:", i);
870 printf(" %02x", get_conf_byte(d, i));
871 if ((i & 15) == 15)
872 putchar('\n');
873 }
874}
875
13081e57
MM
876static void
877print_shell_escaped(char *c)
878{
879 printf(" \"");
880 while (*c)
881 {
882 if (*c == '"' || *c == '\\')
883 putchar('\\');
884 putchar(*c++);
885 }
886 putchar('"');
887}
888
0a33d0ec
MM
889static void
890show_machine(struct device *d)
891{
727ce158 892 struct pci_dev *p = d->dev;
0a33d0ec 893 int c;
c1c952d2 894 word sv_id, sd_id;
727ce158 895 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
c02d903c 896 char *dt_node;
ce503b7f 897
c1c952d2 898 get_subid(d, &sv_id, &sd_id);
0a33d0ec
MM
899
900 if (verbose)
901 {
6d701ce3 902 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE);
a387042e 903 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
84c8d1bb
MM
904 show_slot_name(d);
905 putchar('\n');
727ce158 906 printf("Class:\t%s\n",
c2b144ef 907 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
727ce158 908 printf("Vendor:\t%s\n",
224707ba 909 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
727ce158 910 printf("Device:\t%s\n",
224707ba 911 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
ce503b7f
MM
912 if (sv_id && sv_id != 0xffff)
913 {
727ce158 914 printf("SVendor:\t%s\n",
a99c0d69 915 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
727ce158 916 printf("SDevice:\t%s\n",
d4798a32 917 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 918 }
2849a165
AC
919 if (p->phy_slot)
920 printf("PhySlot:\t%s\n", p->phy_slot);
0a33d0ec
MM
921 if (c = get_conf_byte(d, PCI_REVISION_ID))
922 printf("Rev:\t%02x\n", c);
923 if (c = get_conf_byte(d, PCI_CLASS_PROG))
924 printf("ProgIf:\t%02x\n", c);
11339c0d
MM
925 if (opt_kernel)
926 show_kernel_machine(d);
1d9d1a01
MM
927 if (p->numa_node != -1)
928 printf("NUMANode:\t%d\n", p->numa_node);
c02d903c
MM
929 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
930 printf("DTNode:\t%s\n", dt_node);
0a33d0ec
MM
931 }
932 else
933 {
84c8d1bb 934 show_slot_name(d);
13081e57
MM
935 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
936 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
937 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
0a33d0ec
MM
938 if (c = get_conf_byte(d, PCI_REVISION_ID))
939 printf(" -r%02x", c);
940 if (c = get_conf_byte(d, PCI_CLASS_PROG))
941 printf(" -p%02x", c);
ce503b7f 942 if (sv_id && sv_id != 0xffff)
13081e57
MM
943 {
944 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
945 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
946 }
ce503b7f
MM
947 else
948 printf(" \"\" \"\"");
0a33d0ec
MM
949 putchar('\n');
950 }
951}
952
a387042e
MM
953/*** Main show function ***/
954
c7a34993 955void
1812a795
MM
956show_device(struct device *d)
957{
a387042e 958 if (opt_machine)
1812a795 959 show_machine(d);
1812a795 960 else
11339c0d
MM
961 {
962 if (verbose)
963 show_verbose(d);
964 else
965 show_terse(d);
966 if (opt_kernel || verbose)
967 show_kernel(d);
968 }
a387042e 969 if (opt_hex)
1812a795 970 show_hex_dump(d);
a387042e 971 if (verbose || opt_hex)
1812a795
MM
972 putchar('\n');
973}
974
98e39e09
MM
975static void
976show(void)
977{
978 struct device *d;
979
62e78fa6
MM
980 if (opt_path)
981 grow_tree();
de7ef8bc 982 for (d=first_dev; d; d=d->next)
1812a795 983 show_device(d);
98e39e09
MM
984}
985
986/* Main */
987
988int
989main(int argc, char **argv)
990{
991 int i;
e4842ff3 992 char *msg;
98e39e09 993
496d4021
MM
994 if (argc == 2 && !strcmp(argv[1], "--version"))
995 {
996 puts("lspci version " PCIUTILS_VERSION);
997 return 0;
998 }
727ce158
MM
999
1000 pacc = pci_alloc();
1001 pacc->error = die;
1002 pci_filter_init(pacc, &filter);
1003
98e39e09
MM
1004 while ((i = getopt(argc, argv, options)) != -1)
1005 switch (i)
1006 {
1007 case 'n':
bc2eed2d 1008 pacc->numeric_ids++;
98e39e09
MM
1009 break;
1010 case 'v':
1011 verbose++;
1012 break;
1013 case 'b':
727ce158 1014 pacc->buscentric = 1;
98e39e09 1015 break;
e4842ff3 1016 case 's':
727ce158 1017 if (msg = pci_filter_parse_slot(&filter, optarg))
b7fd8e19 1018 die("-s: %s", msg);
98e39e09 1019 break;
e4842ff3 1020 case 'd':
727ce158
MM
1021 if (msg = pci_filter_parse_id(&filter, optarg))
1022 die("-d: %s", msg);
98e39e09
MM
1023 break;
1024 case 'x':
a387042e 1025 opt_hex++;
98e39e09 1026 break;
62e78fa6
MM
1027 case 'P':
1028 opt_path++;
1029 break;
6d0dc0fd 1030 case 't':
a387042e 1031 opt_tree++;
6d0dc0fd 1032 break;
18928b91 1033 case 'i':
cc062b4a 1034 pci_set_name_list_path(pacc, optarg, 0);
18928b91 1035 break;
0a33d0ec 1036 case 'm':
a387042e 1037 opt_machine++;
0a33d0ec 1038 break;
c1c952d2
MM
1039 case 'p':
1040 opt_pcimap = optarg;
1041 break;
1b99a704 1042#ifdef PCI_OS_LINUX
11339c0d
MM
1043 case 'k':
1044 opt_kernel++;
1045 break;
1b99a704 1046#endif
1812a795 1047 case 'M':
a387042e 1048 opt_map_mode++;
1812a795 1049 break;
af61eb25 1050 case 'D':
a387042e 1051 opt_domains = 2;
af61eb25 1052 break;
e022789d 1053#ifdef PCI_USE_DNS
cca2f7c6
MM
1054 case 'q':
1055 opt_query_dns++;
1056 break;
1057 case 'Q':
1058 opt_query_all = 1;
1059 break;
e022789d
MM
1060#else
1061 case 'q':
1062 case 'Q':
1063 die("DNS queries are not available in this version");
1064#endif
98e39e09 1065 default:
727ce158
MM
1066 if (parse_generic_option(i, pacc, optarg))
1067 break;
98e39e09 1068 bad:
727ce158 1069 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
1070 return 1;
1071 }
1072 if (optind < argc)
1073 goto bad;
1074
cca2f7c6
MM
1075 if (opt_query_dns)
1076 {
1077 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1078 if (opt_query_dns > 1)
1079 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1080 }
1081 if (opt_query_all)
1082 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1083
727ce158 1084 pci_init(pacc);
a387042e 1085 if (opt_map_mode)
62e78fa6
MM
1086 {
1087 if (opt_path)
1088 die("Bus paths cannot be shown in bus mapping mode");
1089 map_the_bus();
1090 }
6d0dc0fd 1091 else
1812a795
MM
1092 {
1093 scan_devices();
1094 sort_them();
a387042e 1095 if (opt_tree)
1812a795
MM
1096 show_forest();
1097 else
1098 show();
1099 }
17ec7e70 1100 show_kernel_cleanup();
727ce158 1101 pci_cleanup(pacc);
98e39e09 1102
934e7e36 1103 return (seen_errors ? 2 : 0);
98e39e09 1104}