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98e39e09 1/*
4284af58 2 * The PCI Utilities -- List All PCI Devices
98e39e09 3 *
41d883cb 4 * Copyright (c) 1997--2016 Martin Mares <mj@ucw.cz>
98e39e09
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
98e39e09 13
c7a34993 14#include "lspci.h"
98e39e09
MM
15
16/* Options */
17
c7a34993 18int verbose; /* Show detailed information */
a387042e 19static int opt_hex; /* Show contents of config space as hexadecimal numbers */
c7a34993 20struct pci_filter filter; /* Device filter */
a387042e
MM
21static int opt_tree; /* Show bus tree */
22static int opt_machine; /* Generate machine-readable output */
23static int opt_map_mode; /* Bus mapping mode enabled */
24static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
11339c0d 25static int opt_kernel; /* Show kernel drivers */
cca2f7c6
MM
26static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
27static int opt_query_all; /* Query the DNS for all entries */
c7a34993 28char *opt_pcimap; /* Override path to Linux modules.pcimap */
98e39e09 29
81afa98c
MM
30const char program_name[] = "lspci";
31
cca2f7c6
MM
32static char options[] = "nvbxs:d:ti:mgp:qkMDQ" GENERIC_OPTIONS ;
33
34static char help_msg[] =
35"Usage: lspci [<switches>]\n"
36"\n"
1b99a704
MM
37"Basic display modes:\n"
38"-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
39"-t\t\tShow bus tree\n"
40"\n"
41"Display options:\n"
42"-v\t\tBe verbose (-vv for very verbose)\n"
43#ifdef PCI_OS_LINUX
44"-k\t\tShow kernel drivers handling each device\n"
45#endif
46"-x\t\tShow hex-dump of the standard part of the config space\n"
47"-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
48"-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
49"-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
50"-D\t\tAlways show domain numbers\n"
51"\n"
52"Resolving of device ID's to names:\n"
cca2f7c6
MM
53"-n\t\tShow numeric ID's\n"
54"-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
55#ifdef PCI_USE_DNS
56"-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
57"-qq\t\tAs above, but re-query locally cached entries\n"
58"-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
59#endif
1b99a704
MM
60"\n"
61"Selection of devices:\n"
cca2f7c6 62"-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
4d1c9525 63"-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
1b99a704
MM
64"\n"
65"Other options:\n"
cca2f7c6 66"-i <file>\tUse specified ID database instead of %s\n"
c1c952d2 67#ifdef PCI_OS_LINUX
cca2f7c6 68"-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
c1c952d2 69#endif
cca2f7c6 70"-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
1b99a704
MM
71"\n"
72"PCI access options:\n"
727ce158
MM
73GENERIC_HELP
74;
98e39e09 75
a387042e 76/*** Our view of the PCI bus ***/
98e39e09 77
c7a34993
MM
78struct pci_access *pacc;
79struct device *first_dev;
934e7e36 80static int seen_errors;
98e39e09 81
c7a34993 82int
ec25b52d
MM
83config_fetch(struct device *d, unsigned int pos, unsigned int len)
84{
85 unsigned int end = pos+len;
86 int result;
84d437d6
MM
87
88 while (pos < d->config_bufsize && len && d->present[pos])
89 pos++, len--;
90 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
91 len--;
92 if (!len)
ec25b52d 93 return 1;
84d437d6 94
ec25b52d
MM
95 if (end > d->config_bufsize)
96 {
84d437d6 97 int orig_size = d->config_bufsize;
ec25b52d
MM
98 while (end > d->config_bufsize)
99 d->config_bufsize *= 2;
100 d->config = xrealloc(d->config, d->config_bufsize);
84d437d6 101 d->present = xrealloc(d->present, d->config_bufsize);
1ac3a99d 102 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
ec25b52d
MM
103 }
104 result = pci_read_block(d->dev, pos, d->config + pos, len);
84d437d6
MM
105 if (result)
106 memset(d->present + pos, 1, len);
ec25b52d
MM
107 return result;
108}
109
c7a34993 110struct device *
1812a795
MM
111scan_device(struct pci_dev *p)
112{
1812a795
MM
113 struct device *d;
114
a387042e
MM
115 if (p->domain && !opt_domains)
116 opt_domains = 1;
1812a795
MM
117 if (!pci_filter_match(&filter, p))
118 return NULL;
119 d = xmalloc(sizeof(struct device));
1ac3a99d 120 memset(d, 0, sizeof(*d));
1812a795 121 d->dev = p;
84d437d6 122 d->config_cached = d->config_bufsize = 64;
ec25b52d 123 d->config = xmalloc(64);
84d437d6
MM
124 d->present = xmalloc(64);
125 memset(d->present, 1, 64);
09817437 126 if (!pci_read_block(p, 0, d->config, 64))
934e7e36
MM
127 {
128 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
129 p->domain, p->bus, p->dev, p->func);
130 seen_errors++;
131 return NULL;
132 }
09817437 133 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
1812a795 134 {
ec25b52d
MM
135 /* For cardbus bridges, we need to fetch 64 bytes more to get the
136 * full standard header... */
84d437d6
MM
137 if (config_fetch(d, 64, 64))
138 d->config_cached += 64;
1812a795 139 }
84d437d6 140 pci_setup_cache(p, d->config, d->config_cached);
ef6c9ec3 141 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
1812a795
MM
142 return d;
143}
144
98e39e09 145static void
727ce158 146scan_devices(void)
98e39e09
MM
147{
148 struct device *d;
727ce158 149 struct pci_dev *p;
98e39e09 150
727ce158 151 pci_scan_bus(pacc);
de7ef8bc 152 for (p=pacc->devices; p; p=p->next)
1812a795
MM
153 if (d = scan_device(p))
154 {
155 d->next = first_dev;
156 first_dev = d;
157 }
98e39e09
MM
158}
159
a387042e 160/*** Config space accesses ***/
98e39e09 161
84d437d6
MM
162static void
163check_conf_range(struct device *d, unsigned int pos, unsigned int len)
164{
165 while (len)
166 if (!d->present[pos])
167 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
168 else
169 pos++, len--;
170}
171
c7a34993 172byte
98e39e09
MM
173get_conf_byte(struct device *d, unsigned int pos)
174{
84d437d6 175 check_conf_range(d, pos, 1);
98e39e09
MM
176 return d->config[pos];
177}
178
c7a34993 179word
98e39e09
MM
180get_conf_word(struct device *d, unsigned int pos)
181{
84d437d6 182 check_conf_range(d, pos, 2);
98e39e09
MM
183 return d->config[pos] | (d->config[pos+1] << 8);
184}
185
c7a34993 186u32
98e39e09
MM
187get_conf_long(struct device *d, unsigned int pos)
188{
84d437d6 189 check_conf_range(d, pos, 4);
98e39e09
MM
190 return d->config[pos] |
191 (d->config[pos+1] << 8) |
192 (d->config[pos+2] << 16) |
193 (d->config[pos+3] << 24);
194}
195
a387042e 196/*** Sorting ***/
98e39e09
MM
197
198static int
199compare_them(const void *A, const void *B)
200{
727ce158
MM
201 const struct pci_dev *a = (*(const struct device **)A)->dev;
202 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09 203
84c8d1bb
MM
204 if (a->domain < b->domain)
205 return -1;
206 if (a->domain > b->domain)
207 return 1;
98e39e09
MM
208 if (a->bus < b->bus)
209 return -1;
210 if (a->bus > b->bus)
211 return 1;
727ce158
MM
212 if (a->dev < b->dev)
213 return -1;
214 if (a->dev > b->dev)
215 return 1;
216 if (a->func < b->func)
98e39e09 217 return -1;
727ce158 218 if (a->func > b->func)
98e39e09
MM
219 return 1;
220 return 0;
221}
222
223static void
224sort_them(void)
225{
727ce158 226 struct device **index, **h, **last_dev;
98e39e09
MM
227 int cnt;
228 struct device *d;
229
c7a34993
MM
230 cnt = 0;
231 for (d=first_dev; d; d=d->next)
232 cnt++;
233 h = index = alloca(sizeof(struct device *) * cnt);
234 for (d=first_dev; d; d=d->next)
235 *h++ = d;
236 qsort(index, cnt, sizeof(struct device *), compare_them);
237 last_dev = &first_dev;
238 h = index;
239 while (cnt--)
240 {
241 *last_dev = *h;
242 last_dev = &(*h)->next;
243 h++;
c1c952d2 244 }
c7a34993 245 *last_dev = NULL;
c1c952d2
MM
246}
247
c7a34993 248/*** Normal output ***/
11339c0d 249
c7a34993
MM
250static void
251show_slot_name(struct device *d)
c1c952d2 252{
c7a34993 253 struct pci_dev *p = d->dev;
c1c952d2 254
c7a34993
MM
255 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
256 printf("%04x:", p->domain);
257 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
c1c952d2
MM
258}
259
c7a34993
MM
260void
261get_subid(struct device *d, word *subvp, word *subdp)
c1c952d2 262{
c7a34993 263 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
11339c0d 264
c7a34993
MM
265 if (htype == PCI_HEADER_TYPE_NORMAL)
266 {
267 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
268 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
269 }
270 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
271 {
272 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
273 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
274 }
275 else
276 *subvp = *subdp = 0xffff;
c1c952d2
MM
277}
278
11339c0d 279static void
c7a34993 280show_terse(struct device *d)
11339c0d 281{
c7a34993
MM
282 int c;
283 struct pci_dev *p = d->dev;
284 char classbuf[128], devbuf[128];
11339c0d 285
c7a34993
MM
286 show_slot_name(d);
287 printf(" %s: %s",
288 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
289 PCI_LOOKUP_CLASS,
290 p->device_class),
291 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
292 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
293 p->vendor_id, p->device_id));
294 if (c = get_conf_byte(d, PCI_REVISION_ID))
295 printf(" (rev %02x)", c);
296 if (verbose)
297 {
298 char *x;
299 c = get_conf_byte(d, PCI_CLASS_PROG);
300 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
301 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
302 p->device_class, c);
303 if (c || x)
304 {
305 printf(" (prog-if %02x", c);
306 if (x)
307 printf(" [%s]", x);
308 putchar(')');
309 }
310 }
311 putchar('\n');
c1c952d2 312
c7a34993
MM
313 if (verbose || opt_kernel)
314 {
315 word subsys_v, subsys_d;
316 char ssnamebuf[256];
c1c952d2 317
2a39bc9e
VP
318 pci_fill_info(p, PCI_FILL_LABEL);
319
aecf5b35
TR
320 if (p->label)
321 printf("\tDeviceName: %s", p->label);
c7a34993
MM
322 get_subid(d, &subsys_v, &subsys_d);
323 if (subsys_v && subsys_v != 0xffff)
324 printf("\tSubsystem: %s\n",
325 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
326 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
327 p->vendor_id, p->device_id, subsys_v, subsys_d));
328 }
c1c952d2
MM
329}
330
a387042e
MM
331/*** Verbose output ***/
332
333static void
41d883cb 334show_size(u64 x)
a387042e 335{
0188807c 336 static const char suffix[][2] = { "", "K", "M", "G", "T" };
f2f8adaa 337 unsigned i;
a387042e
MM
338 if (!x)
339 return;
f2f8adaa 340 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
558f736b 341 if (x % 1024)
f2f8adaa
MW
342 break;
343 x /= 1024;
344 }
345 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
a387042e
MM
346}
347
41d883cb
MM
348static void
349show_range(char *prefix, u64 base, u64 limit, int is_64bit)
350{
351 if (base > limit)
352 {
353 if (!verbose)
354 return;
355 else if (verbose < 3)
356 {
357 printf("%s: None\n", prefix);
358 return;
359 }
360 }
361
362 printf("%s: ", prefix);
363 if (is_64bit)
3f30d0d1 364 printf("%016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit);
41d883cb
MM
365 else
366 printf("%08x-%08x", (unsigned) base, (unsigned) limit);
367 if (base <= limit)
368 show_size(limit - base + 1);
369 else
370 printf(" [empty]");
371 putchar('\n');
372}
373
a387042e
MM
374static void
375show_bases(struct device *d, int cnt)
376{
377 struct pci_dev *p = d->dev;
378 word cmd = get_conf_word(d, PCI_COMMAND);
379 int i;
659d438b 380 int virtual = 0;
a387042e 381
de7ef8bc 382 for (i=0; i<cnt; i++)
a387042e
MM
383 {
384 pciaddr_t pos = p->base_addr[i];
385 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
558f736b 386 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
a387042e
MM
387 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
388 if (flg == 0xffffffff)
389 flg = 0;
390 if (!pos && !flg && !len)
391 continue;
392 if (verbose > 1)
393 printf("\tRegion %d: ", i);
394 else
395 putchar('\t');
3d0a6d88 396 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b
SS
397 printf("[enhanced] ");
398 else if (pos && !flg) /* Reported by the OS, but not by the device */
a387042e
MM
399 {
400 printf("[virtual] ");
401 flg = pos;
659d438b 402 virtual = 1;
a387042e
MM
403 }
404 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
405 {
406 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
407 printf("I/O ports at ");
00bf6625 408 if (a || (cmd & PCI_COMMAND_IO))
a387042e
MM
409 printf(PCIADDR_PORT_FMT, a);
410 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
411 printf("<ignored>");
412 else
413 printf("<unassigned>");
659d438b 414 if (!virtual && !(cmd & PCI_COMMAND_IO))
a387042e
MM
415 printf(" [disabled]");
416 }
417 else
418 {
419 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
420 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
421 int done = 0;
422 u32 z = 0;
423
424 printf("Memory at ");
425 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
426 {
427 if (i >= cnt - 1)
428 {
429 printf("<invalid-64bit-slot>");
430 done = 1;
431 }
432 else
433 {
434 i++;
435 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
a387042e
MM
436 }
437 }
438 if (!done)
439 {
440 if (a)
441 printf(PCIADDR_T_FMT, a);
442 else
443 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
444 }
445 printf(" (%s, %sprefetchable)",
446 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
447 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
448 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
449 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
659d438b 450 if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
451 printf(" [disabled]");
452 }
453 show_size(len);
454 putchar('\n');
455 }
456}
457
458static void
459show_rom(struct device *d, int reg)
460{
461 struct pci_dev *p = d->dev;
462 pciaddr_t rom = p->rom_base_addr;
463 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
558f736b 464 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
a387042e
MM
465 u32 flg = get_conf_long(d, reg);
466 word cmd = get_conf_word(d, PCI_COMMAND);
659d438b 467 int virtual = 0;
a387042e
MM
468
469 if (!rom && !flg && !len)
470 return;
471 putchar('\t');
3d0a6d88 472 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b
SS
473 printf("[enhanced] ");
474 else if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
a387042e
MM
475 {
476 printf("[virtual] ");
477 flg = rom;
659d438b 478 virtual = 1;
a387042e
MM
479 }
480 printf("Expansion ROM at ");
481 if (rom & PCI_ROM_ADDRESS_MASK)
482 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
483 else if (flg & PCI_ROM_ADDRESS_MASK)
484 printf("<ignored>");
485 else
486 printf("<unassigned>");
487 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
488 printf(" [disabled]");
659d438b 489 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
490 printf(" [disabled by cmd]");
491 show_size(len);
492 putchar('\n');
493}
494
e95c8373
MM
495static void
496show_htype0(struct device *d)
497{
498 show_bases(d, 6);
6aa54f1b 499 show_rom(d, PCI_ROM_ADDRESS);
21510591 500 show_caps(d, PCI_CAPABILITY_LIST);
e95c8373
MM
501}
502
98e39e09
MM
503static void
504show_htype1(struct device *d)
505{
506 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
507 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
508 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
509 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
510 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
511 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
512 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
513 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
514 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
138c0385 515 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
98e39e09
MM
516 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
517
518 show_bases(d, 2);
519 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
520 get_conf_byte(d, PCI_PRIMARY_BUS),
521 get_conf_byte(d, PCI_SECONDARY_BUS),
522 get_conf_byte(d, PCI_SUBORDINATE_BUS),
523 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
524
525 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
526 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
527 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
528 else
529 {
530 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
531 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
532 if (io_type == PCI_IO_RANGE_TYPE_32)
533 {
534 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
535 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
536 }
41d883cb 537 show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0);
98e39e09
MM
538 }
539
540 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
541 mem_type)
542 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 543 else
98e39e09
MM
544 {
545 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
546 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
41d883cb 547 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0);
98e39e09
MM
548 }
549
550 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
551 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
552 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 553 else
98e39e09 554 {
41d883cb
MM
555 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
556 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
557 if (pref_type == PCI_PREF_RANGE_TYPE_64)
e306e911 558 {
41d883cb
MM
559 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
560 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
e306e911 561 }
41d883cb 562 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64));
98e39e09
MM
563 }
564
138c0385 565 if (verbose > 1)
c1c2c30e 566 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
138c0385
MM
567 FLAG(sec_stat, PCI_STATUS_66MHZ),
568 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
569 FLAG(sec_stat, PCI_STATUS_PARITY),
570 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
571 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
572 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
573 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
574 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
575 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
576 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
577 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
98e39e09 578
6aa54f1b 579 show_rom(d, PCI_ROM_ADDRESS1);
98e39e09
MM
580
581 if (verbose > 1)
da322bfb 582 {
b2a45526 583 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
da322bfb
MM
584 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
585 FLAG(brc, PCI_BRIDGE_CTL_SERR),
586 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
587 FLAG(brc, PCI_BRIDGE_CTL_VGA),
b2a45526 588 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
da322bfb
MM
589 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
590 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
591 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
592 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
593 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
594 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
595 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
596 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
597 }
e95c8373 598
21510591 599 show_caps(d, PCI_CAPABILITY_LIST);
98e39e09
MM
600}
601
2f48f637
MM
602static void
603show_htype2(struct device *d)
604{
96e4f295
MM
605 int i;
606 word cmd = get_conf_word(d, PCI_COMMAND);
607 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
84d437d6 608 word exca;
e306e911 609 int verb = verbose > 2;
96e4f295
MM
610
611 show_bases(d, 1);
612 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
613 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
614 get_conf_byte(d, PCI_CB_CARD_BUS),
615 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
616 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
de7ef8bc 617 for (i=0; i<2; i++)
96e4f295
MM
618 {
619 int p = 8*i;
620 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
621 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
f288d32f
BH
622 limit = limit + 0xfff;
623 if (base <= limit || verb)
81077814 624 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM
625 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
626 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
627 }
de7ef8bc 628 for (i=0; i<2; i++)
96e4f295
MM
629 {
630 int p = 8*i;
631 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
632 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
633 if (!(base & PCI_IO_RANGE_TYPE_32))
634 {
635 base &= 0xffff;
636 limit &= 0xffff;
637 }
638 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 639 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM
640 if (base <= limit || verb)
641 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
642 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM
643 }
644
645 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
646 printf("\tSecondary status: SERR\n");
647 if (verbose > 1)
648 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM
649 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
650 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
651 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
652 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
653 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
654 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
655 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
656 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
84d437d6
MM
657
658 if (d->config_cached < 128)
659 {
660 printf("\t<access denied to the rest>\n");
661 return;
662 }
663
664 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
96e4f295
MM
665 if (exca)
666 printf("\t16-bit legacy interface ports at %04x\n", exca);
21510591 667 show_caps(d, PCI_CB_CAPABILITY_LIST);
2f48f637
MM
668}
669
98e39e09
MM
670static void
671show_verbose(struct device *d)
672{
727ce158 673 struct pci_dev *p = d->dev;
98e39e09
MM
674 word status = get_conf_word(d, PCI_STATUS);
675 word cmd = get_conf_word(d, PCI_COMMAND);
c2b144ef 676 word class = p->device_class;
98e39e09
MM
677 byte bist = get_conf_byte(d, PCI_BIST);
678 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
679 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
680 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
681 byte max_lat, min_gnt;
682 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
ef6c9ec3 683 unsigned int irq;
98e39e09
MM
684
685 show_terse(d);
686
ef6c9ec3 687 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
2a39bc9e 688 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE);
ef6c9ec3
MM
689 irq = p->irq;
690
98e39e09
MM
691 switch (htype)
692 {
2f48f637
MM
693 case PCI_HEADER_TYPE_NORMAL:
694 if (class == PCI_CLASS_BRIDGE_PCI)
56164f4f 695 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
98e39e09
MM
696 max_lat = get_conf_byte(d, PCI_MAX_LAT);
697 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
98e39e09 698 break;
2f48f637 699 case PCI_HEADER_TYPE_BRIDGE:
cce2caac 700 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 701 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
001b9ac6 702 min_gnt = max_lat = 0;
2f48f637
MM
703 break;
704 case PCI_HEADER_TYPE_CARDBUS:
705 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 706 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
96e4f295 707 min_gnt = max_lat = 0;
98e39e09
MM
708 break;
709 default:
710 printf("\t!!! Unknown header type %02x\n", htype);
711 return;
712 }
713
2849a165
AC
714 if (p->phy_slot)
715 printf("\tPhysical Slot: %s\n", p->phy_slot);
716
98e39e09
MM
717 if (verbose > 1)
718 {
da322bfb 719 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
1c31d620
MM
720 FLAG(cmd, PCI_COMMAND_IO),
721 FLAG(cmd, PCI_COMMAND_MEMORY),
722 FLAG(cmd, PCI_COMMAND_MASTER),
723 FLAG(cmd, PCI_COMMAND_SPECIAL),
724 FLAG(cmd, PCI_COMMAND_INVALIDATE),
725 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
726 FLAG(cmd, PCI_COMMAND_PARITY),
727 FLAG(cmd, PCI_COMMAND_WAIT),
728 FLAG(cmd, PCI_COMMAND_SERR),
da322bfb
MM
729 FLAG(cmd, PCI_COMMAND_FAST_BACK),
730 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
731 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
1c31d620
MM
732 FLAG(status, PCI_STATUS_CAP_LIST),
733 FLAG(status, PCI_STATUS_66MHZ),
734 FLAG(status, PCI_STATUS_UDF),
735 FLAG(status, PCI_STATUS_FAST_BACK),
736 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM
737 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
738 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
739 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM
740 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
741 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
742 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
743 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
da322bfb
MM
744 FLAG(status, PCI_STATUS_DETECTED_PARITY),
745 FLAG(status, PCI_STATUS_INTx));
98e39e09
MM
746 if (cmd & PCI_COMMAND_MASTER)
747 {
56164f4f
MM
748 printf("\tLatency: %d", latency);
749 if (min_gnt || max_lat)
750 {
751 printf(" (");
752 if (min_gnt)
753 printf("%dns min", min_gnt*250);
754 if (min_gnt && max_lat)
755 printf(", ");
756 if (max_lat)
757 printf("%dns max", max_lat*250);
758 putchar(')');
759 }
98e39e09 760 if (cache_line)
7a61b93c 761 printf(", Cache Line Size: %d bytes", cache_line * 4);
98e39e09
MM
762 putchar('\n');
763 }
727ce158 764 if (int_pin || irq)
9739916e 765 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
727ce158 766 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
1d9d1a01
MM
767 if (p->numa_node != -1)
768 printf("\tNUMA node: %d\n", p->numa_node);
98e39e09
MM
769 }
770 else
771 {
772 printf("\tFlags: ");
773 if (cmd & PCI_COMMAND_MASTER)
774 printf("bus master, ");
775 if (cmd & PCI_COMMAND_VGA_PALETTE)
776 printf("VGA palette snoop, ");
777 if (cmd & PCI_COMMAND_WAIT)
778 printf("stepping, ");
779 if (cmd & PCI_COMMAND_FAST_BACK)
780 printf("fast Back2Back, ");
781 if (status & PCI_STATUS_66MHZ)
c1c2c30e 782 printf("66MHz, ");
98e39e09
MM
783 if (status & PCI_STATUS_UDF)
784 printf("user-definable features, ");
785 printf("%s devsel",
786 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
787 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
788 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
789 if (cmd & PCI_COMMAND_MASTER)
790 printf(", latency %d", latency);
727ce158 791 if (irq)
9739916e 792 printf(", IRQ " PCIIRQ_FMT, irq);
90ec4a6d
MW
793 if (p->numa_node != -1)
794 printf(", NUMA node %d", p->numa_node);
98e39e09
MM
795 putchar('\n');
796 }
797
798 if (bist & PCI_BIST_CAPABLE)
799 {
800 if (bist & PCI_BIST_START)
801 printf("\tBIST is running\n");
802 else
803 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
804 }
805
806 switch (htype)
807 {
2f48f637 808 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
809 show_htype0(d);
810 break;
2f48f637 811 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
812 show_htype1(d);
813 break;
2f48f637
MM
814 case PCI_HEADER_TYPE_CARDBUS:
815 show_htype2(d);
816 break;
98e39e09
MM
817 }
818}
819
a387042e
MM
820/*** Machine-readable dumps ***/
821
98e39e09
MM
822static void
823show_hex_dump(struct device *d)
824{
09817437 825 unsigned int i, cnt;
98e39e09 826
84d437d6 827 cnt = d->config_cached;
a387042e 828 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
09817437
MM
829 {
830 cnt = 256;
a387042e 831 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
09817437
MM
832 cnt = 4096;
833 }
834
de7ef8bc 835 for (i=0; i<cnt; i++)
98e39e09
MM
836 {
837 if (! (i & 15))
838 printf("%02x:", i);
839 printf(" %02x", get_conf_byte(d, i));
840 if ((i & 15) == 15)
841 putchar('\n');
842 }
843}
844
13081e57
MM
845static void
846print_shell_escaped(char *c)
847{
848 printf(" \"");
849 while (*c)
850 {
851 if (*c == '"' || *c == '\\')
852 putchar('\\');
853 putchar(*c++);
854 }
855 putchar('"');
856}
857
0a33d0ec
MM
858static void
859show_machine(struct device *d)
860{
727ce158 861 struct pci_dev *p = d->dev;
0a33d0ec 862 int c;
c1c952d2 863 word sv_id, sd_id;
727ce158 864 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f 865
c1c952d2 866 get_subid(d, &sv_id, &sd_id);
0a33d0ec
MM
867
868 if (verbose)
869 {
ef6c9ec3 870 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE);
a387042e 871 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
84c8d1bb
MM
872 show_slot_name(d);
873 putchar('\n');
727ce158 874 printf("Class:\t%s\n",
c2b144ef 875 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
727ce158 876 printf("Vendor:\t%s\n",
224707ba 877 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
727ce158 878 printf("Device:\t%s\n",
224707ba 879 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
ce503b7f
MM
880 if (sv_id && sv_id != 0xffff)
881 {
727ce158 882 printf("SVendor:\t%s\n",
a99c0d69 883 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
727ce158 884 printf("SDevice:\t%s\n",
d4798a32 885 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 886 }
2849a165
AC
887 if (p->phy_slot)
888 printf("PhySlot:\t%s\n", p->phy_slot);
0a33d0ec
MM
889 if (c = get_conf_byte(d, PCI_REVISION_ID))
890 printf("Rev:\t%02x\n", c);
891 if (c = get_conf_byte(d, PCI_CLASS_PROG))
892 printf("ProgIf:\t%02x\n", c);
11339c0d
MM
893 if (opt_kernel)
894 show_kernel_machine(d);
1d9d1a01
MM
895 if (p->numa_node != -1)
896 printf("NUMANode:\t%d\n", p->numa_node);
0a33d0ec
MM
897 }
898 else
899 {
84c8d1bb 900 show_slot_name(d);
13081e57
MM
901 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
902 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
903 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
0a33d0ec
MM
904 if (c = get_conf_byte(d, PCI_REVISION_ID))
905 printf(" -r%02x", c);
906 if (c = get_conf_byte(d, PCI_CLASS_PROG))
907 printf(" -p%02x", c);
ce503b7f 908 if (sv_id && sv_id != 0xffff)
13081e57
MM
909 {
910 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
911 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
912 }
ce503b7f
MM
913 else
914 printf(" \"\" \"\"");
0a33d0ec
MM
915 putchar('\n');
916 }
917}
918
a387042e
MM
919/*** Main show function ***/
920
c7a34993 921void
1812a795
MM
922show_device(struct device *d)
923{
a387042e 924 if (opt_machine)
1812a795 925 show_machine(d);
1812a795 926 else
11339c0d
MM
927 {
928 if (verbose)
929 show_verbose(d);
930 else
931 show_terse(d);
932 if (opt_kernel || verbose)
933 show_kernel(d);
934 }
a387042e 935 if (opt_hex)
1812a795 936 show_hex_dump(d);
a387042e 937 if (verbose || opt_hex)
1812a795
MM
938 putchar('\n');
939}
940
98e39e09
MM
941static void
942show(void)
943{
944 struct device *d;
945
de7ef8bc 946 for (d=first_dev; d; d=d->next)
1812a795 947 show_device(d);
98e39e09
MM
948}
949
950/* Main */
951
952int
953main(int argc, char **argv)
954{
955 int i;
e4842ff3 956 char *msg;
98e39e09 957
496d4021
MM
958 if (argc == 2 && !strcmp(argv[1], "--version"))
959 {
960 puts("lspci version " PCIUTILS_VERSION);
961 return 0;
962 }
727ce158
MM
963
964 pacc = pci_alloc();
965 pacc->error = die;
966 pci_filter_init(pacc, &filter);
967
98e39e09
MM
968 while ((i = getopt(argc, argv, options)) != -1)
969 switch (i)
970 {
971 case 'n':
bc2eed2d 972 pacc->numeric_ids++;
98e39e09
MM
973 break;
974 case 'v':
975 verbose++;
976 break;
977 case 'b':
727ce158 978 pacc->buscentric = 1;
98e39e09 979 break;
e4842ff3 980 case 's':
727ce158 981 if (msg = pci_filter_parse_slot(&filter, optarg))
b7fd8e19 982 die("-s: %s", msg);
98e39e09 983 break;
e4842ff3 984 case 'd':
727ce158
MM
985 if (msg = pci_filter_parse_id(&filter, optarg))
986 die("-d: %s", msg);
98e39e09
MM
987 break;
988 case 'x':
a387042e 989 opt_hex++;
98e39e09 990 break;
6d0dc0fd 991 case 't':
a387042e 992 opt_tree++;
6d0dc0fd 993 break;
18928b91 994 case 'i':
cc062b4a 995 pci_set_name_list_path(pacc, optarg, 0);
18928b91 996 break;
0a33d0ec 997 case 'm':
a387042e 998 opt_machine++;
0a33d0ec 999 break;
c1c952d2
MM
1000 case 'p':
1001 opt_pcimap = optarg;
1002 break;
1b99a704 1003#ifdef PCI_OS_LINUX
11339c0d
MM
1004 case 'k':
1005 opt_kernel++;
1006 break;
1b99a704 1007#endif
1812a795 1008 case 'M':
a387042e 1009 opt_map_mode++;
1812a795 1010 break;
af61eb25 1011 case 'D':
a387042e 1012 opt_domains = 2;
af61eb25 1013 break;
e022789d 1014#ifdef PCI_USE_DNS
cca2f7c6
MM
1015 case 'q':
1016 opt_query_dns++;
1017 break;
1018 case 'Q':
1019 opt_query_all = 1;
1020 break;
e022789d
MM
1021#else
1022 case 'q':
1023 case 'Q':
1024 die("DNS queries are not available in this version");
1025#endif
98e39e09 1026 default:
727ce158
MM
1027 if (parse_generic_option(i, pacc, optarg))
1028 break;
98e39e09 1029 bad:
727ce158 1030 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
1031 return 1;
1032 }
1033 if (optind < argc)
1034 goto bad;
1035
cca2f7c6
MM
1036 if (opt_query_dns)
1037 {
1038 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1039 if (opt_query_dns > 1)
1040 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1041 }
1042 if (opt_query_all)
1043 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1044
727ce158 1045 pci_init(pacc);
a387042e 1046 if (opt_map_mode)
1812a795 1047 map_the_bus();
6d0dc0fd 1048 else
1812a795
MM
1049 {
1050 scan_devices();
1051 sort_them();
a387042e 1052 if (opt_tree)
1812a795
MM
1053 show_forest();
1054 else
1055 show();
1056 }
17ec7e70 1057 show_kernel_cleanup();
727ce158 1058 pci_cleanup(pacc);
98e39e09 1059
934e7e36 1060 return (seen_errors ? 2 : 0);
98e39e09 1061}