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Updated pci.ids to today's snapshot
[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
4284af58 2 * The PCI Utilities -- List All PCI Devices
98e39e09 3 *
41d883cb 4 * Copyright (c) 1997--2016 Martin Mares <mj@ucw.cz>
98e39e09
MM
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9#include <stdio.h>
10#include <string.h>
11#include <stdlib.h>
727ce158 12#include <stdarg.h>
98e39e09 13
c7a34993 14#include "lspci.h"
98e39e09
MM
15
16/* Options */
17
c7a34993 18int verbose; /* Show detailed information */
a387042e 19static int opt_hex; /* Show contents of config space as hexadecimal numbers */
c7a34993 20struct pci_filter filter; /* Device filter */
a387042e
MM
21static int opt_tree; /* Show bus tree */
22static int opt_machine; /* Generate machine-readable output */
23static int opt_map_mode; /* Bus mapping mode enabled */
24static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
11339c0d 25static int opt_kernel; /* Show kernel drivers */
cca2f7c6
MM
26static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
27static int opt_query_all; /* Query the DNS for all entries */
c7a34993 28char *opt_pcimap; /* Override path to Linux modules.pcimap */
98e39e09 29
81afa98c
MM
30const char program_name[] = "lspci";
31
cca2f7c6
MM
32static char options[] = "nvbxs:d:ti:mgp:qkMDQ" GENERIC_OPTIONS ;
33
34static char help_msg[] =
35"Usage: lspci [<switches>]\n"
36"\n"
1b99a704
MM
37"Basic display modes:\n"
38"-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
39"-t\t\tShow bus tree\n"
40"\n"
41"Display options:\n"
42"-v\t\tBe verbose (-vv for very verbose)\n"
43#ifdef PCI_OS_LINUX
44"-k\t\tShow kernel drivers handling each device\n"
45#endif
46"-x\t\tShow hex-dump of the standard part of the config space\n"
47"-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
48"-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
49"-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
50"-D\t\tAlways show domain numbers\n"
51"\n"
52"Resolving of device ID's to names:\n"
cca2f7c6
MM
53"-n\t\tShow numeric ID's\n"
54"-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
55#ifdef PCI_USE_DNS
56"-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
57"-qq\t\tAs above, but re-query locally cached entries\n"
58"-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
59#endif
1b99a704
MM
60"\n"
61"Selection of devices:\n"
cca2f7c6 62"-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
4d1c9525 63"-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
1b99a704
MM
64"\n"
65"Other options:\n"
cca2f7c6 66"-i <file>\tUse specified ID database instead of %s\n"
c1c952d2 67#ifdef PCI_OS_LINUX
cca2f7c6 68"-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
c1c952d2 69#endif
cca2f7c6 70"-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
1b99a704
MM
71"\n"
72"PCI access options:\n"
727ce158
MM
73GENERIC_HELP
74;
98e39e09 75
a387042e 76/*** Our view of the PCI bus ***/
98e39e09 77
c7a34993
MM
78struct pci_access *pacc;
79struct device *first_dev;
934e7e36 80static int seen_errors;
98e39e09 81
c7a34993 82int
ec25b52d
MM
83config_fetch(struct device *d, unsigned int pos, unsigned int len)
84{
85 unsigned int end = pos+len;
86 int result;
84d437d6
MM
87
88 while (pos < d->config_bufsize && len && d->present[pos])
89 pos++, len--;
90 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
91 len--;
92 if (!len)
ec25b52d 93 return 1;
84d437d6 94
ec25b52d
MM
95 if (end > d->config_bufsize)
96 {
84d437d6 97 int orig_size = d->config_bufsize;
ec25b52d
MM
98 while (end > d->config_bufsize)
99 d->config_bufsize *= 2;
100 d->config = xrealloc(d->config, d->config_bufsize);
84d437d6 101 d->present = xrealloc(d->present, d->config_bufsize);
1ac3a99d 102 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
ec25b52d
MM
103 }
104 result = pci_read_block(d->dev, pos, d->config + pos, len);
84d437d6
MM
105 if (result)
106 memset(d->present + pos, 1, len);
ec25b52d
MM
107 return result;
108}
109
c7a34993 110struct device *
1812a795
MM
111scan_device(struct pci_dev *p)
112{
1812a795
MM
113 struct device *d;
114
a387042e
MM
115 if (p->domain && !opt_domains)
116 opt_domains = 1;
1812a795
MM
117 if (!pci_filter_match(&filter, p))
118 return NULL;
119 d = xmalloc(sizeof(struct device));
1ac3a99d 120 memset(d, 0, sizeof(*d));
1812a795 121 d->dev = p;
84d437d6 122 d->config_cached = d->config_bufsize = 64;
ec25b52d 123 d->config = xmalloc(64);
84d437d6
MM
124 d->present = xmalloc(64);
125 memset(d->present, 1, 64);
09817437 126 if (!pci_read_block(p, 0, d->config, 64))
934e7e36
MM
127 {
128 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
129 p->domain, p->bus, p->dev, p->func);
130 seen_errors++;
131 return NULL;
132 }
09817437 133 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
1812a795 134 {
ec25b52d
MM
135 /* For cardbus bridges, we need to fetch 64 bytes more to get the
136 * full standard header... */
84d437d6
MM
137 if (config_fetch(d, 64, 64))
138 d->config_cached += 64;
1812a795 139 }
84d437d6 140 pci_setup_cache(p, d->config, d->config_cached);
ef6c9ec3 141 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
1812a795
MM
142 return d;
143}
144
98e39e09 145static void
727ce158 146scan_devices(void)
98e39e09
MM
147{
148 struct device *d;
727ce158 149 struct pci_dev *p;
98e39e09 150
727ce158 151 pci_scan_bus(pacc);
de7ef8bc 152 for (p=pacc->devices; p; p=p->next)
1812a795
MM
153 if (d = scan_device(p))
154 {
155 d->next = first_dev;
156 first_dev = d;
157 }
98e39e09
MM
158}
159
a387042e 160/*** Config space accesses ***/
98e39e09 161
84d437d6
MM
162static void
163check_conf_range(struct device *d, unsigned int pos, unsigned int len)
164{
165 while (len)
166 if (!d->present[pos])
167 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
168 else
169 pos++, len--;
170}
171
c7a34993 172byte
98e39e09
MM
173get_conf_byte(struct device *d, unsigned int pos)
174{
84d437d6 175 check_conf_range(d, pos, 1);
98e39e09
MM
176 return d->config[pos];
177}
178
c7a34993 179word
98e39e09
MM
180get_conf_word(struct device *d, unsigned int pos)
181{
84d437d6 182 check_conf_range(d, pos, 2);
98e39e09
MM
183 return d->config[pos] | (d->config[pos+1] << 8);
184}
185
c7a34993 186u32
98e39e09
MM
187get_conf_long(struct device *d, unsigned int pos)
188{
84d437d6 189 check_conf_range(d, pos, 4);
98e39e09
MM
190 return d->config[pos] |
191 (d->config[pos+1] << 8) |
192 (d->config[pos+2] << 16) |
193 (d->config[pos+3] << 24);
194}
195
a387042e 196/*** Sorting ***/
98e39e09
MM
197
198static int
199compare_them(const void *A, const void *B)
200{
727ce158
MM
201 const struct pci_dev *a = (*(const struct device **)A)->dev;
202 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09 203
84c8d1bb
MM
204 if (a->domain < b->domain)
205 return -1;
206 if (a->domain > b->domain)
207 return 1;
98e39e09
MM
208 if (a->bus < b->bus)
209 return -1;
210 if (a->bus > b->bus)
211 return 1;
727ce158
MM
212 if (a->dev < b->dev)
213 return -1;
214 if (a->dev > b->dev)
215 return 1;
216 if (a->func < b->func)
98e39e09 217 return -1;
727ce158 218 if (a->func > b->func)
98e39e09
MM
219 return 1;
220 return 0;
221}
222
223static void
224sort_them(void)
225{
727ce158 226 struct device **index, **h, **last_dev;
98e39e09
MM
227 int cnt;
228 struct device *d;
229
c7a34993
MM
230 cnt = 0;
231 for (d=first_dev; d; d=d->next)
232 cnt++;
233 h = index = alloca(sizeof(struct device *) * cnt);
234 for (d=first_dev; d; d=d->next)
235 *h++ = d;
236 qsort(index, cnt, sizeof(struct device *), compare_them);
237 last_dev = &first_dev;
238 h = index;
239 while (cnt--)
240 {
241 *last_dev = *h;
242 last_dev = &(*h)->next;
243 h++;
c1c952d2 244 }
c7a34993 245 *last_dev = NULL;
c1c952d2
MM
246}
247
c7a34993 248/*** Normal output ***/
11339c0d 249
c7a34993
MM
250static void
251show_slot_name(struct device *d)
c1c952d2 252{
c7a34993 253 struct pci_dev *p = d->dev;
c1c952d2 254
c7a34993
MM
255 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
256 printf("%04x:", p->domain);
257 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
c1c952d2
MM
258}
259
c7a34993
MM
260void
261get_subid(struct device *d, word *subvp, word *subdp)
c1c952d2 262{
c7a34993 263 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
11339c0d 264
c7a34993
MM
265 if (htype == PCI_HEADER_TYPE_NORMAL)
266 {
267 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
268 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
269 }
270 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
271 {
272 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
273 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
274 }
275 else
276 *subvp = *subdp = 0xffff;
c1c952d2
MM
277}
278
11339c0d 279static void
c7a34993 280show_terse(struct device *d)
11339c0d 281{
c7a34993
MM
282 int c;
283 struct pci_dev *p = d->dev;
284 char classbuf[128], devbuf[128];
11339c0d 285
c7a34993
MM
286 show_slot_name(d);
287 printf(" %s: %s",
288 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
289 PCI_LOOKUP_CLASS,
290 p->device_class),
291 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
292 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
293 p->vendor_id, p->device_id));
294 if (c = get_conf_byte(d, PCI_REVISION_ID))
295 printf(" (rev %02x)", c);
296 if (verbose)
297 {
298 char *x;
299 c = get_conf_byte(d, PCI_CLASS_PROG);
300 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
301 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
302 p->device_class, c);
303 if (c || x)
304 {
305 printf(" (prog-if %02x", c);
306 if (x)
307 printf(" [%s]", x);
308 putchar(')');
309 }
310 }
311 putchar('\n');
c1c952d2 312
c7a34993
MM
313 if (verbose || opt_kernel)
314 {
315 word subsys_v, subsys_d;
316 char ssnamebuf[256];
c1c952d2 317
aecf5b35
TR
318 if (p->label)
319 printf("\tDeviceName: %s", p->label);
c7a34993
MM
320 get_subid(d, &subsys_v, &subsys_d);
321 if (subsys_v && subsys_v != 0xffff)
322 printf("\tSubsystem: %s\n",
323 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
324 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
325 p->vendor_id, p->device_id, subsys_v, subsys_d));
326 }
c1c952d2
MM
327}
328
a387042e
MM
329/*** Verbose output ***/
330
331static void
41d883cb 332show_size(u64 x)
a387042e 333{
0188807c 334 static const char suffix[][2] = { "", "K", "M", "G", "T" };
f2f8adaa 335 unsigned i;
a387042e
MM
336 if (!x)
337 return;
f2f8adaa 338 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
558f736b 339 if (x % 1024)
f2f8adaa
MW
340 break;
341 x /= 1024;
342 }
343 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
a387042e
MM
344}
345
41d883cb
MM
346static void
347show_range(char *prefix, u64 base, u64 limit, int is_64bit)
348{
349 if (base > limit)
350 {
351 if (!verbose)
352 return;
353 else if (verbose < 3)
354 {
355 printf("%s: None\n", prefix);
356 return;
357 }
358 }
359
360 printf("%s: ", prefix);
361 if (is_64bit)
3f30d0d1 362 printf("%016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit);
41d883cb
MM
363 else
364 printf("%08x-%08x", (unsigned) base, (unsigned) limit);
365 if (base <= limit)
366 show_size(limit - base + 1);
367 else
368 printf(" [empty]");
369 putchar('\n');
370}
371
a387042e
MM
372static void
373show_bases(struct device *d, int cnt)
374{
375 struct pci_dev *p = d->dev;
376 word cmd = get_conf_word(d, PCI_COMMAND);
377 int i;
659d438b 378 int virtual = 0;
a387042e 379
de7ef8bc 380 for (i=0; i<cnt; i++)
a387042e
MM
381 {
382 pciaddr_t pos = p->base_addr[i];
383 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
558f736b 384 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
a387042e
MM
385 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
386 if (flg == 0xffffffff)
387 flg = 0;
388 if (!pos && !flg && !len)
389 continue;
390 if (verbose > 1)
391 printf("\tRegion %d: ", i);
392 else
393 putchar('\t');
3d0a6d88 394 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b
SS
395 printf("[enhanced] ");
396 else if (pos && !flg) /* Reported by the OS, but not by the device */
a387042e
MM
397 {
398 printf("[virtual] ");
399 flg = pos;
659d438b 400 virtual = 1;
a387042e
MM
401 }
402 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
403 {
404 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
405 printf("I/O ports at ");
00bf6625 406 if (a || (cmd & PCI_COMMAND_IO))
a387042e
MM
407 printf(PCIADDR_PORT_FMT, a);
408 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
409 printf("<ignored>");
410 else
411 printf("<unassigned>");
659d438b 412 if (!virtual && !(cmd & PCI_COMMAND_IO))
a387042e
MM
413 printf(" [disabled]");
414 }
415 else
416 {
417 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
418 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
419 int done = 0;
420 u32 z = 0;
421
422 printf("Memory at ");
423 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
424 {
425 if (i >= cnt - 1)
426 {
427 printf("<invalid-64bit-slot>");
428 done = 1;
429 }
430 else
431 {
432 i++;
433 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
a387042e
MM
434 }
435 }
436 if (!done)
437 {
438 if (a)
439 printf(PCIADDR_T_FMT, a);
440 else
441 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
442 }
443 printf(" (%s, %sprefetchable)",
444 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
445 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
446 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
447 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
659d438b 448 if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
449 printf(" [disabled]");
450 }
451 show_size(len);
452 putchar('\n');
453 }
454}
455
456static void
457show_rom(struct device *d, int reg)
458{
459 struct pci_dev *p = d->dev;
460 pciaddr_t rom = p->rom_base_addr;
461 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
558f736b 462 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
a387042e
MM
463 u32 flg = get_conf_long(d, reg);
464 word cmd = get_conf_word(d, PCI_COMMAND);
659d438b 465 int virtual = 0;
a387042e
MM
466
467 if (!rom && !flg && !len)
468 return;
469 putchar('\t');
3d0a6d88 470 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
558f736b
SS
471 printf("[enhanced] ");
472 else if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK))
a387042e
MM
473 {
474 printf("[virtual] ");
475 flg = rom;
659d438b 476 virtual = 1;
a387042e
MM
477 }
478 printf("Expansion ROM at ");
479 if (rom & PCI_ROM_ADDRESS_MASK)
480 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
481 else if (flg & PCI_ROM_ADDRESS_MASK)
482 printf("<ignored>");
483 else
484 printf("<unassigned>");
485 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
486 printf(" [disabled]");
659d438b 487 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
a387042e
MM
488 printf(" [disabled by cmd]");
489 show_size(len);
490 putchar('\n');
491}
492
e95c8373
MM
493static void
494show_htype0(struct device *d)
495{
496 show_bases(d, 6);
6aa54f1b 497 show_rom(d, PCI_ROM_ADDRESS);
21510591 498 show_caps(d, PCI_CAPABILITY_LIST);
e95c8373
MM
499}
500
98e39e09
MM
501static void
502show_htype1(struct device *d)
503{
504 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
505 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
506 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
507 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
508 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
509 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
510 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
511 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
512 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
138c0385 513 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
98e39e09
MM
514 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
515
516 show_bases(d, 2);
517 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
518 get_conf_byte(d, PCI_PRIMARY_BUS),
519 get_conf_byte(d, PCI_SECONDARY_BUS),
520 get_conf_byte(d, PCI_SUBORDINATE_BUS),
521 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
522
523 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
524 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
525 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
526 else
527 {
528 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
529 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
530 if (io_type == PCI_IO_RANGE_TYPE_32)
531 {
532 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
533 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
534 }
41d883cb 535 show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0);
98e39e09
MM
536 }
537
538 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
539 mem_type)
540 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 541 else
98e39e09
MM
542 {
543 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
544 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
41d883cb 545 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0);
98e39e09
MM
546 }
547
548 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
549 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
550 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 551 else
98e39e09 552 {
41d883cb
MM
553 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
554 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
555 if (pref_type == PCI_PREF_RANGE_TYPE_64)
e306e911 556 {
41d883cb
MM
557 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
558 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
e306e911 559 }
41d883cb 560 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64));
98e39e09
MM
561 }
562
138c0385 563 if (verbose > 1)
c1c2c30e 564 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
138c0385
MM
565 FLAG(sec_stat, PCI_STATUS_66MHZ),
566 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
567 FLAG(sec_stat, PCI_STATUS_PARITY),
568 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
569 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
570 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
571 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
572 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
573 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
574 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
575 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
98e39e09 576
6aa54f1b 577 show_rom(d, PCI_ROM_ADDRESS1);
98e39e09
MM
578
579 if (verbose > 1)
da322bfb
MM
580 {
581 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
582 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
583 FLAG(brc, PCI_BRIDGE_CTL_SERR),
584 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
585 FLAG(brc, PCI_BRIDGE_CTL_VGA),
586 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
587 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
588 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
589 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
590 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
591 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
592 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
593 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
594 }
e95c8373 595
21510591 596 show_caps(d, PCI_CAPABILITY_LIST);
98e39e09
MM
597}
598
2f48f637
MM
599static void
600show_htype2(struct device *d)
601{
96e4f295
MM
602 int i;
603 word cmd = get_conf_word(d, PCI_COMMAND);
604 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
84d437d6 605 word exca;
e306e911 606 int verb = verbose > 2;
96e4f295
MM
607
608 show_bases(d, 1);
609 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
610 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
611 get_conf_byte(d, PCI_CB_CARD_BUS),
612 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
613 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
de7ef8bc 614 for (i=0; i<2; i++)
96e4f295
MM
615 {
616 int p = 8*i;
617 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
618 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
f288d32f
BH
619 limit = limit + 0xfff;
620 if (base <= limit || verb)
81077814 621 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
96e4f295
MM
622 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
623 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
624 }
de7ef8bc 625 for (i=0; i<2; i++)
96e4f295
MM
626 {
627 int p = 8*i;
628 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
629 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
630 if (!(base & PCI_IO_RANGE_TYPE_32))
631 {
632 base &= 0xffff;
633 limit &= 0xffff;
634 }
635 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 636 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM
637 if (base <= limit || verb)
638 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
639 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM
640 }
641
642 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
643 printf("\tSecondary status: SERR\n");
644 if (verbose > 1)
645 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM
646 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
647 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
648 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
649 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
650 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
651 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
652 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
653 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
84d437d6
MM
654
655 if (d->config_cached < 128)
656 {
657 printf("\t<access denied to the rest>\n");
658 return;
659 }
660
661 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
96e4f295
MM
662 if (exca)
663 printf("\t16-bit legacy interface ports at %04x\n", exca);
21510591 664 show_caps(d, PCI_CB_CAPABILITY_LIST);
2f48f637
MM
665}
666
98e39e09
MM
667static void
668show_verbose(struct device *d)
669{
727ce158 670 struct pci_dev *p = d->dev;
98e39e09
MM
671 word status = get_conf_word(d, PCI_STATUS);
672 word cmd = get_conf_word(d, PCI_COMMAND);
c2b144ef 673 word class = p->device_class;
98e39e09
MM
674 byte bist = get_conf_byte(d, PCI_BIST);
675 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
676 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
677 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
678 byte max_lat, min_gnt;
679 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
ef6c9ec3 680 unsigned int irq;
98e39e09
MM
681
682 show_terse(d);
683
ef6c9ec3
MM
684 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
685 PCI_FILL_PHYS_SLOT | PCI_FILL_LABEL | PCI_FILL_NUMA_NODE);
686 irq = p->irq;
687
98e39e09
MM
688 switch (htype)
689 {
2f48f637
MM
690 case PCI_HEADER_TYPE_NORMAL:
691 if (class == PCI_CLASS_BRIDGE_PCI)
56164f4f 692 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
98e39e09
MM
693 max_lat = get_conf_byte(d, PCI_MAX_LAT);
694 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
98e39e09 695 break;
2f48f637 696 case PCI_HEADER_TYPE_BRIDGE:
cce2caac 697 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 698 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
001b9ac6 699 min_gnt = max_lat = 0;
2f48f637
MM
700 break;
701 case PCI_HEADER_TYPE_CARDBUS:
702 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
56164f4f 703 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
96e4f295 704 min_gnt = max_lat = 0;
98e39e09
MM
705 break;
706 default:
707 printf("\t!!! Unknown header type %02x\n", htype);
708 return;
709 }
710
2849a165
AC
711 if (p->phy_slot)
712 printf("\tPhysical Slot: %s\n", p->phy_slot);
713
98e39e09
MM
714 if (verbose > 1)
715 {
da322bfb 716 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
1c31d620
MM
717 FLAG(cmd, PCI_COMMAND_IO),
718 FLAG(cmd, PCI_COMMAND_MEMORY),
719 FLAG(cmd, PCI_COMMAND_MASTER),
720 FLAG(cmd, PCI_COMMAND_SPECIAL),
721 FLAG(cmd, PCI_COMMAND_INVALIDATE),
722 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
723 FLAG(cmd, PCI_COMMAND_PARITY),
724 FLAG(cmd, PCI_COMMAND_WAIT),
725 FLAG(cmd, PCI_COMMAND_SERR),
da322bfb
MM
726 FLAG(cmd, PCI_COMMAND_FAST_BACK),
727 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
728 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
1c31d620
MM
729 FLAG(status, PCI_STATUS_CAP_LIST),
730 FLAG(status, PCI_STATUS_66MHZ),
731 FLAG(status, PCI_STATUS_UDF),
732 FLAG(status, PCI_STATUS_FAST_BACK),
733 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM
734 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
735 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
736 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM
737 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
738 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
739 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
740 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
da322bfb
MM
741 FLAG(status, PCI_STATUS_DETECTED_PARITY),
742 FLAG(status, PCI_STATUS_INTx));
98e39e09
MM
743 if (cmd & PCI_COMMAND_MASTER)
744 {
56164f4f
MM
745 printf("\tLatency: %d", latency);
746 if (min_gnt || max_lat)
747 {
748 printf(" (");
749 if (min_gnt)
750 printf("%dns min", min_gnt*250);
751 if (min_gnt && max_lat)
752 printf(", ");
753 if (max_lat)
754 printf("%dns max", max_lat*250);
755 putchar(')');
756 }
98e39e09 757 if (cache_line)
7a61b93c 758 printf(", Cache Line Size: %d bytes", cache_line * 4);
98e39e09
MM
759 putchar('\n');
760 }
727ce158 761 if (int_pin || irq)
9739916e 762 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
727ce158 763 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
1d9d1a01
MM
764 if (p->numa_node != -1)
765 printf("\tNUMA node: %d\n", p->numa_node);
98e39e09
MM
766 }
767 else
768 {
769 printf("\tFlags: ");
770 if (cmd & PCI_COMMAND_MASTER)
771 printf("bus master, ");
772 if (cmd & PCI_COMMAND_VGA_PALETTE)
773 printf("VGA palette snoop, ");
774 if (cmd & PCI_COMMAND_WAIT)
775 printf("stepping, ");
776 if (cmd & PCI_COMMAND_FAST_BACK)
777 printf("fast Back2Back, ");
778 if (status & PCI_STATUS_66MHZ)
c1c2c30e 779 printf("66MHz, ");
98e39e09
MM
780 if (status & PCI_STATUS_UDF)
781 printf("user-definable features, ");
782 printf("%s devsel",
783 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
784 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
785 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
786 if (cmd & PCI_COMMAND_MASTER)
787 printf(", latency %d", latency);
727ce158 788 if (irq)
9739916e 789 printf(", IRQ " PCIIRQ_FMT, irq);
90ec4a6d
MW
790 if (p->numa_node != -1)
791 printf(", NUMA node %d", p->numa_node);
98e39e09
MM
792 putchar('\n');
793 }
794
795 if (bist & PCI_BIST_CAPABLE)
796 {
797 if (bist & PCI_BIST_START)
798 printf("\tBIST is running\n");
799 else
800 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
801 }
802
803 switch (htype)
804 {
2f48f637 805 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
806 show_htype0(d);
807 break;
2f48f637 808 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
809 show_htype1(d);
810 break;
2f48f637
MM
811 case PCI_HEADER_TYPE_CARDBUS:
812 show_htype2(d);
813 break;
98e39e09
MM
814 }
815}
816
a387042e
MM
817/*** Machine-readable dumps ***/
818
98e39e09
MM
819static void
820show_hex_dump(struct device *d)
821{
09817437 822 unsigned int i, cnt;
98e39e09 823
84d437d6 824 cnt = d->config_cached;
a387042e 825 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
09817437
MM
826 {
827 cnt = 256;
a387042e 828 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
09817437
MM
829 cnt = 4096;
830 }
831
de7ef8bc 832 for (i=0; i<cnt; i++)
98e39e09
MM
833 {
834 if (! (i & 15))
835 printf("%02x:", i);
836 printf(" %02x", get_conf_byte(d, i));
837 if ((i & 15) == 15)
838 putchar('\n');
839 }
840}
841
13081e57
MM
842static void
843print_shell_escaped(char *c)
844{
845 printf(" \"");
846 while (*c)
847 {
848 if (*c == '"' || *c == '\\')
849 putchar('\\');
850 putchar(*c++);
851 }
852 putchar('"');
853}
854
0a33d0ec
MM
855static void
856show_machine(struct device *d)
857{
727ce158 858 struct pci_dev *p = d->dev;
0a33d0ec 859 int c;
c1c952d2 860 word sv_id, sd_id;
727ce158 861 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f 862
c1c952d2 863 get_subid(d, &sv_id, &sd_id);
0a33d0ec
MM
864
865 if (verbose)
866 {
ef6c9ec3 867 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE);
a387042e 868 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
84c8d1bb
MM
869 show_slot_name(d);
870 putchar('\n');
727ce158 871 printf("Class:\t%s\n",
c2b144ef 872 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
727ce158 873 printf("Vendor:\t%s\n",
224707ba 874 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
727ce158 875 printf("Device:\t%s\n",
224707ba 876 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
ce503b7f
MM
877 if (sv_id && sv_id != 0xffff)
878 {
727ce158 879 printf("SVendor:\t%s\n",
a99c0d69 880 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
727ce158 881 printf("SDevice:\t%s\n",
d4798a32 882 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 883 }
2849a165
AC
884 if (p->phy_slot)
885 printf("PhySlot:\t%s\n", p->phy_slot);
0a33d0ec
MM
886 if (c = get_conf_byte(d, PCI_REVISION_ID))
887 printf("Rev:\t%02x\n", c);
888 if (c = get_conf_byte(d, PCI_CLASS_PROG))
889 printf("ProgIf:\t%02x\n", c);
11339c0d
MM
890 if (opt_kernel)
891 show_kernel_machine(d);
1d9d1a01
MM
892 if (p->numa_node != -1)
893 printf("NUMANode:\t%d\n", p->numa_node);
0a33d0ec
MM
894 }
895 else
896 {
84c8d1bb 897 show_slot_name(d);
13081e57
MM
898 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
899 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
900 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
0a33d0ec
MM
901 if (c = get_conf_byte(d, PCI_REVISION_ID))
902 printf(" -r%02x", c);
903 if (c = get_conf_byte(d, PCI_CLASS_PROG))
904 printf(" -p%02x", c);
ce503b7f 905 if (sv_id && sv_id != 0xffff)
13081e57
MM
906 {
907 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
908 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
909 }
ce503b7f
MM
910 else
911 printf(" \"\" \"\"");
0a33d0ec
MM
912 putchar('\n');
913 }
914}
915
a387042e
MM
916/*** Main show function ***/
917
c7a34993 918void
1812a795
MM
919show_device(struct device *d)
920{
a387042e 921 if (opt_machine)
1812a795 922 show_machine(d);
1812a795 923 else
11339c0d
MM
924 {
925 if (verbose)
926 show_verbose(d);
927 else
928 show_terse(d);
929 if (opt_kernel || verbose)
930 show_kernel(d);
931 }
a387042e 932 if (opt_hex)
1812a795 933 show_hex_dump(d);
a387042e 934 if (verbose || opt_hex)
1812a795
MM
935 putchar('\n');
936}
937
98e39e09
MM
938static void
939show(void)
940{
941 struct device *d;
942
de7ef8bc 943 for (d=first_dev; d; d=d->next)
1812a795 944 show_device(d);
98e39e09
MM
945}
946
947/* Main */
948
949int
950main(int argc, char **argv)
951{
952 int i;
e4842ff3 953 char *msg;
98e39e09 954
496d4021
MM
955 if (argc == 2 && !strcmp(argv[1], "--version"))
956 {
957 puts("lspci version " PCIUTILS_VERSION);
958 return 0;
959 }
727ce158
MM
960
961 pacc = pci_alloc();
962 pacc->error = die;
963 pci_filter_init(pacc, &filter);
964
98e39e09
MM
965 while ((i = getopt(argc, argv, options)) != -1)
966 switch (i)
967 {
968 case 'n':
bc2eed2d 969 pacc->numeric_ids++;
98e39e09
MM
970 break;
971 case 'v':
972 verbose++;
973 break;
974 case 'b':
727ce158 975 pacc->buscentric = 1;
98e39e09 976 break;
e4842ff3 977 case 's':
727ce158 978 if (msg = pci_filter_parse_slot(&filter, optarg))
b7fd8e19 979 die("-s: %s", msg);
98e39e09 980 break;
e4842ff3 981 case 'd':
727ce158
MM
982 if (msg = pci_filter_parse_id(&filter, optarg))
983 die("-d: %s", msg);
98e39e09
MM
984 break;
985 case 'x':
a387042e 986 opt_hex++;
98e39e09 987 break;
6d0dc0fd 988 case 't':
a387042e 989 opt_tree++;
6d0dc0fd 990 break;
18928b91 991 case 'i':
cc062b4a 992 pci_set_name_list_path(pacc, optarg, 0);
18928b91 993 break;
0a33d0ec 994 case 'm':
a387042e 995 opt_machine++;
0a33d0ec 996 break;
c1c952d2
MM
997 case 'p':
998 opt_pcimap = optarg;
999 break;
1b99a704 1000#ifdef PCI_OS_LINUX
11339c0d
MM
1001 case 'k':
1002 opt_kernel++;
1003 break;
1b99a704 1004#endif
1812a795 1005 case 'M':
a387042e 1006 opt_map_mode++;
1812a795 1007 break;
af61eb25 1008 case 'D':
a387042e 1009 opt_domains = 2;
af61eb25 1010 break;
e022789d 1011#ifdef PCI_USE_DNS
cca2f7c6
MM
1012 case 'q':
1013 opt_query_dns++;
1014 break;
1015 case 'Q':
1016 opt_query_all = 1;
1017 break;
e022789d
MM
1018#else
1019 case 'q':
1020 case 'Q':
1021 die("DNS queries are not available in this version");
1022#endif
98e39e09 1023 default:
727ce158
MM
1024 if (parse_generic_option(i, pacc, optarg))
1025 break;
98e39e09 1026 bad:
727ce158 1027 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
1028 return 1;
1029 }
1030 if (optind < argc)
1031 goto bad;
1032
cca2f7c6
MM
1033 if (opt_query_dns)
1034 {
1035 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1036 if (opt_query_dns > 1)
1037 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1038 }
1039 if (opt_query_all)
1040 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1041
727ce158 1042 pci_init(pacc);
a387042e 1043 if (opt_map_mode)
1812a795 1044 map_the_bus();
6d0dc0fd 1045 else
1812a795
MM
1046 {
1047 scan_devices();
1048 sort_them();
a387042e 1049 if (opt_tree)
1812a795
MM
1050 show_forest();
1051 else
1052 show();
1053 }
17ec7e70 1054 show_kernel_cleanup();
727ce158 1055 pci_cleanup(pacc);
98e39e09 1056
934e7e36 1057 return (seen_errors ? 2 : 0);
98e39e09 1058}