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[gdb/testsuite] Fix silent timeout in gdb.multi/multi-target.exp
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
efc3a950
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12020-04-01 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR gas/25756
4 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
5 * testsuite/gas/i386/localpic.s: Add a test for relocation
6 against local absolute symbol.
7 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
8 * testsuite/gas/i386/localpic.d: Updated.
9 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
10 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
11
15d47c3a
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122020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
13
14 PR gas/25732
15 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
16 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
17 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
18 testsuite/gas/i386/x86-64-jump.d.
19 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
20 Incorporate changes to
21 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
22 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
23 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
24 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
25 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
26
876678f0
MR
272020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
28
29 PR 25611
30 PR 25614
31 * dwarf2dbg.c: Do not include "bignum.h".
32
d1a89da5
NC
332020-03-30 Nelson Chu <nelson.chu@sifive.com>
34
35 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
36 * testsuite/gas/riscv/alias-csr.s: Likewise.
37 * testsuite/gas/riscv/no-aliases-csr.d: Move this
38 to priv-reg-pseudo-noalias.
39 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
40 * testsuite/gas/riscv/bad-csr.l: Likewise.
41 * testsuite/gas/riscv/bad-csr.s: Likewise.
42 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
43 * testsuite/gas/riscv/satp.s: Likewise.
44 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
45 csr instruction, including alias-csr testcase.
46 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
47 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
48 pseudo instruction with objdump -Mno-aliases.
49 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
50 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
51 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
52 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
53 * testsuite/gas/riscv/priv-reg.s: Likewise.
54 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
55 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
56 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
57
b7780957
J
582020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
59
60 * config/obj-coff.c (obj_coff_section): Set the bss flag on
61 sections with the "b" attribute.
62
d1023b5d
AM
632020-03-22 Alan Modra <amodra@gmail.com>
64
65 * testsuite/gas/s12z/truncated.d: Update expected output.
66
0d832e7f
SB
672020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
68
69 PR 25690
70 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
71 * doc/c-z80.texi: Update documentation.
72
327ef784
NC
732020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
74
75 PR 25641
76 PR 25668
77 PR 25633
78 Fix disassembling ED+A4/AC/B4/BC opcodes.
79 Fix assembling lines containing colonless label and instruction
80 with first operand inside parentheses.
81 Fix registration of unsupported by target CPU registers.
82 * config/tc-z80.c: See above.
83 * config/tc-z80.h: See above.
84 * testsuite/gas/z80/colonless.d: Update test.
85 * testsuite/gas/z80/colonless.s: Likewise.
86 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
87 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
88 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
89 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
90 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
91 * testsuite/gas/z80/unsup_regs.s: Likewise.
92 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
93 * testsuite/gas/z80/z80.exp: Likewise.
94 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
95 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
96 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
97
66d1f7cc
AV
982020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
99
100 PR 25660
101 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
102 (parse_operands): Handle new operand codes.
103 (do_neon_dyadic_long): Make shape check accept the scalar variants.
104 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
105 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
106 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
107 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
108 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
109 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
110 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
111
9e8f1c90
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1122020-03-11 H.J. Lu <hongjiu.lu@intel.com>
113
114 * NEWS: Mention x86 assembler options for CVE-2020-0551.
115
97b4a8f7
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1162020-03-11 H.J. Lu <hongjiu.lu@intel.com>
117
118 * testsuite/gas/i386/i386.exp: Run new tests.
119 * testsuite/gas/i386/lfence-byte.d: New file.
120 * testsuite/gas/i386/lfence-byte.e: Likewise.
121 * testsuite/gas/i386/lfence-byte.s: Likewise.
122 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
123 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
124 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
125 * testsuite/gas/i386/lfence-indbr.e: Likewise.
126 * testsuite/gas/i386/lfence-indbr.s: Likewise.
127 * testsuite/gas/i386/lfence-load.d: Likewise.
128 * testsuite/gas/i386/lfence-load.s: Likewise.
129 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
130 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
131 * testsuite/gas/i386/lfence-ret.s: Likewise.
132 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
133 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
134 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
135 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
136 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
137 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
138 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
139 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
140 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
141 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
142 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
143 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
144
ae531041
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1452020-03-11 H.J. Lu <hongjiu.lu@intel.com>
146
147 * config/tc-i386.c (lfence_after_load): New.
148 (lfence_before_indirect_branch_kind): New.
149 (lfence_before_indirect_branch): New.
150 (lfence_before_ret_kind): New.
151 (lfence_before_ret): New.
152 (last_insn): New.
153 (load_insn_p): New.
154 (insert_lfence_after): New.
155 (insert_lfence_before): New.
156 (md_assemble): Call insert_lfence_before and insert_lfence_after.
157 Set last_insn.
158 (OPTION_MLFENCE_AFTER_LOAD): New.
159 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
160 (OPTION_MLFENCE_BEFORE_RET): New.
161 (md_longopts): Add -mlfence-after-load=,
162 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
163 (md_parse_option): Handle -mlfence-after-load=,
164 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
165 (md_show_usage): Display -mlfence-after-load=,
166 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
167 (i386_cons_align): New.
168 * config/tc-i386.h (i386_cons_align): New.
169 (md_cons_align): New.
170 * doc/c-i386.texi: Document -mlfence-after-load=,
171 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
172
5496f3c6
NC
1732020-03-11 Nick Clifton <nickc@redhat.com>
174
175 PR 25611
176 PR 25614
177 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
178 (DWARF2_FILE_SIZE_NAME): Default to -1.
179 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
180 whichever is higher.
181 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
182 (NUM_MD5_BYTES): Define.
183 (struct file entry): Add md5 field.
184 (get_filenum): Delete and replace with...
185 (get_basename): New function.
186 (get_directory_table_entry): New function.
187 (allocate_filenum): New function.
188 (allocate_filename_to_slot): New function.
189 (dwarf2_where): Use new functions.
190 (dwarf2_directive_filename): Add support for extended .file
191 pseudo-op.
192 (dwarf2_directive_loc): Allow the use of file number zero with
193 DWARF 5 or higher.
194 (out_file_list): Rename to...
195 (out_dir_and_file_list): Add DWARF 5 support.
196 (out_debug_line): Emit extra values into the section header for
197 DWARF 5.
198 (out_debug_str): Allow for file 0 to be used with DWARF 5.
199 * doc/as.texi (.file): Update the description of this pseudo-op.
200 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
201 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
202 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
203 * NEWS: Mention the new feature.
204
a6a1f5e0
AM
2052020-03-10 Alan Modra <amodra@gmail.com>
206
207 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
208 to avoid signed overflow.
209 * config/tc-mcore.c (md_assemble): Likewise.
210 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
211 * config/tc-nds32.c (SET_ADDEND): Likewise.
212 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
213
3fabc179
JB
2142020-03-09 Jan Beulich <jbeulich@suse.com>
215
216 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
217 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
218 testsuite/gas/i386/avx-intel.d: Adjust expectations.
219
190e5fc8
AM
2202020-03-07 Alan Modra <amodra@gmail.com>
221
222 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
223 first column.
224
84d9ab33
NC
2252020-03-06 Nick Clifton <nickc@redhat.com>
226
227 PR 25614
228 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
229 0 if the dwarf_level is 5 or more. Complain if a filename follows
230 a file 0.
231 * testsuite/gas/elf/dwarf-5-file0.s: New test.
232 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
233 * testsuite/gas/elf/elf.exp: Run the new test.
234
235 PR 25612
236 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
237 * doc/as.texi: Fix another typo.
238
31bf1864
NC
2392020-03-06 Nick Clifton <nickc@redhat.com>
240
241 PR 25612
242 * as.c (dwarf_level): Define.
243 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
244 (parse_args): Add support for the new options.
245 as.h (dwarf_level): Prototype.
246 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
247 value.
248 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
249 (DWARF2_LINE_VERSION): Remove definition.
250 * doc/as.texi: Document the new options.
251
3c968de5
NC
2522020-03-06 Nick Clifton <nickc@redhat.com>
253
254 PR 25572
255 * as.c (main): Allow matching input and outputs when they are
256 not regular files.
257
bc49bfd8
JB
2582020-03-06 Jan Beulich <jbeulich@suse.com>
259
260 * config/tc-i386.c (match_mem_size): Generalize broadcast special
261 casing.
262 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
263 one of byte/word/dword/qword is set alongside a SIMD register in
264 a template's operand.
265
4873e243
JB
2662020-03-06 Jan Beulich <jbeulich@suse.com>
267
268 * config/tc-i386.c (match_template): Extend code in logic
269 rejecting certain suffixes in certain modes to also cover mask
270 register use and VecSIB. Drop special casing of broadcast. Skip
271 immediates in the check.
272
e365e234
JB
2732020-03-06 Jan Beulich <jbeulich@suse.com>
274
275 * config/tc-i386.c (match_template): Fold duplicate code in
276 logic rejecting certain suffixes in certain modes. Drop
277 pointless "else".
278
4ed21b58
JB
2792020-03-06 Jan Beulich <jbeulich@suse.com>
280
281 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
282 alongside !norex64 ones.
283 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
284 with both 32- and 64-bit GPR operands.
285 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
286 32- and 64-bit GPR operands.
287 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
288 testsuite/gas/i386/x86-64-avx512bw.d,
289 testsuite/gas/i386/x86-64-avx512f-intel.d,
290 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
291
643bb870
JB
2922020-03-06 Jan Beulich <jbeulich@suse.com>
293
294 * config/tc-i386.c (md_assemble): Drop use of rex64.
295 (process_suffix): For REX.W for 64-bit CRC32.
296
a23b33b3
JB
2972020-03-06 Jan Beulich <jbeulich@suse.com>
298
299 * config/tc-i386.c (i386_addressing_mode): For 32-bit
300 addressing for MPX insns without base/index.
301 * testsuite/gas/i386/mpx-16bit.s,
302 * testsuite/gas/i386/mpx-16bit.d: New.
303 * testsuite/gas/i386/i386.exp: Run new test.
304
a0497384
JB
3052020-03-06 Jan Beulich <jbeulich@suse.com>
306
307 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
308 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
309 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
310 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
311 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
312 as well as a BSWAP one.
313 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
314 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
315 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
316 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
317 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
318 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
319 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
320 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
321 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
322 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
323 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
324 testsuite/gas/i386/vmx.d: Adjust expectations.
325
b630c145
JB
3262020-03-06 Jan Beulich <jbeulich@suse.com>
327
328 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
329 from having their operands swapped.
330 * testsuite/gas/i386/waitpkg.s,
331 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
332 3-operand cases as well as testing of 16-bit code generation.
333 * testsuite/gas/i386/waitpkg.d,
334 testsuite/gas/i386/waitpkg-intel.d,
335 testsuite/gas/i386/x86-64-waitpkg.d,
336 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
337
de48783e
NC
3382020-03-04 Nelson Chu <nelson.chu@sifive.com>
339
dee35d02
NC
340 * config/tc-riscv.c (percent_op_utype): Support the modifier
341 %got_pcrel_hi.
342 * doc/c-riscv.texi: Add documentation.
343 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
344 modifier %got_pcrel_hi.
345 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
346 * testsuite/gas/riscv/relax-reloc.d: Likewise.
347 * testsuite/gas/riscv/relax-reloc.s: Likewise.
348
de48783e
NC
349 * doc/c-riscv.texi (relocation modifiers): Add documentation.
350 (RISC-V-Formats): Update the section name from "Instruction Formats"
351 to "RISC-V Instruction Formats".
352
749479c8
AO
3532020-03-04 Alexandre Oliva <oliva@adacore.com>
354
355 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
356 detected in a section which does not have at least 4 byte
357 alignment.
358 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
359 * testsuite/gas/arm/ldr-t.s: Likewise.
360 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
361 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
362 disassembly, ignoring any NOPs that may have been inserted because
363 of section alignment.
364 * testsuite/gas/arm/ldr-t.d: Likewise.
365
a847e322
JB
3662020-03-04 Jan Beulich <jbeulich@suse.com>
367
368 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
369 * doc/c-i386.texi: Mention sev_es.
370 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
371 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
372 expectations.
373 * testsuite/gas/i386/arch-13-znver1.d,
374 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
375
3cd7f3e3
L
3762020-03-03 H.J. Lu <hongjiu.lu@intel.com>
377
378 * config/tc-i386.c (match_template): Replace ignoresize and
379 defaultsize with mnemonicsize.
380 (process_suffix): Likewise.
381
b8ba1385
SB
3822020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
383
384 PR 25627
385 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
386 instruction LD IY,(HL).
387 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
388 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
389 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
390 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
391
10d97a0f
L
3922020-03-03 H.J. Lu <hongjiu.lu@intel.com>
393
394 PR gas/25622
395 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
396 x86-64-default-suffix-avx.
397 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
398 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
399 * testsuite/gas/i386/noreg64.d: Updated.
400 * testsuite/gas/i386/noreg64.l: Likewise.
401 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
402 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
403 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
404
8326546e
SB
4052020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
406
407 PR 25604
408 * config/tc-z80.c (contains_register): Prevent an illegal memory
409 access when checking an expression for a register name.
410
e3e896e6
AM
4112020-03-03 Alan Modra <amodra@gmail.com>
412
413 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
414 support.
415
a4dd6c97
AM
4162020-03-02 Alan Modra <amodra@gmail.com>
417
418 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
419 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
420 and .sbss sections.
421 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
422 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
423 (s3_s_score_lcomm): Likewise.
424 * config/tc-score7.c: Similarly.
425 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
426
dec7b24b
YS
4272020-02-28 YunQiang Su <syq@debian.org>
428
429 PR gas/25539
430 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
431 to handle multi-labels.
432 (has_label_name): New.
433
cceb53b8
MM
4342020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
435
436 * config/tc-arm.c (enum pred_instruction_type): Remove
437 NEUTRAL_IT_NO_VPT_INSN predication type.
438 (cxn_handle_predication): Modify to require condition suffixes.
439 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
440 * testsuite/gas/arm/cde-scalar.s: Update test.
441 * testsuite/gas/arm/cde-warnings.l: Update test.
442 * testsuite/gas/arm/cde-warnings.s: Update test.
443
da3ec71f
AM
4442020-02-26 Alan Modra <amodra@gmail.com>
445
446 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
447 N_() on empty string.
448
42135cad
AM
4492020-02-26 Alan Modra <amodra@gmail.com>
450
451 * read.c (read_a_source_file): Call strncpy with length one
452 less than size of original_case_string.
453
dc1e8a47
AM
4542020-02-26 Alan Modra <amodra@gmail.com>
455
456 * config/obj-elf.c: Indent labels correctly.
457 * config/obj-macho.c: Likewise.
458 * config/tc-aarch64.c: Likewise.
459 * config/tc-alpha.c: Likewise.
460 * config/tc-arm.c: Likewise.
461 * config/tc-cr16.c: Likewise.
462 * config/tc-crx.c: Likewise.
463 * config/tc-frv.c: Likewise.
464 * config/tc-i386-intel.c: Likewise.
465 * config/tc-i386.c: Likewise.
466 * config/tc-ia64.c: Likewise.
467 * config/tc-mn10200.c: Likewise.
468 * config/tc-mn10300.c: Likewise.
469 * config/tc-nds32.c: Likewise.
470 * config/tc-riscv.c: Likewise.
471 * config/tc-s12z.c: Likewise.
472 * config/tc-xtensa.c: Likewise.
473 * config/tc-z80.c: Likewise.
474 * read.c: Likewise.
475 * symbols.c: Likewise.
476 * write.c: Likewise.
477
bd0cf5a6
NC
4782020-02-20 Nelson Chu <nelson.chu@sifive.com>
479
54b2aec1
NC
480 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
481 we are assembling instruction with CSR. Call riscv_csr_read_only_check
482 after parsing all arguments.
483 (enum csr_insn_type): New enum is used to classify the CSR instruction.
484 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
485 are used to check if we write a read-only CSR by the CSR instruction.
486 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
487 all CSR for the read-only CSR checking.
488 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
489 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
490 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
491 all CSR instructions for the read-only CSR checking.
492 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
493 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
494
2ca89224
NC
495 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
496 (riscv_opts): Initialize it.
497 (reg_lookup_internal): Check the `riscv_opts.csr_check`
498 before doing the CSR checking.
499 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
500 (md_longopts): Add mcsr-check and mno-csr-check.
501 (md_parse_option): Handle new enum option values.
502 (s_riscv_option): Handle new long options.
503 * doc/c-riscv.texi: Add description for the new .option and assembler
504 options.
505 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
506 the CSR checking.
507 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
508
bd0cf5a6
NC
509 * config/tc-riscv.c (csr_extra_hash): New.
510 (enum riscv_csr_class): New enum. Used to decide
511 whether or not this CSR is legal in the current ISA string.
512 (struct riscv_csr_extra): New structure to hold all extra information
513 of CSR.
514 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
515 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
516 Call hash_reg_name to insert CSR address into reg_names_hash.
517 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
518 Decide whether the CSR is valid according to the csr_extra_hash.
519 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
520 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
521 not a boolean. This is same as riscv_init_csr_hash, so keep the
522 consistent usage.
523 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
524 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
525 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
526 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
527 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
528 f-ext CSR are not allowed.
529 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
530 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
531 source file is `priv-reg.s`, and the ISA is rv64if, so the
532 rv32-only CSR are not allowed.
533 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
534
10a95fcc
AM
5352020-02-21 Alan Modra <amodra@gmail.com>
536
537 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
538 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
539
dda2980f
AM
5402020-02-21 Alan Modra <amodra@gmail.com>
541
542 PR 25569
543 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
544 on section size adjustment, instead perform another write if
545 exec header size is larger than section size.
546
bd3380bc
NC
5472020-02-19 Nelson Chu <nelson.chu@sifive.com>
548
549 * doc/c-riscv.texi: Add the doc entries for -march-attr/
550 -mno-arch-attr command line options.
551
fa164239
JW
5522020-02-19 Nelson Chu <nelson.chu@sifive.com>
553
554 * testsuite/gas/riscv/c-add-addi.d: New testcase.
555 * testsuite/gas/riscv/c-add-addi.s: Likewise.
556
fcaaac0a
SB
5572020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
558
559 PR 25576
560 * config/tc-z80.c (md_parse_option): Do not use an underscore
561 prefix for local labels in SDCC compatability mode.
562 (z80_start_line_hook): Remove SDCC dollar label support.
563 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
564 * testsuite/gas/z80/sdcc.s: Likewise.
565
5662020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
567
568 PR 25517
569 * config/tc-z80.c: Add -march option.
570 * doc/as.texi: Update Z80 documentation.
571 * doc/c-z80.texi: Likewise.
572 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
573 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
574 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
575 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
576 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
577 * testsuite/gas/z80/gbz80_all.d: Likewise.
578 * testsuite/gas/z80/r800_extra.d: Likewise.
579 * testsuite/gas/z80/r800_ii8.d: Likewise.
580 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
581 * testsuite/gas/z80/sdcc.d: Likewise.
582 * testsuite/gas/z80/z180.d: Likewise.
583 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
584 * testsuite/gas/z80/z80_doc.d: Likewise.
585 * testsuite/gas/z80/z80_ii8.d: Likewise.
586 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
587 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
588 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
589 * testsuite/gas/z80/z80_sli.d: Likewise.
590 * testsuite/gas/z80/z80n_all.d: Likewise.
591 * testsuite/gas/z80/z80n_reloc.d: Likewise.
592
a7e12755
L
5932020-02-19 H.J. Lu <hongjiu.lu@intel.com>
594
595 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
596 with GNU_PROPERTY_X86_FEATURE_2_MMX.
597 * testsuite/gas/i386/i386.exp: Run property-3 and
598 x86-64-property-3.
599 * testsuite/gas/i386/property-3.d: New file.
600 * testsuite/gas/i386/property-3.s: Likewise.
601 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
602
272a84b1
L
6032020-02-17 H.J. Lu <hongjiu.lu@intel.com>
604
605 * config/tc-i386.c (cpu_arch): Add .popcnt.
606 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
607 Add a tab before @samp{.sse4a}.
608
c8f8eebc
JB
6092020-02-17 Jan Beulich <jbeulich@suse.com>
610
611 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
612 for AddrPrefixOpReg templates. Combine the two pieces of
613 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
614 mode.
615
eedb0f2c
JB
6162020-02-17 Jan Beulich <jbeulich@suse.com>
617
618 PR gas/14439
619 * config/tc-i386.c (md_assemble): Also suppress operand
620 swapping for MONITOR{,X} and MWAIT{,X}.
621 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
622 Add Intel syntax monitor/mwait tests.
623 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
624 Adjust expectations.
625 *testsuite/gas/i386/sse3-intel.d,
626 testsuite/gas/i386/x86-64-sse3-intel.d: New.
627 * testsuite/gas/i386/i386.exp: Run new tests.
628
b9915cbc
JB
6292020-02-17 Jan Beulich <jbeulich@suse.com>
630
631 PR gas/6518
632 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
633 [XYZ]MMWord memory operand ambiguity recognition logic (largely
634 re-indentation).
635 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
636 cases.
637 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
638 * testsuite/gas/i386/avx512dq-inval.l,
639 testsuite/gas/i386/inval-avx.l,
640 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
641 * testsuite/gas/i386/avx512vl-ambig.s,
642 testsuite/gas/i386/avx512vl-ambig.l: New.
643 * testsuite/gas/i386/i386.exp: Run new test.
644
af5c13b0
L
6452020-02-16 H.J. Lu <hongjiu.lu@intel.com>
646
647 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
648 nosse4.
649 * doc/c-i386.texi: Document sse4a and nosse4a.
650
07d98387
L
6512020-02-14 H.J. Lu <hongjiu.lu@intel.com>
652
653 * doc/c-i386.texi: Remove the old movsx and movzx documentation
654 for AT&T syntax.
655
65fca059
JB
6562020-02-14 Jan Beulich <jbeulich@suse.com>
657
658 PR gas/25438
659 * config/tc-i386.c (md_assemble): Move movsx/movzx special
660 casing ...
661 (process_suffix): ... here. Consider just the first operand
662 initially.
663 (check_long_reg): Drop opcode 0x63 special case again.
664 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
665 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
666 Move ambiguous operand size tests ...
667 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
668 testsuite/gas/i386/noreg64.s: ... here.
669 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
670 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
671 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
672 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
673 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
674 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
675 testsuite/gas/i386/x86-64-movsxd.d,
676 testsuite/gas/i386/x86-64-movsxd-intel.d,
677 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
678 Adjust expectations.
679 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
680 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
681 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
682 * testsuite/gas/i386/i386.exp: Run new tests.
683
b6773884
JB
6842020-02-14 Jan Beulich <jbeulich@suse.com>
685
686 * config/tc-i386.c (process_operands): Also skip segment
687 override prefix emission if it matches an already present one.
688 * testsuite/gas/i386/prefix32.s: Add double segment override
689 cases.
690 * testsuite/gas/i386/prefix32.l: Adjust expectations.
691
92334ad2
JB
6922020-02-14 Jan Beulich <jbeulich@suse.com>
693
694 * config/tc-i386.c (process_operands): Drop ineffectual segment
695 overrides when optimizing.
696 * testsuite/gas/i386/lea-optimize.d: New.
697 * testsuite/gas/i386/i386.exp: Run new test.
698
6992020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
700
701 * config/tc-i386.c (process_operands): Also check insn prefix
702 for ineffectual segment override warning. Don't cover possible
703 VEX/EVEX encoded insns there.
704 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
705 testsuite/gas/i386/lea.e: New.
706 * testsuite/gas/i386/i386.exp: Run new test.
707
0e6724de
L
7082020-02-14 H.J. Lu <hongjiu.lu@intel.com>
709
710 PR gas/25438
711 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
712 syntax.
713
292676c1
L
7142020-02-13 Fangrui Song <maskray@google.com>
715 H.J. Lu <hongjiu.lu@intel.com>
716
717 PR gas/25551
718 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
719 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
720 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
721 * testsuite/gas/i386/relax-5.d: New file.
722 * testsuite/gas/i386/relax-5.s: Likewise.
723 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
724 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
725
7deea9aa
JB
7262020-02-13 Jan Beulich <jbeulich@suse.com>
727
728 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
729 "nosse4" entry.
730
6c0946d0
JB
7312020-02-12 Jan Beulich <jbeulich@suse.com>
732
733 * config/tc-i386.c (avx512): New (at file scope), moved from
734 (check_VecOperands): ... here.
735 (process_suffix): Add [XYZ]MMword operand size handling.
736 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
737 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
738 tests.
739 * testsuite/gas/i386/avx512dq-inval.l,
740 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
741
5990e377
JB
7422020-02-12 Jan Beulich <jbeulich@suse.com>
743
744 PR gas/24546
745 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
746 code only.
747 * config/tc-i386-intel.c (i386_intel_operand): Also handle
748 CALL/JMP in O_tbyte_ptr case.
749 * doc/c-i386.texi: Mention far call and full pointer load ISA
750 differences.
751 * testsuite/gas/i386/x86-64-branch-3.s,
752 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
753 * testsuite/gas/i386/x86-64-branch-3.d,
754 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
755 * testsuite/gas/i386/x86-64-branch-5.l,
756 testsuite/gas/i386/x86-64-branch-5.s: New.
757 * testsuite/gas/i386/i386.exp: Run new test.
758
9706160a
JB
7592020-02-12 Jan Beulich <jbeulich@suse.com>
760
761 PR gas/25438
762 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
763 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
764 64-bit-only warning.
765 (check_word_reg): Consistently error on mismatching register
766 size and suffix.
767 * testsuite/gas/i386/general.s: Replace dword GPR with word one
768 for movw. Replace suffix / GPR for orb.
769 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
770 byte GPRs as well as ones for inb/outb with a word accumulator.
771 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
772 testsuite/gas/i386/inval.l: Adjust expectations.
773
5de4d9ef
JB
7742020-02-12 Jan Beulich <jbeulich@suse.com>
775
776 * config/tc-i386.c (operand_type_register_match): Also fall
777 through initial two if()-s when the template allows for a GPR
778 operand. Adjust comment.
779
50128d0c
JB
7802020-02-11 Jan Beulich <jbeulich@suse.com>
781
782 (struct _i386_insn): New field "short_form".
783 (optimize_encoding): Drop setting of shortform field.
784 (process_suffix): Set i.short_form. Replace shortform use.
785 (process_operands): Replace shortform use.
786
1ed818b4
MM
7872020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
788
789 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
790 loop initial declaration.
791
5aae9ae9
MM
7922020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
793
794 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
795 instructions that can have 5 arguments.
796 (enum operand_parse_code): Add new operands.
797 (parse_operands): Account for new operands.
798 (S5): New macro.
799 (enum neon_shape_el): Introduce P suffixes for coprocessor.
800 (neon_select_shape): Account for P suffix.
801 (LOW1): Move macro to global position.
802 (HI4): Move macro to global position.
803 (vcx_assign_vec_d): New.
804 (vcx_assign_vec_m): New.
805 (vcx_assign_vec_n): New.
806 (enum vcx_reg_type): New.
807 (vcx_get_reg_type): New.
808 (vcx_size_pos): New.
809 (vcx_vec_pos): New.
810 (vcx_handle_shape): New.
811 (vcx_ensure_register_in_range): New.
812 (vcx_handle_register_arguments): New.
813 (vcx_handle_insn_block): New.
814 (vcx_handle_common_checks): New.
815 (do_vcx1): New.
816 (do_vcx2): New.
817 (do_vcx3): New.
818 * testsuite/gas/arm/cde-missing-fp.d: New test.
819 * testsuite/gas/arm/cde-missing-fp.l: New test.
820 * testsuite/gas/arm/cde-missing-mve.d: New test.
821 * testsuite/gas/arm/cde-missing-mve.l: New test.
822 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
823 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
824 * testsuite/gas/arm/cde-mve.s: New test.
825 * testsuite/gas/arm/cde-warnings.l:
826 * testsuite/gas/arm/cde-warnings.s:
827 * testsuite/gas/arm/cde.d:
828 * testsuite/gas/arm/cde.s:
829
4934a27c
MM
8302020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
831 Matthew Malcomson <matthew.malcomson@arm.com>
832
833 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
834 CDE coprocessor that can be enabled.
835 (enum pred_instruction_type): New pred type.
836 (BAD_NO_VPT): New error message.
837 (BAD_CDE): New error message.
838 (BAD_CDE_COPROC): New error message.
839 (enum operand_parse_code): Add new immediate operands.
840 (parse_operands): Account for new immediate operands.
841 (check_cde_operand): New.
842 (cde_coproc_enabled): New.
843 (cde_coproc_pos): New.
844 (cde_handle_coproc): New.
845 (cxn_handle_predication): New.
846 (do_custom_instruction_1): New.
847 (do_custom_instruction_2): New.
848 (do_custom_instruction_3): New.
849 (do_cx1): New.
850 (do_cx1a): New.
851 (do_cx1d): New.
852 (do_cx1da): New.
853 (do_cx2): New.
854 (do_cx2a): New.
855 (do_cx2d): New.
856 (do_cx2da): New.
857 (do_cx3): New.
858 (do_cx3a): New.
859 (do_cx3d): New.
860 (do_cx3da): New.
861 (handle_pred_state): Define new IT block behaviour.
862 (insns): Add newn CX*{,d}{,a} instructions.
863 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
864 Define new cdecp extension strings.
865 * doc/c-arm.texi: Document new cdecp extension arguments.
866 * testsuite/gas/arm/cde-scalar.d: New test.
867 * testsuite/gas/arm/cde-scalar.s: New test.
868 * testsuite/gas/arm/cde-warnings.d: New test.
869 * testsuite/gas/arm/cde-warnings.l: New test.
870 * testsuite/gas/arm/cde-warnings.s: New test.
871 * testsuite/gas/arm/cde.d: New test.
872 * testsuite/gas/arm/cde.s: New test.
873
4b5aaf5f
L
8742020-02-10 H.J. Lu <hongjiu.lu@intel.com>
875
876 PR gas/25516
877 * config/tc-i386.c (intel64): Renamed to ...
878 (isa64): This.
879 (match_template): Accept Intel64 only instruction by default.
880 (i386_displacement): Updated.
881 (md_parse_option): Updated.
882 * c-i386.texi: Update -mamd64/-mintel64 documentation.
883 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
884 -mamd64 to x86-64-sysenter-amd.
885 * testsuite/gas/i386/x86-64-sysenter.d: New file.
886
33176d91
AM
8872020-02-10 Alan Modra <amodra@gmail.com>
888
889 * config/obj-elf.c (obj_elf_change_section): Error for section
890 type, attr or entsize changes in assembly.
891 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
892 * testsuite/gas/elf/section5.l: Update.
893
82194874
AM
8942020-02-10 Alan Modra <amodra@gmail.com>
895
896 * output-file.c (output_file_close): Do a normal close when
897 flag_always_generate_output.
898 * write.c (write_object_file): Don't stop output when
899 flag_always_generate_output.
900
9fc0b501
SB
9012020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
902
903 PR 25469
904 * config/tc-z80.c: Add -gbz80 command line option to generate code
905 for the GameBoy Z80. Add support for generating DWARF.
906 * config/tc-z80.h: Add support for DWARF debug information
907 generation.
908 * doc/c-z80.texi: Document new command line option.
909 * testsuite/gas/z80/gbz80_all.d: New file.
910 * testsuite/gas/z80/gbz80_all.s: New file.
911 * testsuite/gas/z80/z80.exp: Run the new tests.
912 * testsuite/gas/z80/z80n_all.d: New file.
913 * testsuite/gas/z80/z80n_all.s: New file.
914 * testsuite/gas/z80/z80n_reloc.d: New file.
915
b7d07216
L
9162020-02-06 H.J. Lu <hongjiu.lu@intel.com>
917
918 PR gas/25381
919 * config/obj-elf.c (get_section): Also check
920 linked_to_symbol_name.
921 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
922 (obj_elf_parse_section_letters): Handle the 'o' flag.
923 (build_group_lists): Renamed to ...
924 (build_additional_section_info): This. Set elf_linked_to_section
925 from map_head.linked_to_symbol_name.
926 (elf_adjust_symtab): Updated.
927 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
928 * doc/as.texi: Document the 'o' flag.
929 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
930 * testsuite/gas/elf/section18.d: New file.
931 * testsuite/gas/elf/section18.s: Likewise.
932 * testsuite/gas/elf/section19.d: Likewise.
933 * testsuite/gas/elf/section19.s: Likewise.
934 * testsuite/gas/elf/section20.d: Likewise.
935 * testsuite/gas/elf/section20.s: Likewise.
936 * testsuite/gas/elf/section21.d: Likewise.
937 * testsuite/gas/elf/section21.l: Likewise.
938 * testsuite/gas/elf/section21.s: Likewise.
939
5eb617a7
L
9402020-02-06 H.J. Lu <hongjiu.lu@intel.com>
941
942 * NEWS: Mention x86 assembler options to align branches for
943 binutils 2.34.
944
986ac314
L
9452020-02-06 H.J. Lu <hongjiu.lu@intel.com>
946
947 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
948 only for ELF targets.
949 * testsuite/gas/i386/unique.d: Don't xfail.
950 * testsuite/gas/i386/x86-64-unique.d: Likewise.
951
19234a6d
AM
9522020-02-06 Alan Modra <amodra@gmail.com>
953
954 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
955 * testsuite/gas/i386/x86-64-unique.d: Likewise.
956
02e0be69
AM
9572020-02-06 Alan Modra <amodra@gmail.com>
958
959 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
960 xfail, and rename test.
961 * testsuite/gas/elf/section12b.d: Likewise.
962 * testsuite/gas/elf/section16a.d: Likewise.
963 * testsuite/gas/elf/section16b.d: Likewise.
964
a8c4d40b
L
9652020-02-02 H.J. Lu <hongjiu.lu@intel.com>
966
967 PR gas/25380
968 * config/obj-elf.c (section_match): Removed.
969 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
970 section_id.
971 (obj_elf_change_section): Replace info and group_name arguments
972 with match_p. Also update the section ID and flags from match_p.
973 (obj_elf_section): Handle "unique,N". Update call to
974 obj_elf_change_section.
975 * config/obj-elf.h (elf_section_match): New.
976 (obj_elf_change_section): Updated.
977 * config/tc-arm.c (start_unwind_section): Update call to
978 obj_elf_change_section.
979 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
980 * config/tc-microblaze.c (microblaze_s_data): Likewise.
981 (microblaze_s_sdata): Likewise.
982 (microblaze_s_rdata): Likewise.
983 (microblaze_s_bss): Likewise.
984 * config/tc-mips.c (s_change_section): Likewise.
985 * config/tc-msp430.c (msp430_profiler): Likewise.
986 * config/tc-rx.c (parse_rx_section): Likewise.
987 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
988 * doc/as.texi: Document "unique,N" in .section directive.
989 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
990 * testsuite/gas/elf/section15.d: New file.
991 * testsuite/gas/elf/section15.s: Likewise.
992 * testsuite/gas/elf/section16.s: Likewise.
993 * testsuite/gas/elf/section16a.d: Likewise.
994 * testsuite/gas/elf/section16b.d: Likewise.
995 * testsuite/gas/elf/section17.d: Likewise.
996 * testsuite/gas/elf/section17.l: Likewise.
997 * testsuite/gas/elf/section17.s: Likewise.
998 * testsuite/gas/i386/unique.d: Likewise.
999 * testsuite/gas/i386/unique.s: Likewise.
1000 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1001 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1002
575d37ae
L
10032020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1004
1005 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1006
2384096c
G
10072020-02-01 Anthony Green <green@moxielogic.com>
1008
1009 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1010
95441c43
SL
10112020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1012
1013 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1014 %tls_ldo.
1015
d465d695
AV
10162020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1017
1018 PR gas/25472
1019 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1020 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1021 +mve.
1022 * testsuite/gas/arm/mve_dsp.d: New test.
1023
d26cc8a9
NC
10242020-01-31 Nick Clifton <nickc@redhat.com>
1025
1026 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1027 rather than BFD_RELOC_NONE.
1028
90e9955a
SP
10292020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1030
1031 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1032 to support VLDMIA instruction for MVE.
1033 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1034 instruction for MVE.
1035 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1036 instruction for MVE.
1037 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1038 instruction for MVE.
1039 * testsuite/gas/arm/mve-ldst.d: New test.
1040 * testsuite/gas/arm/mve-ldst.s: Likewise.
1041
53943f32
NC
10422020-01-31 Nick Clifton <nickc@redhat.com>
1043
1044 * po/fr.po: Updated French translation.
1045 * po/ru.po: Updated Russian translation.
1046
c3036ed0
RS
10472020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1048
1049 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1050 .s for the movprfx.
1051 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1052 * testsuite/gas/aarch64/sve-movprfx_28.d,
1053 * testsuite/gas/aarch64/sve-movprfx_28.l,
1054 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1055
2ae4c703
JB
10562020-01-30 Jan Beulich <jbeulich@suse.com>
1057
1058 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1059 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1060 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1061 Adjust expectations.
1062
bd434cc4
JM
10632020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1064
1065 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1066 * testsuite/gas/bpf/alu-be.d: Likewise.
1067 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1068 * testsuite/gas/bpf/alu32-be.d: Likewise.
1069
aeab2b26
JB
10702020-01-30 Jan Beulich <jbeulich@suse.com>
1071
1072 * testsuite/gas/i386/x86-64-branch-2.s,
1073 testsuite/gas/i386/x86-64-branch-4.s,
1074 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1075 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1076 testsuite/gas/i386/x86-64-branch-2.d,
1077 testsuite/gas/i386/x86-64-branch-4.l,
1078 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1079
873494c8
JB
10802020-01-30 Jan Beulich <jbeulich@suse.com>
1081
1082 * config/tc-i386.c (process_suffix): .
1083 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1084 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1085 Add LRETQ case.
1086 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1087 suffix.
1088 testsuite/gas/i386/x86_64.s: Add RETF cases.
1089 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1090 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1091 testsuite/gas/i386/x86-64-opcode.d,
1092 testsuite/gas/i386/x86-64-suffix-intel.d,
1093 testsuite/gas/i386/x86-64-suffix.d,
1094 testsuite/gas/i386/x86_64-intel.d
1095 testsuite/gas/i386/x86_64.d: Adjust expectations.
1096 * testsuite/gas/i386/x86-64-suffix.e,
1097 testsuite/gas/i386/x86_64.e: New.
1098
62b3f548
JB
10992020-01-30 Jan Beulich <jbeulich@suse.com>
1100
1101 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1102 special case.
1103
bc31405e
L
11042020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1105
1106 PR binutils/25445
1107 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1108 movsxd.
1109 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1110 differences. Document movslq and movsxd.
1111 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1112 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1113 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1114 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1115 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1116 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1117 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1118 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1119 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1120 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1121 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1122
e3696f67
AM
11232020-01-27 Alan Modra <amodra@gmail.com>
1124
1125 * testsuite/gas/all/gas.exp: Replace case statements with switch
1126 statements.
1127 * testsuite/gas/elf/elf.exp: Likewise.
1128 * testsuite/gas/macros/macros.exp: Likewise.
1129 * testsuite/lib/gas-defs.exp: Likewise.
1130
7568c93b
TC
11312020-01-27 Tamar Christina <tamar.christina@arm.com>
1132
1133 PR 25403
1134 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1135 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1136
403d1bd9
JW
11372020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1138
1139 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1140 s exts must be known, so rename *ok* to *fail*.
1141 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1142 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1143 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1144 above change.
1145 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1146 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1147
be4c5e58
L
11482020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1149
1150 PR gas/25438
1151 * config/tc-i386.c (check_long_reg): Always disallow double word
1152 suffix in mnemonic with word general register.
1153 * testsuite/gas/i386/general.s: Replace word general register
1154 with double word general register for movl.
1155 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1156 register.
1157 * testsuite/gas/i386/general.l: Updated.
1158 * testsuite/gas/i386/inval.l: Likewise.
1159
9e7028aa
AM
11602020-01-22 Alan Modra <amodra@gmail.com>
1161
1162 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1163 __tls_get_addr_desc and __tls_get_addr_opt.
1164
e3ed17f3
JB
11652020-01-21 Jan Beulich <jbeulich@suse.com>
1166
1167 * testsuite/gas/i386/inval-crc32.s,
1168 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1169 * testsuite/gas/i386/inval-crc32.l,
1170 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1171
1a035124
JB
11722020-01-21 Jan Beulich <jbeulich@suse.com>
1173
1174 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1175 generic code path. Deal with No_lSuf being set in a template.
1176 * testsuite/gas/i386/inval-crc32.l,
1177 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1178 instead of error(s) when operand size is ambiguous.
1179 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1180 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1181 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1182 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1183 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1184 Adjust expectations.
1185
c006a730
JB
11862020-01-21 Jan Beulich <jbeulich@suse.com>
1187
1188 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1189 and an intel_syntax check. Re-write lack-of-suffix processing
1190 logic.
1191 * doc/c-i386.texi: Document operand size defaults for suffix-
1192 less AT&T syntax insns.
1193 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1194 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1195 testsuite/gas/i386/x86-64-avx-scalar.s,
1196 testsuite/gas/i386/x86-64-avx.s,
1197 testsuite/gas/i386/x86-64-bundle.s,
1198 testsuite/gas/i386/x86-64-intel64.s,
1199 testsuite/gas/i386/x86-64-lock-1.s,
1200 testsuite/gas/i386/x86-64-opcode.s,
1201 testsuite/gas/i386/x86-64-sse2avx.s,
1202 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1203 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1204 testsuite/gas/i386/x86-64-nops.s,
1205 testsuite/gas/i386/x86-64-ptwrite.s,
1206 testsuite/gas/i386/x86-64-simd.s,
1207 testsuite/gas/i386/x86-64-sse-noavx.s,
1208 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1209 insns.
1210 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1211 testsuite/gas/i386/noreg64.s: Add further tests.
1212 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1213 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1214 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1215 testsuite/gas/i386/sse-noavx.d,
1216 testsuite/gas/i386/x86-64-intel64.d,
1217 testsuite/gas/i386/x86-64-nops.d,
1218 testsuite/gas/i386/x86-64-opcode.d,
1219 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1220 testsuite/gas/i386/x86-64-ptwrite.d,
1221 testsuite/gas/i386/x86-64-simd-intel.d,
1222 testsuite/gas/i386/x86-64-simd-suffix.d,
1223 testsuite/gas/i386/x86-64-simd.d,
1224 testsuite/gas/i386/x86-64-sse-noavx.d
1225 testsuite/gas/i386/x86-64-suffix.d,
1226 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1227 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1228 testsuite/gas/i386/noreg64.l: New.
1229 * testsuite/gas/i386/i386.exp: Run new tests.
1230
c906a69a
JB
12312020-01-21 Jan Beulich <jbeulich@suse.com>
1232
1233 * testsuite/gas/i386/avx512_bf16_vl.s,
1234 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1235 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1236 broadcast forms of VCVTNEPS2BF16.
1237 * testsuite/gas/i386/avx512_bf16_vl.d,
1238 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1239
26916852
NC
12402020-01-20 Nick Clifton <nickc@redhat.com>
1241
1242 * po/uk.po: Updated Ukranian translation.
1243
14470f07
L
12442020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1245
1246 PR ld/25416
1247 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1248 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1249 x32 object.
1250 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1251 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1252 R_X86_64_GOTPC32_TLSDESC relocation.
1253
1b1bb2c6
NC
12542020-01-18 Nick Clifton <nickc@redhat.com>
1255
1256 * configure: Regenerate.
1257 * po/gas.pot: Regenerate.
1258
ae774686
NC
12592020-01-18 Nick Clifton <nickc@redhat.com>
1260
1261 Binutils 2.34 branch created.
1262
42e04b36
L
12632020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1264
1265 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1266 with vex_encoding_vex.
1267 (parse_insn): Likewise.
1268 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1269 and {vex3} documentation.
1270 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1271 {vex}.
1272 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1273
2da2eaf4
AV
12742020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1275
1276 PR 25376
1277 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1278 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1279 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1280 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1281 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1282 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1283
45a4bb20
JB
12842020-01-16 Jan Beulich <jbeulich@suse.com>
1285
1286 * config/tc-i386.c (match_template): Drop found_cpu_match local
1287 variable.
1288
4814632e
JB
12892020-01-16 Jan Beulich <jbeulich@suse.com>
1290
1291 * testsuite/gas/i386/avx512dq-inval.l,
1292 testsuite/gas/i386/avx512dq-inval.s: New.
1293 * testsuite/gas/i386/i386.exp: Run new test.
1294
131cb553
JL
12952020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1296
1297 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1298 relocations when the target is 430X, except when extracting part of an
1299 expression.
1300 (msp430_srcoperand): Adjust comment.
1301 Initialize the expp member of the msp430_operand_s struct as
1302 appropriate.
1303 (msp430_dstoperand): Likewise.
1304 * testsuite/gas/msp430/msp430.exp: Run new test.
1305 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1306 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1307
c24d0e8d
AM
13082020-01-15 Alan Modra <amodra@gmail.com>
1309
1310 * configure.tgt: Add sparc-*-freebsd case.
1311
e44925ae
LC
13122020-01-14 Lili Cui <lili.cui@intel.com>
1313
1314 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1315 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1316 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1317 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1318 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1319 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1320 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1321 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1322 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1323 * testsuite/gas/i386/align-branch-5.d: Likewise.
1324 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1325 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1326 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1327 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1328 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1329 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1330 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1331 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1332 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1333 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1334 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1335 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1336
7a6bf3be
SB
13372020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1338
1339 PR 25377
1340 * config/tc-z80.c: Add support for half precision, single
1341 precision and double precision floating point values.
1342 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1343 * doc/as.texi: Add new z80 command line options.
1344 * doc/c-z80.texi: Document new z80 command line options.
1345 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1346 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1347 * testsuite/gas/z80/z80.exp: Run the new test.
1348 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1349 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1350 * testsuite/gas/z80/strings.d: Update expected output.
1351
82e9597c
MM
13522020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1353
1354 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1355 dependency.
1356
5e4f7e05
CZ
13572020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1358
1359 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1360 the CPU.
1361 * config/tc-arc.h: Add header if/defs.
1362 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1363
febda64f
AM
13642020-01-13 Alan Modra <amodra@gmail.com>
1365
1366 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1367
5496abe1
AM
13682020-01-13 Alan Modra <amodra@gmail.com>
1369
1370 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1371 insertion.
1372
ec4181f2
AM
13732020-01-10 Alan Modra <amodra@gmail.com>
1374
1375 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1376 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1377
40c75bc8
SB
13782020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1379
1380 PR 25224
1381 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1382 opcode byte values.
1383 (emit_ld_r_r): Likewise.
1384 (emit_ld_rr_m): Likewise.
1385 (emit_ld_rr_nn): Likewise.
1386
72aea328
JB
13872020-01-09 Jan Beulich <jbeulich@suse.com>
1388
1389 * config/tc-i386.c (optimize_encoding): Add
1390 is_any_vex_encoding() invocations. Drop respective
1391 i.tm.extension_opcode == None checks.
1392
3f93af61
JB
13932020-01-09 Jan Beulich <jbeulich@suse.com>
1394
1395 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1396 REX transformations. Correct comment indentation.
1397
7697afb6
JB
13982020-01-09 Jan Beulich <jbeulich@suse.com>
1399
1400 * config/tc-i386.c (optimize_encoding): Generalize register
1401 transformation for TEST optimization.
1402
d835a58b
JB
14032020-01-09 Jan Beulich <jbeulich@suse.com>
1404
1405 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1406 testsuite/gas/i386/x86-64-sysenter-amd.d,
1407 testsuite/gas/i386/x86-64-sysenter-amd.l,
1408 testsuite/gas/i386/x86-64-sysenter-intel.d,
1409 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1410 * testsuite/gas/i386/i386.exp: Run new tests.
1411
915808f6
NC
14122020-01-08 Nick Clifton <nickc@redhat.com>
1413
1414 PR 25284
1415 * doc/as.texi (Align): Document the fact that all arguments can be
1416 omitted.
1417 (Balign): Likewise.
1418 (P2align): Likewise.
1419
f1f28025
NC
14202020-01-08 Nick Clifton <nickc@redhat.com>
1421
1422 PR 14891
1423 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1424 already defined as a different symbol type.
1425 * testsuite/gas/elf/pr14891.s: New test source file.
1426 * testsuite/gas/elf/pr14891.d: New test driver.
1427 * testsuite/gas/elf/pr14891.s: New test expected error output.
1428 * testsuite/gas/elf/elf.exp: Run the new test.
1429
030a2e78
AM
14302020-01-08 Alan Modra <amodra@gmail.com>
1431
1432 * config/tc-z8k.c (md_begin): Make idx unsigned.
1433 (get_specific): Likewise for this_index.
1434
2a1ebfb2
CZ
14352020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1436
1437 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1438 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1439 (md_operand): Set X_md to absent.
1440 (arc_parse_name): Check for X_md.
1441
16d87673
SB
14422020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1443
1444 PR 25311
1445 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1446 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1447 NO_STRING_ESCAPES.
1448 * read.c (next_char_of_string): Likewise.
1449 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1450 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1451
a2322019
NC
14522020-01-03 Nick Clifton <nickc@redhat.com>
1453
1454 * po/sv.po: Updated Swedish translation.
1455
5437a02a
JB
14562020-01-03 Jan Beulich <jbeulich@suse.com>
1457
1458 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1459 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1460
567dfba2
JB
14612020-01-03 Jan Beulich <jbeulich@suse.com>
1462
1463 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1464 by-element usdot. Add 64-bit form tests for by-element sudot.
1465 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1466
8c45011a
JB
14672020-01-03 Jan Beulich <jbeulich@suse.com>
1468
1469 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1470 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1471
f4950f76
JB
14722020-01-03 Jan Beulich <jbeulich@suse.com>
1473
1474 * testsuite/gas/aarch64/f64mm.d,
1475 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1476
6655dba2
SB
14772020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1478
1479 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1480 support for assembler code generated by SDCC. Add new relocation
1481 types. Add z80-elf target support.
1482 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1483 labels. Local labels starts from ".L".
1484 * NEWS: Mention the new support.
1485 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1486 * testsuite/gas/all/fwdexp.s: Likewise.
1487 * testsuite/gas/all/cond.l: Likewise.
1488 * testsuite/gas/all/cond.s: Likewise.
1489 * testsuite/gas/all/fwdexp.d: Likewise.
1490 * testsuite/gas/all/fwdexp.s: Likewise.
1491 * testsuite/gas/elf/section2.e-mips: Likewise.
1492 * testsuite/gas/elf/section2.l: Likewise.
1493 * testsuite/gas/elf/section2.s: Likewise.
1494 * testsuite/gas/macros/app1.d: Likewise.
1495 * testsuite/gas/macros/app1.s: Likewise.
1496 * testsuite/gas/macros/app2.d: Likewise.
1497 * testsuite/gas/macros/app2.s: Likewise.
1498 * testsuite/gas/macros/app3.d: Likewise.
1499 * testsuite/gas/macros/app3.s: Likewise.
1500 * testsuite/gas/macros/app4.d: Likewise.
1501 * testsuite/gas/macros/app4.s: Likewise.
1502 * testsuite/gas/macros/app4b.s: Likewise.
1503 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1504 * testsuite/gas/z80/z80.exp: Add new tests
1505 * testsuite/gas/z80/dollar.d: New file.
1506 * testsuite/gas/z80/dollar.s: New file.
1507 * testsuite/gas/z80/ez80_adl_all.d: New file.
1508 * testsuite/gas/z80/ez80_adl_all.s: New file.
1509 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1510 * testsuite/gas/z80/ez80_isuf.s: New file.
1511 * testsuite/gas/z80/ez80_z80_all.d: New file.
1512 * testsuite/gas/z80/ez80_z80_all.s: New file.
1513 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1514 * testsuite/gas/z80/r800_extra.d: New file.
1515 * testsuite/gas/z80/r800_extra.s: New file.
1516 * testsuite/gas/z80/r800_ii8.d: New file.
1517 * testsuite/gas/z80/r800_z80_doc.d: New file.
1518 * testsuite/gas/z80/z180.d: New file.
1519 * testsuite/gas/z80/z180.s: New file.
1520 * testsuite/gas/z80/z180_z80_doc.d: New file.
1521 * testsuite/gas/z80/z80_doc.d: New file.
1522 * testsuite/gas/z80/z80_doc.s: New file.
1523 * testsuite/gas/z80/z80_ii8.d: New file.
1524 * testsuite/gas/z80/z80_ii8.s: New file.
1525 * testsuite/gas/z80/z80_in_f_c.d: New file.
1526 * testsuite/gas/z80/z80_in_f_c.s: New file.
1527 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1528 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1529 * testsuite/gas/z80/z80_out_c_0.d: New file.
1530 * testsuite/gas/z80/z80_out_c_0.s: New file.
1531 * testsuite/gas/z80/z80_reloc.d: New file.
1532 * testsuite/gas/z80/z80_reloc.s: New file.
1533 * testsuite/gas/z80/z80_sli.d: New file.
1534 * testsuite/gas/z80/z80_sli.s: New file.
1535
a65b5de6
SN
15362020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1537
1538 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1539 REGLIST_RN.
1540
b14ce8bf
AM
15412020-01-01 Alan Modra <amodra@gmail.com>
1542
1543 Update year range in copyright notice of all files.
1544
0b114740 1545For older changes see ChangeLog-2019
3499769a 1546\f
0b114740 1547Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1548
1549Copying and distribution of this file, with or without modification,
1550are permitted in any medium without royalty provided the copyright
1551notice and this notice are preserved.
1552
1553Local Variables:
1554mode: change-log
1555left-margin: 8
1556fill-column: 74
1557version-control: never
1558End: