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CommitLineData
8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
8bde7f77
WD
6 */
7
8/*
9 * Boot support
10 */
11#include <common.h>
12#include <command.h>
d88af4da 13#include <linux/compiler.h>
8bde7f77 14
d87080b7 15DECLARE_GLOBAL_DATA_PTR;
8bde7f77 16
d88af4da
MF
17__maybe_unused
18static void print_num(const char *name, ulong value)
19{
20 printf("%-12s= 0x%08lX\n", name, value);
21}
8bde7f77 22
5f3dfadc 23__maybe_unused
d88af4da
MF
24static void print_eth(int idx)
25{
26 char name[10], *val;
27 if (idx)
28 sprintf(name, "eth%iaddr", idx);
29 else
30 strcpy(name, "ethaddr");
31 val = getenv(name);
32 if (!val)
33 val = "(not set)";
34 printf("%-12s= %s\n", name, val);
35}
de2dff6f 36
05c3e68f 37#ifndef CONFIG_DM_ETH
9fc6a06a
MS
38__maybe_unused
39static void print_eths(void)
40{
41 struct eth_device *dev;
42 int i = 0;
43
44 do {
45 dev = eth_get_dev_by_index(i);
46 if (dev) {
47 printf("eth%dname = %s\n", i, dev->name);
48 print_eth(i);
49 i++;
50 }
51 } while (dev);
52
53 printf("current eth = %s\n", eth_get_name());
54 printf("ip_addr = %s\n", getenv("ipaddr"));
55}
05c3e68f 56#endif
9fc6a06a 57
d88af4da 58__maybe_unused
47708457 59static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
60{
61 printf("%-12s= 0x%.8llX\n", name, value);
62}
63
64__maybe_unused
65static void print_mhz(const char *name, unsigned long hz)
66{
67 char buf[32];
68
69 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
70}
8bde7f77 71
171e5396
MF
72
73static inline void print_bi_boot_params(const bd_t *bd)
74{
75 print_num("boot_params", (ulong)bd->bi_boot_params);
76}
77
12feb364
MF
78static inline void print_bi_mem(const bd_t *bd)
79{
80#if defined(CONFIG_SH)
81 print_num("mem start ", (ulong)bd->bi_memstart);
82 print_lnum("mem size ", (u64)bd->bi_memsize);
83#elif defined(CONFIG_ARC)
84 print_num("mem start", (ulong)bd->bi_memstart);
85 print_lnum("mem size", (u64)bd->bi_memsize);
86#elif defined(CONFIG_AVR32)
87 print_num("memstart", (ulong)bd->bi_dram[0].start);
88 print_lnum("memsize", (u64)bd->bi_dram[0].size);
89#else
90 print_num("memstart", (ulong)bd->bi_memstart);
91 print_lnum("memsize", (u64)bd->bi_memsize);
92#endif
93}
94
fd60e99f
MF
95static inline void print_bi_dram(const bd_t *bd)
96{
97#ifdef CONFIG_NR_DRAM_BANKS
98 int i;
99
100 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
ddd917b8
SG
101 if (bd->bi_dram[i].size) {
102 print_num("DRAM bank", i);
103 print_num("-> start", bd->bi_dram[i].start);
104 print_num("-> size", bd->bi_dram[i].size);
105 }
fd60e99f
MF
106 }
107#endif
108}
109
f80e5359
MF
110static inline void print_bi_flash(const bd_t *bd)
111{
112#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH)
113 print_num("flash start ", (ulong)bd->bi_flashstart);
114 print_num("flash size ", (ulong)bd->bi_flashsize);
115 print_num("flash offset ", (ulong)bd->bi_flashoffset);
116
117#elif defined(CONFIG_NIOS2) || defined(CONFIG_OPENRISC)
118 print_num("flash start", (ulong)bd->bi_flashstart);
119 print_num("flash size", (ulong)bd->bi_flashsize);
120 print_num("flash offset", (ulong)bd->bi_flashoffset);
121#else
122 print_num("flashstart", (ulong)bd->bi_flashstart);
123 print_num("flashsize", (ulong)bd->bi_flashsize);
124 print_num("flashoffset", (ulong)bd->bi_flashoffset);
125#endif
126}
127
8752e260
MF
128static inline void print_eth_ip_addr(void)
129{
130#if defined(CONFIG_CMD_NET)
131 print_eth(0);
132#if defined(CONFIG_HAS_ETH1)
133 print_eth(1);
134#endif
135#if defined(CONFIG_HAS_ETH2)
136 print_eth(2);
137#endif
138#if defined(CONFIG_HAS_ETH3)
139 print_eth(3);
140#endif
141#if defined(CONFIG_HAS_ETH4)
142 print_eth(4);
143#endif
144#if defined(CONFIG_HAS_ETH5)
145 print_eth(5);
146#endif
147 printf("IP addr = %s\n", getenv("ipaddr"));
148#endif
149}
150
4e3fa7d8
MF
151static inline void print_baudrate(void)
152{
153#if defined(CONFIG_PPC)
154 printf("baudrate = %6u bps\n", gd->baudrate);
155#elif defined(CONFIG_SPARC)
156 printf("baudrate = %6u bps\n", gd->baudrate);
157#else
158 printf("baudrate = %u bps\n", gd->baudrate);
159#endif
160}
161
e3795084
MF
162static inline void print_std_bdinfo(const bd_t *bd)
163{
164 print_bi_boot_params(bd);
165 print_bi_mem(bd);
166 print_bi_flash(bd);
167 print_eth_ip_addr();
168 print_baudrate();
169}
170
c99ea790 171#if defined(CONFIG_PPC)
e7939464
YS
172void __weak board_detail(void)
173{
174 /* Please define boot_detail() for your platform */
175}
8bde7f77 176
5902e8f7 177int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 178{
8bde7f77 179 bd_t *bd = gd->bd;
8bde7f77
WD
180
181#ifdef DEBUG
5902e8f7
ML
182 print_num("bd address", (ulong)bd);
183#endif
12feb364 184 print_bi_mem(bd);
f80e5359 185 print_bi_flash(bd);
5902e8f7
ML
186 print_num("sramstart", bd->bi_sramstart);
187 print_num("sramsize", bd->bi_sramsize);
188#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
58dac327 189 defined(CONFIG_MPC8260) || defined(CONFIG_E500)
5902e8f7
ML
190 print_num("immr_base", bd->bi_immr_base);
191#endif
192 print_num("bootflags", bd->bi_bootflags);
3fb85889 193#if defined(CONFIG_405EP) || \
5902e8f7
ML
194 defined(CONFIG_405GP) || \
195 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
196 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
197 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
198 defined(CONFIG_XILINX_405)
0c277ef9
TT
199 print_mhz("procfreq", bd->bi_procfreq);
200 print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7
ML
201#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
202 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
203 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
204 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
0c277ef9 205 print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77 206#endif
3fb85889 207#else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 208#if defined(CONFIG_CPM2)
0c277ef9
TT
209 print_mhz("vco", bd->bi_vco);
210 print_mhz("sccfreq", bd->bi_sccfreq);
211 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 212#endif
0c277ef9 213 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 214#if defined(CONFIG_CPM2)
0c277ef9 215 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 216#endif
0c277ef9 217 print_mhz("busfreq", bd->bi_busfreq);
3fb85889 218#endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
03f5c550 219
34e210f5
TT
220#ifdef CONFIG_ENABLE_36BIT_PHYS
221#ifdef CONFIG_PHYS_64BIT
222 puts("addressing = 36-bit\n");
223#else
224 puts("addressing = 32-bit\n");
225#endif
226#endif
227
8752e260 228 print_eth_ip_addr();
4e3fa7d8 229 print_baudrate();
5902e8f7 230 print_num("relocaddr", gd->relocaddr);
e7939464 231 board_detail();
8bde7f77
WD
232 return 0;
233}
234
c99ea790 235#elif defined(CONFIG_NIOS2)
5c952cf0 236
5902e8f7 237int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 238{
5c952cf0
WD
239 bd_t *bd = gd->bd;
240
fd60e99f 241 print_bi_dram(bd);
f80e5359 242 print_bi_flash(bd);
5c952cf0 243
6d0f6bcf 244#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
245 print_num ("sram start", (ulong)bd->bi_sramstart);
246 print_num ("sram size", (ulong)bd->bi_sramsize);
247#endif
248
8752e260 249 print_eth_ip_addr();
4e3fa7d8 250 print_baudrate();
5c952cf0
WD
251
252 return 0;
253}
c99ea790
RM
254
255#elif defined(CONFIG_MICROBLAZE)
cfc67116 256
5902e8f7 257int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 258{
cfc67116 259 bd_t *bd = gd->bd;
e945f6dc 260
fd60e99f 261 print_bi_dram(bd);
f80e5359 262 print_bi_flash(bd);
6d0f6bcf 263#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
264 print_num("sram start ", (ulong)bd->bi_sramstart);
265 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 266#endif
062f078c 267#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a 268 print_eths();
cfc67116 269#endif
4e3fa7d8 270 print_baudrate();
e945f6dc
MS
271 print_num("relocaddr", gd->relocaddr);
272 print_num("reloc off", gd->reloc_off);
de86765b
MS
273 print_num("fdt_blob", (ulong)gd->fdt_blob);
274 print_num("new_fdt", (ulong)gd->new_fdt);
275 print_num("fdt_size", (ulong)gd->fdt_size);
e945f6dc 276
cfc67116
MS
277 return 0;
278}
4a551709 279
c99ea790
RM
280#elif defined(CONFIG_SPARC)
281
54841ab5 282int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
283{
284 bd_t *bd = gd->bd;
00ab32c8
DH
285
286#ifdef DEBUG
287 print_num("bd address ", (ulong) bd);
288#endif
289 print_num("memstart ", bd->bi_memstart);
b57ca3e1 290 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 291 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 292 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 293 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
d97f01a6 294 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
6d0f6bcf 295 CONFIG_SYS_MONITOR_LEN);
d97f01a6 296 printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE,
6d0f6bcf 297 CONFIG_SYS_MALLOC_LEN);
d97f01a6 298 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
6d0f6bcf 299 CONFIG_SYS_STACK_SIZE);
d97f01a6 300 printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET,
6d0f6bcf 301 CONFIG_SYS_PROM_SIZE);
d97f01a6 302 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 303 GENERATED_GBL_DATA_SIZE);
00ab32c8 304
8752e260 305 print_eth_ip_addr();
4e3fa7d8 306 print_baudrate();
00ab32c8
DH
307 return 0;
308}
309
c99ea790
RM
310#elif defined(CONFIG_M68K)
311
5902e8f7 312int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 313{
8e585f02 314 bd_t *bd = gd->bd;
8ae158cd 315
12feb364 316 print_bi_mem(bd);
f80e5359 317 print_bi_flash(bd);
6d0f6bcf 318#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
319 print_num("sramstart", (ulong)bd->bi_sramstart);
320 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 321#endif
6d0f6bcf 322#if defined(CONFIG_SYS_MBAR)
5902e8f7 323 print_num("mbar", bd->bi_mbar_base);
8e585f02 324#endif
0c277ef9
TT
325 print_mhz("cpufreq", bd->bi_intfreq);
326 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 327#ifdef CONFIG_PCI
0c277ef9 328 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
329#endif
330#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
331 print_mhz("flbfreq", bd->bi_flbfreq);
332 print_mhz("inpfreq", bd->bi_inpfreq);
333 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 334#endif
8752e260 335 print_eth_ip_addr();
4e3fa7d8 336 print_baudrate();
8e585f02
TL
337
338 return 0;
339}
340
8dc48d71 341#elif defined(CONFIG_BLACKFIN)
c99ea790 342
54841ab5 343int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 344{
8dc48d71
MF
345 bd_t *bd = gd->bd;
346
347 printf("U-Boot = %s\n", bd->bi_r_version);
348 printf("CPU = %s\n", bd->bi_cpu);
349 printf("Board = %s\n", bd->bi_board_name);
0c277ef9
TT
350 print_mhz("VCO", bd->bi_vco);
351 print_mhz("CCLK", bd->bi_cclk);
352 print_mhz("SCLK", bd->bi_sclk);
8dc48d71 353
e3795084 354 print_std_bdinfo(bd);
8dc48d71
MF
355
356 return 0;
357}
358
c99ea790 359#elif defined(CONFIG_MIPS)
8bde7f77 360
5902e8f7 361int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 362{
e3795084 363 print_std_bdinfo(gd->bd);
8cf7a418
TC
364 print_num("relocaddr", gd->relocaddr);
365 print_num("reloc off", gd->reloc_off);
8bde7f77
WD
366
367 return 0;
368}
8bde7f77 369
c99ea790
RM
370#elif defined(CONFIG_AVR32)
371
5902e8f7 372int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790 373{
e3795084 374 print_std_bdinfo(gd->bd);
c99ea790
RM
375 return 0;
376}
377
378#elif defined(CONFIG_ARM)
8bde7f77 379
0e350f81
JH
380static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
381 char * const argv[])
8bde7f77 382{
8bde7f77
WD
383 bd_t *bd = gd->bd;
384
5902e8f7 385 print_num("arch_number", bd->bi_arch_number);
171e5396 386 print_bi_boot_params(bd);
fd60e99f 387 print_bi_dram(bd);
8bde7f77 388
e8149522 389#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 390 if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
e8149522 391 print_num("Secure ram",
e61a7534 392 gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
e8149522
YS
393 }
394#endif
ff973800 395#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a 396 print_eths();
a41dbbd9 397#endif
4e3fa7d8 398 print_baudrate();
e47f2db5 399#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25 400 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 401#endif
5902e8f7
ML
402 print_num("relocaddr", gd->relocaddr);
403 print_num("reloc off", gd->reloc_off);
404 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
405 print_num("sp start ", gd->start_addr_sp);
c8fcd0f2 406#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
5902e8f7 407 print_num("FB base ", gd->fb_base);
c8fcd0f2 408#endif
8f5d4687
HM
409 /*
410 * TODO: Currently only support for davinci SOC's is added.
411 * Remove this check once all the board implement this.
412 */
413#ifdef CONFIG_CLOCKS
414 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
415 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
416 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
7bb7d672
HS
417#endif
418#ifdef CONFIG_BOARD_TYPES
419 printf("Board Type = %ld\n", gd->board_type);
8f5d4687 420#endif
7f7ddf2a
SG
421#ifdef CONFIG_SYS_MALLOC_F
422 printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
423 CONFIG_SYS_MALLOC_F_LEN);
424#endif
425
8bde7f77
WD
426 return 0;
427}
428
ebd0d062
NI
429#elif defined(CONFIG_SH)
430
5902e8f7 431int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
432{
433 bd_t *bd = gd->bd;
12feb364
MF
434
435 print_bi_mem(bd);
f80e5359 436 print_bi_flash(bd);
8752e260 437 print_eth_ip_addr();
4e3fa7d8 438 print_baudrate();
ebd0d062
NI
439 return 0;
440}
441
a806ee6f
GR
442#elif defined(CONFIG_X86)
443
5902e8f7 444int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f 445{
a806ee6f 446 bd_t *bd = gd->bd;
a806ee6f 447
171e5396 448 print_bi_boot_params(bd);
5902e8f7 449
fd60e99f 450 print_bi_dram(bd);
a806ee6f
GR
451
452#if defined(CONFIG_CMD_NET)
8752e260 453 print_eth_ip_addr();
0c277ef9 454 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 455#endif
4e3fa7d8 456 print_baudrate();
a806ee6f
GR
457
458 return 0;
459}
460
6fcc3be4
SG
461#elif defined(CONFIG_SANDBOX)
462
463int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
464{
6fcc3be4
SG
465 bd_t *bd = gd->bd;
466
171e5396 467 print_bi_boot_params(bd);
fd60e99f 468 print_bi_dram(bd);
8752e260 469 print_eth_ip_addr();
6fcc3be4 470
c8fcd0f2 471#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
6fcc3be4 472 print_num("FB base ", gd->fb_base);
c8fcd0f2 473#endif
6fcc3be4
SG
474 return 0;
475}
476
64d61461
ML
477#elif defined(CONFIG_NDS32)
478
479int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
480{
64d61461
ML
481 bd_t *bd = gd->bd;
482
483 print_num("arch_number", bd->bi_arch_number);
171e5396 484 print_bi_boot_params(bd);
fd60e99f 485 print_bi_dram(bd);
8752e260 486 print_eth_ip_addr();
4e3fa7d8 487 print_baudrate();
64d61461
ML
488
489 return 0;
490}
491
2be9fdbf
SK
492#elif defined(CONFIG_OPENRISC)
493
494int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
495{
496 bd_t *bd = gd->bd;
497
12feb364 498 print_bi_mem(bd);
f80e5359 499 print_bi_flash(bd);
8752e260 500 print_eth_ip_addr();
4e3fa7d8 501 print_baudrate();
2be9fdbf
SK
502
503 return 0;
504}
505
946f6f24 506#elif defined(CONFIG_ARC)
bc5d5428
AB
507
508int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
509{
510 bd_t *bd = gd->bd;
511
12feb364 512 print_bi_mem(bd);
8752e260 513 print_eth_ip_addr();
4e3fa7d8 514 print_baudrate();
bc5d5428
AB
515
516 return 0;
517}
518
de5e5cea
CZ
519#elif defined(CONFIG_XTENSA)
520
521int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
522{
523 print_std_bdinfo(gd->bd);
524 return 0;
525}
526
c99ea790
RM
527#else
528 #error "a case for this architecture does not exist!"
529#endif
8bde7f77 530
8bde7f77
WD
531/* -------------------------------------------------------------------- */
532
0d498393
WD
533U_BOOT_CMD(
534 bdinfo, 1, 1, do_bdinfo,
2fb2604d 535 "print Board Info structure",
a89c33db 536 ""
8bde7f77 537);