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CommitLineData
8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
8bde7f77
WD
6 */
7
8/*
9 * Boot support
10 */
11#include <common.h>
12#include <command.h>
d88af4da 13#include <linux/compiler.h>
8bde7f77 14
d87080b7 15DECLARE_GLOBAL_DATA_PTR;
8bde7f77 16
d88af4da
MF
17__maybe_unused
18static void print_num(const char *name, ulong value)
19{
20 printf("%-12s= 0x%08lX\n", name, value);
21}
8bde7f77 22
5f3dfadc 23__maybe_unused
d88af4da
MF
24static void print_eth(int idx)
25{
26 char name[10], *val;
27 if (idx)
28 sprintf(name, "eth%iaddr", idx);
29 else
30 strcpy(name, "ethaddr");
31 val = getenv(name);
32 if (!val)
33 val = "(not set)";
34 printf("%-12s= %s\n", name, val);
35}
de2dff6f 36
05c3e68f 37#ifndef CONFIG_DM_ETH
9fc6a06a
MS
38__maybe_unused
39static void print_eths(void)
40{
41 struct eth_device *dev;
42 int i = 0;
43
44 do {
45 dev = eth_get_dev_by_index(i);
46 if (dev) {
47 printf("eth%dname = %s\n", i, dev->name);
48 print_eth(i);
49 i++;
50 }
51 } while (dev);
52
53 printf("current eth = %s\n", eth_get_name());
54 printf("ip_addr = %s\n", getenv("ipaddr"));
55}
05c3e68f 56#endif
9fc6a06a 57
d88af4da 58__maybe_unused
47708457 59static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
60{
61 printf("%-12s= 0x%.8llX\n", name, value);
62}
63
64__maybe_unused
65static void print_mhz(const char *name, unsigned long hz)
66{
67 char buf[32];
68
69 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
70}
8bde7f77 71
171e5396
MF
72
73static inline void print_bi_boot_params(const bd_t *bd)
74{
75 print_num("boot_params", (ulong)bd->bi_boot_params);
76}
77
12feb364
MF
78static inline void print_bi_mem(const bd_t *bd)
79{
80#if defined(CONFIG_SH)
81 print_num("mem start ", (ulong)bd->bi_memstart);
82 print_lnum("mem size ", (u64)bd->bi_memsize);
83#elif defined(CONFIG_ARC)
84 print_num("mem start", (ulong)bd->bi_memstart);
85 print_lnum("mem size", (u64)bd->bi_memsize);
86#elif defined(CONFIG_AVR32)
87 print_num("memstart", (ulong)bd->bi_dram[0].start);
88 print_lnum("memsize", (u64)bd->bi_dram[0].size);
89#else
90 print_num("memstart", (ulong)bd->bi_memstart);
91 print_lnum("memsize", (u64)bd->bi_memsize);
92#endif
93}
94
fd60e99f
MF
95static inline void print_bi_dram(const bd_t *bd)
96{
97#ifdef CONFIG_NR_DRAM_BANKS
98 int i;
99
100 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
ddd917b8
SG
101 if (bd->bi_dram[i].size) {
102 print_num("DRAM bank", i);
103 print_num("-> start", bd->bi_dram[i].start);
104 print_num("-> size", bd->bi_dram[i].size);
105 }
fd60e99f
MF
106 }
107#endif
108}
109
f80e5359
MF
110static inline void print_bi_flash(const bd_t *bd)
111{
112#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH)
113 print_num("flash start ", (ulong)bd->bi_flashstart);
114 print_num("flash size ", (ulong)bd->bi_flashsize);
115 print_num("flash offset ", (ulong)bd->bi_flashoffset);
116
70cc0c34 117#elif defined(CONFIG_NIOS2)
f80e5359
MF
118 print_num("flash start", (ulong)bd->bi_flashstart);
119 print_num("flash size", (ulong)bd->bi_flashsize);
120 print_num("flash offset", (ulong)bd->bi_flashoffset);
121#else
122 print_num("flashstart", (ulong)bd->bi_flashstart);
123 print_num("flashsize", (ulong)bd->bi_flashsize);
124 print_num("flashoffset", (ulong)bd->bi_flashoffset);
125#endif
126}
127
8752e260
MF
128static inline void print_eth_ip_addr(void)
129{
130#if defined(CONFIG_CMD_NET)
131 print_eth(0);
132#if defined(CONFIG_HAS_ETH1)
133 print_eth(1);
134#endif
135#if defined(CONFIG_HAS_ETH2)
136 print_eth(2);
137#endif
138#if defined(CONFIG_HAS_ETH3)
139 print_eth(3);
140#endif
141#if defined(CONFIG_HAS_ETH4)
142 print_eth(4);
143#endif
144#if defined(CONFIG_HAS_ETH5)
145 print_eth(5);
146#endif
147 printf("IP addr = %s\n", getenv("ipaddr"));
148#endif
149}
150
4e3fa7d8
MF
151static inline void print_baudrate(void)
152{
153#if defined(CONFIG_PPC)
154 printf("baudrate = %6u bps\n", gd->baudrate);
4e3fa7d8
MF
155#else
156 printf("baudrate = %u bps\n", gd->baudrate);
157#endif
158}
159
b37483c4 160static inline void __maybe_unused print_std_bdinfo(const bd_t *bd)
e3795084
MF
161{
162 print_bi_boot_params(bd);
163 print_bi_mem(bd);
164 print_bi_flash(bd);
165 print_eth_ip_addr();
166 print_baudrate();
167}
168
c99ea790 169#if defined(CONFIG_PPC)
e7939464
YS
170void __weak board_detail(void)
171{
172 /* Please define boot_detail() for your platform */
173}
8bde7f77 174
5902e8f7 175int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 176{
8bde7f77 177 bd_t *bd = gd->bd;
8bde7f77
WD
178
179#ifdef DEBUG
5902e8f7
ML
180 print_num("bd address", (ulong)bd);
181#endif
12feb364 182 print_bi_mem(bd);
f80e5359 183 print_bi_flash(bd);
5902e8f7
ML
184 print_num("sramstart", bd->bi_sramstart);
185 print_num("sramsize", bd->bi_sramsize);
50258977 186#if defined(CONFIG_E500)
5902e8f7
ML
187 print_num("immr_base", bd->bi_immr_base);
188#endif
189 print_num("bootflags", bd->bi_bootflags);
9c4c5ae3 190#if defined(CONFIG_CPM2)
0c277ef9
TT
191 print_mhz("vco", bd->bi_vco);
192 print_mhz("sccfreq", bd->bi_sccfreq);
193 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 194#endif
0c277ef9 195 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 196#if defined(CONFIG_CPM2)
0c277ef9 197 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 198#endif
0c277ef9 199 print_mhz("busfreq", bd->bi_busfreq);
03f5c550 200
34e210f5
TT
201#ifdef CONFIG_ENABLE_36BIT_PHYS
202#ifdef CONFIG_PHYS_64BIT
203 puts("addressing = 36-bit\n");
204#else
205 puts("addressing = 32-bit\n");
206#endif
207#endif
208
8752e260 209 print_eth_ip_addr();
4e3fa7d8 210 print_baudrate();
5902e8f7 211 print_num("relocaddr", gd->relocaddr);
e7939464 212 board_detail();
8bde7f77
WD
213 return 0;
214}
215
c99ea790 216#elif defined(CONFIG_NIOS2)
5c952cf0 217
5902e8f7 218int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 219{
5c952cf0
WD
220 bd_t *bd = gd->bd;
221
fd60e99f 222 print_bi_dram(bd);
f80e5359 223 print_bi_flash(bd);
5c952cf0 224
6d0f6bcf 225#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
226 print_num ("sram start", (ulong)bd->bi_sramstart);
227 print_num ("sram size", (ulong)bd->bi_sramsize);
228#endif
229
8752e260 230 print_eth_ip_addr();
4e3fa7d8 231 print_baudrate();
5c952cf0
WD
232
233 return 0;
234}
c99ea790
RM
235
236#elif defined(CONFIG_MICROBLAZE)
cfc67116 237
5902e8f7 238int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 239{
cfc67116 240 bd_t *bd = gd->bd;
e945f6dc 241
fd60e99f 242 print_bi_dram(bd);
f80e5359 243 print_bi_flash(bd);
6d0f6bcf 244#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
245 print_num("sram start ", (ulong)bd->bi_sramstart);
246 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 247#endif
062f078c 248#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a 249 print_eths();
cfc67116 250#endif
4e3fa7d8 251 print_baudrate();
e945f6dc
MS
252 print_num("relocaddr", gd->relocaddr);
253 print_num("reloc off", gd->reloc_off);
de86765b
MS
254 print_num("fdt_blob", (ulong)gd->fdt_blob);
255 print_num("new_fdt", (ulong)gd->new_fdt);
256 print_num("fdt_size", (ulong)gd->fdt_size);
e945f6dc 257
cfc67116
MS
258 return 0;
259}
4a551709 260
c99ea790
RM
261#elif defined(CONFIG_M68K)
262
5902e8f7 263int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 264{
8e585f02 265 bd_t *bd = gd->bd;
8ae158cd 266
12feb364 267 print_bi_mem(bd);
f80e5359 268 print_bi_flash(bd);
6d0f6bcf 269#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
270 print_num("sramstart", (ulong)bd->bi_sramstart);
271 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 272#endif
6d0f6bcf 273#if defined(CONFIG_SYS_MBAR)
5902e8f7 274 print_num("mbar", bd->bi_mbar_base);
8e585f02 275#endif
0c277ef9
TT
276 print_mhz("cpufreq", bd->bi_intfreq);
277 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 278#ifdef CONFIG_PCI
0c277ef9 279 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
280#endif
281#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
282 print_mhz("flbfreq", bd->bi_flbfreq);
283 print_mhz("inpfreq", bd->bi_inpfreq);
284 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 285#endif
8752e260 286 print_eth_ip_addr();
4e3fa7d8 287 print_baudrate();
8e585f02
TL
288
289 return 0;
290}
291
c99ea790 292#elif defined(CONFIG_MIPS)
8bde7f77 293
5902e8f7 294int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 295{
e3795084 296 print_std_bdinfo(gd->bd);
8cf7a418
TC
297 print_num("relocaddr", gd->relocaddr);
298 print_num("reloc off", gd->reloc_off);
8bde7f77
WD
299
300 return 0;
301}
8bde7f77 302
c99ea790
RM
303#elif defined(CONFIG_AVR32)
304
5902e8f7 305int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790 306{
e3795084 307 print_std_bdinfo(gd->bd);
c99ea790
RM
308 return 0;
309}
310
311#elif defined(CONFIG_ARM)
8bde7f77 312
0e350f81
JH
313static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
314 char * const argv[])
8bde7f77 315{
8bde7f77
WD
316 bd_t *bd = gd->bd;
317
5902e8f7 318 print_num("arch_number", bd->bi_arch_number);
171e5396 319 print_bi_boot_params(bd);
fd60e99f 320 print_bi_dram(bd);
8bde7f77 321
e8149522 322#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 323 if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
e8149522 324 print_num("Secure ram",
e61a7534 325 gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
e8149522
YS
326 }
327#endif
f2ccf7f7
YS
328#ifdef CONFIG_RESV_RAM
329 if (gd->arch.resv_ram)
330 print_num("Reserved ram", gd->arch.resv_ram);
331#endif
ff973800 332#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a 333 print_eths();
a41dbbd9 334#endif
4e3fa7d8 335 print_baudrate();
e47f2db5 336#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25 337 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 338#endif
5902e8f7
ML
339 print_num("relocaddr", gd->relocaddr);
340 print_num("reloc off", gd->reloc_off);
341 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
342 print_num("sp start ", gd->start_addr_sp);
c8fcd0f2 343#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
5902e8f7 344 print_num("FB base ", gd->fb_base);
c8fcd0f2 345#endif
8f5d4687
HM
346 /*
347 * TODO: Currently only support for davinci SOC's is added.
348 * Remove this check once all the board implement this.
349 */
350#ifdef CONFIG_CLOCKS
351 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
352 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
353 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
7bb7d672
HS
354#endif
355#ifdef CONFIG_BOARD_TYPES
356 printf("Board Type = %ld\n", gd->board_type);
8f5d4687 357#endif
7f7ddf2a
SG
358#ifdef CONFIG_SYS_MALLOC_F
359 printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
360 CONFIG_SYS_MALLOC_F_LEN);
361#endif
53539533
HS
362 if (gd->fdt_blob)
363 printf("fdt_blob = %p\n", gd->fdt_blob);
7f7ddf2a 364
8bde7f77
WD
365 return 0;
366}
367
ebd0d062
NI
368#elif defined(CONFIG_SH)
369
5902e8f7 370int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
371{
372 bd_t *bd = gd->bd;
12feb364
MF
373
374 print_bi_mem(bd);
f80e5359 375 print_bi_flash(bd);
8752e260 376 print_eth_ip_addr();
4e3fa7d8 377 print_baudrate();
ebd0d062
NI
378 return 0;
379}
380
a806ee6f
GR
381#elif defined(CONFIG_X86)
382
5902e8f7 383int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f 384{
a806ee6f 385 bd_t *bd = gd->bd;
a806ee6f 386
171e5396 387 print_bi_boot_params(bd);
5902e8f7 388
fd60e99f 389 print_bi_dram(bd);
a806ee6f
GR
390
391#if defined(CONFIG_CMD_NET)
8752e260 392 print_eth_ip_addr();
0c277ef9 393 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 394#endif
4e3fa7d8 395 print_baudrate();
a806ee6f
GR
396
397 return 0;
398}
399
6fcc3be4
SG
400#elif defined(CONFIG_SANDBOX)
401
402int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
403{
6fcc3be4
SG
404 bd_t *bd = gd->bd;
405
171e5396 406 print_bi_boot_params(bd);
fd60e99f 407 print_bi_dram(bd);
8752e260 408 print_eth_ip_addr();
6fcc3be4 409
c8fcd0f2 410#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
6fcc3be4 411 print_num("FB base ", gd->fb_base);
c8fcd0f2 412#endif
6fcc3be4
SG
413 return 0;
414}
415
64d61461
ML
416#elif defined(CONFIG_NDS32)
417
418int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
419{
64d61461
ML
420 bd_t *bd = gd->bd;
421
422 print_num("arch_number", bd->bi_arch_number);
171e5396 423 print_bi_boot_params(bd);
fd60e99f 424 print_bi_dram(bd);
8752e260 425 print_eth_ip_addr();
4e3fa7d8 426 print_baudrate();
64d61461
ML
427
428 return 0;
429}
430
946f6f24 431#elif defined(CONFIG_ARC)
bc5d5428
AB
432
433int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
434{
435 bd_t *bd = gd->bd;
436
12feb364 437 print_bi_mem(bd);
8752e260 438 print_eth_ip_addr();
4e3fa7d8 439 print_baudrate();
bc5d5428
AB
440
441 return 0;
442}
443
de5e5cea
CZ
444#elif defined(CONFIG_XTENSA)
445
446int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
447{
448 print_std_bdinfo(gd->bd);
449 return 0;
450}
451
c99ea790
RM
452#else
453 #error "a case for this architecture does not exist!"
454#endif
8bde7f77 455
8bde7f77
WD
456/* -------------------------------------------------------------------- */
457
0d498393
WD
458U_BOOT_CMD(
459 bdinfo, 1, 1, do_bdinfo,
2fb2604d 460 "print Board Info structure",
a89c33db 461 ""
8bde7f77 462);